qed_sriov.c 102 KB

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  1. /* QLogic qed NIC Driver
  2. * Copyright (c) 2015 QLogic Corporation
  3. *
  4. * This software is available under the terms of the GNU General Public License
  5. * (GPL) Version 2, available from the file COPYING in the main directory of
  6. * this source tree.
  7. */
  8. #include <linux/etherdevice.h>
  9. #include <linux/crc32.h>
  10. #include <linux/qed/qed_iov_if.h>
  11. #include "qed_cxt.h"
  12. #include "qed_hsi.h"
  13. #include "qed_hw.h"
  14. #include "qed_init_ops.h"
  15. #include "qed_int.h"
  16. #include "qed_mcp.h"
  17. #include "qed_reg_addr.h"
  18. #include "qed_sp.h"
  19. #include "qed_sriov.h"
  20. #include "qed_vf.h"
  21. /* IOV ramrods */
  22. static int qed_sp_vf_start(struct qed_hwfn *p_hwfn, struct qed_vf_info *p_vf)
  23. {
  24. struct vf_start_ramrod_data *p_ramrod = NULL;
  25. struct qed_spq_entry *p_ent = NULL;
  26. struct qed_sp_init_data init_data;
  27. int rc = -EINVAL;
  28. u8 fp_minor;
  29. /* Get SPQ entry */
  30. memset(&init_data, 0, sizeof(init_data));
  31. init_data.cid = qed_spq_get_cid(p_hwfn);
  32. init_data.opaque_fid = p_vf->opaque_fid;
  33. init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
  34. rc = qed_sp_init_request(p_hwfn, &p_ent,
  35. COMMON_RAMROD_VF_START,
  36. PROTOCOLID_COMMON, &init_data);
  37. if (rc)
  38. return rc;
  39. p_ramrod = &p_ent->ramrod.vf_start;
  40. p_ramrod->vf_id = GET_FIELD(p_vf->concrete_fid, PXP_CONCRETE_FID_VFID);
  41. p_ramrod->opaque_fid = cpu_to_le16(p_vf->opaque_fid);
  42. switch (p_hwfn->hw_info.personality) {
  43. case QED_PCI_ETH:
  44. p_ramrod->personality = PERSONALITY_ETH;
  45. break;
  46. case QED_PCI_ETH_ROCE:
  47. p_ramrod->personality = PERSONALITY_RDMA_AND_ETH;
  48. break;
  49. default:
  50. DP_NOTICE(p_hwfn, "Unknown VF personality %d\n",
  51. p_hwfn->hw_info.personality);
  52. return -EINVAL;
  53. }
  54. fp_minor = p_vf->acquire.vfdev_info.eth_fp_hsi_minor;
  55. if (fp_minor > ETH_HSI_VER_MINOR) {
  56. DP_VERBOSE(p_hwfn,
  57. QED_MSG_IOV,
  58. "VF [%d] - Requested fp hsi %02x.%02x which is slightly newer than PF's %02x.%02x; Configuring PFs version\n",
  59. p_vf->abs_vf_id,
  60. ETH_HSI_VER_MAJOR,
  61. fp_minor, ETH_HSI_VER_MAJOR, ETH_HSI_VER_MINOR);
  62. fp_minor = ETH_HSI_VER_MINOR;
  63. }
  64. p_ramrod->hsi_fp_ver.major_ver_arr[ETH_VER_KEY] = ETH_HSI_VER_MAJOR;
  65. p_ramrod->hsi_fp_ver.minor_ver_arr[ETH_VER_KEY] = fp_minor;
  66. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  67. "VF[%d] - Starting using HSI %02x.%02x\n",
  68. p_vf->abs_vf_id, ETH_HSI_VER_MAJOR, fp_minor);
  69. return qed_spq_post(p_hwfn, p_ent, NULL);
  70. }
  71. static int qed_sp_vf_stop(struct qed_hwfn *p_hwfn,
  72. u32 concrete_vfid, u16 opaque_vfid)
  73. {
  74. struct vf_stop_ramrod_data *p_ramrod = NULL;
  75. struct qed_spq_entry *p_ent = NULL;
  76. struct qed_sp_init_data init_data;
  77. int rc = -EINVAL;
  78. /* Get SPQ entry */
  79. memset(&init_data, 0, sizeof(init_data));
  80. init_data.cid = qed_spq_get_cid(p_hwfn);
  81. init_data.opaque_fid = opaque_vfid;
  82. init_data.comp_mode = QED_SPQ_MODE_EBLOCK;
  83. rc = qed_sp_init_request(p_hwfn, &p_ent,
  84. COMMON_RAMROD_VF_STOP,
  85. PROTOCOLID_COMMON, &init_data);
  86. if (rc)
  87. return rc;
  88. p_ramrod = &p_ent->ramrod.vf_stop;
  89. p_ramrod->vf_id = GET_FIELD(concrete_vfid, PXP_CONCRETE_FID_VFID);
  90. return qed_spq_post(p_hwfn, p_ent, NULL);
  91. }
  92. bool qed_iov_is_valid_vfid(struct qed_hwfn *p_hwfn,
  93. int rel_vf_id, bool b_enabled_only)
  94. {
  95. if (!p_hwfn->pf_iov_info) {
  96. DP_NOTICE(p_hwfn->cdev, "No iov info\n");
  97. return false;
  98. }
  99. if ((rel_vf_id >= p_hwfn->cdev->p_iov_info->total_vfs) ||
  100. (rel_vf_id < 0))
  101. return false;
  102. if ((!p_hwfn->pf_iov_info->vfs_array[rel_vf_id].b_init) &&
  103. b_enabled_only)
  104. return false;
  105. return true;
  106. }
  107. static struct qed_vf_info *qed_iov_get_vf_info(struct qed_hwfn *p_hwfn,
  108. u16 relative_vf_id,
  109. bool b_enabled_only)
  110. {
  111. struct qed_vf_info *vf = NULL;
  112. if (!p_hwfn->pf_iov_info) {
  113. DP_NOTICE(p_hwfn->cdev, "No iov info\n");
  114. return NULL;
  115. }
  116. if (qed_iov_is_valid_vfid(p_hwfn, relative_vf_id, b_enabled_only))
  117. vf = &p_hwfn->pf_iov_info->vfs_array[relative_vf_id];
  118. else
  119. DP_ERR(p_hwfn, "qed_iov_get_vf_info: VF[%d] is not enabled\n",
  120. relative_vf_id);
  121. return vf;
  122. }
  123. static bool qed_iov_validate_rxq(struct qed_hwfn *p_hwfn,
  124. struct qed_vf_info *p_vf, u16 rx_qid)
  125. {
  126. if (rx_qid >= p_vf->num_rxqs)
  127. DP_VERBOSE(p_hwfn,
  128. QED_MSG_IOV,
  129. "VF[0x%02x] - can't touch Rx queue[%04x]; Only 0x%04x are allocated\n",
  130. p_vf->abs_vf_id, rx_qid, p_vf->num_rxqs);
  131. return rx_qid < p_vf->num_rxqs;
  132. }
  133. static bool qed_iov_validate_txq(struct qed_hwfn *p_hwfn,
  134. struct qed_vf_info *p_vf, u16 tx_qid)
  135. {
  136. if (tx_qid >= p_vf->num_txqs)
  137. DP_VERBOSE(p_hwfn,
  138. QED_MSG_IOV,
  139. "VF[0x%02x] - can't touch Tx queue[%04x]; Only 0x%04x are allocated\n",
  140. p_vf->abs_vf_id, tx_qid, p_vf->num_txqs);
  141. return tx_qid < p_vf->num_txqs;
  142. }
  143. static bool qed_iov_validate_sb(struct qed_hwfn *p_hwfn,
  144. struct qed_vf_info *p_vf, u16 sb_idx)
  145. {
  146. int i;
  147. for (i = 0; i < p_vf->num_sbs; i++)
  148. if (p_vf->igu_sbs[i] == sb_idx)
  149. return true;
  150. DP_VERBOSE(p_hwfn,
  151. QED_MSG_IOV,
  152. "VF[0%02x] - tried using sb_idx %04x which doesn't exist as one of its 0x%02x SBs\n",
  153. p_vf->abs_vf_id, sb_idx, p_vf->num_sbs);
  154. return false;
  155. }
  156. int qed_iov_post_vf_bulletin(struct qed_hwfn *p_hwfn,
  157. int vfid, struct qed_ptt *p_ptt)
  158. {
  159. struct qed_bulletin_content *p_bulletin;
  160. int crc_size = sizeof(p_bulletin->crc);
  161. struct qed_dmae_params params;
  162. struct qed_vf_info *p_vf;
  163. p_vf = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
  164. if (!p_vf)
  165. return -EINVAL;
  166. if (!p_vf->vf_bulletin)
  167. return -EINVAL;
  168. p_bulletin = p_vf->bulletin.p_virt;
  169. /* Increment bulletin board version and compute crc */
  170. p_bulletin->version++;
  171. p_bulletin->crc = crc32(0, (u8 *)p_bulletin + crc_size,
  172. p_vf->bulletin.size - crc_size);
  173. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  174. "Posting Bulletin 0x%08x to VF[%d] (CRC 0x%08x)\n",
  175. p_bulletin->version, p_vf->relative_vf_id, p_bulletin->crc);
  176. /* propagate bulletin board via dmae to vm memory */
  177. memset(&params, 0, sizeof(params));
  178. params.flags = QED_DMAE_FLAG_VF_DST;
  179. params.dst_vfid = p_vf->abs_vf_id;
  180. return qed_dmae_host2host(p_hwfn, p_ptt, p_vf->bulletin.phys,
  181. p_vf->vf_bulletin, p_vf->bulletin.size / 4,
  182. &params);
  183. }
  184. static int qed_iov_pci_cfg_info(struct qed_dev *cdev)
  185. {
  186. struct qed_hw_sriov_info *iov = cdev->p_iov_info;
  187. int pos = iov->pos;
  188. DP_VERBOSE(cdev, QED_MSG_IOV, "sriov ext pos %d\n", pos);
  189. pci_read_config_word(cdev->pdev, pos + PCI_SRIOV_CTRL, &iov->ctrl);
  190. pci_read_config_word(cdev->pdev,
  191. pos + PCI_SRIOV_TOTAL_VF, &iov->total_vfs);
  192. pci_read_config_word(cdev->pdev,
  193. pos + PCI_SRIOV_INITIAL_VF, &iov->initial_vfs);
  194. pci_read_config_word(cdev->pdev, pos + PCI_SRIOV_NUM_VF, &iov->num_vfs);
  195. if (iov->num_vfs) {
  196. DP_VERBOSE(cdev,
  197. QED_MSG_IOV,
  198. "Number of VFs are already set to non-zero value. Ignoring PCI configuration value\n");
  199. iov->num_vfs = 0;
  200. }
  201. pci_read_config_word(cdev->pdev,
  202. pos + PCI_SRIOV_VF_OFFSET, &iov->offset);
  203. pci_read_config_word(cdev->pdev,
  204. pos + PCI_SRIOV_VF_STRIDE, &iov->stride);
  205. pci_read_config_word(cdev->pdev,
  206. pos + PCI_SRIOV_VF_DID, &iov->vf_device_id);
  207. pci_read_config_dword(cdev->pdev,
  208. pos + PCI_SRIOV_SUP_PGSIZE, &iov->pgsz);
  209. pci_read_config_dword(cdev->pdev, pos + PCI_SRIOV_CAP, &iov->cap);
  210. pci_read_config_byte(cdev->pdev, pos + PCI_SRIOV_FUNC_LINK, &iov->link);
  211. DP_VERBOSE(cdev,
  212. QED_MSG_IOV,
  213. "IOV info: nres %d, cap 0x%x, ctrl 0x%x, total %d, initial %d, num vfs %d, offset %d, stride %d, page size 0x%x\n",
  214. iov->nres,
  215. iov->cap,
  216. iov->ctrl,
  217. iov->total_vfs,
  218. iov->initial_vfs,
  219. iov->nr_virtfn, iov->offset, iov->stride, iov->pgsz);
  220. /* Some sanity checks */
  221. if (iov->num_vfs > NUM_OF_VFS(cdev) ||
  222. iov->total_vfs > NUM_OF_VFS(cdev)) {
  223. /* This can happen only due to a bug. In this case we set
  224. * num_vfs to zero to avoid memory corruption in the code that
  225. * assumes max number of vfs
  226. */
  227. DP_NOTICE(cdev,
  228. "IOV: Unexpected number of vfs set: %d setting num_vf to zero\n",
  229. iov->num_vfs);
  230. iov->num_vfs = 0;
  231. iov->total_vfs = 0;
  232. }
  233. return 0;
  234. }
  235. static void qed_iov_clear_vf_igu_blocks(struct qed_hwfn *p_hwfn,
  236. struct qed_ptt *p_ptt)
  237. {
  238. struct qed_igu_block *p_sb;
  239. u16 sb_id;
  240. u32 val;
  241. if (!p_hwfn->hw_info.p_igu_info) {
  242. DP_ERR(p_hwfn,
  243. "qed_iov_clear_vf_igu_blocks IGU Info not initialized\n");
  244. return;
  245. }
  246. for (sb_id = 0; sb_id < QED_MAPPING_MEMORY_SIZE(p_hwfn->cdev);
  247. sb_id++) {
  248. p_sb = &p_hwfn->hw_info.p_igu_info->igu_map.igu_blocks[sb_id];
  249. if ((p_sb->status & QED_IGU_STATUS_FREE) &&
  250. !(p_sb->status & QED_IGU_STATUS_PF)) {
  251. val = qed_rd(p_hwfn, p_ptt,
  252. IGU_REG_MAPPING_MEMORY + sb_id * 4);
  253. SET_FIELD(val, IGU_MAPPING_LINE_VALID, 0);
  254. qed_wr(p_hwfn, p_ptt,
  255. IGU_REG_MAPPING_MEMORY + 4 * sb_id, val);
  256. }
  257. }
  258. }
  259. static void qed_iov_setup_vfdb(struct qed_hwfn *p_hwfn)
  260. {
  261. struct qed_hw_sriov_info *p_iov = p_hwfn->cdev->p_iov_info;
  262. struct qed_pf_iov *p_iov_info = p_hwfn->pf_iov_info;
  263. struct qed_bulletin_content *p_bulletin_virt;
  264. dma_addr_t req_p, rply_p, bulletin_p;
  265. union pfvf_tlvs *p_reply_virt_addr;
  266. union vfpf_tlvs *p_req_virt_addr;
  267. u8 idx = 0;
  268. memset(p_iov_info->vfs_array, 0, sizeof(p_iov_info->vfs_array));
  269. p_req_virt_addr = p_iov_info->mbx_msg_virt_addr;
  270. req_p = p_iov_info->mbx_msg_phys_addr;
  271. p_reply_virt_addr = p_iov_info->mbx_reply_virt_addr;
  272. rply_p = p_iov_info->mbx_reply_phys_addr;
  273. p_bulletin_virt = p_iov_info->p_bulletins;
  274. bulletin_p = p_iov_info->bulletins_phys;
  275. if (!p_req_virt_addr || !p_reply_virt_addr || !p_bulletin_virt) {
  276. DP_ERR(p_hwfn,
  277. "qed_iov_setup_vfdb called without allocating mem first\n");
  278. return;
  279. }
  280. for (idx = 0; idx < p_iov->total_vfs; idx++) {
  281. struct qed_vf_info *vf = &p_iov_info->vfs_array[idx];
  282. u32 concrete;
  283. vf->vf_mbx.req_virt = p_req_virt_addr + idx;
  284. vf->vf_mbx.req_phys = req_p + idx * sizeof(union vfpf_tlvs);
  285. vf->vf_mbx.reply_virt = p_reply_virt_addr + idx;
  286. vf->vf_mbx.reply_phys = rply_p + idx * sizeof(union pfvf_tlvs);
  287. vf->state = VF_STOPPED;
  288. vf->b_init = false;
  289. vf->bulletin.phys = idx *
  290. sizeof(struct qed_bulletin_content) +
  291. bulletin_p;
  292. vf->bulletin.p_virt = p_bulletin_virt + idx;
  293. vf->bulletin.size = sizeof(struct qed_bulletin_content);
  294. vf->relative_vf_id = idx;
  295. vf->abs_vf_id = idx + p_iov->first_vf_in_pf;
  296. concrete = qed_vfid_to_concrete(p_hwfn, vf->abs_vf_id);
  297. vf->concrete_fid = concrete;
  298. vf->opaque_fid = (p_hwfn->hw_info.opaque_fid & 0xff) |
  299. (vf->abs_vf_id << 8);
  300. vf->vport_id = idx + 1;
  301. vf->num_mac_filters = QED_ETH_VF_NUM_MAC_FILTERS;
  302. vf->num_vlan_filters = QED_ETH_VF_NUM_VLAN_FILTERS;
  303. }
  304. }
  305. static int qed_iov_allocate_vfdb(struct qed_hwfn *p_hwfn)
  306. {
  307. struct qed_pf_iov *p_iov_info = p_hwfn->pf_iov_info;
  308. void **p_v_addr;
  309. u16 num_vfs = 0;
  310. num_vfs = p_hwfn->cdev->p_iov_info->total_vfs;
  311. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  312. "qed_iov_allocate_vfdb for %d VFs\n", num_vfs);
  313. /* Allocate PF Mailbox buffer (per-VF) */
  314. p_iov_info->mbx_msg_size = sizeof(union vfpf_tlvs) * num_vfs;
  315. p_v_addr = &p_iov_info->mbx_msg_virt_addr;
  316. *p_v_addr = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
  317. p_iov_info->mbx_msg_size,
  318. &p_iov_info->mbx_msg_phys_addr,
  319. GFP_KERNEL);
  320. if (!*p_v_addr)
  321. return -ENOMEM;
  322. /* Allocate PF Mailbox Reply buffer (per-VF) */
  323. p_iov_info->mbx_reply_size = sizeof(union pfvf_tlvs) * num_vfs;
  324. p_v_addr = &p_iov_info->mbx_reply_virt_addr;
  325. *p_v_addr = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
  326. p_iov_info->mbx_reply_size,
  327. &p_iov_info->mbx_reply_phys_addr,
  328. GFP_KERNEL);
  329. if (!*p_v_addr)
  330. return -ENOMEM;
  331. p_iov_info->bulletins_size = sizeof(struct qed_bulletin_content) *
  332. num_vfs;
  333. p_v_addr = &p_iov_info->p_bulletins;
  334. *p_v_addr = dma_alloc_coherent(&p_hwfn->cdev->pdev->dev,
  335. p_iov_info->bulletins_size,
  336. &p_iov_info->bulletins_phys,
  337. GFP_KERNEL);
  338. if (!*p_v_addr)
  339. return -ENOMEM;
  340. DP_VERBOSE(p_hwfn,
  341. QED_MSG_IOV,
  342. "PF's Requests mailbox [%p virt 0x%llx phys], Response mailbox [%p virt 0x%llx phys] Bulletins [%p virt 0x%llx phys]\n",
  343. p_iov_info->mbx_msg_virt_addr,
  344. (u64) p_iov_info->mbx_msg_phys_addr,
  345. p_iov_info->mbx_reply_virt_addr,
  346. (u64) p_iov_info->mbx_reply_phys_addr,
  347. p_iov_info->p_bulletins, (u64) p_iov_info->bulletins_phys);
  348. return 0;
  349. }
  350. static void qed_iov_free_vfdb(struct qed_hwfn *p_hwfn)
  351. {
  352. struct qed_pf_iov *p_iov_info = p_hwfn->pf_iov_info;
  353. if (p_hwfn->pf_iov_info->mbx_msg_virt_addr)
  354. dma_free_coherent(&p_hwfn->cdev->pdev->dev,
  355. p_iov_info->mbx_msg_size,
  356. p_iov_info->mbx_msg_virt_addr,
  357. p_iov_info->mbx_msg_phys_addr);
  358. if (p_hwfn->pf_iov_info->mbx_reply_virt_addr)
  359. dma_free_coherent(&p_hwfn->cdev->pdev->dev,
  360. p_iov_info->mbx_reply_size,
  361. p_iov_info->mbx_reply_virt_addr,
  362. p_iov_info->mbx_reply_phys_addr);
  363. if (p_iov_info->p_bulletins)
  364. dma_free_coherent(&p_hwfn->cdev->pdev->dev,
  365. p_iov_info->bulletins_size,
  366. p_iov_info->p_bulletins,
  367. p_iov_info->bulletins_phys);
  368. }
  369. int qed_iov_alloc(struct qed_hwfn *p_hwfn)
  370. {
  371. struct qed_pf_iov *p_sriov;
  372. if (!IS_PF_SRIOV(p_hwfn)) {
  373. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  374. "No SR-IOV - no need for IOV db\n");
  375. return 0;
  376. }
  377. p_sriov = kzalloc(sizeof(*p_sriov), GFP_KERNEL);
  378. if (!p_sriov) {
  379. DP_NOTICE(p_hwfn, "Failed to allocate `struct qed_sriov'\n");
  380. return -ENOMEM;
  381. }
  382. p_hwfn->pf_iov_info = p_sriov;
  383. return qed_iov_allocate_vfdb(p_hwfn);
  384. }
  385. void qed_iov_setup(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
  386. {
  387. if (!IS_PF_SRIOV(p_hwfn) || !IS_PF_SRIOV_ALLOC(p_hwfn))
  388. return;
  389. qed_iov_setup_vfdb(p_hwfn);
  390. qed_iov_clear_vf_igu_blocks(p_hwfn, p_ptt);
  391. }
  392. void qed_iov_free(struct qed_hwfn *p_hwfn)
  393. {
  394. if (IS_PF_SRIOV_ALLOC(p_hwfn)) {
  395. qed_iov_free_vfdb(p_hwfn);
  396. kfree(p_hwfn->pf_iov_info);
  397. }
  398. }
  399. void qed_iov_free_hw_info(struct qed_dev *cdev)
  400. {
  401. kfree(cdev->p_iov_info);
  402. cdev->p_iov_info = NULL;
  403. }
  404. int qed_iov_hw_info(struct qed_hwfn *p_hwfn)
  405. {
  406. struct qed_dev *cdev = p_hwfn->cdev;
  407. int pos;
  408. int rc;
  409. if (IS_VF(p_hwfn->cdev))
  410. return 0;
  411. /* Learn the PCI configuration */
  412. pos = pci_find_ext_capability(p_hwfn->cdev->pdev,
  413. PCI_EXT_CAP_ID_SRIOV);
  414. if (!pos) {
  415. DP_VERBOSE(p_hwfn, QED_MSG_IOV, "No PCIe IOV support\n");
  416. return 0;
  417. }
  418. /* Allocate a new struct for IOV information */
  419. cdev->p_iov_info = kzalloc(sizeof(*cdev->p_iov_info), GFP_KERNEL);
  420. if (!cdev->p_iov_info) {
  421. DP_NOTICE(p_hwfn, "Can't support IOV due to lack of memory\n");
  422. return -ENOMEM;
  423. }
  424. cdev->p_iov_info->pos = pos;
  425. rc = qed_iov_pci_cfg_info(cdev);
  426. if (rc)
  427. return rc;
  428. /* We want PF IOV to be synonemous with the existance of p_iov_info;
  429. * In case the capability is published but there are no VFs, simply
  430. * de-allocate the struct.
  431. */
  432. if (!cdev->p_iov_info->total_vfs) {
  433. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  434. "IOV capabilities, but no VFs are published\n");
  435. kfree(cdev->p_iov_info);
  436. cdev->p_iov_info = NULL;
  437. return 0;
  438. }
  439. /* Calculate the first VF index - this is a bit tricky; Basically,
  440. * VFs start at offset 16 relative to PF0, and 2nd engine VFs begin
  441. * after the first engine's VFs.
  442. */
  443. cdev->p_iov_info->first_vf_in_pf = p_hwfn->cdev->p_iov_info->offset +
  444. p_hwfn->abs_pf_id - 16;
  445. if (QED_PATH_ID(p_hwfn))
  446. cdev->p_iov_info->first_vf_in_pf -= MAX_NUM_VFS_BB;
  447. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  448. "First VF in hwfn 0x%08x\n",
  449. cdev->p_iov_info->first_vf_in_pf);
  450. return 0;
  451. }
  452. static bool qed_iov_pf_sanity_check(struct qed_hwfn *p_hwfn, int vfid)
  453. {
  454. /* Check PF supports sriov */
  455. if (IS_VF(p_hwfn->cdev) || !IS_QED_SRIOV(p_hwfn->cdev) ||
  456. !IS_PF_SRIOV_ALLOC(p_hwfn))
  457. return false;
  458. /* Check VF validity */
  459. if (!qed_iov_is_valid_vfid(p_hwfn, vfid, true))
  460. return false;
  461. return true;
  462. }
  463. static void qed_iov_set_vf_to_disable(struct qed_dev *cdev,
  464. u16 rel_vf_id, u8 to_disable)
  465. {
  466. struct qed_vf_info *vf;
  467. int i;
  468. for_each_hwfn(cdev, i) {
  469. struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
  470. vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, false);
  471. if (!vf)
  472. continue;
  473. vf->to_disable = to_disable;
  474. }
  475. }
  476. void qed_iov_set_vfs_to_disable(struct qed_dev *cdev, u8 to_disable)
  477. {
  478. u16 i;
  479. if (!IS_QED_SRIOV(cdev))
  480. return;
  481. for (i = 0; i < cdev->p_iov_info->total_vfs; i++)
  482. qed_iov_set_vf_to_disable(cdev, i, to_disable);
  483. }
  484. static void qed_iov_vf_pglue_clear_err(struct qed_hwfn *p_hwfn,
  485. struct qed_ptt *p_ptt, u8 abs_vfid)
  486. {
  487. qed_wr(p_hwfn, p_ptt,
  488. PGLUE_B_REG_WAS_ERROR_VF_31_0_CLR + (abs_vfid >> 5) * 4,
  489. 1 << (abs_vfid & 0x1f));
  490. }
  491. static void qed_iov_vf_igu_reset(struct qed_hwfn *p_hwfn,
  492. struct qed_ptt *p_ptt, struct qed_vf_info *vf)
  493. {
  494. int i;
  495. /* Set VF masks and configuration - pretend */
  496. qed_fid_pretend(p_hwfn, p_ptt, (u16) vf->concrete_fid);
  497. qed_wr(p_hwfn, p_ptt, IGU_REG_STATISTIC_NUM_VF_MSG_SENT, 0);
  498. /* unpretend */
  499. qed_fid_pretend(p_hwfn, p_ptt, (u16) p_hwfn->hw_info.concrete_fid);
  500. /* iterate over all queues, clear sb consumer */
  501. for (i = 0; i < vf->num_sbs; i++)
  502. qed_int_igu_init_pure_rt_single(p_hwfn, p_ptt,
  503. vf->igu_sbs[i],
  504. vf->opaque_fid, true);
  505. }
  506. static void qed_iov_vf_igu_set_int(struct qed_hwfn *p_hwfn,
  507. struct qed_ptt *p_ptt,
  508. struct qed_vf_info *vf, bool enable)
  509. {
  510. u32 igu_vf_conf;
  511. qed_fid_pretend(p_hwfn, p_ptt, (u16) vf->concrete_fid);
  512. igu_vf_conf = qed_rd(p_hwfn, p_ptt, IGU_REG_VF_CONFIGURATION);
  513. if (enable)
  514. igu_vf_conf |= IGU_VF_CONF_MSI_MSIX_EN;
  515. else
  516. igu_vf_conf &= ~IGU_VF_CONF_MSI_MSIX_EN;
  517. qed_wr(p_hwfn, p_ptt, IGU_REG_VF_CONFIGURATION, igu_vf_conf);
  518. /* unpretend */
  519. qed_fid_pretend(p_hwfn, p_ptt, (u16) p_hwfn->hw_info.concrete_fid);
  520. }
  521. static int qed_iov_enable_vf_access(struct qed_hwfn *p_hwfn,
  522. struct qed_ptt *p_ptt,
  523. struct qed_vf_info *vf)
  524. {
  525. u32 igu_vf_conf = IGU_VF_CONF_FUNC_EN;
  526. int rc;
  527. if (vf->to_disable)
  528. return 0;
  529. DP_VERBOSE(p_hwfn,
  530. QED_MSG_IOV,
  531. "Enable internal access for vf %x [abs %x]\n",
  532. vf->abs_vf_id, QED_VF_ABS_ID(p_hwfn, vf));
  533. qed_iov_vf_pglue_clear_err(p_hwfn, p_ptt, QED_VF_ABS_ID(p_hwfn, vf));
  534. qed_iov_vf_igu_reset(p_hwfn, p_ptt, vf);
  535. rc = qed_mcp_config_vf_msix(p_hwfn, p_ptt, vf->abs_vf_id, vf->num_sbs);
  536. if (rc)
  537. return rc;
  538. qed_fid_pretend(p_hwfn, p_ptt, (u16) vf->concrete_fid);
  539. SET_FIELD(igu_vf_conf, IGU_VF_CONF_PARENT, p_hwfn->rel_pf_id);
  540. STORE_RT_REG(p_hwfn, IGU_REG_VF_CONFIGURATION_RT_OFFSET, igu_vf_conf);
  541. qed_init_run(p_hwfn, p_ptt, PHASE_VF, vf->abs_vf_id,
  542. p_hwfn->hw_info.hw_mode);
  543. /* unpretend */
  544. qed_fid_pretend(p_hwfn, p_ptt, (u16) p_hwfn->hw_info.concrete_fid);
  545. vf->state = VF_FREE;
  546. return rc;
  547. }
  548. /**
  549. * @brief qed_iov_config_perm_table - configure the permission
  550. * zone table.
  551. * In E4, queue zone permission table size is 320x9. There
  552. * are 320 VF queues for single engine device (256 for dual
  553. * engine device), and each entry has the following format:
  554. * {Valid, VF[7:0]}
  555. * @param p_hwfn
  556. * @param p_ptt
  557. * @param vf
  558. * @param enable
  559. */
  560. static void qed_iov_config_perm_table(struct qed_hwfn *p_hwfn,
  561. struct qed_ptt *p_ptt,
  562. struct qed_vf_info *vf, u8 enable)
  563. {
  564. u32 reg_addr, val;
  565. u16 qzone_id = 0;
  566. int qid;
  567. for (qid = 0; qid < vf->num_rxqs; qid++) {
  568. qed_fw_l2_queue(p_hwfn, vf->vf_queues[qid].fw_rx_qid,
  569. &qzone_id);
  570. reg_addr = PSWHST_REG_ZONE_PERMISSION_TABLE + qzone_id * 4;
  571. val = enable ? (vf->abs_vf_id | (1 << 8)) : 0;
  572. qed_wr(p_hwfn, p_ptt, reg_addr, val);
  573. }
  574. }
  575. static void qed_iov_enable_vf_traffic(struct qed_hwfn *p_hwfn,
  576. struct qed_ptt *p_ptt,
  577. struct qed_vf_info *vf)
  578. {
  579. /* Reset vf in IGU - interrupts are still disabled */
  580. qed_iov_vf_igu_reset(p_hwfn, p_ptt, vf);
  581. qed_iov_vf_igu_set_int(p_hwfn, p_ptt, vf, 1);
  582. /* Permission Table */
  583. qed_iov_config_perm_table(p_hwfn, p_ptt, vf, true);
  584. }
  585. static u8 qed_iov_alloc_vf_igu_sbs(struct qed_hwfn *p_hwfn,
  586. struct qed_ptt *p_ptt,
  587. struct qed_vf_info *vf, u16 num_rx_queues)
  588. {
  589. struct qed_igu_block *igu_blocks;
  590. int qid = 0, igu_id = 0;
  591. u32 val = 0;
  592. igu_blocks = p_hwfn->hw_info.p_igu_info->igu_map.igu_blocks;
  593. if (num_rx_queues > p_hwfn->hw_info.p_igu_info->free_blks)
  594. num_rx_queues = p_hwfn->hw_info.p_igu_info->free_blks;
  595. p_hwfn->hw_info.p_igu_info->free_blks -= num_rx_queues;
  596. SET_FIELD(val, IGU_MAPPING_LINE_FUNCTION_NUMBER, vf->abs_vf_id);
  597. SET_FIELD(val, IGU_MAPPING_LINE_VALID, 1);
  598. SET_FIELD(val, IGU_MAPPING_LINE_PF_VALID, 0);
  599. while ((qid < num_rx_queues) &&
  600. (igu_id < QED_MAPPING_MEMORY_SIZE(p_hwfn->cdev))) {
  601. if (igu_blocks[igu_id].status & QED_IGU_STATUS_FREE) {
  602. struct cau_sb_entry sb_entry;
  603. vf->igu_sbs[qid] = (u16)igu_id;
  604. igu_blocks[igu_id].status &= ~QED_IGU_STATUS_FREE;
  605. SET_FIELD(val, IGU_MAPPING_LINE_VECTOR_NUMBER, qid);
  606. qed_wr(p_hwfn, p_ptt,
  607. IGU_REG_MAPPING_MEMORY + sizeof(u32) * igu_id,
  608. val);
  609. /* Configure igu sb in CAU which were marked valid */
  610. qed_init_cau_sb_entry(p_hwfn, &sb_entry,
  611. p_hwfn->rel_pf_id,
  612. vf->abs_vf_id, 1);
  613. qed_dmae_host2grc(p_hwfn, p_ptt,
  614. (u64)(uintptr_t)&sb_entry,
  615. CAU_REG_SB_VAR_MEMORY +
  616. igu_id * sizeof(u64), 2, 0);
  617. qid++;
  618. }
  619. igu_id++;
  620. }
  621. vf->num_sbs = (u8) num_rx_queues;
  622. return vf->num_sbs;
  623. }
  624. static void qed_iov_free_vf_igu_sbs(struct qed_hwfn *p_hwfn,
  625. struct qed_ptt *p_ptt,
  626. struct qed_vf_info *vf)
  627. {
  628. struct qed_igu_info *p_info = p_hwfn->hw_info.p_igu_info;
  629. int idx, igu_id;
  630. u32 addr, val;
  631. /* Invalidate igu CAM lines and mark them as free */
  632. for (idx = 0; idx < vf->num_sbs; idx++) {
  633. igu_id = vf->igu_sbs[idx];
  634. addr = IGU_REG_MAPPING_MEMORY + sizeof(u32) * igu_id;
  635. val = qed_rd(p_hwfn, p_ptt, addr);
  636. SET_FIELD(val, IGU_MAPPING_LINE_VALID, 0);
  637. qed_wr(p_hwfn, p_ptt, addr, val);
  638. p_info->igu_map.igu_blocks[igu_id].status |=
  639. QED_IGU_STATUS_FREE;
  640. p_hwfn->hw_info.p_igu_info->free_blks++;
  641. }
  642. vf->num_sbs = 0;
  643. }
  644. static int qed_iov_init_hw_for_vf(struct qed_hwfn *p_hwfn,
  645. struct qed_ptt *p_ptt,
  646. u16 rel_vf_id, u16 num_rx_queues)
  647. {
  648. u8 num_of_vf_avaiable_chains = 0;
  649. struct qed_vf_info *vf = NULL;
  650. int rc = 0;
  651. u32 cids;
  652. u8 i;
  653. vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, false);
  654. if (!vf) {
  655. DP_ERR(p_hwfn, "qed_iov_init_hw_for_vf : vf is NULL\n");
  656. return -EINVAL;
  657. }
  658. if (vf->b_init) {
  659. DP_NOTICE(p_hwfn, "VF[%d] is already active.\n", rel_vf_id);
  660. return -EINVAL;
  661. }
  662. /* Limit number of queues according to number of CIDs */
  663. qed_cxt_get_proto_cid_count(p_hwfn, PROTOCOLID_ETH, &cids);
  664. DP_VERBOSE(p_hwfn,
  665. QED_MSG_IOV,
  666. "VF[%d] - requesting to initialize for 0x%04x queues [0x%04x CIDs available]\n",
  667. vf->relative_vf_id, num_rx_queues, (u16) cids);
  668. num_rx_queues = min_t(u16, num_rx_queues, ((u16) cids));
  669. num_of_vf_avaiable_chains = qed_iov_alloc_vf_igu_sbs(p_hwfn,
  670. p_ptt,
  671. vf,
  672. num_rx_queues);
  673. if (!num_of_vf_avaiable_chains) {
  674. DP_ERR(p_hwfn, "no available igu sbs\n");
  675. return -ENOMEM;
  676. }
  677. /* Choose queue number and index ranges */
  678. vf->num_rxqs = num_of_vf_avaiable_chains;
  679. vf->num_txqs = num_of_vf_avaiable_chains;
  680. for (i = 0; i < vf->num_rxqs; i++) {
  681. u16 queue_id = qed_int_queue_id_from_sb_id(p_hwfn,
  682. vf->igu_sbs[i]);
  683. if (queue_id > RESC_NUM(p_hwfn, QED_L2_QUEUE)) {
  684. DP_NOTICE(p_hwfn,
  685. "VF[%d] will require utilizing of out-of-bounds queues - %04x\n",
  686. vf->relative_vf_id, queue_id);
  687. return -EINVAL;
  688. }
  689. /* CIDs are per-VF, so no problem having them 0-based. */
  690. vf->vf_queues[i].fw_rx_qid = queue_id;
  691. vf->vf_queues[i].fw_tx_qid = queue_id;
  692. vf->vf_queues[i].fw_cid = i;
  693. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  694. "VF[%d] - [%d] SB %04x, Tx/Rx queue %04x CID %04x\n",
  695. vf->relative_vf_id, i, vf->igu_sbs[i], queue_id, i);
  696. }
  697. rc = qed_iov_enable_vf_access(p_hwfn, p_ptt, vf);
  698. if (!rc) {
  699. vf->b_init = true;
  700. if (IS_LEAD_HWFN(p_hwfn))
  701. p_hwfn->cdev->p_iov_info->num_vfs++;
  702. }
  703. return rc;
  704. }
  705. static void qed_iov_set_link(struct qed_hwfn *p_hwfn,
  706. u16 vfid,
  707. struct qed_mcp_link_params *params,
  708. struct qed_mcp_link_state *link,
  709. struct qed_mcp_link_capabilities *p_caps)
  710. {
  711. struct qed_vf_info *p_vf = qed_iov_get_vf_info(p_hwfn,
  712. vfid,
  713. false);
  714. struct qed_bulletin_content *p_bulletin;
  715. if (!p_vf)
  716. return;
  717. p_bulletin = p_vf->bulletin.p_virt;
  718. p_bulletin->req_autoneg = params->speed.autoneg;
  719. p_bulletin->req_adv_speed = params->speed.advertised_speeds;
  720. p_bulletin->req_forced_speed = params->speed.forced_speed;
  721. p_bulletin->req_autoneg_pause = params->pause.autoneg;
  722. p_bulletin->req_forced_rx = params->pause.forced_rx;
  723. p_bulletin->req_forced_tx = params->pause.forced_tx;
  724. p_bulletin->req_loopback = params->loopback_mode;
  725. p_bulletin->link_up = link->link_up;
  726. p_bulletin->speed = link->speed;
  727. p_bulletin->full_duplex = link->full_duplex;
  728. p_bulletin->autoneg = link->an;
  729. p_bulletin->autoneg_complete = link->an_complete;
  730. p_bulletin->parallel_detection = link->parallel_detection;
  731. p_bulletin->pfc_enabled = link->pfc_enabled;
  732. p_bulletin->partner_adv_speed = link->partner_adv_speed;
  733. p_bulletin->partner_tx_flow_ctrl_en = link->partner_tx_flow_ctrl_en;
  734. p_bulletin->partner_rx_flow_ctrl_en = link->partner_rx_flow_ctrl_en;
  735. p_bulletin->partner_adv_pause = link->partner_adv_pause;
  736. p_bulletin->sfp_tx_fault = link->sfp_tx_fault;
  737. p_bulletin->capability_speed = p_caps->speed_capabilities;
  738. }
  739. static int qed_iov_release_hw_for_vf(struct qed_hwfn *p_hwfn,
  740. struct qed_ptt *p_ptt, u16 rel_vf_id)
  741. {
  742. struct qed_mcp_link_capabilities caps;
  743. struct qed_mcp_link_params params;
  744. struct qed_mcp_link_state link;
  745. struct qed_vf_info *vf = NULL;
  746. vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, true);
  747. if (!vf) {
  748. DP_ERR(p_hwfn, "qed_iov_release_hw_for_vf : vf is NULL\n");
  749. return -EINVAL;
  750. }
  751. if (vf->bulletin.p_virt)
  752. memset(vf->bulletin.p_virt, 0, sizeof(*vf->bulletin.p_virt));
  753. memset(&vf->p_vf_info, 0, sizeof(vf->p_vf_info));
  754. /* Get the link configuration back in bulletin so
  755. * that when VFs are re-enabled they get the actual
  756. * link configuration.
  757. */
  758. memcpy(&params, qed_mcp_get_link_params(p_hwfn), sizeof(params));
  759. memcpy(&link, qed_mcp_get_link_state(p_hwfn), sizeof(link));
  760. memcpy(&caps, qed_mcp_get_link_capabilities(p_hwfn), sizeof(caps));
  761. qed_iov_set_link(p_hwfn, rel_vf_id, &params, &link, &caps);
  762. /* Forget the VF's acquisition message */
  763. memset(&vf->acquire, 0, sizeof(vf->acquire));
  764. /* disablng interrupts and resetting permission table was done during
  765. * vf-close, however, we could get here without going through vf_close
  766. */
  767. /* Disable Interrupts for VF */
  768. qed_iov_vf_igu_set_int(p_hwfn, p_ptt, vf, 0);
  769. /* Reset Permission table */
  770. qed_iov_config_perm_table(p_hwfn, p_ptt, vf, 0);
  771. vf->num_rxqs = 0;
  772. vf->num_txqs = 0;
  773. qed_iov_free_vf_igu_sbs(p_hwfn, p_ptt, vf);
  774. if (vf->b_init) {
  775. vf->b_init = false;
  776. if (IS_LEAD_HWFN(p_hwfn))
  777. p_hwfn->cdev->p_iov_info->num_vfs--;
  778. }
  779. return 0;
  780. }
  781. static bool qed_iov_tlv_supported(u16 tlvtype)
  782. {
  783. return CHANNEL_TLV_NONE < tlvtype && tlvtype < CHANNEL_TLV_MAX;
  784. }
  785. /* place a given tlv on the tlv buffer, continuing current tlv list */
  786. void *qed_add_tlv(struct qed_hwfn *p_hwfn, u8 **offset, u16 type, u16 length)
  787. {
  788. struct channel_tlv *tl = (struct channel_tlv *)*offset;
  789. tl->type = type;
  790. tl->length = length;
  791. /* Offset should keep pointing to next TLV (the end of the last) */
  792. *offset += length;
  793. /* Return a pointer to the start of the added tlv */
  794. return *offset - length;
  795. }
  796. /* list the types and lengths of the tlvs on the buffer */
  797. void qed_dp_tlv_list(struct qed_hwfn *p_hwfn, void *tlvs_list)
  798. {
  799. u16 i = 1, total_length = 0;
  800. struct channel_tlv *tlv;
  801. do {
  802. tlv = (struct channel_tlv *)((u8 *)tlvs_list + total_length);
  803. /* output tlv */
  804. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  805. "TLV number %d: type %d, length %d\n",
  806. i, tlv->type, tlv->length);
  807. if (tlv->type == CHANNEL_TLV_LIST_END)
  808. return;
  809. /* Validate entry - protect against malicious VFs */
  810. if (!tlv->length) {
  811. DP_NOTICE(p_hwfn, "TLV of length 0 found\n");
  812. return;
  813. }
  814. total_length += tlv->length;
  815. if (total_length >= sizeof(struct tlv_buffer_size)) {
  816. DP_NOTICE(p_hwfn, "TLV ==> Buffer overflow\n");
  817. return;
  818. }
  819. i++;
  820. } while (1);
  821. }
  822. static void qed_iov_send_response(struct qed_hwfn *p_hwfn,
  823. struct qed_ptt *p_ptt,
  824. struct qed_vf_info *p_vf,
  825. u16 length, u8 status)
  826. {
  827. struct qed_iov_vf_mbx *mbx = &p_vf->vf_mbx;
  828. struct qed_dmae_params params;
  829. u8 eng_vf_id;
  830. mbx->reply_virt->default_resp.hdr.status = status;
  831. qed_dp_tlv_list(p_hwfn, mbx->reply_virt);
  832. eng_vf_id = p_vf->abs_vf_id;
  833. memset(&params, 0, sizeof(struct qed_dmae_params));
  834. params.flags = QED_DMAE_FLAG_VF_DST;
  835. params.dst_vfid = eng_vf_id;
  836. qed_dmae_host2host(p_hwfn, p_ptt, mbx->reply_phys + sizeof(u64),
  837. mbx->req_virt->first_tlv.reply_address +
  838. sizeof(u64),
  839. (sizeof(union pfvf_tlvs) - sizeof(u64)) / 4,
  840. &params);
  841. qed_dmae_host2host(p_hwfn, p_ptt, mbx->reply_phys,
  842. mbx->req_virt->first_tlv.reply_address,
  843. sizeof(u64) / 4, &params);
  844. REG_WR(p_hwfn,
  845. GTT_BAR0_MAP_REG_USDM_RAM +
  846. USTORM_VF_PF_CHANNEL_READY_OFFSET(eng_vf_id), 1);
  847. }
  848. static u16 qed_iov_vport_to_tlv(struct qed_hwfn *p_hwfn,
  849. enum qed_iov_vport_update_flag flag)
  850. {
  851. switch (flag) {
  852. case QED_IOV_VP_UPDATE_ACTIVATE:
  853. return CHANNEL_TLV_VPORT_UPDATE_ACTIVATE;
  854. case QED_IOV_VP_UPDATE_VLAN_STRIP:
  855. return CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP;
  856. case QED_IOV_VP_UPDATE_TX_SWITCH:
  857. return CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH;
  858. case QED_IOV_VP_UPDATE_MCAST:
  859. return CHANNEL_TLV_VPORT_UPDATE_MCAST;
  860. case QED_IOV_VP_UPDATE_ACCEPT_PARAM:
  861. return CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM;
  862. case QED_IOV_VP_UPDATE_RSS:
  863. return CHANNEL_TLV_VPORT_UPDATE_RSS;
  864. case QED_IOV_VP_UPDATE_ACCEPT_ANY_VLAN:
  865. return CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN;
  866. case QED_IOV_VP_UPDATE_SGE_TPA:
  867. return CHANNEL_TLV_VPORT_UPDATE_SGE_TPA;
  868. default:
  869. return 0;
  870. }
  871. }
  872. static u16 qed_iov_prep_vp_update_resp_tlvs(struct qed_hwfn *p_hwfn,
  873. struct qed_vf_info *p_vf,
  874. struct qed_iov_vf_mbx *p_mbx,
  875. u8 status,
  876. u16 tlvs_mask, u16 tlvs_accepted)
  877. {
  878. struct pfvf_def_resp_tlv *resp;
  879. u16 size, total_len, i;
  880. memset(p_mbx->reply_virt, 0, sizeof(union pfvf_tlvs));
  881. p_mbx->offset = (u8 *)p_mbx->reply_virt;
  882. size = sizeof(struct pfvf_def_resp_tlv);
  883. total_len = size;
  884. qed_add_tlv(p_hwfn, &p_mbx->offset, CHANNEL_TLV_VPORT_UPDATE, size);
  885. /* Prepare response for all extended tlvs if they are found by PF */
  886. for (i = 0; i < QED_IOV_VP_UPDATE_MAX; i++) {
  887. if (!(tlvs_mask & (1 << i)))
  888. continue;
  889. resp = qed_add_tlv(p_hwfn, &p_mbx->offset,
  890. qed_iov_vport_to_tlv(p_hwfn, i), size);
  891. if (tlvs_accepted & (1 << i))
  892. resp->hdr.status = status;
  893. else
  894. resp->hdr.status = PFVF_STATUS_NOT_SUPPORTED;
  895. DP_VERBOSE(p_hwfn,
  896. QED_MSG_IOV,
  897. "VF[%d] - vport_update response: TLV %d, status %02x\n",
  898. p_vf->relative_vf_id,
  899. qed_iov_vport_to_tlv(p_hwfn, i), resp->hdr.status);
  900. total_len += size;
  901. }
  902. qed_add_tlv(p_hwfn, &p_mbx->offset, CHANNEL_TLV_LIST_END,
  903. sizeof(struct channel_list_end_tlv));
  904. return total_len;
  905. }
  906. static void qed_iov_prepare_resp(struct qed_hwfn *p_hwfn,
  907. struct qed_ptt *p_ptt,
  908. struct qed_vf_info *vf_info,
  909. u16 type, u16 length, u8 status)
  910. {
  911. struct qed_iov_vf_mbx *mbx = &vf_info->vf_mbx;
  912. mbx->offset = (u8 *)mbx->reply_virt;
  913. qed_add_tlv(p_hwfn, &mbx->offset, type, length);
  914. qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_LIST_END,
  915. sizeof(struct channel_list_end_tlv));
  916. qed_iov_send_response(p_hwfn, p_ptt, vf_info, length, status);
  917. }
  918. struct qed_public_vf_info *qed_iov_get_public_vf_info(struct qed_hwfn *p_hwfn,
  919. u16 relative_vf_id,
  920. bool b_enabled_only)
  921. {
  922. struct qed_vf_info *vf = NULL;
  923. vf = qed_iov_get_vf_info(p_hwfn, relative_vf_id, b_enabled_only);
  924. if (!vf)
  925. return NULL;
  926. return &vf->p_vf_info;
  927. }
  928. void qed_iov_clean_vf(struct qed_hwfn *p_hwfn, u8 vfid)
  929. {
  930. struct qed_public_vf_info *vf_info;
  931. vf_info = qed_iov_get_public_vf_info(p_hwfn, vfid, false);
  932. if (!vf_info)
  933. return;
  934. /* Clear the VF mac */
  935. memset(vf_info->mac, 0, ETH_ALEN);
  936. }
  937. static void qed_iov_vf_cleanup(struct qed_hwfn *p_hwfn,
  938. struct qed_vf_info *p_vf)
  939. {
  940. u32 i;
  941. p_vf->vf_bulletin = 0;
  942. p_vf->vport_instance = 0;
  943. p_vf->configured_features = 0;
  944. /* If VF previously requested less resources, go back to default */
  945. p_vf->num_rxqs = p_vf->num_sbs;
  946. p_vf->num_txqs = p_vf->num_sbs;
  947. p_vf->num_active_rxqs = 0;
  948. for (i = 0; i < QED_MAX_VF_CHAINS_PER_PF; i++)
  949. p_vf->vf_queues[i].rxq_active = 0;
  950. memset(&p_vf->shadow_config, 0, sizeof(p_vf->shadow_config));
  951. memset(&p_vf->acquire, 0, sizeof(p_vf->acquire));
  952. qed_iov_clean_vf(p_hwfn, p_vf->relative_vf_id);
  953. }
  954. static u8 qed_iov_vf_mbx_acquire_resc(struct qed_hwfn *p_hwfn,
  955. struct qed_ptt *p_ptt,
  956. struct qed_vf_info *p_vf,
  957. struct vf_pf_resc_request *p_req,
  958. struct pf_vf_resc *p_resp)
  959. {
  960. int i;
  961. /* Queue related information */
  962. p_resp->num_rxqs = p_vf->num_rxqs;
  963. p_resp->num_txqs = p_vf->num_txqs;
  964. p_resp->num_sbs = p_vf->num_sbs;
  965. for (i = 0; i < p_resp->num_sbs; i++) {
  966. p_resp->hw_sbs[i].hw_sb_id = p_vf->igu_sbs[i];
  967. p_resp->hw_sbs[i].sb_qid = 0;
  968. }
  969. /* These fields are filled for backward compatibility.
  970. * Unused by modern vfs.
  971. */
  972. for (i = 0; i < p_resp->num_rxqs; i++) {
  973. qed_fw_l2_queue(p_hwfn, p_vf->vf_queues[i].fw_rx_qid,
  974. (u16 *)&p_resp->hw_qid[i]);
  975. p_resp->cid[i] = p_vf->vf_queues[i].fw_cid;
  976. }
  977. /* Filter related information */
  978. p_resp->num_mac_filters = min_t(u8, p_vf->num_mac_filters,
  979. p_req->num_mac_filters);
  980. p_resp->num_vlan_filters = min_t(u8, p_vf->num_vlan_filters,
  981. p_req->num_vlan_filters);
  982. /* This isn't really needed/enforced, but some legacy VFs might depend
  983. * on the correct filling of this field.
  984. */
  985. p_resp->num_mc_filters = QED_MAX_MC_ADDRS;
  986. /* Validate sufficient resources for VF */
  987. if (p_resp->num_rxqs < p_req->num_rxqs ||
  988. p_resp->num_txqs < p_req->num_txqs ||
  989. p_resp->num_sbs < p_req->num_sbs ||
  990. p_resp->num_mac_filters < p_req->num_mac_filters ||
  991. p_resp->num_vlan_filters < p_req->num_vlan_filters ||
  992. p_resp->num_mc_filters < p_req->num_mc_filters) {
  993. DP_VERBOSE(p_hwfn,
  994. QED_MSG_IOV,
  995. "VF[%d] - Insufficient resources: rxq [%02x/%02x] txq [%02x/%02x] sbs [%02x/%02x] mac [%02x/%02x] vlan [%02x/%02x] mc [%02x/%02x]\n",
  996. p_vf->abs_vf_id,
  997. p_req->num_rxqs,
  998. p_resp->num_rxqs,
  999. p_req->num_rxqs,
  1000. p_resp->num_txqs,
  1001. p_req->num_sbs,
  1002. p_resp->num_sbs,
  1003. p_req->num_mac_filters,
  1004. p_resp->num_mac_filters,
  1005. p_req->num_vlan_filters,
  1006. p_resp->num_vlan_filters,
  1007. p_req->num_mc_filters, p_resp->num_mc_filters);
  1008. return PFVF_STATUS_NO_RESOURCE;
  1009. }
  1010. return PFVF_STATUS_SUCCESS;
  1011. }
  1012. static void qed_iov_vf_mbx_acquire_stats(struct qed_hwfn *p_hwfn,
  1013. struct pfvf_stats_info *p_stats)
  1014. {
  1015. p_stats->mstats.address = PXP_VF_BAR0_START_MSDM_ZONE_B +
  1016. offsetof(struct mstorm_vf_zone,
  1017. non_trigger.eth_queue_stat);
  1018. p_stats->mstats.len = sizeof(struct eth_mstorm_per_queue_stat);
  1019. p_stats->ustats.address = PXP_VF_BAR0_START_USDM_ZONE_B +
  1020. offsetof(struct ustorm_vf_zone,
  1021. non_trigger.eth_queue_stat);
  1022. p_stats->ustats.len = sizeof(struct eth_ustorm_per_queue_stat);
  1023. p_stats->pstats.address = PXP_VF_BAR0_START_PSDM_ZONE_B +
  1024. offsetof(struct pstorm_vf_zone,
  1025. non_trigger.eth_queue_stat);
  1026. p_stats->pstats.len = sizeof(struct eth_pstorm_per_queue_stat);
  1027. p_stats->tstats.address = 0;
  1028. p_stats->tstats.len = 0;
  1029. }
  1030. static void qed_iov_vf_mbx_acquire(struct qed_hwfn *p_hwfn,
  1031. struct qed_ptt *p_ptt,
  1032. struct qed_vf_info *vf)
  1033. {
  1034. struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
  1035. struct pfvf_acquire_resp_tlv *resp = &mbx->reply_virt->acquire_resp;
  1036. struct pf_vf_pfdev_info *pfdev_info = &resp->pfdev_info;
  1037. struct vfpf_acquire_tlv *req = &mbx->req_virt->acquire;
  1038. u8 vfpf_status = PFVF_STATUS_NOT_SUPPORTED;
  1039. struct pf_vf_resc *resc = &resp->resc;
  1040. int rc;
  1041. memset(resp, 0, sizeof(*resp));
  1042. /* Validate FW compatibility */
  1043. if (req->vfdev_info.eth_fp_hsi_major != ETH_HSI_VER_MAJOR) {
  1044. DP_INFO(p_hwfn,
  1045. "VF[%d] needs fastpath HSI %02x.%02x, which is incompatible with loaded FW's faspath HSI %02x.%02x\n",
  1046. vf->abs_vf_id,
  1047. req->vfdev_info.eth_fp_hsi_major,
  1048. req->vfdev_info.eth_fp_hsi_minor,
  1049. ETH_HSI_VER_MAJOR, ETH_HSI_VER_MINOR);
  1050. /* Write the PF version so that VF would know which version
  1051. * is supported.
  1052. */
  1053. pfdev_info->major_fp_hsi = ETH_HSI_VER_MAJOR;
  1054. pfdev_info->minor_fp_hsi = ETH_HSI_VER_MINOR;
  1055. goto out;
  1056. }
  1057. /* On 100g PFs, prevent old VFs from loading */
  1058. if ((p_hwfn->cdev->num_hwfns > 1) &&
  1059. !(req->vfdev_info.capabilities & VFPF_ACQUIRE_CAP_100G)) {
  1060. DP_INFO(p_hwfn,
  1061. "VF[%d] is running an old driver that doesn't support 100g\n",
  1062. vf->abs_vf_id);
  1063. goto out;
  1064. }
  1065. /* Store the acquire message */
  1066. memcpy(&vf->acquire, req, sizeof(vf->acquire));
  1067. vf->opaque_fid = req->vfdev_info.opaque_fid;
  1068. vf->vf_bulletin = req->bulletin_addr;
  1069. vf->bulletin.size = (vf->bulletin.size < req->bulletin_size) ?
  1070. vf->bulletin.size : req->bulletin_size;
  1071. /* fill in pfdev info */
  1072. pfdev_info->chip_num = p_hwfn->cdev->chip_num;
  1073. pfdev_info->db_size = 0;
  1074. pfdev_info->indices_per_sb = PIS_PER_SB;
  1075. pfdev_info->capabilities = PFVF_ACQUIRE_CAP_DEFAULT_UNTAGGED |
  1076. PFVF_ACQUIRE_CAP_POST_FW_OVERRIDE;
  1077. if (p_hwfn->cdev->num_hwfns > 1)
  1078. pfdev_info->capabilities |= PFVF_ACQUIRE_CAP_100G;
  1079. qed_iov_vf_mbx_acquire_stats(p_hwfn, &pfdev_info->stats_info);
  1080. memcpy(pfdev_info->port_mac, p_hwfn->hw_info.hw_mac_addr, ETH_ALEN);
  1081. pfdev_info->fw_major = FW_MAJOR_VERSION;
  1082. pfdev_info->fw_minor = FW_MINOR_VERSION;
  1083. pfdev_info->fw_rev = FW_REVISION_VERSION;
  1084. pfdev_info->fw_eng = FW_ENGINEERING_VERSION;
  1085. pfdev_info->minor_fp_hsi = min_t(u8,
  1086. ETH_HSI_VER_MINOR,
  1087. req->vfdev_info.eth_fp_hsi_minor);
  1088. pfdev_info->os_type = VFPF_ACQUIRE_OS_LINUX;
  1089. qed_mcp_get_mfw_ver(p_hwfn, p_ptt, &pfdev_info->mfw_ver, NULL);
  1090. pfdev_info->dev_type = p_hwfn->cdev->type;
  1091. pfdev_info->chip_rev = p_hwfn->cdev->chip_rev;
  1092. /* Fill resources available to VF; Make sure there are enough to
  1093. * satisfy the VF's request.
  1094. */
  1095. vfpf_status = qed_iov_vf_mbx_acquire_resc(p_hwfn, p_ptt, vf,
  1096. &req->resc_request, resc);
  1097. if (vfpf_status != PFVF_STATUS_SUCCESS)
  1098. goto out;
  1099. /* Start the VF in FW */
  1100. rc = qed_sp_vf_start(p_hwfn, vf);
  1101. if (rc) {
  1102. DP_NOTICE(p_hwfn, "Failed to start VF[%02x]\n", vf->abs_vf_id);
  1103. vfpf_status = PFVF_STATUS_FAILURE;
  1104. goto out;
  1105. }
  1106. /* Fill agreed size of bulletin board in response */
  1107. resp->bulletin_size = vf->bulletin.size;
  1108. qed_iov_post_vf_bulletin(p_hwfn, vf->relative_vf_id, p_ptt);
  1109. DP_VERBOSE(p_hwfn,
  1110. QED_MSG_IOV,
  1111. "VF[%d] ACQUIRE_RESPONSE: pfdev_info- chip_num=0x%x, db_size=%d, idx_per_sb=%d, pf_cap=0x%llx\n"
  1112. "resources- n_rxq-%d, n_txq-%d, n_sbs-%d, n_macs-%d, n_vlans-%d\n",
  1113. vf->abs_vf_id,
  1114. resp->pfdev_info.chip_num,
  1115. resp->pfdev_info.db_size,
  1116. resp->pfdev_info.indices_per_sb,
  1117. resp->pfdev_info.capabilities,
  1118. resc->num_rxqs,
  1119. resc->num_txqs,
  1120. resc->num_sbs,
  1121. resc->num_mac_filters,
  1122. resc->num_vlan_filters);
  1123. vf->state = VF_ACQUIRED;
  1124. /* Prepare Response */
  1125. out:
  1126. qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_ACQUIRE,
  1127. sizeof(struct pfvf_acquire_resp_tlv), vfpf_status);
  1128. }
  1129. static int __qed_iov_spoofchk_set(struct qed_hwfn *p_hwfn,
  1130. struct qed_vf_info *p_vf, bool val)
  1131. {
  1132. struct qed_sp_vport_update_params params;
  1133. int rc;
  1134. if (val == p_vf->spoof_chk) {
  1135. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  1136. "Spoofchk value[%d] is already configured\n", val);
  1137. return 0;
  1138. }
  1139. memset(&params, 0, sizeof(struct qed_sp_vport_update_params));
  1140. params.opaque_fid = p_vf->opaque_fid;
  1141. params.vport_id = p_vf->vport_id;
  1142. params.update_anti_spoofing_en_flg = 1;
  1143. params.anti_spoofing_en = val;
  1144. rc = qed_sp_vport_update(p_hwfn, &params, QED_SPQ_MODE_EBLOCK, NULL);
  1145. if (!rc) {
  1146. p_vf->spoof_chk = val;
  1147. p_vf->req_spoofchk_val = p_vf->spoof_chk;
  1148. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  1149. "Spoofchk val[%d] configured\n", val);
  1150. } else {
  1151. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  1152. "Spoofchk configuration[val:%d] failed for VF[%d]\n",
  1153. val, p_vf->relative_vf_id);
  1154. }
  1155. return rc;
  1156. }
  1157. static int qed_iov_reconfigure_unicast_vlan(struct qed_hwfn *p_hwfn,
  1158. struct qed_vf_info *p_vf)
  1159. {
  1160. struct qed_filter_ucast filter;
  1161. int rc = 0;
  1162. int i;
  1163. memset(&filter, 0, sizeof(filter));
  1164. filter.is_rx_filter = 1;
  1165. filter.is_tx_filter = 1;
  1166. filter.vport_to_add_to = p_vf->vport_id;
  1167. filter.opcode = QED_FILTER_ADD;
  1168. /* Reconfigure vlans */
  1169. for (i = 0; i < QED_ETH_VF_NUM_VLAN_FILTERS + 1; i++) {
  1170. if (!p_vf->shadow_config.vlans[i].used)
  1171. continue;
  1172. filter.type = QED_FILTER_VLAN;
  1173. filter.vlan = p_vf->shadow_config.vlans[i].vid;
  1174. DP_VERBOSE(p_hwfn,
  1175. QED_MSG_IOV,
  1176. "Reconfiguring VLAN [0x%04x] for VF [%04x]\n",
  1177. filter.vlan, p_vf->relative_vf_id);
  1178. rc = qed_sp_eth_filter_ucast(p_hwfn,
  1179. p_vf->opaque_fid,
  1180. &filter,
  1181. QED_SPQ_MODE_CB, NULL);
  1182. if (rc) {
  1183. DP_NOTICE(p_hwfn,
  1184. "Failed to configure VLAN [%04x] to VF [%04x]\n",
  1185. filter.vlan, p_vf->relative_vf_id);
  1186. break;
  1187. }
  1188. }
  1189. return rc;
  1190. }
  1191. static int
  1192. qed_iov_reconfigure_unicast_shadow(struct qed_hwfn *p_hwfn,
  1193. struct qed_vf_info *p_vf, u64 events)
  1194. {
  1195. int rc = 0;
  1196. if ((events & (1 << VLAN_ADDR_FORCED)) &&
  1197. !(p_vf->configured_features & (1 << VLAN_ADDR_FORCED)))
  1198. rc = qed_iov_reconfigure_unicast_vlan(p_hwfn, p_vf);
  1199. return rc;
  1200. }
  1201. static int qed_iov_configure_vport_forced(struct qed_hwfn *p_hwfn,
  1202. struct qed_vf_info *p_vf, u64 events)
  1203. {
  1204. int rc = 0;
  1205. struct qed_filter_ucast filter;
  1206. if (!p_vf->vport_instance)
  1207. return -EINVAL;
  1208. if (events & (1 << MAC_ADDR_FORCED)) {
  1209. /* Since there's no way [currently] of removing the MAC,
  1210. * we can always assume this means we need to force it.
  1211. */
  1212. memset(&filter, 0, sizeof(filter));
  1213. filter.type = QED_FILTER_MAC;
  1214. filter.opcode = QED_FILTER_REPLACE;
  1215. filter.is_rx_filter = 1;
  1216. filter.is_tx_filter = 1;
  1217. filter.vport_to_add_to = p_vf->vport_id;
  1218. ether_addr_copy(filter.mac, p_vf->bulletin.p_virt->mac);
  1219. rc = qed_sp_eth_filter_ucast(p_hwfn, p_vf->opaque_fid,
  1220. &filter, QED_SPQ_MODE_CB, NULL);
  1221. if (rc) {
  1222. DP_NOTICE(p_hwfn,
  1223. "PF failed to configure MAC for VF\n");
  1224. return rc;
  1225. }
  1226. p_vf->configured_features |= 1 << MAC_ADDR_FORCED;
  1227. }
  1228. if (events & (1 << VLAN_ADDR_FORCED)) {
  1229. struct qed_sp_vport_update_params vport_update;
  1230. u8 removal;
  1231. int i;
  1232. memset(&filter, 0, sizeof(filter));
  1233. filter.type = QED_FILTER_VLAN;
  1234. filter.is_rx_filter = 1;
  1235. filter.is_tx_filter = 1;
  1236. filter.vport_to_add_to = p_vf->vport_id;
  1237. filter.vlan = p_vf->bulletin.p_virt->pvid;
  1238. filter.opcode = filter.vlan ? QED_FILTER_REPLACE :
  1239. QED_FILTER_FLUSH;
  1240. /* Send the ramrod */
  1241. rc = qed_sp_eth_filter_ucast(p_hwfn, p_vf->opaque_fid,
  1242. &filter, QED_SPQ_MODE_CB, NULL);
  1243. if (rc) {
  1244. DP_NOTICE(p_hwfn,
  1245. "PF failed to configure VLAN for VF\n");
  1246. return rc;
  1247. }
  1248. /* Update the default-vlan & silent vlan stripping */
  1249. memset(&vport_update, 0, sizeof(vport_update));
  1250. vport_update.opaque_fid = p_vf->opaque_fid;
  1251. vport_update.vport_id = p_vf->vport_id;
  1252. vport_update.update_default_vlan_enable_flg = 1;
  1253. vport_update.default_vlan_enable_flg = filter.vlan ? 1 : 0;
  1254. vport_update.update_default_vlan_flg = 1;
  1255. vport_update.default_vlan = filter.vlan;
  1256. vport_update.update_inner_vlan_removal_flg = 1;
  1257. removal = filter.vlan ? 1
  1258. : p_vf->shadow_config.inner_vlan_removal;
  1259. vport_update.inner_vlan_removal_flg = removal;
  1260. vport_update.silent_vlan_removal_flg = filter.vlan ? 1 : 0;
  1261. rc = qed_sp_vport_update(p_hwfn,
  1262. &vport_update,
  1263. QED_SPQ_MODE_EBLOCK, NULL);
  1264. if (rc) {
  1265. DP_NOTICE(p_hwfn,
  1266. "PF failed to configure VF vport for vlan\n");
  1267. return rc;
  1268. }
  1269. /* Update all the Rx queues */
  1270. for (i = 0; i < QED_MAX_VF_CHAINS_PER_PF; i++) {
  1271. u16 qid;
  1272. if (!p_vf->vf_queues[i].rxq_active)
  1273. continue;
  1274. qid = p_vf->vf_queues[i].fw_rx_qid;
  1275. rc = qed_sp_eth_rx_queues_update(p_hwfn, qid,
  1276. 1, 0, 1,
  1277. QED_SPQ_MODE_EBLOCK,
  1278. NULL);
  1279. if (rc) {
  1280. DP_NOTICE(p_hwfn,
  1281. "Failed to send Rx update fo queue[0x%04x]\n",
  1282. qid);
  1283. return rc;
  1284. }
  1285. }
  1286. if (filter.vlan)
  1287. p_vf->configured_features |= 1 << VLAN_ADDR_FORCED;
  1288. else
  1289. p_vf->configured_features &= ~(1 << VLAN_ADDR_FORCED);
  1290. }
  1291. /* If forced features are terminated, we need to configure the shadow
  1292. * configuration back again.
  1293. */
  1294. if (events)
  1295. qed_iov_reconfigure_unicast_shadow(p_hwfn, p_vf, events);
  1296. return rc;
  1297. }
  1298. static void qed_iov_vf_mbx_start_vport(struct qed_hwfn *p_hwfn,
  1299. struct qed_ptt *p_ptt,
  1300. struct qed_vf_info *vf)
  1301. {
  1302. struct qed_sp_vport_start_params params = { 0 };
  1303. struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
  1304. struct vfpf_vport_start_tlv *start;
  1305. u8 status = PFVF_STATUS_SUCCESS;
  1306. struct qed_vf_info *vf_info;
  1307. u64 *p_bitmap;
  1308. int sb_id;
  1309. int rc;
  1310. vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vf->relative_vf_id, true);
  1311. if (!vf_info) {
  1312. DP_NOTICE(p_hwfn->cdev,
  1313. "Failed to get VF info, invalid vfid [%d]\n",
  1314. vf->relative_vf_id);
  1315. return;
  1316. }
  1317. vf->state = VF_ENABLED;
  1318. start = &mbx->req_virt->start_vport;
  1319. /* Initialize Status block in CAU */
  1320. for (sb_id = 0; sb_id < vf->num_sbs; sb_id++) {
  1321. if (!start->sb_addr[sb_id]) {
  1322. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  1323. "VF[%d] did not fill the address of SB %d\n",
  1324. vf->relative_vf_id, sb_id);
  1325. break;
  1326. }
  1327. qed_int_cau_conf_sb(p_hwfn, p_ptt,
  1328. start->sb_addr[sb_id],
  1329. vf->igu_sbs[sb_id],
  1330. vf->abs_vf_id, 1);
  1331. }
  1332. qed_iov_enable_vf_traffic(p_hwfn, p_ptt, vf);
  1333. vf->mtu = start->mtu;
  1334. vf->shadow_config.inner_vlan_removal = start->inner_vlan_removal;
  1335. /* Take into consideration configuration forced by hypervisor;
  1336. * If none is configured, use the supplied VF values [for old
  1337. * vfs that would still be fine, since they passed '0' as padding].
  1338. */
  1339. p_bitmap = &vf_info->bulletin.p_virt->valid_bitmap;
  1340. if (!(*p_bitmap & (1 << VFPF_BULLETIN_UNTAGGED_DEFAULT_FORCED))) {
  1341. u8 vf_req = start->only_untagged;
  1342. vf_info->bulletin.p_virt->default_only_untagged = vf_req;
  1343. *p_bitmap |= 1 << VFPF_BULLETIN_UNTAGGED_DEFAULT;
  1344. }
  1345. params.tpa_mode = start->tpa_mode;
  1346. params.remove_inner_vlan = start->inner_vlan_removal;
  1347. params.tx_switching = true;
  1348. params.only_untagged = vf_info->bulletin.p_virt->default_only_untagged;
  1349. params.drop_ttl0 = false;
  1350. params.concrete_fid = vf->concrete_fid;
  1351. params.opaque_fid = vf->opaque_fid;
  1352. params.vport_id = vf->vport_id;
  1353. params.max_buffers_per_cqe = start->max_buffers_per_cqe;
  1354. params.mtu = vf->mtu;
  1355. rc = qed_sp_eth_vport_start(p_hwfn, &params);
  1356. if (rc != 0) {
  1357. DP_ERR(p_hwfn,
  1358. "qed_iov_vf_mbx_start_vport returned error %d\n", rc);
  1359. status = PFVF_STATUS_FAILURE;
  1360. } else {
  1361. vf->vport_instance++;
  1362. /* Force configuration if needed on the newly opened vport */
  1363. qed_iov_configure_vport_forced(p_hwfn, vf, *p_bitmap);
  1364. __qed_iov_spoofchk_set(p_hwfn, vf, vf->req_spoofchk_val);
  1365. }
  1366. qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_VPORT_START,
  1367. sizeof(struct pfvf_def_resp_tlv), status);
  1368. }
  1369. static void qed_iov_vf_mbx_stop_vport(struct qed_hwfn *p_hwfn,
  1370. struct qed_ptt *p_ptt,
  1371. struct qed_vf_info *vf)
  1372. {
  1373. u8 status = PFVF_STATUS_SUCCESS;
  1374. int rc;
  1375. vf->vport_instance--;
  1376. vf->spoof_chk = false;
  1377. rc = qed_sp_vport_stop(p_hwfn, vf->opaque_fid, vf->vport_id);
  1378. if (rc != 0) {
  1379. DP_ERR(p_hwfn, "qed_iov_vf_mbx_stop_vport returned error %d\n",
  1380. rc);
  1381. status = PFVF_STATUS_FAILURE;
  1382. }
  1383. /* Forget the configuration on the vport */
  1384. vf->configured_features = 0;
  1385. memset(&vf->shadow_config, 0, sizeof(vf->shadow_config));
  1386. qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_VPORT_TEARDOWN,
  1387. sizeof(struct pfvf_def_resp_tlv), status);
  1388. }
  1389. static void qed_iov_vf_mbx_start_rxq_resp(struct qed_hwfn *p_hwfn,
  1390. struct qed_ptt *p_ptt,
  1391. struct qed_vf_info *vf, u8 status)
  1392. {
  1393. struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
  1394. struct pfvf_start_queue_resp_tlv *p_tlv;
  1395. struct vfpf_start_rxq_tlv *req;
  1396. mbx->offset = (u8 *)mbx->reply_virt;
  1397. p_tlv = qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_START_RXQ,
  1398. sizeof(*p_tlv));
  1399. qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_LIST_END,
  1400. sizeof(struct channel_list_end_tlv));
  1401. /* Update the TLV with the response */
  1402. if (status == PFVF_STATUS_SUCCESS) {
  1403. req = &mbx->req_virt->start_rxq;
  1404. p_tlv->offset = PXP_VF_BAR0_START_MSDM_ZONE_B +
  1405. offsetof(struct mstorm_vf_zone,
  1406. non_trigger.eth_rx_queue_producers) +
  1407. sizeof(struct eth_rx_prod_data) * req->rx_qid;
  1408. }
  1409. qed_iov_send_response(p_hwfn, p_ptt, vf, sizeof(*p_tlv), status);
  1410. }
  1411. static void qed_iov_vf_mbx_start_rxq(struct qed_hwfn *p_hwfn,
  1412. struct qed_ptt *p_ptt,
  1413. struct qed_vf_info *vf)
  1414. {
  1415. struct qed_queue_start_common_params params;
  1416. struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
  1417. u8 status = PFVF_STATUS_NO_RESOURCE;
  1418. struct vfpf_start_rxq_tlv *req;
  1419. int rc;
  1420. memset(&params, 0, sizeof(params));
  1421. req = &mbx->req_virt->start_rxq;
  1422. if (!qed_iov_validate_rxq(p_hwfn, vf, req->rx_qid) ||
  1423. !qed_iov_validate_sb(p_hwfn, vf, req->hw_sb))
  1424. goto out;
  1425. params.queue_id = vf->vf_queues[req->rx_qid].fw_rx_qid;
  1426. params.vf_qid = req->rx_qid;
  1427. params.vport_id = vf->vport_id;
  1428. params.sb = req->hw_sb;
  1429. params.sb_idx = req->sb_index;
  1430. rc = qed_sp_eth_rxq_start_ramrod(p_hwfn, vf->opaque_fid,
  1431. vf->vf_queues[req->rx_qid].fw_cid,
  1432. &params,
  1433. vf->abs_vf_id + 0x10,
  1434. req->bd_max_bytes,
  1435. req->rxq_addr,
  1436. req->cqe_pbl_addr, req->cqe_pbl_size);
  1437. if (rc) {
  1438. status = PFVF_STATUS_FAILURE;
  1439. } else {
  1440. status = PFVF_STATUS_SUCCESS;
  1441. vf->vf_queues[req->rx_qid].rxq_active = true;
  1442. vf->num_active_rxqs++;
  1443. }
  1444. out:
  1445. qed_iov_vf_mbx_start_rxq_resp(p_hwfn, p_ptt, vf, status);
  1446. }
  1447. static void qed_iov_vf_mbx_start_txq_resp(struct qed_hwfn *p_hwfn,
  1448. struct qed_ptt *p_ptt,
  1449. struct qed_vf_info *p_vf, u8 status)
  1450. {
  1451. struct qed_iov_vf_mbx *mbx = &p_vf->vf_mbx;
  1452. struct pfvf_start_queue_resp_tlv *p_tlv;
  1453. mbx->offset = (u8 *)mbx->reply_virt;
  1454. p_tlv = qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_START_TXQ,
  1455. sizeof(*p_tlv));
  1456. qed_add_tlv(p_hwfn, &mbx->offset, CHANNEL_TLV_LIST_END,
  1457. sizeof(struct channel_list_end_tlv));
  1458. /* Update the TLV with the response */
  1459. if (status == PFVF_STATUS_SUCCESS) {
  1460. u16 qid = mbx->req_virt->start_txq.tx_qid;
  1461. p_tlv->offset = qed_db_addr(p_vf->vf_queues[qid].fw_cid,
  1462. DQ_DEMS_LEGACY);
  1463. }
  1464. qed_iov_send_response(p_hwfn, p_ptt, p_vf, sizeof(*p_tlv), status);
  1465. }
  1466. static void qed_iov_vf_mbx_start_txq(struct qed_hwfn *p_hwfn,
  1467. struct qed_ptt *p_ptt,
  1468. struct qed_vf_info *vf)
  1469. {
  1470. struct qed_queue_start_common_params params;
  1471. struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
  1472. u8 status = PFVF_STATUS_NO_RESOURCE;
  1473. union qed_qm_pq_params pq_params;
  1474. struct vfpf_start_txq_tlv *req;
  1475. int rc;
  1476. /* Prepare the parameters which would choose the right PQ */
  1477. memset(&pq_params, 0, sizeof(pq_params));
  1478. pq_params.eth.is_vf = 1;
  1479. pq_params.eth.vf_id = vf->relative_vf_id;
  1480. memset(&params, 0, sizeof(params));
  1481. req = &mbx->req_virt->start_txq;
  1482. if (!qed_iov_validate_txq(p_hwfn, vf, req->tx_qid) ||
  1483. !qed_iov_validate_sb(p_hwfn, vf, req->hw_sb))
  1484. goto out;
  1485. params.queue_id = vf->vf_queues[req->tx_qid].fw_tx_qid;
  1486. params.vport_id = vf->vport_id;
  1487. params.sb = req->hw_sb;
  1488. params.sb_idx = req->sb_index;
  1489. rc = qed_sp_eth_txq_start_ramrod(p_hwfn,
  1490. vf->opaque_fid,
  1491. vf->vf_queues[req->tx_qid].fw_cid,
  1492. &params,
  1493. vf->abs_vf_id + 0x10,
  1494. req->pbl_addr,
  1495. req->pbl_size, &pq_params);
  1496. if (rc) {
  1497. status = PFVF_STATUS_FAILURE;
  1498. } else {
  1499. status = PFVF_STATUS_SUCCESS;
  1500. vf->vf_queues[req->tx_qid].txq_active = true;
  1501. }
  1502. out:
  1503. qed_iov_vf_mbx_start_txq_resp(p_hwfn, p_ptt, vf, status);
  1504. }
  1505. static int qed_iov_vf_stop_rxqs(struct qed_hwfn *p_hwfn,
  1506. struct qed_vf_info *vf,
  1507. u16 rxq_id, u8 num_rxqs, bool cqe_completion)
  1508. {
  1509. int rc = 0;
  1510. int qid;
  1511. if (rxq_id + num_rxqs > ARRAY_SIZE(vf->vf_queues))
  1512. return -EINVAL;
  1513. for (qid = rxq_id; qid < rxq_id + num_rxqs; qid++) {
  1514. if (vf->vf_queues[qid].rxq_active) {
  1515. rc = qed_sp_eth_rx_queue_stop(p_hwfn,
  1516. vf->vf_queues[qid].
  1517. fw_rx_qid, false,
  1518. cqe_completion);
  1519. if (rc)
  1520. return rc;
  1521. }
  1522. vf->vf_queues[qid].rxq_active = false;
  1523. vf->num_active_rxqs--;
  1524. }
  1525. return rc;
  1526. }
  1527. static int qed_iov_vf_stop_txqs(struct qed_hwfn *p_hwfn,
  1528. struct qed_vf_info *vf, u16 txq_id, u8 num_txqs)
  1529. {
  1530. int rc = 0;
  1531. int qid;
  1532. if (txq_id + num_txqs > ARRAY_SIZE(vf->vf_queues))
  1533. return -EINVAL;
  1534. for (qid = txq_id; qid < txq_id + num_txqs; qid++) {
  1535. if (vf->vf_queues[qid].txq_active) {
  1536. rc = qed_sp_eth_tx_queue_stop(p_hwfn,
  1537. vf->vf_queues[qid].
  1538. fw_tx_qid);
  1539. if (rc)
  1540. return rc;
  1541. }
  1542. vf->vf_queues[qid].txq_active = false;
  1543. }
  1544. return rc;
  1545. }
  1546. static void qed_iov_vf_mbx_stop_rxqs(struct qed_hwfn *p_hwfn,
  1547. struct qed_ptt *p_ptt,
  1548. struct qed_vf_info *vf)
  1549. {
  1550. u16 length = sizeof(struct pfvf_def_resp_tlv);
  1551. struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
  1552. u8 status = PFVF_STATUS_SUCCESS;
  1553. struct vfpf_stop_rxqs_tlv *req;
  1554. int rc;
  1555. /* We give the option of starting from qid != 0, in this case we
  1556. * need to make sure that qid + num_qs doesn't exceed the actual
  1557. * amount of queues that exist.
  1558. */
  1559. req = &mbx->req_virt->stop_rxqs;
  1560. rc = qed_iov_vf_stop_rxqs(p_hwfn, vf, req->rx_qid,
  1561. req->num_rxqs, req->cqe_completion);
  1562. if (rc)
  1563. status = PFVF_STATUS_FAILURE;
  1564. qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_STOP_RXQS,
  1565. length, status);
  1566. }
  1567. static void qed_iov_vf_mbx_stop_txqs(struct qed_hwfn *p_hwfn,
  1568. struct qed_ptt *p_ptt,
  1569. struct qed_vf_info *vf)
  1570. {
  1571. u16 length = sizeof(struct pfvf_def_resp_tlv);
  1572. struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
  1573. u8 status = PFVF_STATUS_SUCCESS;
  1574. struct vfpf_stop_txqs_tlv *req;
  1575. int rc;
  1576. /* We give the option of starting from qid != 0, in this case we
  1577. * need to make sure that qid + num_qs doesn't exceed the actual
  1578. * amount of queues that exist.
  1579. */
  1580. req = &mbx->req_virt->stop_txqs;
  1581. rc = qed_iov_vf_stop_txqs(p_hwfn, vf, req->tx_qid, req->num_txqs);
  1582. if (rc)
  1583. status = PFVF_STATUS_FAILURE;
  1584. qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_STOP_TXQS,
  1585. length, status);
  1586. }
  1587. static void qed_iov_vf_mbx_update_rxqs(struct qed_hwfn *p_hwfn,
  1588. struct qed_ptt *p_ptt,
  1589. struct qed_vf_info *vf)
  1590. {
  1591. u16 length = sizeof(struct pfvf_def_resp_tlv);
  1592. struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
  1593. struct vfpf_update_rxq_tlv *req;
  1594. u8 status = PFVF_STATUS_SUCCESS;
  1595. u8 complete_event_flg;
  1596. u8 complete_cqe_flg;
  1597. u16 qid;
  1598. int rc;
  1599. u8 i;
  1600. req = &mbx->req_virt->update_rxq;
  1601. complete_cqe_flg = !!(req->flags & VFPF_RXQ_UPD_COMPLETE_CQE_FLAG);
  1602. complete_event_flg = !!(req->flags & VFPF_RXQ_UPD_COMPLETE_EVENT_FLAG);
  1603. for (i = 0; i < req->num_rxqs; i++) {
  1604. qid = req->rx_qid + i;
  1605. if (!vf->vf_queues[qid].rxq_active) {
  1606. DP_NOTICE(p_hwfn, "VF rx_qid = %d isn`t active!\n",
  1607. qid);
  1608. status = PFVF_STATUS_FAILURE;
  1609. break;
  1610. }
  1611. rc = qed_sp_eth_rx_queues_update(p_hwfn,
  1612. vf->vf_queues[qid].fw_rx_qid,
  1613. 1,
  1614. complete_cqe_flg,
  1615. complete_event_flg,
  1616. QED_SPQ_MODE_EBLOCK, NULL);
  1617. if (rc) {
  1618. status = PFVF_STATUS_FAILURE;
  1619. break;
  1620. }
  1621. }
  1622. qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_UPDATE_RXQ,
  1623. length, status);
  1624. }
  1625. void *qed_iov_search_list_tlvs(struct qed_hwfn *p_hwfn,
  1626. void *p_tlvs_list, u16 req_type)
  1627. {
  1628. struct channel_tlv *p_tlv = (struct channel_tlv *)p_tlvs_list;
  1629. int len = 0;
  1630. do {
  1631. if (!p_tlv->length) {
  1632. DP_NOTICE(p_hwfn, "Zero length TLV found\n");
  1633. return NULL;
  1634. }
  1635. if (p_tlv->type == req_type) {
  1636. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  1637. "Extended tlv type %d, length %d found\n",
  1638. p_tlv->type, p_tlv->length);
  1639. return p_tlv;
  1640. }
  1641. len += p_tlv->length;
  1642. p_tlv = (struct channel_tlv *)((u8 *)p_tlv + p_tlv->length);
  1643. if ((len + p_tlv->length) > TLV_BUFFER_SIZE) {
  1644. DP_NOTICE(p_hwfn, "TLVs has overrun the buffer size\n");
  1645. return NULL;
  1646. }
  1647. } while (p_tlv->type != CHANNEL_TLV_LIST_END);
  1648. return NULL;
  1649. }
  1650. static void
  1651. qed_iov_vp_update_act_param(struct qed_hwfn *p_hwfn,
  1652. struct qed_sp_vport_update_params *p_data,
  1653. struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
  1654. {
  1655. struct vfpf_vport_update_activate_tlv *p_act_tlv;
  1656. u16 tlv = CHANNEL_TLV_VPORT_UPDATE_ACTIVATE;
  1657. p_act_tlv = (struct vfpf_vport_update_activate_tlv *)
  1658. qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
  1659. if (!p_act_tlv)
  1660. return;
  1661. p_data->update_vport_active_rx_flg = p_act_tlv->update_rx;
  1662. p_data->vport_active_rx_flg = p_act_tlv->active_rx;
  1663. p_data->update_vport_active_tx_flg = p_act_tlv->update_tx;
  1664. p_data->vport_active_tx_flg = p_act_tlv->active_tx;
  1665. *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_ACTIVATE;
  1666. }
  1667. static void
  1668. qed_iov_vp_update_vlan_param(struct qed_hwfn *p_hwfn,
  1669. struct qed_sp_vport_update_params *p_data,
  1670. struct qed_vf_info *p_vf,
  1671. struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
  1672. {
  1673. struct vfpf_vport_update_vlan_strip_tlv *p_vlan_tlv;
  1674. u16 tlv = CHANNEL_TLV_VPORT_UPDATE_VLAN_STRIP;
  1675. p_vlan_tlv = (struct vfpf_vport_update_vlan_strip_tlv *)
  1676. qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
  1677. if (!p_vlan_tlv)
  1678. return;
  1679. p_vf->shadow_config.inner_vlan_removal = p_vlan_tlv->remove_vlan;
  1680. /* Ignore the VF request if we're forcing a vlan */
  1681. if (!(p_vf->configured_features & (1 << VLAN_ADDR_FORCED))) {
  1682. p_data->update_inner_vlan_removal_flg = 1;
  1683. p_data->inner_vlan_removal_flg = p_vlan_tlv->remove_vlan;
  1684. }
  1685. *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_VLAN_STRIP;
  1686. }
  1687. static void
  1688. qed_iov_vp_update_tx_switch(struct qed_hwfn *p_hwfn,
  1689. struct qed_sp_vport_update_params *p_data,
  1690. struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
  1691. {
  1692. struct vfpf_vport_update_tx_switch_tlv *p_tx_switch_tlv;
  1693. u16 tlv = CHANNEL_TLV_VPORT_UPDATE_TX_SWITCH;
  1694. p_tx_switch_tlv = (struct vfpf_vport_update_tx_switch_tlv *)
  1695. qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt,
  1696. tlv);
  1697. if (!p_tx_switch_tlv)
  1698. return;
  1699. p_data->update_tx_switching_flg = 1;
  1700. p_data->tx_switching_flg = p_tx_switch_tlv->tx_switching;
  1701. *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_TX_SWITCH;
  1702. }
  1703. static void
  1704. qed_iov_vp_update_mcast_bin_param(struct qed_hwfn *p_hwfn,
  1705. struct qed_sp_vport_update_params *p_data,
  1706. struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
  1707. {
  1708. struct vfpf_vport_update_mcast_bin_tlv *p_mcast_tlv;
  1709. u16 tlv = CHANNEL_TLV_VPORT_UPDATE_MCAST;
  1710. p_mcast_tlv = (struct vfpf_vport_update_mcast_bin_tlv *)
  1711. qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
  1712. if (!p_mcast_tlv)
  1713. return;
  1714. p_data->update_approx_mcast_flg = 1;
  1715. memcpy(p_data->bins, p_mcast_tlv->bins,
  1716. sizeof(unsigned long) * ETH_MULTICAST_MAC_BINS_IN_REGS);
  1717. *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_MCAST;
  1718. }
  1719. static void
  1720. qed_iov_vp_update_accept_flag(struct qed_hwfn *p_hwfn,
  1721. struct qed_sp_vport_update_params *p_data,
  1722. struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
  1723. {
  1724. struct qed_filter_accept_flags *p_flags = &p_data->accept_flags;
  1725. struct vfpf_vport_update_accept_param_tlv *p_accept_tlv;
  1726. u16 tlv = CHANNEL_TLV_VPORT_UPDATE_ACCEPT_PARAM;
  1727. p_accept_tlv = (struct vfpf_vport_update_accept_param_tlv *)
  1728. qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
  1729. if (!p_accept_tlv)
  1730. return;
  1731. p_flags->update_rx_mode_config = p_accept_tlv->update_rx_mode;
  1732. p_flags->rx_accept_filter = p_accept_tlv->rx_accept_filter;
  1733. p_flags->update_tx_mode_config = p_accept_tlv->update_tx_mode;
  1734. p_flags->tx_accept_filter = p_accept_tlv->tx_accept_filter;
  1735. *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_ACCEPT_PARAM;
  1736. }
  1737. static void
  1738. qed_iov_vp_update_accept_any_vlan(struct qed_hwfn *p_hwfn,
  1739. struct qed_sp_vport_update_params *p_data,
  1740. struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
  1741. {
  1742. struct vfpf_vport_update_accept_any_vlan_tlv *p_accept_any_vlan;
  1743. u16 tlv = CHANNEL_TLV_VPORT_UPDATE_ACCEPT_ANY_VLAN;
  1744. p_accept_any_vlan = (struct vfpf_vport_update_accept_any_vlan_tlv *)
  1745. qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt,
  1746. tlv);
  1747. if (!p_accept_any_vlan)
  1748. return;
  1749. p_data->accept_any_vlan = p_accept_any_vlan->accept_any_vlan;
  1750. p_data->update_accept_any_vlan_flg =
  1751. p_accept_any_vlan->update_accept_any_vlan_flg;
  1752. *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_ACCEPT_ANY_VLAN;
  1753. }
  1754. static void
  1755. qed_iov_vp_update_rss_param(struct qed_hwfn *p_hwfn,
  1756. struct qed_vf_info *vf,
  1757. struct qed_sp_vport_update_params *p_data,
  1758. struct qed_rss_params *p_rss,
  1759. struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
  1760. {
  1761. struct vfpf_vport_update_rss_tlv *p_rss_tlv;
  1762. u16 tlv = CHANNEL_TLV_VPORT_UPDATE_RSS;
  1763. u16 i, q_idx, max_q_idx;
  1764. u16 table_size;
  1765. p_rss_tlv = (struct vfpf_vport_update_rss_tlv *)
  1766. qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
  1767. if (!p_rss_tlv) {
  1768. p_data->rss_params = NULL;
  1769. return;
  1770. }
  1771. memset(p_rss, 0, sizeof(struct qed_rss_params));
  1772. p_rss->update_rss_config = !!(p_rss_tlv->update_rss_flags &
  1773. VFPF_UPDATE_RSS_CONFIG_FLAG);
  1774. p_rss->update_rss_capabilities = !!(p_rss_tlv->update_rss_flags &
  1775. VFPF_UPDATE_RSS_CAPS_FLAG);
  1776. p_rss->update_rss_ind_table = !!(p_rss_tlv->update_rss_flags &
  1777. VFPF_UPDATE_RSS_IND_TABLE_FLAG);
  1778. p_rss->update_rss_key = !!(p_rss_tlv->update_rss_flags &
  1779. VFPF_UPDATE_RSS_KEY_FLAG);
  1780. p_rss->rss_enable = p_rss_tlv->rss_enable;
  1781. p_rss->rss_eng_id = vf->relative_vf_id + 1;
  1782. p_rss->rss_caps = p_rss_tlv->rss_caps;
  1783. p_rss->rss_table_size_log = p_rss_tlv->rss_table_size_log;
  1784. memcpy(p_rss->rss_ind_table, p_rss_tlv->rss_ind_table,
  1785. sizeof(p_rss->rss_ind_table));
  1786. memcpy(p_rss->rss_key, p_rss_tlv->rss_key, sizeof(p_rss->rss_key));
  1787. table_size = min_t(u16, ARRAY_SIZE(p_rss->rss_ind_table),
  1788. (1 << p_rss_tlv->rss_table_size_log));
  1789. max_q_idx = ARRAY_SIZE(vf->vf_queues);
  1790. for (i = 0; i < table_size; i++) {
  1791. u16 index = vf->vf_queues[0].fw_rx_qid;
  1792. q_idx = p_rss->rss_ind_table[i];
  1793. if (q_idx >= max_q_idx)
  1794. DP_NOTICE(p_hwfn,
  1795. "rss_ind_table[%d] = %d, rxq is out of range\n",
  1796. i, q_idx);
  1797. else if (!vf->vf_queues[q_idx].rxq_active)
  1798. DP_NOTICE(p_hwfn,
  1799. "rss_ind_table[%d] = %d, rxq is not active\n",
  1800. i, q_idx);
  1801. else
  1802. index = vf->vf_queues[q_idx].fw_rx_qid;
  1803. p_rss->rss_ind_table[i] = index;
  1804. }
  1805. p_data->rss_params = p_rss;
  1806. *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_RSS;
  1807. }
  1808. static void
  1809. qed_iov_vp_update_sge_tpa_param(struct qed_hwfn *p_hwfn,
  1810. struct qed_vf_info *vf,
  1811. struct qed_sp_vport_update_params *p_data,
  1812. struct qed_sge_tpa_params *p_sge_tpa,
  1813. struct qed_iov_vf_mbx *p_mbx, u16 *tlvs_mask)
  1814. {
  1815. struct vfpf_vport_update_sge_tpa_tlv *p_sge_tpa_tlv;
  1816. u16 tlv = CHANNEL_TLV_VPORT_UPDATE_SGE_TPA;
  1817. p_sge_tpa_tlv = (struct vfpf_vport_update_sge_tpa_tlv *)
  1818. qed_iov_search_list_tlvs(p_hwfn, p_mbx->req_virt, tlv);
  1819. if (!p_sge_tpa_tlv) {
  1820. p_data->sge_tpa_params = NULL;
  1821. return;
  1822. }
  1823. memset(p_sge_tpa, 0, sizeof(struct qed_sge_tpa_params));
  1824. p_sge_tpa->update_tpa_en_flg =
  1825. !!(p_sge_tpa_tlv->update_sge_tpa_flags & VFPF_UPDATE_TPA_EN_FLAG);
  1826. p_sge_tpa->update_tpa_param_flg =
  1827. !!(p_sge_tpa_tlv->update_sge_tpa_flags &
  1828. VFPF_UPDATE_TPA_PARAM_FLAG);
  1829. p_sge_tpa->tpa_ipv4_en_flg =
  1830. !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_IPV4_EN_FLAG);
  1831. p_sge_tpa->tpa_ipv6_en_flg =
  1832. !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_IPV6_EN_FLAG);
  1833. p_sge_tpa->tpa_pkt_split_flg =
  1834. !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_PKT_SPLIT_FLAG);
  1835. p_sge_tpa->tpa_hdr_data_split_flg =
  1836. !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_HDR_DATA_SPLIT_FLAG);
  1837. p_sge_tpa->tpa_gro_consistent_flg =
  1838. !!(p_sge_tpa_tlv->sge_tpa_flags & VFPF_TPA_GRO_CONSIST_FLAG);
  1839. p_sge_tpa->tpa_max_aggs_num = p_sge_tpa_tlv->tpa_max_aggs_num;
  1840. p_sge_tpa->tpa_max_size = p_sge_tpa_tlv->tpa_max_size;
  1841. p_sge_tpa->tpa_min_size_to_start = p_sge_tpa_tlv->tpa_min_size_to_start;
  1842. p_sge_tpa->tpa_min_size_to_cont = p_sge_tpa_tlv->tpa_min_size_to_cont;
  1843. p_sge_tpa->max_buffers_per_cqe = p_sge_tpa_tlv->max_buffers_per_cqe;
  1844. p_data->sge_tpa_params = p_sge_tpa;
  1845. *tlvs_mask |= 1 << QED_IOV_VP_UPDATE_SGE_TPA;
  1846. }
  1847. static void qed_iov_vf_mbx_vport_update(struct qed_hwfn *p_hwfn,
  1848. struct qed_ptt *p_ptt,
  1849. struct qed_vf_info *vf)
  1850. {
  1851. struct qed_sp_vport_update_params params;
  1852. struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
  1853. struct qed_sge_tpa_params sge_tpa_params;
  1854. struct qed_rss_params rss_params;
  1855. u8 status = PFVF_STATUS_SUCCESS;
  1856. u16 tlvs_mask = 0;
  1857. u16 length;
  1858. int rc;
  1859. /* Valiate PF can send such a request */
  1860. if (!vf->vport_instance) {
  1861. DP_VERBOSE(p_hwfn,
  1862. QED_MSG_IOV,
  1863. "No VPORT instance available for VF[%d], failing vport update\n",
  1864. vf->abs_vf_id);
  1865. status = PFVF_STATUS_FAILURE;
  1866. goto out;
  1867. }
  1868. memset(&params, 0, sizeof(params));
  1869. params.opaque_fid = vf->opaque_fid;
  1870. params.vport_id = vf->vport_id;
  1871. params.rss_params = NULL;
  1872. /* Search for extended tlvs list and update values
  1873. * from VF in struct qed_sp_vport_update_params.
  1874. */
  1875. qed_iov_vp_update_act_param(p_hwfn, &params, mbx, &tlvs_mask);
  1876. qed_iov_vp_update_vlan_param(p_hwfn, &params, vf, mbx, &tlvs_mask);
  1877. qed_iov_vp_update_tx_switch(p_hwfn, &params, mbx, &tlvs_mask);
  1878. qed_iov_vp_update_mcast_bin_param(p_hwfn, &params, mbx, &tlvs_mask);
  1879. qed_iov_vp_update_accept_flag(p_hwfn, &params, mbx, &tlvs_mask);
  1880. qed_iov_vp_update_rss_param(p_hwfn, vf, &params, &rss_params,
  1881. mbx, &tlvs_mask);
  1882. qed_iov_vp_update_accept_any_vlan(p_hwfn, &params, mbx, &tlvs_mask);
  1883. qed_iov_vp_update_sge_tpa_param(p_hwfn, vf, &params,
  1884. &sge_tpa_params, mbx, &tlvs_mask);
  1885. /* Just log a message if there is no single extended tlv in buffer.
  1886. * When all features of vport update ramrod would be requested by VF
  1887. * as extended TLVs in buffer then an error can be returned in response
  1888. * if there is no extended TLV present in buffer.
  1889. */
  1890. if (!tlvs_mask) {
  1891. DP_NOTICE(p_hwfn,
  1892. "No feature tlvs found for vport update\n");
  1893. status = PFVF_STATUS_NOT_SUPPORTED;
  1894. goto out;
  1895. }
  1896. rc = qed_sp_vport_update(p_hwfn, &params, QED_SPQ_MODE_EBLOCK, NULL);
  1897. if (rc)
  1898. status = PFVF_STATUS_FAILURE;
  1899. out:
  1900. length = qed_iov_prep_vp_update_resp_tlvs(p_hwfn, vf, mbx, status,
  1901. tlvs_mask, tlvs_mask);
  1902. qed_iov_send_response(p_hwfn, p_ptt, vf, length, status);
  1903. }
  1904. static int qed_iov_vf_update_vlan_shadow(struct qed_hwfn *p_hwfn,
  1905. struct qed_vf_info *p_vf,
  1906. struct qed_filter_ucast *p_params)
  1907. {
  1908. int i;
  1909. /* First remove entries and then add new ones */
  1910. if (p_params->opcode == QED_FILTER_REMOVE) {
  1911. for (i = 0; i < QED_ETH_VF_NUM_VLAN_FILTERS + 1; i++)
  1912. if (p_vf->shadow_config.vlans[i].used &&
  1913. p_vf->shadow_config.vlans[i].vid ==
  1914. p_params->vlan) {
  1915. p_vf->shadow_config.vlans[i].used = false;
  1916. break;
  1917. }
  1918. if (i == QED_ETH_VF_NUM_VLAN_FILTERS + 1) {
  1919. DP_VERBOSE(p_hwfn,
  1920. QED_MSG_IOV,
  1921. "VF [%d] - Tries to remove a non-existing vlan\n",
  1922. p_vf->relative_vf_id);
  1923. return -EINVAL;
  1924. }
  1925. } else if (p_params->opcode == QED_FILTER_REPLACE ||
  1926. p_params->opcode == QED_FILTER_FLUSH) {
  1927. for (i = 0; i < QED_ETH_VF_NUM_VLAN_FILTERS + 1; i++)
  1928. p_vf->shadow_config.vlans[i].used = false;
  1929. }
  1930. /* In forced mode, we're willing to remove entries - but we don't add
  1931. * new ones.
  1932. */
  1933. if (p_vf->bulletin.p_virt->valid_bitmap & (1 << VLAN_ADDR_FORCED))
  1934. return 0;
  1935. if (p_params->opcode == QED_FILTER_ADD ||
  1936. p_params->opcode == QED_FILTER_REPLACE) {
  1937. for (i = 0; i < QED_ETH_VF_NUM_VLAN_FILTERS + 1; i++) {
  1938. if (p_vf->shadow_config.vlans[i].used)
  1939. continue;
  1940. p_vf->shadow_config.vlans[i].used = true;
  1941. p_vf->shadow_config.vlans[i].vid = p_params->vlan;
  1942. break;
  1943. }
  1944. if (i == QED_ETH_VF_NUM_VLAN_FILTERS + 1) {
  1945. DP_VERBOSE(p_hwfn,
  1946. QED_MSG_IOV,
  1947. "VF [%d] - Tries to configure more than %d vlan filters\n",
  1948. p_vf->relative_vf_id,
  1949. QED_ETH_VF_NUM_VLAN_FILTERS + 1);
  1950. return -EINVAL;
  1951. }
  1952. }
  1953. return 0;
  1954. }
  1955. static int qed_iov_vf_update_mac_shadow(struct qed_hwfn *p_hwfn,
  1956. struct qed_vf_info *p_vf,
  1957. struct qed_filter_ucast *p_params)
  1958. {
  1959. int i;
  1960. /* If we're in forced-mode, we don't allow any change */
  1961. if (p_vf->bulletin.p_virt->valid_bitmap & (1 << MAC_ADDR_FORCED))
  1962. return 0;
  1963. /* First remove entries and then add new ones */
  1964. if (p_params->opcode == QED_FILTER_REMOVE) {
  1965. for (i = 0; i < QED_ETH_VF_NUM_MAC_FILTERS; i++) {
  1966. if (ether_addr_equal(p_vf->shadow_config.macs[i],
  1967. p_params->mac)) {
  1968. memset(p_vf->shadow_config.macs[i], 0,
  1969. ETH_ALEN);
  1970. break;
  1971. }
  1972. }
  1973. if (i == QED_ETH_VF_NUM_MAC_FILTERS) {
  1974. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  1975. "MAC isn't configured\n");
  1976. return -EINVAL;
  1977. }
  1978. } else if (p_params->opcode == QED_FILTER_REPLACE ||
  1979. p_params->opcode == QED_FILTER_FLUSH) {
  1980. for (i = 0; i < QED_ETH_VF_NUM_MAC_FILTERS; i++)
  1981. memset(p_vf->shadow_config.macs[i], 0, ETH_ALEN);
  1982. }
  1983. /* List the new MAC address */
  1984. if (p_params->opcode != QED_FILTER_ADD &&
  1985. p_params->opcode != QED_FILTER_REPLACE)
  1986. return 0;
  1987. for (i = 0; i < QED_ETH_VF_NUM_MAC_FILTERS; i++) {
  1988. if (is_zero_ether_addr(p_vf->shadow_config.macs[i])) {
  1989. ether_addr_copy(p_vf->shadow_config.macs[i],
  1990. p_params->mac);
  1991. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  1992. "Added MAC at %d entry in shadow\n", i);
  1993. break;
  1994. }
  1995. }
  1996. if (i == QED_ETH_VF_NUM_MAC_FILTERS) {
  1997. DP_VERBOSE(p_hwfn, QED_MSG_IOV, "No available place for MAC\n");
  1998. return -EINVAL;
  1999. }
  2000. return 0;
  2001. }
  2002. static int
  2003. qed_iov_vf_update_unicast_shadow(struct qed_hwfn *p_hwfn,
  2004. struct qed_vf_info *p_vf,
  2005. struct qed_filter_ucast *p_params)
  2006. {
  2007. int rc = 0;
  2008. if (p_params->type == QED_FILTER_MAC) {
  2009. rc = qed_iov_vf_update_mac_shadow(p_hwfn, p_vf, p_params);
  2010. if (rc)
  2011. return rc;
  2012. }
  2013. if (p_params->type == QED_FILTER_VLAN)
  2014. rc = qed_iov_vf_update_vlan_shadow(p_hwfn, p_vf, p_params);
  2015. return rc;
  2016. }
  2017. int qed_iov_chk_ucast(struct qed_hwfn *hwfn,
  2018. int vfid, struct qed_filter_ucast *params)
  2019. {
  2020. struct qed_public_vf_info *vf;
  2021. vf = qed_iov_get_public_vf_info(hwfn, vfid, true);
  2022. if (!vf)
  2023. return -EINVAL;
  2024. /* No real decision to make; Store the configured MAC */
  2025. if (params->type == QED_FILTER_MAC ||
  2026. params->type == QED_FILTER_MAC_VLAN)
  2027. ether_addr_copy(vf->mac, params->mac);
  2028. return 0;
  2029. }
  2030. static void qed_iov_vf_mbx_ucast_filter(struct qed_hwfn *p_hwfn,
  2031. struct qed_ptt *p_ptt,
  2032. struct qed_vf_info *vf)
  2033. {
  2034. struct qed_bulletin_content *p_bulletin = vf->bulletin.p_virt;
  2035. struct qed_iov_vf_mbx *mbx = &vf->vf_mbx;
  2036. struct vfpf_ucast_filter_tlv *req;
  2037. u8 status = PFVF_STATUS_SUCCESS;
  2038. struct qed_filter_ucast params;
  2039. int rc;
  2040. /* Prepare the unicast filter params */
  2041. memset(&params, 0, sizeof(struct qed_filter_ucast));
  2042. req = &mbx->req_virt->ucast_filter;
  2043. params.opcode = (enum qed_filter_opcode)req->opcode;
  2044. params.type = (enum qed_filter_ucast_type)req->type;
  2045. params.is_rx_filter = 1;
  2046. params.is_tx_filter = 1;
  2047. params.vport_to_remove_from = vf->vport_id;
  2048. params.vport_to_add_to = vf->vport_id;
  2049. memcpy(params.mac, req->mac, ETH_ALEN);
  2050. params.vlan = req->vlan;
  2051. DP_VERBOSE(p_hwfn,
  2052. QED_MSG_IOV,
  2053. "VF[%d]: opcode 0x%02x type 0x%02x [%s %s] [vport 0x%02x] MAC %02x:%02x:%02x:%02x:%02x:%02x, vlan 0x%04x\n",
  2054. vf->abs_vf_id, params.opcode, params.type,
  2055. params.is_rx_filter ? "RX" : "",
  2056. params.is_tx_filter ? "TX" : "",
  2057. params.vport_to_add_to,
  2058. params.mac[0], params.mac[1],
  2059. params.mac[2], params.mac[3],
  2060. params.mac[4], params.mac[5], params.vlan);
  2061. if (!vf->vport_instance) {
  2062. DP_VERBOSE(p_hwfn,
  2063. QED_MSG_IOV,
  2064. "No VPORT instance available for VF[%d], failing ucast MAC configuration\n",
  2065. vf->abs_vf_id);
  2066. status = PFVF_STATUS_FAILURE;
  2067. goto out;
  2068. }
  2069. /* Update shadow copy of the VF configuration */
  2070. if (qed_iov_vf_update_unicast_shadow(p_hwfn, vf, &params)) {
  2071. status = PFVF_STATUS_FAILURE;
  2072. goto out;
  2073. }
  2074. /* Determine if the unicast filtering is acceptible by PF */
  2075. if ((p_bulletin->valid_bitmap & (1 << VLAN_ADDR_FORCED)) &&
  2076. (params.type == QED_FILTER_VLAN ||
  2077. params.type == QED_FILTER_MAC_VLAN)) {
  2078. /* Once VLAN is forced or PVID is set, do not allow
  2079. * to add/replace any further VLANs.
  2080. */
  2081. if (params.opcode == QED_FILTER_ADD ||
  2082. params.opcode == QED_FILTER_REPLACE)
  2083. status = PFVF_STATUS_FORCED;
  2084. goto out;
  2085. }
  2086. if ((p_bulletin->valid_bitmap & (1 << MAC_ADDR_FORCED)) &&
  2087. (params.type == QED_FILTER_MAC ||
  2088. params.type == QED_FILTER_MAC_VLAN)) {
  2089. if (!ether_addr_equal(p_bulletin->mac, params.mac) ||
  2090. (params.opcode != QED_FILTER_ADD &&
  2091. params.opcode != QED_FILTER_REPLACE))
  2092. status = PFVF_STATUS_FORCED;
  2093. goto out;
  2094. }
  2095. rc = qed_iov_chk_ucast(p_hwfn, vf->relative_vf_id, &params);
  2096. if (rc) {
  2097. status = PFVF_STATUS_FAILURE;
  2098. goto out;
  2099. }
  2100. rc = qed_sp_eth_filter_ucast(p_hwfn, vf->opaque_fid, &params,
  2101. QED_SPQ_MODE_CB, NULL);
  2102. if (rc)
  2103. status = PFVF_STATUS_FAILURE;
  2104. out:
  2105. qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_UCAST_FILTER,
  2106. sizeof(struct pfvf_def_resp_tlv), status);
  2107. }
  2108. static void qed_iov_vf_mbx_int_cleanup(struct qed_hwfn *p_hwfn,
  2109. struct qed_ptt *p_ptt,
  2110. struct qed_vf_info *vf)
  2111. {
  2112. int i;
  2113. /* Reset the SBs */
  2114. for (i = 0; i < vf->num_sbs; i++)
  2115. qed_int_igu_init_pure_rt_single(p_hwfn, p_ptt,
  2116. vf->igu_sbs[i],
  2117. vf->opaque_fid, false);
  2118. qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_INT_CLEANUP,
  2119. sizeof(struct pfvf_def_resp_tlv),
  2120. PFVF_STATUS_SUCCESS);
  2121. }
  2122. static void qed_iov_vf_mbx_close(struct qed_hwfn *p_hwfn,
  2123. struct qed_ptt *p_ptt, struct qed_vf_info *vf)
  2124. {
  2125. u16 length = sizeof(struct pfvf_def_resp_tlv);
  2126. u8 status = PFVF_STATUS_SUCCESS;
  2127. /* Disable Interrupts for VF */
  2128. qed_iov_vf_igu_set_int(p_hwfn, p_ptt, vf, 0);
  2129. /* Reset Permission table */
  2130. qed_iov_config_perm_table(p_hwfn, p_ptt, vf, 0);
  2131. qed_iov_prepare_resp(p_hwfn, p_ptt, vf, CHANNEL_TLV_CLOSE,
  2132. length, status);
  2133. }
  2134. static void qed_iov_vf_mbx_release(struct qed_hwfn *p_hwfn,
  2135. struct qed_ptt *p_ptt,
  2136. struct qed_vf_info *p_vf)
  2137. {
  2138. u16 length = sizeof(struct pfvf_def_resp_tlv);
  2139. u8 status = PFVF_STATUS_SUCCESS;
  2140. int rc = 0;
  2141. qed_iov_vf_cleanup(p_hwfn, p_vf);
  2142. if (p_vf->state != VF_STOPPED && p_vf->state != VF_FREE) {
  2143. /* Stopping the VF */
  2144. rc = qed_sp_vf_stop(p_hwfn, p_vf->concrete_fid,
  2145. p_vf->opaque_fid);
  2146. if (rc) {
  2147. DP_ERR(p_hwfn, "qed_sp_vf_stop returned error %d\n",
  2148. rc);
  2149. status = PFVF_STATUS_FAILURE;
  2150. }
  2151. p_vf->state = VF_STOPPED;
  2152. }
  2153. qed_iov_prepare_resp(p_hwfn, p_ptt, p_vf, CHANNEL_TLV_RELEASE,
  2154. length, status);
  2155. }
  2156. static int
  2157. qed_iov_vf_flr_poll_dorq(struct qed_hwfn *p_hwfn,
  2158. struct qed_vf_info *p_vf, struct qed_ptt *p_ptt)
  2159. {
  2160. int cnt;
  2161. u32 val;
  2162. qed_fid_pretend(p_hwfn, p_ptt, (u16) p_vf->concrete_fid);
  2163. for (cnt = 0; cnt < 50; cnt++) {
  2164. val = qed_rd(p_hwfn, p_ptt, DORQ_REG_VF_USAGE_CNT);
  2165. if (!val)
  2166. break;
  2167. msleep(20);
  2168. }
  2169. qed_fid_pretend(p_hwfn, p_ptt, (u16) p_hwfn->hw_info.concrete_fid);
  2170. if (cnt == 50) {
  2171. DP_ERR(p_hwfn,
  2172. "VF[%d] - dorq failed to cleanup [usage 0x%08x]\n",
  2173. p_vf->abs_vf_id, val);
  2174. return -EBUSY;
  2175. }
  2176. return 0;
  2177. }
  2178. static int
  2179. qed_iov_vf_flr_poll_pbf(struct qed_hwfn *p_hwfn,
  2180. struct qed_vf_info *p_vf, struct qed_ptt *p_ptt)
  2181. {
  2182. u32 cons[MAX_NUM_VOQS], distance[MAX_NUM_VOQS];
  2183. int i, cnt;
  2184. /* Read initial consumers & producers */
  2185. for (i = 0; i < MAX_NUM_VOQS; i++) {
  2186. u32 prod;
  2187. cons[i] = qed_rd(p_hwfn, p_ptt,
  2188. PBF_REG_NUM_BLOCKS_ALLOCATED_CONS_VOQ0 +
  2189. i * 0x40);
  2190. prod = qed_rd(p_hwfn, p_ptt,
  2191. PBF_REG_NUM_BLOCKS_ALLOCATED_PROD_VOQ0 +
  2192. i * 0x40);
  2193. distance[i] = prod - cons[i];
  2194. }
  2195. /* Wait for consumers to pass the producers */
  2196. i = 0;
  2197. for (cnt = 0; cnt < 50; cnt++) {
  2198. for (; i < MAX_NUM_VOQS; i++) {
  2199. u32 tmp;
  2200. tmp = qed_rd(p_hwfn, p_ptt,
  2201. PBF_REG_NUM_BLOCKS_ALLOCATED_CONS_VOQ0 +
  2202. i * 0x40);
  2203. if (distance[i] > tmp - cons[i])
  2204. break;
  2205. }
  2206. if (i == MAX_NUM_VOQS)
  2207. break;
  2208. msleep(20);
  2209. }
  2210. if (cnt == 50) {
  2211. DP_ERR(p_hwfn, "VF[%d] - pbf polling failed on VOQ %d\n",
  2212. p_vf->abs_vf_id, i);
  2213. return -EBUSY;
  2214. }
  2215. return 0;
  2216. }
  2217. static int qed_iov_vf_flr_poll(struct qed_hwfn *p_hwfn,
  2218. struct qed_vf_info *p_vf, struct qed_ptt *p_ptt)
  2219. {
  2220. int rc;
  2221. rc = qed_iov_vf_flr_poll_dorq(p_hwfn, p_vf, p_ptt);
  2222. if (rc)
  2223. return rc;
  2224. rc = qed_iov_vf_flr_poll_pbf(p_hwfn, p_vf, p_ptt);
  2225. if (rc)
  2226. return rc;
  2227. return 0;
  2228. }
  2229. static int
  2230. qed_iov_execute_vf_flr_cleanup(struct qed_hwfn *p_hwfn,
  2231. struct qed_ptt *p_ptt,
  2232. u16 rel_vf_id, u32 *ack_vfs)
  2233. {
  2234. struct qed_vf_info *p_vf;
  2235. int rc = 0;
  2236. p_vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, false);
  2237. if (!p_vf)
  2238. return 0;
  2239. if (p_hwfn->pf_iov_info->pending_flr[rel_vf_id / 64] &
  2240. (1ULL << (rel_vf_id % 64))) {
  2241. u16 vfid = p_vf->abs_vf_id;
  2242. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  2243. "VF[%d] - Handling FLR\n", vfid);
  2244. qed_iov_vf_cleanup(p_hwfn, p_vf);
  2245. /* If VF isn't active, no need for anything but SW */
  2246. if (!p_vf->b_init)
  2247. goto cleanup;
  2248. rc = qed_iov_vf_flr_poll(p_hwfn, p_vf, p_ptt);
  2249. if (rc)
  2250. goto cleanup;
  2251. rc = qed_final_cleanup(p_hwfn, p_ptt, vfid, true);
  2252. if (rc) {
  2253. DP_ERR(p_hwfn, "Failed handle FLR of VF[%d]\n", vfid);
  2254. return rc;
  2255. }
  2256. /* VF_STOPPED has to be set only after final cleanup
  2257. * but prior to re-enabling the VF.
  2258. */
  2259. p_vf->state = VF_STOPPED;
  2260. rc = qed_iov_enable_vf_access(p_hwfn, p_ptt, p_vf);
  2261. if (rc) {
  2262. DP_ERR(p_hwfn, "Failed to re-enable VF[%d] acces\n",
  2263. vfid);
  2264. return rc;
  2265. }
  2266. cleanup:
  2267. /* Mark VF for ack and clean pending state */
  2268. if (p_vf->state == VF_RESET)
  2269. p_vf->state = VF_STOPPED;
  2270. ack_vfs[vfid / 32] |= (1 << (vfid % 32));
  2271. p_hwfn->pf_iov_info->pending_flr[rel_vf_id / 64] &=
  2272. ~(1ULL << (rel_vf_id % 64));
  2273. p_hwfn->pf_iov_info->pending_events[rel_vf_id / 64] &=
  2274. ~(1ULL << (rel_vf_id % 64));
  2275. }
  2276. return rc;
  2277. }
  2278. int qed_iov_vf_flr_cleanup(struct qed_hwfn *p_hwfn, struct qed_ptt *p_ptt)
  2279. {
  2280. u32 ack_vfs[VF_MAX_STATIC / 32];
  2281. int rc = 0;
  2282. u16 i;
  2283. memset(ack_vfs, 0, sizeof(u32) * (VF_MAX_STATIC / 32));
  2284. /* Since BRB <-> PRS interface can't be tested as part of the flr
  2285. * polling due to HW limitations, simply sleep a bit. And since
  2286. * there's no need to wait per-vf, do it before looping.
  2287. */
  2288. msleep(100);
  2289. for (i = 0; i < p_hwfn->cdev->p_iov_info->total_vfs; i++)
  2290. qed_iov_execute_vf_flr_cleanup(p_hwfn, p_ptt, i, ack_vfs);
  2291. rc = qed_mcp_ack_vf_flr(p_hwfn, p_ptt, ack_vfs);
  2292. return rc;
  2293. }
  2294. int qed_iov_mark_vf_flr(struct qed_hwfn *p_hwfn, u32 *p_disabled_vfs)
  2295. {
  2296. u16 i, found = 0;
  2297. DP_VERBOSE(p_hwfn, QED_MSG_IOV, "Marking FLR-ed VFs\n");
  2298. for (i = 0; i < (VF_MAX_STATIC / 32); i++)
  2299. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  2300. "[%08x,...,%08x]: %08x\n",
  2301. i * 32, (i + 1) * 32 - 1, p_disabled_vfs[i]);
  2302. if (!p_hwfn->cdev->p_iov_info) {
  2303. DP_NOTICE(p_hwfn, "VF flr but no IOV\n");
  2304. return 0;
  2305. }
  2306. /* Mark VFs */
  2307. for (i = 0; i < p_hwfn->cdev->p_iov_info->total_vfs; i++) {
  2308. struct qed_vf_info *p_vf;
  2309. u8 vfid;
  2310. p_vf = qed_iov_get_vf_info(p_hwfn, i, false);
  2311. if (!p_vf)
  2312. continue;
  2313. vfid = p_vf->abs_vf_id;
  2314. if ((1 << (vfid % 32)) & p_disabled_vfs[vfid / 32]) {
  2315. u64 *p_flr = p_hwfn->pf_iov_info->pending_flr;
  2316. u16 rel_vf_id = p_vf->relative_vf_id;
  2317. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  2318. "VF[%d] [rel %d] got FLR-ed\n",
  2319. vfid, rel_vf_id);
  2320. p_vf->state = VF_RESET;
  2321. /* No need to lock here, since pending_flr should
  2322. * only change here and before ACKing MFw. Since
  2323. * MFW will not trigger an additional attention for
  2324. * VF flr until ACKs, we're safe.
  2325. */
  2326. p_flr[rel_vf_id / 64] |= 1ULL << (rel_vf_id % 64);
  2327. found = 1;
  2328. }
  2329. }
  2330. return found;
  2331. }
  2332. static void qed_iov_get_link(struct qed_hwfn *p_hwfn,
  2333. u16 vfid,
  2334. struct qed_mcp_link_params *p_params,
  2335. struct qed_mcp_link_state *p_link,
  2336. struct qed_mcp_link_capabilities *p_caps)
  2337. {
  2338. struct qed_vf_info *p_vf = qed_iov_get_vf_info(p_hwfn,
  2339. vfid,
  2340. false);
  2341. struct qed_bulletin_content *p_bulletin;
  2342. if (!p_vf)
  2343. return;
  2344. p_bulletin = p_vf->bulletin.p_virt;
  2345. if (p_params)
  2346. __qed_vf_get_link_params(p_hwfn, p_params, p_bulletin);
  2347. if (p_link)
  2348. __qed_vf_get_link_state(p_hwfn, p_link, p_bulletin);
  2349. if (p_caps)
  2350. __qed_vf_get_link_caps(p_hwfn, p_caps, p_bulletin);
  2351. }
  2352. static void qed_iov_process_mbx_req(struct qed_hwfn *p_hwfn,
  2353. struct qed_ptt *p_ptt, int vfid)
  2354. {
  2355. struct qed_iov_vf_mbx *mbx;
  2356. struct qed_vf_info *p_vf;
  2357. p_vf = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
  2358. if (!p_vf)
  2359. return;
  2360. mbx = &p_vf->vf_mbx;
  2361. /* qed_iov_process_mbx_request */
  2362. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  2363. "VF[%02x]: Processing mailbox message\n", p_vf->abs_vf_id);
  2364. mbx->first_tlv = mbx->req_virt->first_tlv;
  2365. /* check if tlv type is known */
  2366. if (qed_iov_tlv_supported(mbx->first_tlv.tl.type)) {
  2367. switch (mbx->first_tlv.tl.type) {
  2368. case CHANNEL_TLV_ACQUIRE:
  2369. qed_iov_vf_mbx_acquire(p_hwfn, p_ptt, p_vf);
  2370. break;
  2371. case CHANNEL_TLV_VPORT_START:
  2372. qed_iov_vf_mbx_start_vport(p_hwfn, p_ptt, p_vf);
  2373. break;
  2374. case CHANNEL_TLV_VPORT_TEARDOWN:
  2375. qed_iov_vf_mbx_stop_vport(p_hwfn, p_ptt, p_vf);
  2376. break;
  2377. case CHANNEL_TLV_START_RXQ:
  2378. qed_iov_vf_mbx_start_rxq(p_hwfn, p_ptt, p_vf);
  2379. break;
  2380. case CHANNEL_TLV_START_TXQ:
  2381. qed_iov_vf_mbx_start_txq(p_hwfn, p_ptt, p_vf);
  2382. break;
  2383. case CHANNEL_TLV_STOP_RXQS:
  2384. qed_iov_vf_mbx_stop_rxqs(p_hwfn, p_ptt, p_vf);
  2385. break;
  2386. case CHANNEL_TLV_STOP_TXQS:
  2387. qed_iov_vf_mbx_stop_txqs(p_hwfn, p_ptt, p_vf);
  2388. break;
  2389. case CHANNEL_TLV_UPDATE_RXQ:
  2390. qed_iov_vf_mbx_update_rxqs(p_hwfn, p_ptt, p_vf);
  2391. break;
  2392. case CHANNEL_TLV_VPORT_UPDATE:
  2393. qed_iov_vf_mbx_vport_update(p_hwfn, p_ptt, p_vf);
  2394. break;
  2395. case CHANNEL_TLV_UCAST_FILTER:
  2396. qed_iov_vf_mbx_ucast_filter(p_hwfn, p_ptt, p_vf);
  2397. break;
  2398. case CHANNEL_TLV_CLOSE:
  2399. qed_iov_vf_mbx_close(p_hwfn, p_ptt, p_vf);
  2400. break;
  2401. case CHANNEL_TLV_INT_CLEANUP:
  2402. qed_iov_vf_mbx_int_cleanup(p_hwfn, p_ptt, p_vf);
  2403. break;
  2404. case CHANNEL_TLV_RELEASE:
  2405. qed_iov_vf_mbx_release(p_hwfn, p_ptt, p_vf);
  2406. break;
  2407. }
  2408. } else {
  2409. /* unknown TLV - this may belong to a VF driver from the future
  2410. * - a version written after this PF driver was written, which
  2411. * supports features unknown as of yet. Too bad since we don't
  2412. * support them. Or this may be because someone wrote a crappy
  2413. * VF driver and is sending garbage over the channel.
  2414. */
  2415. DP_NOTICE(p_hwfn,
  2416. "VF[%02x]: unknown TLV. type %04x length %04x padding %08x reply address %llu\n",
  2417. p_vf->abs_vf_id,
  2418. mbx->first_tlv.tl.type,
  2419. mbx->first_tlv.tl.length,
  2420. mbx->first_tlv.padding, mbx->first_tlv.reply_address);
  2421. /* Try replying in case reply address matches the acquisition's
  2422. * posted address.
  2423. */
  2424. if (p_vf->acquire.first_tlv.reply_address &&
  2425. (mbx->first_tlv.reply_address ==
  2426. p_vf->acquire.first_tlv.reply_address)) {
  2427. qed_iov_prepare_resp(p_hwfn, p_ptt, p_vf,
  2428. mbx->first_tlv.tl.type,
  2429. sizeof(struct pfvf_def_resp_tlv),
  2430. PFVF_STATUS_NOT_SUPPORTED);
  2431. } else {
  2432. DP_VERBOSE(p_hwfn,
  2433. QED_MSG_IOV,
  2434. "VF[%02x]: Can't respond to TLV - no valid reply address\n",
  2435. p_vf->abs_vf_id);
  2436. }
  2437. }
  2438. }
  2439. void qed_iov_pf_add_pending_events(struct qed_hwfn *p_hwfn, u8 vfid)
  2440. {
  2441. u64 add_bit = 1ULL << (vfid % 64);
  2442. p_hwfn->pf_iov_info->pending_events[vfid / 64] |= add_bit;
  2443. }
  2444. static void qed_iov_pf_get_and_clear_pending_events(struct qed_hwfn *p_hwfn,
  2445. u64 *events)
  2446. {
  2447. u64 *p_pending_events = p_hwfn->pf_iov_info->pending_events;
  2448. memcpy(events, p_pending_events, sizeof(u64) * QED_VF_ARRAY_LENGTH);
  2449. memset(p_pending_events, 0, sizeof(u64) * QED_VF_ARRAY_LENGTH);
  2450. }
  2451. static int qed_sriov_vfpf_msg(struct qed_hwfn *p_hwfn,
  2452. u16 abs_vfid, struct regpair *vf_msg)
  2453. {
  2454. u8 min = (u8)p_hwfn->cdev->p_iov_info->first_vf_in_pf;
  2455. struct qed_vf_info *p_vf;
  2456. if (!qed_iov_pf_sanity_check(p_hwfn, (int)abs_vfid - min)) {
  2457. DP_VERBOSE(p_hwfn,
  2458. QED_MSG_IOV,
  2459. "Got a message from VF [abs 0x%08x] that cannot be handled by PF\n",
  2460. abs_vfid);
  2461. return 0;
  2462. }
  2463. p_vf = &p_hwfn->pf_iov_info->vfs_array[(u8)abs_vfid - min];
  2464. /* List the physical address of the request so that handler
  2465. * could later on copy the message from it.
  2466. */
  2467. p_vf->vf_mbx.pending_req = (((u64)vf_msg->hi) << 32) | vf_msg->lo;
  2468. /* Mark the event and schedule the workqueue */
  2469. qed_iov_pf_add_pending_events(p_hwfn, p_vf->relative_vf_id);
  2470. qed_schedule_iov(p_hwfn, QED_IOV_WQ_MSG_FLAG);
  2471. return 0;
  2472. }
  2473. int qed_sriov_eqe_event(struct qed_hwfn *p_hwfn,
  2474. u8 opcode, __le16 echo, union event_ring_data *data)
  2475. {
  2476. switch (opcode) {
  2477. case COMMON_EVENT_VF_PF_CHANNEL:
  2478. return qed_sriov_vfpf_msg(p_hwfn, le16_to_cpu(echo),
  2479. &data->vf_pf_channel.msg_addr);
  2480. default:
  2481. DP_INFO(p_hwfn->cdev, "Unknown sriov eqe event 0x%02x\n",
  2482. opcode);
  2483. return -EINVAL;
  2484. }
  2485. }
  2486. u16 qed_iov_get_next_active_vf(struct qed_hwfn *p_hwfn, u16 rel_vf_id)
  2487. {
  2488. struct qed_hw_sriov_info *p_iov = p_hwfn->cdev->p_iov_info;
  2489. u16 i;
  2490. if (!p_iov)
  2491. goto out;
  2492. for (i = rel_vf_id; i < p_iov->total_vfs; i++)
  2493. if (qed_iov_is_valid_vfid(p_hwfn, rel_vf_id, true))
  2494. return i;
  2495. out:
  2496. return MAX_NUM_VFS;
  2497. }
  2498. static int qed_iov_copy_vf_msg(struct qed_hwfn *p_hwfn, struct qed_ptt *ptt,
  2499. int vfid)
  2500. {
  2501. struct qed_dmae_params params;
  2502. struct qed_vf_info *vf_info;
  2503. vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
  2504. if (!vf_info)
  2505. return -EINVAL;
  2506. memset(&params, 0, sizeof(struct qed_dmae_params));
  2507. params.flags = QED_DMAE_FLAG_VF_SRC | QED_DMAE_FLAG_COMPLETION_DST;
  2508. params.src_vfid = vf_info->abs_vf_id;
  2509. if (qed_dmae_host2host(p_hwfn, ptt,
  2510. vf_info->vf_mbx.pending_req,
  2511. vf_info->vf_mbx.req_phys,
  2512. sizeof(union vfpf_tlvs) / 4, &params)) {
  2513. DP_VERBOSE(p_hwfn, QED_MSG_IOV,
  2514. "Failed to copy message from VF 0x%02x\n", vfid);
  2515. return -EIO;
  2516. }
  2517. return 0;
  2518. }
  2519. static void qed_iov_bulletin_set_forced_mac(struct qed_hwfn *p_hwfn,
  2520. u8 *mac, int vfid)
  2521. {
  2522. struct qed_vf_info *vf_info;
  2523. u64 feature;
  2524. vf_info = qed_iov_get_vf_info(p_hwfn, (u16)vfid, true);
  2525. if (!vf_info) {
  2526. DP_NOTICE(p_hwfn->cdev,
  2527. "Can not set forced MAC, invalid vfid [%d]\n", vfid);
  2528. return;
  2529. }
  2530. feature = 1 << MAC_ADDR_FORCED;
  2531. memcpy(vf_info->bulletin.p_virt->mac, mac, ETH_ALEN);
  2532. vf_info->bulletin.p_virt->valid_bitmap |= feature;
  2533. /* Forced MAC will disable MAC_ADDR */
  2534. vf_info->bulletin.p_virt->valid_bitmap &=
  2535. ~(1 << VFPF_BULLETIN_MAC_ADDR);
  2536. qed_iov_configure_vport_forced(p_hwfn, vf_info, feature);
  2537. }
  2538. void qed_iov_bulletin_set_forced_vlan(struct qed_hwfn *p_hwfn,
  2539. u16 pvid, int vfid)
  2540. {
  2541. struct qed_vf_info *vf_info;
  2542. u64 feature;
  2543. vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
  2544. if (!vf_info) {
  2545. DP_NOTICE(p_hwfn->cdev,
  2546. "Can not set forced MAC, invalid vfid [%d]\n", vfid);
  2547. return;
  2548. }
  2549. feature = 1 << VLAN_ADDR_FORCED;
  2550. vf_info->bulletin.p_virt->pvid = pvid;
  2551. if (pvid)
  2552. vf_info->bulletin.p_virt->valid_bitmap |= feature;
  2553. else
  2554. vf_info->bulletin.p_virt->valid_bitmap &= ~feature;
  2555. qed_iov_configure_vport_forced(p_hwfn, vf_info, feature);
  2556. }
  2557. static bool qed_iov_vf_has_vport_instance(struct qed_hwfn *p_hwfn, int vfid)
  2558. {
  2559. struct qed_vf_info *p_vf_info;
  2560. p_vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
  2561. if (!p_vf_info)
  2562. return false;
  2563. return !!p_vf_info->vport_instance;
  2564. }
  2565. bool qed_iov_is_vf_stopped(struct qed_hwfn *p_hwfn, int vfid)
  2566. {
  2567. struct qed_vf_info *p_vf_info;
  2568. p_vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
  2569. if (!p_vf_info)
  2570. return true;
  2571. return p_vf_info->state == VF_STOPPED;
  2572. }
  2573. static bool qed_iov_spoofchk_get(struct qed_hwfn *p_hwfn, int vfid)
  2574. {
  2575. struct qed_vf_info *vf_info;
  2576. vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
  2577. if (!vf_info)
  2578. return false;
  2579. return vf_info->spoof_chk;
  2580. }
  2581. int qed_iov_spoofchk_set(struct qed_hwfn *p_hwfn, int vfid, bool val)
  2582. {
  2583. struct qed_vf_info *vf;
  2584. int rc = -EINVAL;
  2585. if (!qed_iov_pf_sanity_check(p_hwfn, vfid)) {
  2586. DP_NOTICE(p_hwfn,
  2587. "SR-IOV sanity check failed, can't set spoofchk\n");
  2588. goto out;
  2589. }
  2590. vf = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
  2591. if (!vf)
  2592. goto out;
  2593. if (!qed_iov_vf_has_vport_instance(p_hwfn, vfid)) {
  2594. /* After VF VPORT start PF will configure spoof check */
  2595. vf->req_spoofchk_val = val;
  2596. rc = 0;
  2597. goto out;
  2598. }
  2599. rc = __qed_iov_spoofchk_set(p_hwfn, vf, val);
  2600. out:
  2601. return rc;
  2602. }
  2603. static u8 *qed_iov_bulletin_get_forced_mac(struct qed_hwfn *p_hwfn,
  2604. u16 rel_vf_id)
  2605. {
  2606. struct qed_vf_info *p_vf;
  2607. p_vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, true);
  2608. if (!p_vf || !p_vf->bulletin.p_virt)
  2609. return NULL;
  2610. if (!(p_vf->bulletin.p_virt->valid_bitmap & (1 << MAC_ADDR_FORCED)))
  2611. return NULL;
  2612. return p_vf->bulletin.p_virt->mac;
  2613. }
  2614. u16 qed_iov_bulletin_get_forced_vlan(struct qed_hwfn *p_hwfn, u16 rel_vf_id)
  2615. {
  2616. struct qed_vf_info *p_vf;
  2617. p_vf = qed_iov_get_vf_info(p_hwfn, rel_vf_id, true);
  2618. if (!p_vf || !p_vf->bulletin.p_virt)
  2619. return 0;
  2620. if (!(p_vf->bulletin.p_virt->valid_bitmap & (1 << VLAN_ADDR_FORCED)))
  2621. return 0;
  2622. return p_vf->bulletin.p_virt->pvid;
  2623. }
  2624. static int qed_iov_configure_tx_rate(struct qed_hwfn *p_hwfn,
  2625. struct qed_ptt *p_ptt, int vfid, int val)
  2626. {
  2627. struct qed_vf_info *vf;
  2628. u8 abs_vp_id = 0;
  2629. int rc;
  2630. vf = qed_iov_get_vf_info(p_hwfn, (u16)vfid, true);
  2631. if (!vf)
  2632. return -EINVAL;
  2633. rc = qed_fw_vport(p_hwfn, vf->vport_id, &abs_vp_id);
  2634. if (rc)
  2635. return rc;
  2636. return qed_init_vport_rl(p_hwfn, p_ptt, abs_vp_id, (u32)val);
  2637. }
  2638. int qed_iov_configure_min_tx_rate(struct qed_dev *cdev, int vfid, u32 rate)
  2639. {
  2640. struct qed_vf_info *vf;
  2641. u8 vport_id;
  2642. int i;
  2643. for_each_hwfn(cdev, i) {
  2644. struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
  2645. if (!qed_iov_pf_sanity_check(p_hwfn, vfid)) {
  2646. DP_NOTICE(p_hwfn,
  2647. "SR-IOV sanity check failed, can't set min rate\n");
  2648. return -EINVAL;
  2649. }
  2650. }
  2651. vf = qed_iov_get_vf_info(QED_LEADING_HWFN(cdev), (u16)vfid, true);
  2652. vport_id = vf->vport_id;
  2653. return qed_configure_vport_wfq(cdev, vport_id, rate);
  2654. }
  2655. static int qed_iov_get_vf_min_rate(struct qed_hwfn *p_hwfn, int vfid)
  2656. {
  2657. struct qed_wfq_data *vf_vp_wfq;
  2658. struct qed_vf_info *vf_info;
  2659. vf_info = qed_iov_get_vf_info(p_hwfn, (u16) vfid, true);
  2660. if (!vf_info)
  2661. return 0;
  2662. vf_vp_wfq = &p_hwfn->qm_info.wfq_data[vf_info->vport_id];
  2663. if (vf_vp_wfq->configured)
  2664. return vf_vp_wfq->min_speed;
  2665. else
  2666. return 0;
  2667. }
  2668. /**
  2669. * qed_schedule_iov - schedules IOV task for VF and PF
  2670. * @hwfn: hardware function pointer
  2671. * @flag: IOV flag for VF/PF
  2672. */
  2673. void qed_schedule_iov(struct qed_hwfn *hwfn, enum qed_iov_wq_flag flag)
  2674. {
  2675. smp_mb__before_atomic();
  2676. set_bit(flag, &hwfn->iov_task_flags);
  2677. smp_mb__after_atomic();
  2678. DP_VERBOSE(hwfn, QED_MSG_IOV, "Scheduling iov task [Flag: %d]\n", flag);
  2679. queue_delayed_work(hwfn->iov_wq, &hwfn->iov_task, 0);
  2680. }
  2681. void qed_vf_start_iov_wq(struct qed_dev *cdev)
  2682. {
  2683. int i;
  2684. for_each_hwfn(cdev, i)
  2685. queue_delayed_work(cdev->hwfns[i].iov_wq,
  2686. &cdev->hwfns[i].iov_task, 0);
  2687. }
  2688. int qed_sriov_disable(struct qed_dev *cdev, bool pci_enabled)
  2689. {
  2690. int i, j;
  2691. for_each_hwfn(cdev, i)
  2692. if (cdev->hwfns[i].iov_wq)
  2693. flush_workqueue(cdev->hwfns[i].iov_wq);
  2694. /* Mark VFs for disablement */
  2695. qed_iov_set_vfs_to_disable(cdev, true);
  2696. if (cdev->p_iov_info && cdev->p_iov_info->num_vfs && pci_enabled)
  2697. pci_disable_sriov(cdev->pdev);
  2698. for_each_hwfn(cdev, i) {
  2699. struct qed_hwfn *hwfn = &cdev->hwfns[i];
  2700. struct qed_ptt *ptt = qed_ptt_acquire(hwfn);
  2701. /* Failure to acquire the ptt in 100g creates an odd error
  2702. * where the first engine has already relased IOV.
  2703. */
  2704. if (!ptt) {
  2705. DP_ERR(hwfn, "Failed to acquire ptt\n");
  2706. return -EBUSY;
  2707. }
  2708. /* Clean WFQ db and configure equal weight for all vports */
  2709. qed_clean_wfq_db(hwfn, ptt);
  2710. qed_for_each_vf(hwfn, j) {
  2711. int k;
  2712. if (!qed_iov_is_valid_vfid(hwfn, j, true))
  2713. continue;
  2714. /* Wait until VF is disabled before releasing */
  2715. for (k = 0; k < 100; k++) {
  2716. if (!qed_iov_is_vf_stopped(hwfn, j))
  2717. msleep(20);
  2718. else
  2719. break;
  2720. }
  2721. if (k < 100)
  2722. qed_iov_release_hw_for_vf(&cdev->hwfns[i],
  2723. ptt, j);
  2724. else
  2725. DP_ERR(hwfn,
  2726. "Timeout waiting for VF's FLR to end\n");
  2727. }
  2728. qed_ptt_release(hwfn, ptt);
  2729. }
  2730. qed_iov_set_vfs_to_disable(cdev, false);
  2731. return 0;
  2732. }
  2733. static int qed_sriov_enable(struct qed_dev *cdev, int num)
  2734. {
  2735. struct qed_sb_cnt_info sb_cnt_info;
  2736. int i, j, rc;
  2737. if (num >= RESC_NUM(&cdev->hwfns[0], QED_VPORT)) {
  2738. DP_NOTICE(cdev, "Can start at most %d VFs\n",
  2739. RESC_NUM(&cdev->hwfns[0], QED_VPORT) - 1);
  2740. return -EINVAL;
  2741. }
  2742. /* Initialize HW for VF access */
  2743. for_each_hwfn(cdev, j) {
  2744. struct qed_hwfn *hwfn = &cdev->hwfns[j];
  2745. struct qed_ptt *ptt = qed_ptt_acquire(hwfn);
  2746. int num_sbs = 0, limit = 16;
  2747. if (!ptt) {
  2748. DP_ERR(hwfn, "Failed to acquire ptt\n");
  2749. rc = -EBUSY;
  2750. goto err;
  2751. }
  2752. if (IS_MF_DEFAULT(hwfn))
  2753. limit = MAX_NUM_VFS_BB / hwfn->num_funcs_on_engine;
  2754. memset(&sb_cnt_info, 0, sizeof(sb_cnt_info));
  2755. qed_int_get_num_sbs(hwfn, &sb_cnt_info);
  2756. num_sbs = min_t(int, sb_cnt_info.sb_free_blk, limit);
  2757. for (i = 0; i < num; i++) {
  2758. if (!qed_iov_is_valid_vfid(hwfn, i, false))
  2759. continue;
  2760. rc = qed_iov_init_hw_for_vf(hwfn,
  2761. ptt, i, num_sbs / num);
  2762. if (rc) {
  2763. DP_ERR(cdev, "Failed to enable VF[%d]\n", i);
  2764. qed_ptt_release(hwfn, ptt);
  2765. goto err;
  2766. }
  2767. }
  2768. qed_ptt_release(hwfn, ptt);
  2769. }
  2770. /* Enable SRIOV PCIe functions */
  2771. rc = pci_enable_sriov(cdev->pdev, num);
  2772. if (rc) {
  2773. DP_ERR(cdev, "Failed to enable sriov [%d]\n", rc);
  2774. goto err;
  2775. }
  2776. return num;
  2777. err:
  2778. qed_sriov_disable(cdev, false);
  2779. return rc;
  2780. }
  2781. static int qed_sriov_configure(struct qed_dev *cdev, int num_vfs_param)
  2782. {
  2783. if (!IS_QED_SRIOV(cdev)) {
  2784. DP_VERBOSE(cdev, QED_MSG_IOV, "SR-IOV is not supported\n");
  2785. return -EOPNOTSUPP;
  2786. }
  2787. if (num_vfs_param)
  2788. return qed_sriov_enable(cdev, num_vfs_param);
  2789. else
  2790. return qed_sriov_disable(cdev, true);
  2791. }
  2792. static int qed_sriov_pf_set_mac(struct qed_dev *cdev, u8 *mac, int vfid)
  2793. {
  2794. int i;
  2795. if (!IS_QED_SRIOV(cdev) || !IS_PF_SRIOV_ALLOC(&cdev->hwfns[0])) {
  2796. DP_VERBOSE(cdev, QED_MSG_IOV,
  2797. "Cannot set a VF MAC; Sriov is not enabled\n");
  2798. return -EINVAL;
  2799. }
  2800. if (!qed_iov_is_valid_vfid(&cdev->hwfns[0], vfid, true)) {
  2801. DP_VERBOSE(cdev, QED_MSG_IOV,
  2802. "Cannot set VF[%d] MAC (VF is not active)\n", vfid);
  2803. return -EINVAL;
  2804. }
  2805. for_each_hwfn(cdev, i) {
  2806. struct qed_hwfn *hwfn = &cdev->hwfns[i];
  2807. struct qed_public_vf_info *vf_info;
  2808. vf_info = qed_iov_get_public_vf_info(hwfn, vfid, true);
  2809. if (!vf_info)
  2810. continue;
  2811. /* Set the forced MAC, and schedule the IOV task */
  2812. ether_addr_copy(vf_info->forced_mac, mac);
  2813. qed_schedule_iov(hwfn, QED_IOV_WQ_SET_UNICAST_FILTER_FLAG);
  2814. }
  2815. return 0;
  2816. }
  2817. static int qed_sriov_pf_set_vlan(struct qed_dev *cdev, u16 vid, int vfid)
  2818. {
  2819. int i;
  2820. if (!IS_QED_SRIOV(cdev) || !IS_PF_SRIOV_ALLOC(&cdev->hwfns[0])) {
  2821. DP_VERBOSE(cdev, QED_MSG_IOV,
  2822. "Cannot set a VF MAC; Sriov is not enabled\n");
  2823. return -EINVAL;
  2824. }
  2825. if (!qed_iov_is_valid_vfid(&cdev->hwfns[0], vfid, true)) {
  2826. DP_VERBOSE(cdev, QED_MSG_IOV,
  2827. "Cannot set VF[%d] MAC (VF is not active)\n", vfid);
  2828. return -EINVAL;
  2829. }
  2830. for_each_hwfn(cdev, i) {
  2831. struct qed_hwfn *hwfn = &cdev->hwfns[i];
  2832. struct qed_public_vf_info *vf_info;
  2833. vf_info = qed_iov_get_public_vf_info(hwfn, vfid, true);
  2834. if (!vf_info)
  2835. continue;
  2836. /* Set the forced vlan, and schedule the IOV task */
  2837. vf_info->forced_vlan = vid;
  2838. qed_schedule_iov(hwfn, QED_IOV_WQ_SET_UNICAST_FILTER_FLAG);
  2839. }
  2840. return 0;
  2841. }
  2842. static int qed_get_vf_config(struct qed_dev *cdev,
  2843. int vf_id, struct ifla_vf_info *ivi)
  2844. {
  2845. struct qed_hwfn *hwfn = QED_LEADING_HWFN(cdev);
  2846. struct qed_public_vf_info *vf_info;
  2847. struct qed_mcp_link_state link;
  2848. u32 tx_rate;
  2849. /* Sanitize request */
  2850. if (IS_VF(cdev))
  2851. return -EINVAL;
  2852. if (!qed_iov_is_valid_vfid(&cdev->hwfns[0], vf_id, true)) {
  2853. DP_VERBOSE(cdev, QED_MSG_IOV,
  2854. "VF index [%d] isn't active\n", vf_id);
  2855. return -EINVAL;
  2856. }
  2857. vf_info = qed_iov_get_public_vf_info(hwfn, vf_id, true);
  2858. qed_iov_get_link(hwfn, vf_id, NULL, &link, NULL);
  2859. /* Fill information about VF */
  2860. ivi->vf = vf_id;
  2861. if (is_valid_ether_addr(vf_info->forced_mac))
  2862. ether_addr_copy(ivi->mac, vf_info->forced_mac);
  2863. else
  2864. ether_addr_copy(ivi->mac, vf_info->mac);
  2865. ivi->vlan = vf_info->forced_vlan;
  2866. ivi->spoofchk = qed_iov_spoofchk_get(hwfn, vf_id);
  2867. ivi->linkstate = vf_info->link_state;
  2868. tx_rate = vf_info->tx_rate;
  2869. ivi->max_tx_rate = tx_rate ? tx_rate : link.speed;
  2870. ivi->min_tx_rate = qed_iov_get_vf_min_rate(hwfn, vf_id);
  2871. return 0;
  2872. }
  2873. void qed_inform_vf_link_state(struct qed_hwfn *hwfn)
  2874. {
  2875. struct qed_mcp_link_capabilities caps;
  2876. struct qed_mcp_link_params params;
  2877. struct qed_mcp_link_state link;
  2878. int i;
  2879. if (!hwfn->pf_iov_info)
  2880. return;
  2881. /* Update bulletin of all future possible VFs with link configuration */
  2882. for (i = 0; i < hwfn->cdev->p_iov_info->total_vfs; i++) {
  2883. struct qed_public_vf_info *vf_info;
  2884. vf_info = qed_iov_get_public_vf_info(hwfn, i, false);
  2885. if (!vf_info)
  2886. continue;
  2887. memcpy(&params, qed_mcp_get_link_params(hwfn), sizeof(params));
  2888. memcpy(&link, qed_mcp_get_link_state(hwfn), sizeof(link));
  2889. memcpy(&caps, qed_mcp_get_link_capabilities(hwfn),
  2890. sizeof(caps));
  2891. /* Modify link according to the VF's configured link state */
  2892. switch (vf_info->link_state) {
  2893. case IFLA_VF_LINK_STATE_DISABLE:
  2894. link.link_up = false;
  2895. break;
  2896. case IFLA_VF_LINK_STATE_ENABLE:
  2897. link.link_up = true;
  2898. /* Set speed according to maximum supported by HW.
  2899. * that is 40G for regular devices and 100G for CMT
  2900. * mode devices.
  2901. */
  2902. link.speed = (hwfn->cdev->num_hwfns > 1) ?
  2903. 100000 : 40000;
  2904. default:
  2905. /* In auto mode pass PF link image to VF */
  2906. break;
  2907. }
  2908. if (link.link_up && vf_info->tx_rate) {
  2909. struct qed_ptt *ptt;
  2910. int rate;
  2911. rate = min_t(int, vf_info->tx_rate, link.speed);
  2912. ptt = qed_ptt_acquire(hwfn);
  2913. if (!ptt) {
  2914. DP_NOTICE(hwfn, "Failed to acquire PTT\n");
  2915. return;
  2916. }
  2917. if (!qed_iov_configure_tx_rate(hwfn, ptt, i, rate)) {
  2918. vf_info->tx_rate = rate;
  2919. link.speed = rate;
  2920. }
  2921. qed_ptt_release(hwfn, ptt);
  2922. }
  2923. qed_iov_set_link(hwfn, i, &params, &link, &caps);
  2924. }
  2925. qed_schedule_iov(hwfn, QED_IOV_WQ_BULLETIN_UPDATE_FLAG);
  2926. }
  2927. static int qed_set_vf_link_state(struct qed_dev *cdev,
  2928. int vf_id, int link_state)
  2929. {
  2930. int i;
  2931. /* Sanitize request */
  2932. if (IS_VF(cdev))
  2933. return -EINVAL;
  2934. if (!qed_iov_is_valid_vfid(&cdev->hwfns[0], vf_id, true)) {
  2935. DP_VERBOSE(cdev, QED_MSG_IOV,
  2936. "VF index [%d] isn't active\n", vf_id);
  2937. return -EINVAL;
  2938. }
  2939. /* Handle configuration of link state */
  2940. for_each_hwfn(cdev, i) {
  2941. struct qed_hwfn *hwfn = &cdev->hwfns[i];
  2942. struct qed_public_vf_info *vf;
  2943. vf = qed_iov_get_public_vf_info(hwfn, vf_id, true);
  2944. if (!vf)
  2945. continue;
  2946. if (vf->link_state == link_state)
  2947. continue;
  2948. vf->link_state = link_state;
  2949. qed_inform_vf_link_state(&cdev->hwfns[i]);
  2950. }
  2951. return 0;
  2952. }
  2953. static int qed_spoof_configure(struct qed_dev *cdev, int vfid, bool val)
  2954. {
  2955. int i, rc = -EINVAL;
  2956. for_each_hwfn(cdev, i) {
  2957. struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
  2958. rc = qed_iov_spoofchk_set(p_hwfn, vfid, val);
  2959. if (rc)
  2960. break;
  2961. }
  2962. return rc;
  2963. }
  2964. static int qed_configure_max_vf_rate(struct qed_dev *cdev, int vfid, int rate)
  2965. {
  2966. int i;
  2967. for_each_hwfn(cdev, i) {
  2968. struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
  2969. struct qed_public_vf_info *vf;
  2970. if (!qed_iov_pf_sanity_check(p_hwfn, vfid)) {
  2971. DP_NOTICE(p_hwfn,
  2972. "SR-IOV sanity check failed, can't set tx rate\n");
  2973. return -EINVAL;
  2974. }
  2975. vf = qed_iov_get_public_vf_info(p_hwfn, vfid, true);
  2976. vf->tx_rate = rate;
  2977. qed_inform_vf_link_state(p_hwfn);
  2978. }
  2979. return 0;
  2980. }
  2981. static int qed_set_vf_rate(struct qed_dev *cdev,
  2982. int vfid, u32 min_rate, u32 max_rate)
  2983. {
  2984. int rc_min = 0, rc_max = 0;
  2985. if (max_rate)
  2986. rc_max = qed_configure_max_vf_rate(cdev, vfid, max_rate);
  2987. if (min_rate)
  2988. rc_min = qed_iov_configure_min_tx_rate(cdev, vfid, min_rate);
  2989. if (rc_max | rc_min)
  2990. return -EINVAL;
  2991. return 0;
  2992. }
  2993. static void qed_handle_vf_msg(struct qed_hwfn *hwfn)
  2994. {
  2995. u64 events[QED_VF_ARRAY_LENGTH];
  2996. struct qed_ptt *ptt;
  2997. int i;
  2998. ptt = qed_ptt_acquire(hwfn);
  2999. if (!ptt) {
  3000. DP_VERBOSE(hwfn, QED_MSG_IOV,
  3001. "Can't acquire PTT; re-scheduling\n");
  3002. qed_schedule_iov(hwfn, QED_IOV_WQ_MSG_FLAG);
  3003. return;
  3004. }
  3005. qed_iov_pf_get_and_clear_pending_events(hwfn, events);
  3006. DP_VERBOSE(hwfn, QED_MSG_IOV,
  3007. "Event mask of VF events: 0x%llx 0x%llx 0x%llx\n",
  3008. events[0], events[1], events[2]);
  3009. qed_for_each_vf(hwfn, i) {
  3010. /* Skip VFs with no pending messages */
  3011. if (!(events[i / 64] & (1ULL << (i % 64))))
  3012. continue;
  3013. DP_VERBOSE(hwfn, QED_MSG_IOV,
  3014. "Handling VF message from VF 0x%02x [Abs 0x%02x]\n",
  3015. i, hwfn->cdev->p_iov_info->first_vf_in_pf + i);
  3016. /* Copy VF's message to PF's request buffer for that VF */
  3017. if (qed_iov_copy_vf_msg(hwfn, ptt, i))
  3018. continue;
  3019. qed_iov_process_mbx_req(hwfn, ptt, i);
  3020. }
  3021. qed_ptt_release(hwfn, ptt);
  3022. }
  3023. static void qed_handle_pf_set_vf_unicast(struct qed_hwfn *hwfn)
  3024. {
  3025. int i;
  3026. qed_for_each_vf(hwfn, i) {
  3027. struct qed_public_vf_info *info;
  3028. bool update = false;
  3029. u8 *mac;
  3030. info = qed_iov_get_public_vf_info(hwfn, i, true);
  3031. if (!info)
  3032. continue;
  3033. /* Update data on bulletin board */
  3034. mac = qed_iov_bulletin_get_forced_mac(hwfn, i);
  3035. if (is_valid_ether_addr(info->forced_mac) &&
  3036. (!mac || !ether_addr_equal(mac, info->forced_mac))) {
  3037. DP_VERBOSE(hwfn,
  3038. QED_MSG_IOV,
  3039. "Handling PF setting of VF MAC to VF 0x%02x [Abs 0x%02x]\n",
  3040. i,
  3041. hwfn->cdev->p_iov_info->first_vf_in_pf + i);
  3042. /* Update bulletin board with forced MAC */
  3043. qed_iov_bulletin_set_forced_mac(hwfn,
  3044. info->forced_mac, i);
  3045. update = true;
  3046. }
  3047. if (qed_iov_bulletin_get_forced_vlan(hwfn, i) ^
  3048. info->forced_vlan) {
  3049. DP_VERBOSE(hwfn,
  3050. QED_MSG_IOV,
  3051. "Handling PF setting of pvid [0x%04x] to VF 0x%02x [Abs 0x%02x]\n",
  3052. info->forced_vlan,
  3053. i,
  3054. hwfn->cdev->p_iov_info->first_vf_in_pf + i);
  3055. qed_iov_bulletin_set_forced_vlan(hwfn,
  3056. info->forced_vlan, i);
  3057. update = true;
  3058. }
  3059. if (update)
  3060. qed_schedule_iov(hwfn, QED_IOV_WQ_BULLETIN_UPDATE_FLAG);
  3061. }
  3062. }
  3063. static void qed_handle_bulletin_post(struct qed_hwfn *hwfn)
  3064. {
  3065. struct qed_ptt *ptt;
  3066. int i;
  3067. ptt = qed_ptt_acquire(hwfn);
  3068. if (!ptt) {
  3069. DP_NOTICE(hwfn, "Failed allocating a ptt entry\n");
  3070. qed_schedule_iov(hwfn, QED_IOV_WQ_BULLETIN_UPDATE_FLAG);
  3071. return;
  3072. }
  3073. qed_for_each_vf(hwfn, i)
  3074. qed_iov_post_vf_bulletin(hwfn, i, ptt);
  3075. qed_ptt_release(hwfn, ptt);
  3076. }
  3077. void qed_iov_pf_task(struct work_struct *work)
  3078. {
  3079. struct qed_hwfn *hwfn = container_of(work, struct qed_hwfn,
  3080. iov_task.work);
  3081. int rc;
  3082. if (test_and_clear_bit(QED_IOV_WQ_STOP_WQ_FLAG, &hwfn->iov_task_flags))
  3083. return;
  3084. if (test_and_clear_bit(QED_IOV_WQ_FLR_FLAG, &hwfn->iov_task_flags)) {
  3085. struct qed_ptt *ptt = qed_ptt_acquire(hwfn);
  3086. if (!ptt) {
  3087. qed_schedule_iov(hwfn, QED_IOV_WQ_FLR_FLAG);
  3088. return;
  3089. }
  3090. rc = qed_iov_vf_flr_cleanup(hwfn, ptt);
  3091. if (rc)
  3092. qed_schedule_iov(hwfn, QED_IOV_WQ_FLR_FLAG);
  3093. qed_ptt_release(hwfn, ptt);
  3094. }
  3095. if (test_and_clear_bit(QED_IOV_WQ_MSG_FLAG, &hwfn->iov_task_flags))
  3096. qed_handle_vf_msg(hwfn);
  3097. if (test_and_clear_bit(QED_IOV_WQ_SET_UNICAST_FILTER_FLAG,
  3098. &hwfn->iov_task_flags))
  3099. qed_handle_pf_set_vf_unicast(hwfn);
  3100. if (test_and_clear_bit(QED_IOV_WQ_BULLETIN_UPDATE_FLAG,
  3101. &hwfn->iov_task_flags))
  3102. qed_handle_bulletin_post(hwfn);
  3103. }
  3104. void qed_iov_wq_stop(struct qed_dev *cdev, bool schedule_first)
  3105. {
  3106. int i;
  3107. for_each_hwfn(cdev, i) {
  3108. if (!cdev->hwfns[i].iov_wq)
  3109. continue;
  3110. if (schedule_first) {
  3111. qed_schedule_iov(&cdev->hwfns[i],
  3112. QED_IOV_WQ_STOP_WQ_FLAG);
  3113. cancel_delayed_work_sync(&cdev->hwfns[i].iov_task);
  3114. }
  3115. flush_workqueue(cdev->hwfns[i].iov_wq);
  3116. destroy_workqueue(cdev->hwfns[i].iov_wq);
  3117. }
  3118. }
  3119. int qed_iov_wq_start(struct qed_dev *cdev)
  3120. {
  3121. char name[NAME_SIZE];
  3122. int i;
  3123. for_each_hwfn(cdev, i) {
  3124. struct qed_hwfn *p_hwfn = &cdev->hwfns[i];
  3125. /* PFs needs a dedicated workqueue only if they support IOV.
  3126. * VFs always require one.
  3127. */
  3128. if (IS_PF(p_hwfn->cdev) && !IS_PF_SRIOV(p_hwfn))
  3129. continue;
  3130. snprintf(name, NAME_SIZE, "iov-%02x:%02x.%02x",
  3131. cdev->pdev->bus->number,
  3132. PCI_SLOT(cdev->pdev->devfn), p_hwfn->abs_pf_id);
  3133. p_hwfn->iov_wq = create_singlethread_workqueue(name);
  3134. if (!p_hwfn->iov_wq) {
  3135. DP_NOTICE(p_hwfn, "Cannot create iov workqueue\n");
  3136. return -ENOMEM;
  3137. }
  3138. if (IS_PF(cdev))
  3139. INIT_DELAYED_WORK(&p_hwfn->iov_task, qed_iov_pf_task);
  3140. else
  3141. INIT_DELAYED_WORK(&p_hwfn->iov_task, qed_iov_vf_task);
  3142. }
  3143. return 0;
  3144. }
  3145. const struct qed_iov_hv_ops qed_iov_ops_pass = {
  3146. .configure = &qed_sriov_configure,
  3147. .set_mac = &qed_sriov_pf_set_mac,
  3148. .set_vlan = &qed_sriov_pf_set_vlan,
  3149. .get_config = &qed_get_vf_config,
  3150. .set_link_state = &qed_set_vf_link_state,
  3151. .set_spoof = &qed_spoof_configure,
  3152. .set_rate = &qed_set_vf_rate,
  3153. };