fm10k_pci.c 65 KB

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  1. /* Intel(R) Ethernet Switch Host Interface Driver
  2. * Copyright(c) 2013 - 2016 Intel Corporation.
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms and conditions of the GNU General Public License,
  6. * version 2, as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope it will be useful, but WITHOUT
  9. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  11. * more details.
  12. *
  13. * The full GNU General Public License is included in this distribution in
  14. * the file called "COPYING".
  15. *
  16. * Contact Information:
  17. * e1000-devel Mailing List <e1000-devel@lists.sourceforge.net>
  18. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  19. */
  20. #include <linux/module.h>
  21. #include <linux/aer.h>
  22. #include "fm10k.h"
  23. static const struct fm10k_info *fm10k_info_tbl[] = {
  24. [fm10k_device_pf] = &fm10k_pf_info,
  25. [fm10k_device_vf] = &fm10k_vf_info,
  26. };
  27. /**
  28. * fm10k_pci_tbl - PCI Device ID Table
  29. *
  30. * Wildcard entries (PCI_ANY_ID) should come last
  31. * Last entry must be all 0s
  32. *
  33. * { Vendor ID, Device ID, SubVendor ID, SubDevice ID,
  34. * Class, Class Mask, private data (not used) }
  35. */
  36. static const struct pci_device_id fm10k_pci_tbl[] = {
  37. { PCI_VDEVICE(INTEL, FM10K_DEV_ID_PF), fm10k_device_pf },
  38. { PCI_VDEVICE(INTEL, FM10K_DEV_ID_VF), fm10k_device_vf },
  39. /* required last entry */
  40. { 0, }
  41. };
  42. MODULE_DEVICE_TABLE(pci, fm10k_pci_tbl);
  43. u16 fm10k_read_pci_cfg_word(struct fm10k_hw *hw, u32 reg)
  44. {
  45. struct fm10k_intfc *interface = hw->back;
  46. u16 value = 0;
  47. if (FM10K_REMOVED(hw->hw_addr))
  48. return ~value;
  49. pci_read_config_word(interface->pdev, reg, &value);
  50. if (value == 0xFFFF)
  51. fm10k_write_flush(hw);
  52. return value;
  53. }
  54. u32 fm10k_read_reg(struct fm10k_hw *hw, int reg)
  55. {
  56. u32 __iomem *hw_addr = ACCESS_ONCE(hw->hw_addr);
  57. u32 value = 0;
  58. if (FM10K_REMOVED(hw_addr))
  59. return ~value;
  60. value = readl(&hw_addr[reg]);
  61. if (!(~value) && (!reg || !(~readl(hw_addr)))) {
  62. struct fm10k_intfc *interface = hw->back;
  63. struct net_device *netdev = interface->netdev;
  64. hw->hw_addr = NULL;
  65. netif_device_detach(netdev);
  66. netdev_err(netdev, "PCIe link lost, device now detached\n");
  67. }
  68. return value;
  69. }
  70. static int fm10k_hw_ready(struct fm10k_intfc *interface)
  71. {
  72. struct fm10k_hw *hw = &interface->hw;
  73. fm10k_write_flush(hw);
  74. return FM10K_REMOVED(hw->hw_addr) ? -ENODEV : 0;
  75. }
  76. void fm10k_service_event_schedule(struct fm10k_intfc *interface)
  77. {
  78. if (!test_bit(__FM10K_SERVICE_DISABLE, &interface->state) &&
  79. !test_and_set_bit(__FM10K_SERVICE_SCHED, &interface->state))
  80. queue_work(fm10k_workqueue, &interface->service_task);
  81. }
  82. static void fm10k_service_event_complete(struct fm10k_intfc *interface)
  83. {
  84. WARN_ON(!test_bit(__FM10K_SERVICE_SCHED, &interface->state));
  85. /* flush memory to make sure state is correct before next watchog */
  86. smp_mb__before_atomic();
  87. clear_bit(__FM10K_SERVICE_SCHED, &interface->state);
  88. }
  89. /**
  90. * fm10k_service_timer - Timer Call-back
  91. * @data: pointer to interface cast into an unsigned long
  92. **/
  93. static void fm10k_service_timer(unsigned long data)
  94. {
  95. struct fm10k_intfc *interface = (struct fm10k_intfc *)data;
  96. /* Reset the timer */
  97. mod_timer(&interface->service_timer, (HZ * 2) + jiffies);
  98. fm10k_service_event_schedule(interface);
  99. }
  100. static void fm10k_detach_subtask(struct fm10k_intfc *interface)
  101. {
  102. struct net_device *netdev = interface->netdev;
  103. u32 __iomem *hw_addr;
  104. u32 value;
  105. /* do nothing if device is still present or hw_addr is set */
  106. if (netif_device_present(netdev) || interface->hw.hw_addr)
  107. return;
  108. /* check the real address space to see if we've recovered */
  109. hw_addr = READ_ONCE(interface->uc_addr);
  110. value = readl(hw_addr);
  111. if ((~value)) {
  112. interface->hw.hw_addr = interface->uc_addr;
  113. netif_device_attach(netdev);
  114. interface->flags |= FM10K_FLAG_RESET_REQUESTED;
  115. netdev_warn(netdev, "PCIe link restored, device now attached\n");
  116. return;
  117. }
  118. rtnl_lock();
  119. if (netif_running(netdev))
  120. dev_close(netdev);
  121. rtnl_unlock();
  122. }
  123. static void fm10k_prepare_for_reset(struct fm10k_intfc *interface)
  124. {
  125. struct net_device *netdev = interface->netdev;
  126. WARN_ON(in_interrupt());
  127. /* put off any impending NetWatchDogTimeout */
  128. netif_trans_update(netdev);
  129. while (test_and_set_bit(__FM10K_RESETTING, &interface->state))
  130. usleep_range(1000, 2000);
  131. rtnl_lock();
  132. fm10k_iov_suspend(interface->pdev);
  133. if (netif_running(netdev))
  134. fm10k_close(netdev);
  135. fm10k_mbx_free_irq(interface);
  136. /* free interrupts */
  137. fm10k_clear_queueing_scheme(interface);
  138. /* delay any future reset requests */
  139. interface->last_reset = jiffies + (10 * HZ);
  140. rtnl_unlock();
  141. }
  142. static int fm10k_handle_reset(struct fm10k_intfc *interface)
  143. {
  144. struct net_device *netdev = interface->netdev;
  145. struct fm10k_hw *hw = &interface->hw;
  146. int err;
  147. rtnl_lock();
  148. pci_set_master(interface->pdev);
  149. /* reset and initialize the hardware so it is in a known state */
  150. err = hw->mac.ops.reset_hw(hw);
  151. if (err) {
  152. dev_err(&interface->pdev->dev, "reset_hw failed: %d\n", err);
  153. goto reinit_err;
  154. }
  155. err = hw->mac.ops.init_hw(hw);
  156. if (err) {
  157. dev_err(&interface->pdev->dev, "init_hw failed: %d\n", err);
  158. goto reinit_err;
  159. }
  160. err = fm10k_init_queueing_scheme(interface);
  161. if (err) {
  162. dev_err(&interface->pdev->dev,
  163. "init_queueing_scheme failed: %d\n", err);
  164. goto reinit_err;
  165. }
  166. /* re-associate interrupts */
  167. err = fm10k_mbx_request_irq(interface);
  168. if (err)
  169. goto err_mbx_irq;
  170. err = fm10k_hw_ready(interface);
  171. if (err)
  172. goto err_open;
  173. /* update hardware address for VFs if perm_addr has changed */
  174. if (hw->mac.type == fm10k_mac_vf) {
  175. if (is_valid_ether_addr(hw->mac.perm_addr)) {
  176. ether_addr_copy(hw->mac.addr, hw->mac.perm_addr);
  177. ether_addr_copy(netdev->perm_addr, hw->mac.perm_addr);
  178. ether_addr_copy(netdev->dev_addr, hw->mac.perm_addr);
  179. netdev->addr_assign_type &= ~NET_ADDR_RANDOM;
  180. }
  181. if (hw->mac.vlan_override)
  182. netdev->features &= ~NETIF_F_HW_VLAN_CTAG_RX;
  183. else
  184. netdev->features |= NETIF_F_HW_VLAN_CTAG_RX;
  185. }
  186. err = netif_running(netdev) ? fm10k_open(netdev) : 0;
  187. if (err)
  188. goto err_open;
  189. fm10k_iov_resume(interface->pdev);
  190. rtnl_unlock();
  191. clear_bit(__FM10K_RESETTING, &interface->state);
  192. return err;
  193. err_open:
  194. fm10k_mbx_free_irq(interface);
  195. err_mbx_irq:
  196. fm10k_clear_queueing_scheme(interface);
  197. reinit_err:
  198. netif_device_detach(netdev);
  199. rtnl_unlock();
  200. clear_bit(__FM10K_RESETTING, &interface->state);
  201. return err;
  202. }
  203. static void fm10k_reinit(struct fm10k_intfc *interface)
  204. {
  205. int err;
  206. fm10k_prepare_for_reset(interface);
  207. err = fm10k_handle_reset(interface);
  208. if (err)
  209. dev_err(&interface->pdev->dev,
  210. "fm10k_handle_reset failed: %d\n", err);
  211. }
  212. static void fm10k_reset_subtask(struct fm10k_intfc *interface)
  213. {
  214. if (!(interface->flags & FM10K_FLAG_RESET_REQUESTED))
  215. return;
  216. interface->flags &= ~FM10K_FLAG_RESET_REQUESTED;
  217. netdev_err(interface->netdev, "Reset interface\n");
  218. fm10k_reinit(interface);
  219. }
  220. /**
  221. * fm10k_configure_swpri_map - Configure Receive SWPRI to PC mapping
  222. * @interface: board private structure
  223. *
  224. * Configure the SWPRI to PC mapping for the port.
  225. **/
  226. static void fm10k_configure_swpri_map(struct fm10k_intfc *interface)
  227. {
  228. struct net_device *netdev = interface->netdev;
  229. struct fm10k_hw *hw = &interface->hw;
  230. int i;
  231. /* clear flag indicating update is needed */
  232. interface->flags &= ~FM10K_FLAG_SWPRI_CONFIG;
  233. /* these registers are only available on the PF */
  234. if (hw->mac.type != fm10k_mac_pf)
  235. return;
  236. /* configure SWPRI to PC map */
  237. for (i = 0; i < FM10K_SWPRI_MAX; i++)
  238. fm10k_write_reg(hw, FM10K_SWPRI_MAP(i),
  239. netdev_get_prio_tc_map(netdev, i));
  240. }
  241. /**
  242. * fm10k_watchdog_update_host_state - Update the link status based on host.
  243. * @interface: board private structure
  244. **/
  245. static void fm10k_watchdog_update_host_state(struct fm10k_intfc *interface)
  246. {
  247. struct fm10k_hw *hw = &interface->hw;
  248. s32 err;
  249. if (test_bit(__FM10K_LINK_DOWN, &interface->state)) {
  250. interface->host_ready = false;
  251. if (time_is_after_jiffies(interface->link_down_event))
  252. return;
  253. clear_bit(__FM10K_LINK_DOWN, &interface->state);
  254. }
  255. if (interface->flags & FM10K_FLAG_SWPRI_CONFIG) {
  256. if (rtnl_trylock()) {
  257. fm10k_configure_swpri_map(interface);
  258. rtnl_unlock();
  259. }
  260. }
  261. /* lock the mailbox for transmit and receive */
  262. fm10k_mbx_lock(interface);
  263. err = hw->mac.ops.get_host_state(hw, &interface->host_ready);
  264. if (err && time_is_before_jiffies(interface->last_reset))
  265. interface->flags |= FM10K_FLAG_RESET_REQUESTED;
  266. /* free the lock */
  267. fm10k_mbx_unlock(interface);
  268. }
  269. /**
  270. * fm10k_mbx_subtask - Process upstream and downstream mailboxes
  271. * @interface: board private structure
  272. *
  273. * This function will process both the upstream and downstream mailboxes.
  274. **/
  275. static void fm10k_mbx_subtask(struct fm10k_intfc *interface)
  276. {
  277. /* process upstream mailbox and update device state */
  278. fm10k_watchdog_update_host_state(interface);
  279. /* process downstream mailboxes */
  280. fm10k_iov_mbx(interface);
  281. }
  282. /**
  283. * fm10k_watchdog_host_is_ready - Update netdev status based on host ready
  284. * @interface: board private structure
  285. **/
  286. static void fm10k_watchdog_host_is_ready(struct fm10k_intfc *interface)
  287. {
  288. struct net_device *netdev = interface->netdev;
  289. /* only continue if link state is currently down */
  290. if (netif_carrier_ok(netdev))
  291. return;
  292. netif_info(interface, drv, netdev, "NIC Link is up\n");
  293. netif_carrier_on(netdev);
  294. netif_tx_wake_all_queues(netdev);
  295. }
  296. /**
  297. * fm10k_watchdog_host_not_ready - Update netdev status based on host not ready
  298. * @interface: board private structure
  299. **/
  300. static void fm10k_watchdog_host_not_ready(struct fm10k_intfc *interface)
  301. {
  302. struct net_device *netdev = interface->netdev;
  303. /* only continue if link state is currently up */
  304. if (!netif_carrier_ok(netdev))
  305. return;
  306. netif_info(interface, drv, netdev, "NIC Link is down\n");
  307. netif_carrier_off(netdev);
  308. netif_tx_stop_all_queues(netdev);
  309. }
  310. /**
  311. * fm10k_update_stats - Update the board statistics counters.
  312. * @interface: board private structure
  313. **/
  314. void fm10k_update_stats(struct fm10k_intfc *interface)
  315. {
  316. struct net_device_stats *net_stats = &interface->netdev->stats;
  317. struct fm10k_hw *hw = &interface->hw;
  318. u64 hw_csum_tx_good = 0, hw_csum_rx_good = 0, rx_length_errors = 0;
  319. u64 rx_switch_errors = 0, rx_drops = 0, rx_pp_errors = 0;
  320. u64 rx_link_errors = 0;
  321. u64 rx_errors = 0, rx_csum_errors = 0, tx_csum_errors = 0;
  322. u64 restart_queue = 0, tx_busy = 0, alloc_failed = 0;
  323. u64 rx_bytes_nic = 0, rx_pkts_nic = 0, rx_drops_nic = 0;
  324. u64 tx_bytes_nic = 0, tx_pkts_nic = 0;
  325. u64 bytes, pkts;
  326. int i;
  327. /* ensure only one thread updates stats at a time */
  328. if (test_and_set_bit(__FM10K_UPDATING_STATS, &interface->state))
  329. return;
  330. /* do not allow stats update via service task for next second */
  331. interface->next_stats_update = jiffies + HZ;
  332. /* gather some stats to the interface struct that are per queue */
  333. for (bytes = 0, pkts = 0, i = 0; i < interface->num_tx_queues; i++) {
  334. struct fm10k_ring *tx_ring = READ_ONCE(interface->tx_ring[i]);
  335. if (!tx_ring)
  336. continue;
  337. restart_queue += tx_ring->tx_stats.restart_queue;
  338. tx_busy += tx_ring->tx_stats.tx_busy;
  339. tx_csum_errors += tx_ring->tx_stats.csum_err;
  340. bytes += tx_ring->stats.bytes;
  341. pkts += tx_ring->stats.packets;
  342. hw_csum_tx_good += tx_ring->tx_stats.csum_good;
  343. }
  344. interface->restart_queue = restart_queue;
  345. interface->tx_busy = tx_busy;
  346. net_stats->tx_bytes = bytes;
  347. net_stats->tx_packets = pkts;
  348. interface->tx_csum_errors = tx_csum_errors;
  349. interface->hw_csum_tx_good = hw_csum_tx_good;
  350. /* gather some stats to the interface struct that are per queue */
  351. for (bytes = 0, pkts = 0, i = 0; i < interface->num_rx_queues; i++) {
  352. struct fm10k_ring *rx_ring = READ_ONCE(interface->rx_ring[i]);
  353. if (!rx_ring)
  354. continue;
  355. bytes += rx_ring->stats.bytes;
  356. pkts += rx_ring->stats.packets;
  357. alloc_failed += rx_ring->rx_stats.alloc_failed;
  358. rx_csum_errors += rx_ring->rx_stats.csum_err;
  359. rx_errors += rx_ring->rx_stats.errors;
  360. hw_csum_rx_good += rx_ring->rx_stats.csum_good;
  361. rx_switch_errors += rx_ring->rx_stats.switch_errors;
  362. rx_drops += rx_ring->rx_stats.drops;
  363. rx_pp_errors += rx_ring->rx_stats.pp_errors;
  364. rx_link_errors += rx_ring->rx_stats.link_errors;
  365. rx_length_errors += rx_ring->rx_stats.length_errors;
  366. }
  367. net_stats->rx_bytes = bytes;
  368. net_stats->rx_packets = pkts;
  369. interface->alloc_failed = alloc_failed;
  370. interface->rx_csum_errors = rx_csum_errors;
  371. interface->hw_csum_rx_good = hw_csum_rx_good;
  372. interface->rx_switch_errors = rx_switch_errors;
  373. interface->rx_drops = rx_drops;
  374. interface->rx_pp_errors = rx_pp_errors;
  375. interface->rx_link_errors = rx_link_errors;
  376. interface->rx_length_errors = rx_length_errors;
  377. hw->mac.ops.update_hw_stats(hw, &interface->stats);
  378. for (i = 0; i < hw->mac.max_queues; i++) {
  379. struct fm10k_hw_stats_q *q = &interface->stats.q[i];
  380. tx_bytes_nic += q->tx_bytes.count;
  381. tx_pkts_nic += q->tx_packets.count;
  382. rx_bytes_nic += q->rx_bytes.count;
  383. rx_pkts_nic += q->rx_packets.count;
  384. rx_drops_nic += q->rx_drops.count;
  385. }
  386. interface->tx_bytes_nic = tx_bytes_nic;
  387. interface->tx_packets_nic = tx_pkts_nic;
  388. interface->rx_bytes_nic = rx_bytes_nic;
  389. interface->rx_packets_nic = rx_pkts_nic;
  390. interface->rx_drops_nic = rx_drops_nic;
  391. /* Fill out the OS statistics structure */
  392. net_stats->rx_errors = rx_errors;
  393. net_stats->rx_dropped = interface->stats.nodesc_drop.count;
  394. clear_bit(__FM10K_UPDATING_STATS, &interface->state);
  395. }
  396. /**
  397. * fm10k_watchdog_flush_tx - flush queues on host not ready
  398. * @interface - pointer to the device interface structure
  399. **/
  400. static void fm10k_watchdog_flush_tx(struct fm10k_intfc *interface)
  401. {
  402. int some_tx_pending = 0;
  403. int i;
  404. /* nothing to do if carrier is up */
  405. if (netif_carrier_ok(interface->netdev))
  406. return;
  407. for (i = 0; i < interface->num_tx_queues; i++) {
  408. struct fm10k_ring *tx_ring = interface->tx_ring[i];
  409. if (tx_ring->next_to_use != tx_ring->next_to_clean) {
  410. some_tx_pending = 1;
  411. break;
  412. }
  413. }
  414. /* We've lost link, so the controller stops DMA, but we've got
  415. * queued Tx work that's never going to get done, so reset
  416. * controller to flush Tx.
  417. */
  418. if (some_tx_pending)
  419. interface->flags |= FM10K_FLAG_RESET_REQUESTED;
  420. }
  421. /**
  422. * fm10k_watchdog_subtask - check and bring link up
  423. * @interface - pointer to the device interface structure
  424. **/
  425. static void fm10k_watchdog_subtask(struct fm10k_intfc *interface)
  426. {
  427. /* if interface is down do nothing */
  428. if (test_bit(__FM10K_DOWN, &interface->state) ||
  429. test_bit(__FM10K_RESETTING, &interface->state))
  430. return;
  431. if (interface->host_ready)
  432. fm10k_watchdog_host_is_ready(interface);
  433. else
  434. fm10k_watchdog_host_not_ready(interface);
  435. /* update stats only once every second */
  436. if (time_is_before_jiffies(interface->next_stats_update))
  437. fm10k_update_stats(interface);
  438. /* flush any uncompleted work */
  439. fm10k_watchdog_flush_tx(interface);
  440. }
  441. /**
  442. * fm10k_check_hang_subtask - check for hung queues and dropped interrupts
  443. * @interface - pointer to the device interface structure
  444. *
  445. * This function serves two purposes. First it strobes the interrupt lines
  446. * in order to make certain interrupts are occurring. Secondly it sets the
  447. * bits needed to check for TX hangs. As a result we should immediately
  448. * determine if a hang has occurred.
  449. */
  450. static void fm10k_check_hang_subtask(struct fm10k_intfc *interface)
  451. {
  452. int i;
  453. /* If we're down or resetting, just bail */
  454. if (test_bit(__FM10K_DOWN, &interface->state) ||
  455. test_bit(__FM10K_RESETTING, &interface->state))
  456. return;
  457. /* rate limit tx hang checks to only once every 2 seconds */
  458. if (time_is_after_eq_jiffies(interface->next_tx_hang_check))
  459. return;
  460. interface->next_tx_hang_check = jiffies + (2 * HZ);
  461. if (netif_carrier_ok(interface->netdev)) {
  462. /* Force detection of hung controller */
  463. for (i = 0; i < interface->num_tx_queues; i++)
  464. set_check_for_tx_hang(interface->tx_ring[i]);
  465. /* Rearm all in-use q_vectors for immediate firing */
  466. for (i = 0; i < interface->num_q_vectors; i++) {
  467. struct fm10k_q_vector *qv = interface->q_vector[i];
  468. if (!qv->tx.count && !qv->rx.count)
  469. continue;
  470. writel(FM10K_ITR_ENABLE | FM10K_ITR_PENDING2, qv->itr);
  471. }
  472. }
  473. }
  474. /**
  475. * fm10k_service_task - manages and runs subtasks
  476. * @work: pointer to work_struct containing our data
  477. **/
  478. static void fm10k_service_task(struct work_struct *work)
  479. {
  480. struct fm10k_intfc *interface;
  481. interface = container_of(work, struct fm10k_intfc, service_task);
  482. /* tasks run even when interface is down */
  483. fm10k_mbx_subtask(interface);
  484. fm10k_detach_subtask(interface);
  485. fm10k_reset_subtask(interface);
  486. /* tasks only run when interface is up */
  487. fm10k_watchdog_subtask(interface);
  488. fm10k_check_hang_subtask(interface);
  489. /* release lock on service events to allow scheduling next event */
  490. fm10k_service_event_complete(interface);
  491. }
  492. /**
  493. * fm10k_configure_tx_ring - Configure Tx ring after Reset
  494. * @interface: board private structure
  495. * @ring: structure containing ring specific data
  496. *
  497. * Configure the Tx descriptor ring after a reset.
  498. **/
  499. static void fm10k_configure_tx_ring(struct fm10k_intfc *interface,
  500. struct fm10k_ring *ring)
  501. {
  502. struct fm10k_hw *hw = &interface->hw;
  503. u64 tdba = ring->dma;
  504. u32 size = ring->count * sizeof(struct fm10k_tx_desc);
  505. u32 txint = FM10K_INT_MAP_DISABLE;
  506. u32 txdctl = BIT(FM10K_TXDCTL_MAX_TIME_SHIFT) | FM10K_TXDCTL_ENABLE;
  507. u8 reg_idx = ring->reg_idx;
  508. /* disable queue to avoid issues while updating state */
  509. fm10k_write_reg(hw, FM10K_TXDCTL(reg_idx), 0);
  510. fm10k_write_flush(hw);
  511. /* possible poll here to verify ring resources have been cleaned */
  512. /* set location and size for descriptor ring */
  513. fm10k_write_reg(hw, FM10K_TDBAL(reg_idx), tdba & DMA_BIT_MASK(32));
  514. fm10k_write_reg(hw, FM10K_TDBAH(reg_idx), tdba >> 32);
  515. fm10k_write_reg(hw, FM10K_TDLEN(reg_idx), size);
  516. /* reset head and tail pointers */
  517. fm10k_write_reg(hw, FM10K_TDH(reg_idx), 0);
  518. fm10k_write_reg(hw, FM10K_TDT(reg_idx), 0);
  519. /* store tail pointer */
  520. ring->tail = &interface->uc_addr[FM10K_TDT(reg_idx)];
  521. /* reset ntu and ntc to place SW in sync with hardware */
  522. ring->next_to_clean = 0;
  523. ring->next_to_use = 0;
  524. /* Map interrupt */
  525. if (ring->q_vector) {
  526. txint = ring->q_vector->v_idx + NON_Q_VECTORS(hw);
  527. txint |= FM10K_INT_MAP_TIMER0;
  528. }
  529. fm10k_write_reg(hw, FM10K_TXINT(reg_idx), txint);
  530. /* enable use of FTAG bit in Tx descriptor, register is RO for VF */
  531. fm10k_write_reg(hw, FM10K_PFVTCTL(reg_idx),
  532. FM10K_PFVTCTL_FTAG_DESC_ENABLE);
  533. /* Initialize XPS */
  534. if (!test_and_set_bit(__FM10K_TX_XPS_INIT_DONE, &ring->state) &&
  535. ring->q_vector)
  536. netif_set_xps_queue(ring->netdev,
  537. &ring->q_vector->affinity_mask,
  538. ring->queue_index);
  539. /* enable queue */
  540. fm10k_write_reg(hw, FM10K_TXDCTL(reg_idx), txdctl);
  541. }
  542. /**
  543. * fm10k_enable_tx_ring - Verify Tx ring is enabled after configuration
  544. * @interface: board private structure
  545. * @ring: structure containing ring specific data
  546. *
  547. * Verify the Tx descriptor ring is ready for transmit.
  548. **/
  549. static void fm10k_enable_tx_ring(struct fm10k_intfc *interface,
  550. struct fm10k_ring *ring)
  551. {
  552. struct fm10k_hw *hw = &interface->hw;
  553. int wait_loop = 10;
  554. u32 txdctl;
  555. u8 reg_idx = ring->reg_idx;
  556. /* if we are already enabled just exit */
  557. if (fm10k_read_reg(hw, FM10K_TXDCTL(reg_idx)) & FM10K_TXDCTL_ENABLE)
  558. return;
  559. /* poll to verify queue is enabled */
  560. do {
  561. usleep_range(1000, 2000);
  562. txdctl = fm10k_read_reg(hw, FM10K_TXDCTL(reg_idx));
  563. } while (!(txdctl & FM10K_TXDCTL_ENABLE) && --wait_loop);
  564. if (!wait_loop)
  565. netif_err(interface, drv, interface->netdev,
  566. "Could not enable Tx Queue %d\n", reg_idx);
  567. }
  568. /**
  569. * fm10k_configure_tx - Configure Transmit Unit after Reset
  570. * @interface: board private structure
  571. *
  572. * Configure the Tx unit of the MAC after a reset.
  573. **/
  574. static void fm10k_configure_tx(struct fm10k_intfc *interface)
  575. {
  576. int i;
  577. /* Setup the HW Tx Head and Tail descriptor pointers */
  578. for (i = 0; i < interface->num_tx_queues; i++)
  579. fm10k_configure_tx_ring(interface, interface->tx_ring[i]);
  580. /* poll here to verify that Tx rings are now enabled */
  581. for (i = 0; i < interface->num_tx_queues; i++)
  582. fm10k_enable_tx_ring(interface, interface->tx_ring[i]);
  583. }
  584. /**
  585. * fm10k_configure_rx_ring - Configure Rx ring after Reset
  586. * @interface: board private structure
  587. * @ring: structure containing ring specific data
  588. *
  589. * Configure the Rx descriptor ring after a reset.
  590. **/
  591. static void fm10k_configure_rx_ring(struct fm10k_intfc *interface,
  592. struct fm10k_ring *ring)
  593. {
  594. u64 rdba = ring->dma;
  595. struct fm10k_hw *hw = &interface->hw;
  596. u32 size = ring->count * sizeof(union fm10k_rx_desc);
  597. u32 rxqctl = FM10K_RXQCTL_ENABLE | FM10K_RXQCTL_PF;
  598. u32 rxdctl = FM10K_RXDCTL_WRITE_BACK_MIN_DELAY;
  599. u32 srrctl = FM10K_SRRCTL_BUFFER_CHAINING_EN;
  600. u32 rxint = FM10K_INT_MAP_DISABLE;
  601. u8 rx_pause = interface->rx_pause;
  602. u8 reg_idx = ring->reg_idx;
  603. /* disable queue to avoid issues while updating state */
  604. fm10k_write_reg(hw, FM10K_RXQCTL(reg_idx), 0);
  605. fm10k_write_flush(hw);
  606. /* possible poll here to verify ring resources have been cleaned */
  607. /* set location and size for descriptor ring */
  608. fm10k_write_reg(hw, FM10K_RDBAL(reg_idx), rdba & DMA_BIT_MASK(32));
  609. fm10k_write_reg(hw, FM10K_RDBAH(reg_idx), rdba >> 32);
  610. fm10k_write_reg(hw, FM10K_RDLEN(reg_idx), size);
  611. /* reset head and tail pointers */
  612. fm10k_write_reg(hw, FM10K_RDH(reg_idx), 0);
  613. fm10k_write_reg(hw, FM10K_RDT(reg_idx), 0);
  614. /* store tail pointer */
  615. ring->tail = &interface->uc_addr[FM10K_RDT(reg_idx)];
  616. /* reset ntu and ntc to place SW in sync with hardware */
  617. ring->next_to_clean = 0;
  618. ring->next_to_use = 0;
  619. ring->next_to_alloc = 0;
  620. /* Configure the Rx buffer size for one buff without split */
  621. srrctl |= FM10K_RX_BUFSZ >> FM10K_SRRCTL_BSIZEPKT_SHIFT;
  622. /* Configure the Rx ring to suppress loopback packets */
  623. srrctl |= FM10K_SRRCTL_LOOPBACK_SUPPRESS;
  624. fm10k_write_reg(hw, FM10K_SRRCTL(reg_idx), srrctl);
  625. /* Enable drop on empty */
  626. #ifdef CONFIG_DCB
  627. if (interface->pfc_en)
  628. rx_pause = interface->pfc_en;
  629. #endif
  630. if (!(rx_pause & BIT(ring->qos_pc)))
  631. rxdctl |= FM10K_RXDCTL_DROP_ON_EMPTY;
  632. fm10k_write_reg(hw, FM10K_RXDCTL(reg_idx), rxdctl);
  633. /* assign default VLAN to queue */
  634. ring->vid = hw->mac.default_vid;
  635. /* if we have an active VLAN, disable default VLAN ID */
  636. if (test_bit(hw->mac.default_vid, interface->active_vlans))
  637. ring->vid |= FM10K_VLAN_CLEAR;
  638. /* Map interrupt */
  639. if (ring->q_vector) {
  640. rxint = ring->q_vector->v_idx + NON_Q_VECTORS(hw);
  641. rxint |= FM10K_INT_MAP_TIMER1;
  642. }
  643. fm10k_write_reg(hw, FM10K_RXINT(reg_idx), rxint);
  644. /* enable queue */
  645. fm10k_write_reg(hw, FM10K_RXQCTL(reg_idx), rxqctl);
  646. /* place buffers on ring for receive data */
  647. fm10k_alloc_rx_buffers(ring, fm10k_desc_unused(ring));
  648. }
  649. /**
  650. * fm10k_update_rx_drop_en - Configures the drop enable bits for Rx rings
  651. * @interface: board private structure
  652. *
  653. * Configure the drop enable bits for the Rx rings.
  654. **/
  655. void fm10k_update_rx_drop_en(struct fm10k_intfc *interface)
  656. {
  657. struct fm10k_hw *hw = &interface->hw;
  658. u8 rx_pause = interface->rx_pause;
  659. int i;
  660. #ifdef CONFIG_DCB
  661. if (interface->pfc_en)
  662. rx_pause = interface->pfc_en;
  663. #endif
  664. for (i = 0; i < interface->num_rx_queues; i++) {
  665. struct fm10k_ring *ring = interface->rx_ring[i];
  666. u32 rxdctl = FM10K_RXDCTL_WRITE_BACK_MIN_DELAY;
  667. u8 reg_idx = ring->reg_idx;
  668. if (!(rx_pause & BIT(ring->qos_pc)))
  669. rxdctl |= FM10K_RXDCTL_DROP_ON_EMPTY;
  670. fm10k_write_reg(hw, FM10K_RXDCTL(reg_idx), rxdctl);
  671. }
  672. }
  673. /**
  674. * fm10k_configure_dglort - Configure Receive DGLORT after reset
  675. * @interface: board private structure
  676. *
  677. * Configure the DGLORT description and RSS tables.
  678. **/
  679. static void fm10k_configure_dglort(struct fm10k_intfc *interface)
  680. {
  681. struct fm10k_dglort_cfg dglort = { 0 };
  682. struct fm10k_hw *hw = &interface->hw;
  683. int i;
  684. u32 mrqc;
  685. /* Fill out hash function seeds */
  686. for (i = 0; i < FM10K_RSSRK_SIZE; i++)
  687. fm10k_write_reg(hw, FM10K_RSSRK(0, i), interface->rssrk[i]);
  688. /* Write RETA table to hardware */
  689. for (i = 0; i < FM10K_RETA_SIZE; i++)
  690. fm10k_write_reg(hw, FM10K_RETA(0, i), interface->reta[i]);
  691. /* Generate RSS hash based on packet types, TCP/UDP
  692. * port numbers and/or IPv4/v6 src and dst addresses
  693. */
  694. mrqc = FM10K_MRQC_IPV4 |
  695. FM10K_MRQC_TCP_IPV4 |
  696. FM10K_MRQC_IPV6 |
  697. FM10K_MRQC_TCP_IPV6;
  698. if (interface->flags & FM10K_FLAG_RSS_FIELD_IPV4_UDP)
  699. mrqc |= FM10K_MRQC_UDP_IPV4;
  700. if (interface->flags & FM10K_FLAG_RSS_FIELD_IPV6_UDP)
  701. mrqc |= FM10K_MRQC_UDP_IPV6;
  702. fm10k_write_reg(hw, FM10K_MRQC(0), mrqc);
  703. /* configure default DGLORT mapping for RSS/DCB */
  704. dglort.inner_rss = 1;
  705. dglort.rss_l = fls(interface->ring_feature[RING_F_RSS].mask);
  706. dglort.pc_l = fls(interface->ring_feature[RING_F_QOS].mask);
  707. hw->mac.ops.configure_dglort_map(hw, &dglort);
  708. /* assign GLORT per queue for queue mapped testing */
  709. if (interface->glort_count > 64) {
  710. memset(&dglort, 0, sizeof(dglort));
  711. dglort.inner_rss = 1;
  712. dglort.glort = interface->glort + 64;
  713. dglort.idx = fm10k_dglort_pf_queue;
  714. dglort.queue_l = fls(interface->num_rx_queues - 1);
  715. hw->mac.ops.configure_dglort_map(hw, &dglort);
  716. }
  717. /* assign glort value for RSS/DCB specific to this interface */
  718. memset(&dglort, 0, sizeof(dglort));
  719. dglort.inner_rss = 1;
  720. dglort.glort = interface->glort;
  721. dglort.rss_l = fls(interface->ring_feature[RING_F_RSS].mask);
  722. dglort.pc_l = fls(interface->ring_feature[RING_F_QOS].mask);
  723. /* configure DGLORT mapping for RSS/DCB */
  724. dglort.idx = fm10k_dglort_pf_rss;
  725. if (interface->l2_accel)
  726. dglort.shared_l = fls(interface->l2_accel->size);
  727. hw->mac.ops.configure_dglort_map(hw, &dglort);
  728. }
  729. /**
  730. * fm10k_configure_rx - Configure Receive Unit after Reset
  731. * @interface: board private structure
  732. *
  733. * Configure the Rx unit of the MAC after a reset.
  734. **/
  735. static void fm10k_configure_rx(struct fm10k_intfc *interface)
  736. {
  737. int i;
  738. /* Configure SWPRI to PC map */
  739. fm10k_configure_swpri_map(interface);
  740. /* Configure RSS and DGLORT map */
  741. fm10k_configure_dglort(interface);
  742. /* Setup the HW Rx Head and Tail descriptor pointers */
  743. for (i = 0; i < interface->num_rx_queues; i++)
  744. fm10k_configure_rx_ring(interface, interface->rx_ring[i]);
  745. /* possible poll here to verify that Rx rings are now enabled */
  746. }
  747. static void fm10k_napi_enable_all(struct fm10k_intfc *interface)
  748. {
  749. struct fm10k_q_vector *q_vector;
  750. int q_idx;
  751. for (q_idx = 0; q_idx < interface->num_q_vectors; q_idx++) {
  752. q_vector = interface->q_vector[q_idx];
  753. napi_enable(&q_vector->napi);
  754. }
  755. }
  756. static irqreturn_t fm10k_msix_clean_rings(int __always_unused irq, void *data)
  757. {
  758. struct fm10k_q_vector *q_vector = data;
  759. if (q_vector->rx.count || q_vector->tx.count)
  760. napi_schedule_irqoff(&q_vector->napi);
  761. return IRQ_HANDLED;
  762. }
  763. static irqreturn_t fm10k_msix_mbx_vf(int __always_unused irq, void *data)
  764. {
  765. struct fm10k_intfc *interface = data;
  766. struct fm10k_hw *hw = &interface->hw;
  767. struct fm10k_mbx_info *mbx = &hw->mbx;
  768. /* re-enable mailbox interrupt and indicate 20us delay */
  769. fm10k_write_reg(hw, FM10K_VFITR(FM10K_MBX_VECTOR),
  770. (FM10K_MBX_INT_DELAY >> hw->mac.itr_scale) |
  771. FM10K_ITR_ENABLE);
  772. /* service upstream mailbox */
  773. if (fm10k_mbx_trylock(interface)) {
  774. mbx->ops.process(hw, mbx);
  775. fm10k_mbx_unlock(interface);
  776. }
  777. hw->mac.get_host_state = true;
  778. fm10k_service_event_schedule(interface);
  779. return IRQ_HANDLED;
  780. }
  781. #ifdef CONFIG_NET_POLL_CONTROLLER
  782. /**
  783. * fm10k_netpoll - A Polling 'interrupt' handler
  784. * @netdev: network interface device structure
  785. *
  786. * This is used by netconsole to send skbs without having to re-enable
  787. * interrupts. It's not called while the normal interrupt routine is executing.
  788. **/
  789. void fm10k_netpoll(struct net_device *netdev)
  790. {
  791. struct fm10k_intfc *interface = netdev_priv(netdev);
  792. int i;
  793. /* if interface is down do nothing */
  794. if (test_bit(__FM10K_DOWN, &interface->state))
  795. return;
  796. for (i = 0; i < interface->num_q_vectors; i++)
  797. fm10k_msix_clean_rings(0, interface->q_vector[i]);
  798. }
  799. #endif
  800. #define FM10K_ERR_MSG(type) case (type): error = #type; break
  801. static void fm10k_handle_fault(struct fm10k_intfc *interface, int type,
  802. struct fm10k_fault *fault)
  803. {
  804. struct pci_dev *pdev = interface->pdev;
  805. struct fm10k_hw *hw = &interface->hw;
  806. struct fm10k_iov_data *iov_data = interface->iov_data;
  807. char *error;
  808. switch (type) {
  809. case FM10K_PCA_FAULT:
  810. switch (fault->type) {
  811. default:
  812. error = "Unknown PCA error";
  813. break;
  814. FM10K_ERR_MSG(PCA_NO_FAULT);
  815. FM10K_ERR_MSG(PCA_UNMAPPED_ADDR);
  816. FM10K_ERR_MSG(PCA_BAD_QACCESS_PF);
  817. FM10K_ERR_MSG(PCA_BAD_QACCESS_VF);
  818. FM10K_ERR_MSG(PCA_MALICIOUS_REQ);
  819. FM10K_ERR_MSG(PCA_POISONED_TLP);
  820. FM10K_ERR_MSG(PCA_TLP_ABORT);
  821. }
  822. break;
  823. case FM10K_THI_FAULT:
  824. switch (fault->type) {
  825. default:
  826. error = "Unknown THI error";
  827. break;
  828. FM10K_ERR_MSG(THI_NO_FAULT);
  829. FM10K_ERR_MSG(THI_MAL_DIS_Q_FAULT);
  830. }
  831. break;
  832. case FM10K_FUM_FAULT:
  833. switch (fault->type) {
  834. default:
  835. error = "Unknown FUM error";
  836. break;
  837. FM10K_ERR_MSG(FUM_NO_FAULT);
  838. FM10K_ERR_MSG(FUM_UNMAPPED_ADDR);
  839. FM10K_ERR_MSG(FUM_BAD_VF_QACCESS);
  840. FM10K_ERR_MSG(FUM_ADD_DECODE_ERR);
  841. FM10K_ERR_MSG(FUM_RO_ERROR);
  842. FM10K_ERR_MSG(FUM_QPRC_CRC_ERROR);
  843. FM10K_ERR_MSG(FUM_CSR_TIMEOUT);
  844. FM10K_ERR_MSG(FUM_INVALID_TYPE);
  845. FM10K_ERR_MSG(FUM_INVALID_LENGTH);
  846. FM10K_ERR_MSG(FUM_INVALID_BE);
  847. FM10K_ERR_MSG(FUM_INVALID_ALIGN);
  848. }
  849. break;
  850. default:
  851. error = "Undocumented fault";
  852. break;
  853. }
  854. dev_warn(&pdev->dev,
  855. "%s Address: 0x%llx SpecInfo: 0x%x Func: %02x.%0x\n",
  856. error, fault->address, fault->specinfo,
  857. PCI_SLOT(fault->func), PCI_FUNC(fault->func));
  858. /* For VF faults, clear out the respective LPORT, reset the queue
  859. * resources, and then reconnect to the mailbox. This allows the
  860. * VF in question to resume behavior. For transient faults that are
  861. * the result of non-malicious behavior this will log the fault and
  862. * allow the VF to resume functionality. Obviously for malicious VFs
  863. * they will be able to attempt malicious behavior again. In this
  864. * case, the system administrator will need to step in and manually
  865. * remove or disable the VF in question.
  866. */
  867. if (fault->func && iov_data) {
  868. int vf = fault->func - 1;
  869. struct fm10k_vf_info *vf_info = &iov_data->vf_info[vf];
  870. hw->iov.ops.reset_lport(hw, vf_info);
  871. hw->iov.ops.reset_resources(hw, vf_info);
  872. /* reset_lport disables the VF, so re-enable it */
  873. hw->iov.ops.set_lport(hw, vf_info, vf,
  874. FM10K_VF_FLAG_MULTI_CAPABLE);
  875. /* reset_resources will disconnect from the mbx */
  876. vf_info->mbx.ops.connect(hw, &vf_info->mbx);
  877. }
  878. }
  879. static void fm10k_report_fault(struct fm10k_intfc *interface, u32 eicr)
  880. {
  881. struct fm10k_hw *hw = &interface->hw;
  882. struct fm10k_fault fault = { 0 };
  883. int type, err;
  884. for (eicr &= FM10K_EICR_FAULT_MASK, type = FM10K_PCA_FAULT;
  885. eicr;
  886. eicr >>= 1, type += FM10K_FAULT_SIZE) {
  887. /* only check if there is an error reported */
  888. if (!(eicr & 0x1))
  889. continue;
  890. /* retrieve fault info */
  891. err = hw->mac.ops.get_fault(hw, type, &fault);
  892. if (err) {
  893. dev_err(&interface->pdev->dev,
  894. "error reading fault\n");
  895. continue;
  896. }
  897. fm10k_handle_fault(interface, type, &fault);
  898. }
  899. }
  900. static void fm10k_reset_drop_on_empty(struct fm10k_intfc *interface, u32 eicr)
  901. {
  902. struct fm10k_hw *hw = &interface->hw;
  903. const u32 rxdctl = FM10K_RXDCTL_WRITE_BACK_MIN_DELAY;
  904. u32 maxholdq;
  905. int q;
  906. if (!(eicr & FM10K_EICR_MAXHOLDTIME))
  907. return;
  908. maxholdq = fm10k_read_reg(hw, FM10K_MAXHOLDQ(7));
  909. if (maxholdq)
  910. fm10k_write_reg(hw, FM10K_MAXHOLDQ(7), maxholdq);
  911. for (q = 255;;) {
  912. if (maxholdq & BIT(31)) {
  913. if (q < FM10K_MAX_QUEUES_PF) {
  914. interface->rx_overrun_pf++;
  915. fm10k_write_reg(hw, FM10K_RXDCTL(q), rxdctl);
  916. } else {
  917. interface->rx_overrun_vf++;
  918. }
  919. }
  920. maxholdq *= 2;
  921. if (!maxholdq)
  922. q &= ~(32 - 1);
  923. if (!q)
  924. break;
  925. if (q-- % 32)
  926. continue;
  927. maxholdq = fm10k_read_reg(hw, FM10K_MAXHOLDQ(q / 32));
  928. if (maxholdq)
  929. fm10k_write_reg(hw, FM10K_MAXHOLDQ(q / 32), maxholdq);
  930. }
  931. }
  932. static irqreturn_t fm10k_msix_mbx_pf(int __always_unused irq, void *data)
  933. {
  934. struct fm10k_intfc *interface = data;
  935. struct fm10k_hw *hw = &interface->hw;
  936. struct fm10k_mbx_info *mbx = &hw->mbx;
  937. u32 eicr;
  938. /* unmask any set bits related to this interrupt */
  939. eicr = fm10k_read_reg(hw, FM10K_EICR);
  940. fm10k_write_reg(hw, FM10K_EICR, eicr & (FM10K_EICR_MAILBOX |
  941. FM10K_EICR_SWITCHREADY |
  942. FM10K_EICR_SWITCHNOTREADY));
  943. /* report any faults found to the message log */
  944. fm10k_report_fault(interface, eicr);
  945. /* reset any queues disabled due to receiver overrun */
  946. fm10k_reset_drop_on_empty(interface, eicr);
  947. /* service mailboxes */
  948. if (fm10k_mbx_trylock(interface)) {
  949. mbx->ops.process(hw, mbx);
  950. /* handle VFLRE events */
  951. fm10k_iov_event(interface);
  952. fm10k_mbx_unlock(interface);
  953. }
  954. /* if switch toggled state we should reset GLORTs */
  955. if (eicr & FM10K_EICR_SWITCHNOTREADY) {
  956. /* force link down for at least 4 seconds */
  957. interface->link_down_event = jiffies + (4 * HZ);
  958. set_bit(__FM10K_LINK_DOWN, &interface->state);
  959. /* reset dglort_map back to no config */
  960. hw->mac.dglort_map = FM10K_DGLORTMAP_NONE;
  961. }
  962. /* we should validate host state after interrupt event */
  963. hw->mac.get_host_state = true;
  964. /* validate host state, and handle VF mailboxes in the service task */
  965. fm10k_service_event_schedule(interface);
  966. /* re-enable mailbox interrupt and indicate 20us delay */
  967. fm10k_write_reg(hw, FM10K_ITR(FM10K_MBX_VECTOR),
  968. (FM10K_MBX_INT_DELAY >> hw->mac.itr_scale) |
  969. FM10K_ITR_ENABLE);
  970. return IRQ_HANDLED;
  971. }
  972. void fm10k_mbx_free_irq(struct fm10k_intfc *interface)
  973. {
  974. struct fm10k_hw *hw = &interface->hw;
  975. struct msix_entry *entry;
  976. int itr_reg;
  977. /* no mailbox IRQ to free if MSI-X is not enabled */
  978. if (!interface->msix_entries)
  979. return;
  980. entry = &interface->msix_entries[FM10K_MBX_VECTOR];
  981. /* disconnect the mailbox */
  982. hw->mbx.ops.disconnect(hw, &hw->mbx);
  983. /* disable Mailbox cause */
  984. if (hw->mac.type == fm10k_mac_pf) {
  985. fm10k_write_reg(hw, FM10K_EIMR,
  986. FM10K_EIMR_DISABLE(PCA_FAULT) |
  987. FM10K_EIMR_DISABLE(FUM_FAULT) |
  988. FM10K_EIMR_DISABLE(MAILBOX) |
  989. FM10K_EIMR_DISABLE(SWITCHREADY) |
  990. FM10K_EIMR_DISABLE(SWITCHNOTREADY) |
  991. FM10K_EIMR_DISABLE(SRAMERROR) |
  992. FM10K_EIMR_DISABLE(VFLR) |
  993. FM10K_EIMR_DISABLE(MAXHOLDTIME));
  994. itr_reg = FM10K_ITR(FM10K_MBX_VECTOR);
  995. } else {
  996. itr_reg = FM10K_VFITR(FM10K_MBX_VECTOR);
  997. }
  998. fm10k_write_reg(hw, itr_reg, FM10K_ITR_MASK_SET);
  999. free_irq(entry->vector, interface);
  1000. }
  1001. static s32 fm10k_mbx_mac_addr(struct fm10k_hw *hw, u32 **results,
  1002. struct fm10k_mbx_info *mbx)
  1003. {
  1004. bool vlan_override = hw->mac.vlan_override;
  1005. u16 default_vid = hw->mac.default_vid;
  1006. struct fm10k_intfc *interface;
  1007. s32 err;
  1008. err = fm10k_msg_mac_vlan_vf(hw, results, mbx);
  1009. if (err)
  1010. return err;
  1011. interface = container_of(hw, struct fm10k_intfc, hw);
  1012. /* MAC was changed so we need reset */
  1013. if (is_valid_ether_addr(hw->mac.perm_addr) &&
  1014. !ether_addr_equal(hw->mac.perm_addr, hw->mac.addr))
  1015. interface->flags |= FM10K_FLAG_RESET_REQUESTED;
  1016. /* VLAN override was changed, or default VLAN changed */
  1017. if ((vlan_override != hw->mac.vlan_override) ||
  1018. (default_vid != hw->mac.default_vid))
  1019. interface->flags |= FM10K_FLAG_RESET_REQUESTED;
  1020. return 0;
  1021. }
  1022. /* generic error handler for mailbox issues */
  1023. static s32 fm10k_mbx_error(struct fm10k_hw *hw, u32 **results,
  1024. struct fm10k_mbx_info __always_unused *mbx)
  1025. {
  1026. struct fm10k_intfc *interface;
  1027. struct pci_dev *pdev;
  1028. interface = container_of(hw, struct fm10k_intfc, hw);
  1029. pdev = interface->pdev;
  1030. dev_err(&pdev->dev, "Unknown message ID %u\n",
  1031. **results & FM10K_TLV_ID_MASK);
  1032. return 0;
  1033. }
  1034. static const struct fm10k_msg_data vf_mbx_data[] = {
  1035. FM10K_TLV_MSG_TEST_HANDLER(fm10k_tlv_msg_test),
  1036. FM10K_VF_MSG_MAC_VLAN_HANDLER(fm10k_mbx_mac_addr),
  1037. FM10K_VF_MSG_LPORT_STATE_HANDLER(fm10k_msg_lport_state_vf),
  1038. FM10K_TLV_MSG_ERROR_HANDLER(fm10k_mbx_error),
  1039. };
  1040. static int fm10k_mbx_request_irq_vf(struct fm10k_intfc *interface)
  1041. {
  1042. struct msix_entry *entry = &interface->msix_entries[FM10K_MBX_VECTOR];
  1043. struct net_device *dev = interface->netdev;
  1044. struct fm10k_hw *hw = &interface->hw;
  1045. int err;
  1046. /* Use timer0 for interrupt moderation on the mailbox */
  1047. u32 itr = entry->entry | FM10K_INT_MAP_TIMER0;
  1048. /* register mailbox handlers */
  1049. err = hw->mbx.ops.register_handlers(&hw->mbx, vf_mbx_data);
  1050. if (err)
  1051. return err;
  1052. /* request the IRQ */
  1053. err = request_irq(entry->vector, fm10k_msix_mbx_vf, 0,
  1054. dev->name, interface);
  1055. if (err) {
  1056. netif_err(interface, probe, dev,
  1057. "request_irq for msix_mbx failed: %d\n", err);
  1058. return err;
  1059. }
  1060. /* map all of the interrupt sources */
  1061. fm10k_write_reg(hw, FM10K_VFINT_MAP, itr);
  1062. /* enable interrupt */
  1063. fm10k_write_reg(hw, FM10K_VFITR(entry->entry), FM10K_ITR_ENABLE);
  1064. return 0;
  1065. }
  1066. static s32 fm10k_lport_map(struct fm10k_hw *hw, u32 **results,
  1067. struct fm10k_mbx_info *mbx)
  1068. {
  1069. struct fm10k_intfc *interface;
  1070. u32 dglort_map = hw->mac.dglort_map;
  1071. s32 err;
  1072. interface = container_of(hw, struct fm10k_intfc, hw);
  1073. err = fm10k_msg_err_pf(hw, results, mbx);
  1074. if (!err && hw->swapi.status) {
  1075. /* force link down for a reasonable delay */
  1076. interface->link_down_event = jiffies + (2 * HZ);
  1077. set_bit(__FM10K_LINK_DOWN, &interface->state);
  1078. /* reset dglort_map back to no config */
  1079. hw->mac.dglort_map = FM10K_DGLORTMAP_NONE;
  1080. fm10k_service_event_schedule(interface);
  1081. /* prevent overloading kernel message buffer */
  1082. if (interface->lport_map_failed)
  1083. return 0;
  1084. interface->lport_map_failed = true;
  1085. if (hw->swapi.status == FM10K_MSG_ERR_PEP_NOT_SCHEDULED)
  1086. dev_warn(&interface->pdev->dev,
  1087. "cannot obtain link because the host interface is configured for a PCIe host interface bandwidth of zero\n");
  1088. dev_warn(&interface->pdev->dev,
  1089. "request logical port map failed: %d\n",
  1090. hw->swapi.status);
  1091. return 0;
  1092. }
  1093. err = fm10k_msg_lport_map_pf(hw, results, mbx);
  1094. if (err)
  1095. return err;
  1096. interface->lport_map_failed = false;
  1097. /* we need to reset if port count was just updated */
  1098. if (dglort_map != hw->mac.dglort_map)
  1099. interface->flags |= FM10K_FLAG_RESET_REQUESTED;
  1100. return 0;
  1101. }
  1102. static s32 fm10k_update_pvid(struct fm10k_hw *hw, u32 **results,
  1103. struct fm10k_mbx_info __always_unused *mbx)
  1104. {
  1105. struct fm10k_intfc *interface;
  1106. u16 glort, pvid;
  1107. u32 pvid_update;
  1108. s32 err;
  1109. err = fm10k_tlv_attr_get_u32(results[FM10K_PF_ATTR_ID_UPDATE_PVID],
  1110. &pvid_update);
  1111. if (err)
  1112. return err;
  1113. /* extract values from the pvid update */
  1114. glort = FM10K_MSG_HDR_FIELD_GET(pvid_update, UPDATE_PVID_GLORT);
  1115. pvid = FM10K_MSG_HDR_FIELD_GET(pvid_update, UPDATE_PVID_PVID);
  1116. /* if glort is not valid return error */
  1117. if (!fm10k_glort_valid_pf(hw, glort))
  1118. return FM10K_ERR_PARAM;
  1119. /* verify VLAN ID is valid */
  1120. if (pvid >= FM10K_VLAN_TABLE_VID_MAX)
  1121. return FM10K_ERR_PARAM;
  1122. interface = container_of(hw, struct fm10k_intfc, hw);
  1123. /* check to see if this belongs to one of the VFs */
  1124. err = fm10k_iov_update_pvid(interface, glort, pvid);
  1125. if (!err)
  1126. return 0;
  1127. /* we need to reset if default VLAN was just updated */
  1128. if (pvid != hw->mac.default_vid)
  1129. interface->flags |= FM10K_FLAG_RESET_REQUESTED;
  1130. hw->mac.default_vid = pvid;
  1131. return 0;
  1132. }
  1133. static const struct fm10k_msg_data pf_mbx_data[] = {
  1134. FM10K_PF_MSG_ERR_HANDLER(XCAST_MODES, fm10k_msg_err_pf),
  1135. FM10K_PF_MSG_ERR_HANDLER(UPDATE_MAC_FWD_RULE, fm10k_msg_err_pf),
  1136. FM10K_PF_MSG_LPORT_MAP_HANDLER(fm10k_lport_map),
  1137. FM10K_PF_MSG_ERR_HANDLER(LPORT_CREATE, fm10k_msg_err_pf),
  1138. FM10K_PF_MSG_ERR_HANDLER(LPORT_DELETE, fm10k_msg_err_pf),
  1139. FM10K_PF_MSG_UPDATE_PVID_HANDLER(fm10k_update_pvid),
  1140. FM10K_TLV_MSG_ERROR_HANDLER(fm10k_mbx_error),
  1141. };
  1142. static int fm10k_mbx_request_irq_pf(struct fm10k_intfc *interface)
  1143. {
  1144. struct msix_entry *entry = &interface->msix_entries[FM10K_MBX_VECTOR];
  1145. struct net_device *dev = interface->netdev;
  1146. struct fm10k_hw *hw = &interface->hw;
  1147. int err;
  1148. /* Use timer0 for interrupt moderation on the mailbox */
  1149. u32 mbx_itr = entry->entry | FM10K_INT_MAP_TIMER0;
  1150. u32 other_itr = entry->entry | FM10K_INT_MAP_IMMEDIATE;
  1151. /* register mailbox handlers */
  1152. err = hw->mbx.ops.register_handlers(&hw->mbx, pf_mbx_data);
  1153. if (err)
  1154. return err;
  1155. /* request the IRQ */
  1156. err = request_irq(entry->vector, fm10k_msix_mbx_pf, 0,
  1157. dev->name, interface);
  1158. if (err) {
  1159. netif_err(interface, probe, dev,
  1160. "request_irq for msix_mbx failed: %d\n", err);
  1161. return err;
  1162. }
  1163. /* Enable interrupts w/ no moderation for "other" interrupts */
  1164. fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_pcie_fault), other_itr);
  1165. fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_switch_up_down), other_itr);
  1166. fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_sram), other_itr);
  1167. fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_max_hold_time), other_itr);
  1168. fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_vflr), other_itr);
  1169. /* Enable interrupts w/ moderation for mailbox */
  1170. fm10k_write_reg(hw, FM10K_INT_MAP(fm10k_int_mailbox), mbx_itr);
  1171. /* Enable individual interrupt causes */
  1172. fm10k_write_reg(hw, FM10K_EIMR, FM10K_EIMR_ENABLE(PCA_FAULT) |
  1173. FM10K_EIMR_ENABLE(FUM_FAULT) |
  1174. FM10K_EIMR_ENABLE(MAILBOX) |
  1175. FM10K_EIMR_ENABLE(SWITCHREADY) |
  1176. FM10K_EIMR_ENABLE(SWITCHNOTREADY) |
  1177. FM10K_EIMR_ENABLE(SRAMERROR) |
  1178. FM10K_EIMR_ENABLE(VFLR) |
  1179. FM10K_EIMR_ENABLE(MAXHOLDTIME));
  1180. /* enable interrupt */
  1181. fm10k_write_reg(hw, FM10K_ITR(entry->entry), FM10K_ITR_ENABLE);
  1182. return 0;
  1183. }
  1184. int fm10k_mbx_request_irq(struct fm10k_intfc *interface)
  1185. {
  1186. struct fm10k_hw *hw = &interface->hw;
  1187. int err;
  1188. /* enable Mailbox cause */
  1189. if (hw->mac.type == fm10k_mac_pf)
  1190. err = fm10k_mbx_request_irq_pf(interface);
  1191. else
  1192. err = fm10k_mbx_request_irq_vf(interface);
  1193. if (err)
  1194. return err;
  1195. /* connect mailbox */
  1196. err = hw->mbx.ops.connect(hw, &hw->mbx);
  1197. /* if the mailbox failed to connect, then free IRQ */
  1198. if (err)
  1199. fm10k_mbx_free_irq(interface);
  1200. return err;
  1201. }
  1202. /**
  1203. * fm10k_qv_free_irq - release interrupts associated with queue vectors
  1204. * @interface: board private structure
  1205. *
  1206. * Release all interrupts associated with this interface
  1207. **/
  1208. void fm10k_qv_free_irq(struct fm10k_intfc *interface)
  1209. {
  1210. int vector = interface->num_q_vectors;
  1211. struct fm10k_hw *hw = &interface->hw;
  1212. struct msix_entry *entry;
  1213. entry = &interface->msix_entries[NON_Q_VECTORS(hw) + vector];
  1214. while (vector) {
  1215. struct fm10k_q_vector *q_vector;
  1216. vector--;
  1217. entry--;
  1218. q_vector = interface->q_vector[vector];
  1219. if (!q_vector->tx.count && !q_vector->rx.count)
  1220. continue;
  1221. /* clear the affinity_mask in the IRQ descriptor */
  1222. irq_set_affinity_hint(entry->vector, NULL);
  1223. /* disable interrupts */
  1224. writel(FM10K_ITR_MASK_SET, q_vector->itr);
  1225. free_irq(entry->vector, q_vector);
  1226. }
  1227. }
  1228. /**
  1229. * fm10k_qv_request_irq - initialize interrupts for queue vectors
  1230. * @interface: board private structure
  1231. *
  1232. * Attempts to configure interrupts using the best available
  1233. * capabilities of the hardware and kernel.
  1234. **/
  1235. int fm10k_qv_request_irq(struct fm10k_intfc *interface)
  1236. {
  1237. struct net_device *dev = interface->netdev;
  1238. struct fm10k_hw *hw = &interface->hw;
  1239. struct msix_entry *entry;
  1240. int ri = 0, ti = 0;
  1241. int vector, err;
  1242. entry = &interface->msix_entries[NON_Q_VECTORS(hw)];
  1243. for (vector = 0; vector < interface->num_q_vectors; vector++) {
  1244. struct fm10k_q_vector *q_vector = interface->q_vector[vector];
  1245. /* name the vector */
  1246. if (q_vector->tx.count && q_vector->rx.count) {
  1247. snprintf(q_vector->name, sizeof(q_vector->name) - 1,
  1248. "%s-TxRx-%d", dev->name, ri++);
  1249. ti++;
  1250. } else if (q_vector->rx.count) {
  1251. snprintf(q_vector->name, sizeof(q_vector->name) - 1,
  1252. "%s-rx-%d", dev->name, ri++);
  1253. } else if (q_vector->tx.count) {
  1254. snprintf(q_vector->name, sizeof(q_vector->name) - 1,
  1255. "%s-tx-%d", dev->name, ti++);
  1256. } else {
  1257. /* skip this unused q_vector */
  1258. continue;
  1259. }
  1260. /* Assign ITR register to q_vector */
  1261. q_vector->itr = (hw->mac.type == fm10k_mac_pf) ?
  1262. &interface->uc_addr[FM10K_ITR(entry->entry)] :
  1263. &interface->uc_addr[FM10K_VFITR(entry->entry)];
  1264. /* request the IRQ */
  1265. err = request_irq(entry->vector, &fm10k_msix_clean_rings, 0,
  1266. q_vector->name, q_vector);
  1267. if (err) {
  1268. netif_err(interface, probe, dev,
  1269. "request_irq failed for MSIX interrupt Error: %d\n",
  1270. err);
  1271. goto err_out;
  1272. }
  1273. /* assign the mask for this irq */
  1274. irq_set_affinity_hint(entry->vector, &q_vector->affinity_mask);
  1275. /* Enable q_vector */
  1276. writel(FM10K_ITR_ENABLE, q_vector->itr);
  1277. entry++;
  1278. }
  1279. return 0;
  1280. err_out:
  1281. /* wind through the ring freeing all entries and vectors */
  1282. while (vector) {
  1283. struct fm10k_q_vector *q_vector;
  1284. entry--;
  1285. vector--;
  1286. q_vector = interface->q_vector[vector];
  1287. if (!q_vector->tx.count && !q_vector->rx.count)
  1288. continue;
  1289. /* clear the affinity_mask in the IRQ descriptor */
  1290. irq_set_affinity_hint(entry->vector, NULL);
  1291. /* disable interrupts */
  1292. writel(FM10K_ITR_MASK_SET, q_vector->itr);
  1293. free_irq(entry->vector, q_vector);
  1294. }
  1295. return err;
  1296. }
  1297. void fm10k_up(struct fm10k_intfc *interface)
  1298. {
  1299. struct fm10k_hw *hw = &interface->hw;
  1300. /* Enable Tx/Rx DMA */
  1301. hw->mac.ops.start_hw(hw);
  1302. /* configure Tx descriptor rings */
  1303. fm10k_configure_tx(interface);
  1304. /* configure Rx descriptor rings */
  1305. fm10k_configure_rx(interface);
  1306. /* configure interrupts */
  1307. hw->mac.ops.update_int_moderator(hw);
  1308. /* enable statistics capture again */
  1309. clear_bit(__FM10K_UPDATING_STATS, &interface->state);
  1310. /* clear down bit to indicate we are ready to go */
  1311. clear_bit(__FM10K_DOWN, &interface->state);
  1312. /* enable polling cleanups */
  1313. fm10k_napi_enable_all(interface);
  1314. /* re-establish Rx filters */
  1315. fm10k_restore_rx_state(interface);
  1316. /* enable transmits */
  1317. netif_tx_start_all_queues(interface->netdev);
  1318. /* kick off the service timer now */
  1319. hw->mac.get_host_state = true;
  1320. mod_timer(&interface->service_timer, jiffies);
  1321. }
  1322. static void fm10k_napi_disable_all(struct fm10k_intfc *interface)
  1323. {
  1324. struct fm10k_q_vector *q_vector;
  1325. int q_idx;
  1326. for (q_idx = 0; q_idx < interface->num_q_vectors; q_idx++) {
  1327. q_vector = interface->q_vector[q_idx];
  1328. napi_disable(&q_vector->napi);
  1329. }
  1330. }
  1331. void fm10k_down(struct fm10k_intfc *interface)
  1332. {
  1333. struct net_device *netdev = interface->netdev;
  1334. struct fm10k_hw *hw = &interface->hw;
  1335. int err, i = 0, count = 0;
  1336. /* signal that we are down to the interrupt handler and service task */
  1337. if (test_and_set_bit(__FM10K_DOWN, &interface->state))
  1338. return;
  1339. /* call carrier off first to avoid false dev_watchdog timeouts */
  1340. netif_carrier_off(netdev);
  1341. /* disable transmits */
  1342. netif_tx_stop_all_queues(netdev);
  1343. netif_tx_disable(netdev);
  1344. /* reset Rx filters */
  1345. fm10k_reset_rx_state(interface);
  1346. /* disable polling routines */
  1347. fm10k_napi_disable_all(interface);
  1348. /* capture stats one last time before stopping interface */
  1349. fm10k_update_stats(interface);
  1350. /* prevent updating statistics while we're down */
  1351. while (test_and_set_bit(__FM10K_UPDATING_STATS, &interface->state))
  1352. usleep_range(1000, 2000);
  1353. /* skip waiting for TX DMA if we lost PCIe link */
  1354. if (FM10K_REMOVED(hw->hw_addr))
  1355. goto skip_tx_dma_drain;
  1356. /* In some rare circumstances it can take a while for Tx queues to
  1357. * quiesce and be fully disabled. Attempt to .stop_hw() first, and
  1358. * then if we get ERR_REQUESTS_PENDING, go ahead and wait in a loop
  1359. * until the Tx queues have emptied, or until a number of retries. If
  1360. * we fail to clear within the retry loop, we will issue a warning
  1361. * indicating that Tx DMA is probably hung. Note this means we call
  1362. * .stop_hw() twice but this shouldn't cause any problems.
  1363. */
  1364. err = hw->mac.ops.stop_hw(hw);
  1365. if (err != FM10K_ERR_REQUESTS_PENDING)
  1366. goto skip_tx_dma_drain;
  1367. #define TX_DMA_DRAIN_RETRIES 25
  1368. for (count = 0; count < TX_DMA_DRAIN_RETRIES; count++) {
  1369. usleep_range(10000, 20000);
  1370. /* start checking at the last ring to have pending Tx */
  1371. for (; i < interface->num_tx_queues; i++)
  1372. if (fm10k_get_tx_pending(interface->tx_ring[i]))
  1373. break;
  1374. /* if all the queues are drained, we can break now */
  1375. if (i == interface->num_tx_queues)
  1376. break;
  1377. }
  1378. if (count >= TX_DMA_DRAIN_RETRIES)
  1379. dev_err(&interface->pdev->dev,
  1380. "Tx queues failed to drain after %d tries. Tx DMA is probably hung.\n",
  1381. count);
  1382. skip_tx_dma_drain:
  1383. /* Disable DMA engine for Tx/Rx */
  1384. err = hw->mac.ops.stop_hw(hw);
  1385. if (err == FM10K_ERR_REQUESTS_PENDING)
  1386. dev_err(&interface->pdev->dev,
  1387. "due to pending requests hw was not shut down gracefully\n");
  1388. else if (err)
  1389. dev_err(&interface->pdev->dev, "stop_hw failed: %d\n", err);
  1390. /* free any buffers still on the rings */
  1391. fm10k_clean_all_tx_rings(interface);
  1392. fm10k_clean_all_rx_rings(interface);
  1393. }
  1394. /**
  1395. * fm10k_sw_init - Initialize general software structures
  1396. * @interface: host interface private structure to initialize
  1397. *
  1398. * fm10k_sw_init initializes the interface private data structure.
  1399. * Fields are initialized based on PCI device information and
  1400. * OS network device settings (MTU size).
  1401. **/
  1402. static int fm10k_sw_init(struct fm10k_intfc *interface,
  1403. const struct pci_device_id *ent)
  1404. {
  1405. const struct fm10k_info *fi = fm10k_info_tbl[ent->driver_data];
  1406. struct fm10k_hw *hw = &interface->hw;
  1407. struct pci_dev *pdev = interface->pdev;
  1408. struct net_device *netdev = interface->netdev;
  1409. u32 rss_key[FM10K_RSSRK_SIZE];
  1410. unsigned int rss;
  1411. int err;
  1412. /* initialize back pointer */
  1413. hw->back = interface;
  1414. hw->hw_addr = interface->uc_addr;
  1415. /* PCI config space info */
  1416. hw->vendor_id = pdev->vendor;
  1417. hw->device_id = pdev->device;
  1418. hw->revision_id = pdev->revision;
  1419. hw->subsystem_vendor_id = pdev->subsystem_vendor;
  1420. hw->subsystem_device_id = pdev->subsystem_device;
  1421. /* Setup hw api */
  1422. memcpy(&hw->mac.ops, fi->mac_ops, sizeof(hw->mac.ops));
  1423. hw->mac.type = fi->mac;
  1424. /* Setup IOV handlers */
  1425. if (fi->iov_ops)
  1426. memcpy(&hw->iov.ops, fi->iov_ops, sizeof(hw->iov.ops));
  1427. /* Set common capability flags and settings */
  1428. rss = min_t(int, FM10K_MAX_RSS_INDICES, num_online_cpus());
  1429. interface->ring_feature[RING_F_RSS].limit = rss;
  1430. fi->get_invariants(hw);
  1431. /* pick up the PCIe bus settings for reporting later */
  1432. if (hw->mac.ops.get_bus_info)
  1433. hw->mac.ops.get_bus_info(hw);
  1434. /* limit the usable DMA range */
  1435. if (hw->mac.ops.set_dma_mask)
  1436. hw->mac.ops.set_dma_mask(hw, dma_get_mask(&pdev->dev));
  1437. /* update netdev with DMA restrictions */
  1438. if (dma_get_mask(&pdev->dev) > DMA_BIT_MASK(32)) {
  1439. netdev->features |= NETIF_F_HIGHDMA;
  1440. netdev->vlan_features |= NETIF_F_HIGHDMA;
  1441. }
  1442. /* delay any future reset requests */
  1443. interface->last_reset = jiffies + (10 * HZ);
  1444. /* reset and initialize the hardware so it is in a known state */
  1445. err = hw->mac.ops.reset_hw(hw);
  1446. if (err) {
  1447. dev_err(&pdev->dev, "reset_hw failed: %d\n", err);
  1448. return err;
  1449. }
  1450. err = hw->mac.ops.init_hw(hw);
  1451. if (err) {
  1452. dev_err(&pdev->dev, "init_hw failed: %d\n", err);
  1453. return err;
  1454. }
  1455. /* initialize hardware statistics */
  1456. hw->mac.ops.update_hw_stats(hw, &interface->stats);
  1457. /* Set upper limit on IOV VFs that can be allocated */
  1458. pci_sriov_set_totalvfs(pdev, hw->iov.total_vfs);
  1459. /* Start with random Ethernet address */
  1460. eth_random_addr(hw->mac.addr);
  1461. /* Initialize MAC address from hardware */
  1462. err = hw->mac.ops.read_mac_addr(hw);
  1463. if (err) {
  1464. dev_warn(&pdev->dev,
  1465. "Failed to obtain MAC address defaulting to random\n");
  1466. /* tag address assignment as random */
  1467. netdev->addr_assign_type |= NET_ADDR_RANDOM;
  1468. }
  1469. ether_addr_copy(netdev->dev_addr, hw->mac.addr);
  1470. ether_addr_copy(netdev->perm_addr, hw->mac.addr);
  1471. if (!is_valid_ether_addr(netdev->perm_addr)) {
  1472. dev_err(&pdev->dev, "Invalid MAC Address\n");
  1473. return -EIO;
  1474. }
  1475. /* initialize DCBNL interface */
  1476. fm10k_dcbnl_set_ops(netdev);
  1477. /* set default ring sizes */
  1478. interface->tx_ring_count = FM10K_DEFAULT_TXD;
  1479. interface->rx_ring_count = FM10K_DEFAULT_RXD;
  1480. /* set default interrupt moderation */
  1481. interface->tx_itr = FM10K_TX_ITR_DEFAULT;
  1482. interface->rx_itr = FM10K_ITR_ADAPTIVE | FM10K_RX_ITR_DEFAULT;
  1483. /* initialize vxlan_port list */
  1484. INIT_LIST_HEAD(&interface->vxlan_port);
  1485. netdev_rss_key_fill(rss_key, sizeof(rss_key));
  1486. memcpy(interface->rssrk, rss_key, sizeof(rss_key));
  1487. /* Start off interface as being down */
  1488. set_bit(__FM10K_DOWN, &interface->state);
  1489. set_bit(__FM10K_UPDATING_STATS, &interface->state);
  1490. return 0;
  1491. }
  1492. static void fm10k_slot_warn(struct fm10k_intfc *interface)
  1493. {
  1494. enum pcie_link_width width = PCIE_LNK_WIDTH_UNKNOWN;
  1495. enum pci_bus_speed speed = PCI_SPEED_UNKNOWN;
  1496. struct fm10k_hw *hw = &interface->hw;
  1497. int max_gts = 0, expected_gts = 0;
  1498. if (pcie_get_minimum_link(interface->pdev, &speed, &width) ||
  1499. speed == PCI_SPEED_UNKNOWN || width == PCIE_LNK_WIDTH_UNKNOWN) {
  1500. dev_warn(&interface->pdev->dev,
  1501. "Unable to determine PCI Express bandwidth.\n");
  1502. return;
  1503. }
  1504. switch (speed) {
  1505. case PCIE_SPEED_2_5GT:
  1506. /* 8b/10b encoding reduces max throughput by 20% */
  1507. max_gts = 2 * width;
  1508. break;
  1509. case PCIE_SPEED_5_0GT:
  1510. /* 8b/10b encoding reduces max throughput by 20% */
  1511. max_gts = 4 * width;
  1512. break;
  1513. case PCIE_SPEED_8_0GT:
  1514. /* 128b/130b encoding has less than 2% impact on throughput */
  1515. max_gts = 8 * width;
  1516. break;
  1517. default:
  1518. dev_warn(&interface->pdev->dev,
  1519. "Unable to determine PCI Express bandwidth.\n");
  1520. return;
  1521. }
  1522. dev_info(&interface->pdev->dev,
  1523. "PCI Express bandwidth of %dGT/s available\n",
  1524. max_gts);
  1525. dev_info(&interface->pdev->dev,
  1526. "(Speed:%s, Width: x%d, Encoding Loss:%s, Payload:%s)\n",
  1527. (speed == PCIE_SPEED_8_0GT ? "8.0GT/s" :
  1528. speed == PCIE_SPEED_5_0GT ? "5.0GT/s" :
  1529. speed == PCIE_SPEED_2_5GT ? "2.5GT/s" :
  1530. "Unknown"),
  1531. hw->bus.width,
  1532. (speed == PCIE_SPEED_2_5GT ? "20%" :
  1533. speed == PCIE_SPEED_5_0GT ? "20%" :
  1534. speed == PCIE_SPEED_8_0GT ? "<2%" :
  1535. "Unknown"),
  1536. (hw->bus.payload == fm10k_bus_payload_128 ? "128B" :
  1537. hw->bus.payload == fm10k_bus_payload_256 ? "256B" :
  1538. hw->bus.payload == fm10k_bus_payload_512 ? "512B" :
  1539. "Unknown"));
  1540. switch (hw->bus_caps.speed) {
  1541. case fm10k_bus_speed_2500:
  1542. /* 8b/10b encoding reduces max throughput by 20% */
  1543. expected_gts = 2 * hw->bus_caps.width;
  1544. break;
  1545. case fm10k_bus_speed_5000:
  1546. /* 8b/10b encoding reduces max throughput by 20% */
  1547. expected_gts = 4 * hw->bus_caps.width;
  1548. break;
  1549. case fm10k_bus_speed_8000:
  1550. /* 128b/130b encoding has less than 2% impact on throughput */
  1551. expected_gts = 8 * hw->bus_caps.width;
  1552. break;
  1553. default:
  1554. dev_warn(&interface->pdev->dev,
  1555. "Unable to determine expected PCI Express bandwidth.\n");
  1556. return;
  1557. }
  1558. if (max_gts >= expected_gts)
  1559. return;
  1560. dev_warn(&interface->pdev->dev,
  1561. "This device requires %dGT/s of bandwidth for optimal performance.\n",
  1562. expected_gts);
  1563. dev_warn(&interface->pdev->dev,
  1564. "A %sslot with x%d lanes is suggested.\n",
  1565. (hw->bus_caps.speed == fm10k_bus_speed_2500 ? "2.5GT/s " :
  1566. hw->bus_caps.speed == fm10k_bus_speed_5000 ? "5.0GT/s " :
  1567. hw->bus_caps.speed == fm10k_bus_speed_8000 ? "8.0GT/s " : ""),
  1568. hw->bus_caps.width);
  1569. }
  1570. /**
  1571. * fm10k_probe - Device Initialization Routine
  1572. * @pdev: PCI device information struct
  1573. * @ent: entry in fm10k_pci_tbl
  1574. *
  1575. * Returns 0 on success, negative on failure
  1576. *
  1577. * fm10k_probe initializes an interface identified by a pci_dev structure.
  1578. * The OS initialization, configuring of the interface private structure,
  1579. * and a hardware reset occur.
  1580. **/
  1581. static int fm10k_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
  1582. {
  1583. struct net_device *netdev;
  1584. struct fm10k_intfc *interface;
  1585. int err;
  1586. err = pci_enable_device_mem(pdev);
  1587. if (err)
  1588. return err;
  1589. err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(48));
  1590. if (err)
  1591. err = dma_set_mask_and_coherent(&pdev->dev, DMA_BIT_MASK(32));
  1592. if (err) {
  1593. dev_err(&pdev->dev,
  1594. "DMA configuration failed: %d\n", err);
  1595. goto err_dma;
  1596. }
  1597. err = pci_request_mem_regions(pdev, fm10k_driver_name);
  1598. if (err) {
  1599. dev_err(&pdev->dev,
  1600. "pci_request_selected_regions failed: %d\n", err);
  1601. goto err_pci_reg;
  1602. }
  1603. pci_enable_pcie_error_reporting(pdev);
  1604. pci_set_master(pdev);
  1605. pci_save_state(pdev);
  1606. netdev = fm10k_alloc_netdev(fm10k_info_tbl[ent->driver_data]);
  1607. if (!netdev) {
  1608. err = -ENOMEM;
  1609. goto err_alloc_netdev;
  1610. }
  1611. SET_NETDEV_DEV(netdev, &pdev->dev);
  1612. interface = netdev_priv(netdev);
  1613. pci_set_drvdata(pdev, interface);
  1614. interface->netdev = netdev;
  1615. interface->pdev = pdev;
  1616. interface->uc_addr = ioremap(pci_resource_start(pdev, 0),
  1617. FM10K_UC_ADDR_SIZE);
  1618. if (!interface->uc_addr) {
  1619. err = -EIO;
  1620. goto err_ioremap;
  1621. }
  1622. err = fm10k_sw_init(interface, ent);
  1623. if (err)
  1624. goto err_sw_init;
  1625. /* enable debugfs support */
  1626. fm10k_dbg_intfc_init(interface);
  1627. err = fm10k_init_queueing_scheme(interface);
  1628. if (err)
  1629. goto err_sw_init;
  1630. /* the mbx interrupt might attempt to schedule the service task, so we
  1631. * must ensure it is disabled since we haven't yet requested the timer
  1632. * or work item.
  1633. */
  1634. set_bit(__FM10K_SERVICE_DISABLE, &interface->state);
  1635. err = fm10k_mbx_request_irq(interface);
  1636. if (err)
  1637. goto err_mbx_interrupt;
  1638. /* final check of hardware state before registering the interface */
  1639. err = fm10k_hw_ready(interface);
  1640. if (err)
  1641. goto err_register;
  1642. err = register_netdev(netdev);
  1643. if (err)
  1644. goto err_register;
  1645. /* carrier off reporting is important to ethtool even BEFORE open */
  1646. netif_carrier_off(netdev);
  1647. /* stop all the transmit queues from transmitting until link is up */
  1648. netif_tx_stop_all_queues(netdev);
  1649. /* Initialize service timer and service task late in order to avoid
  1650. * cleanup issues.
  1651. */
  1652. setup_timer(&interface->service_timer, &fm10k_service_timer,
  1653. (unsigned long)interface);
  1654. INIT_WORK(&interface->service_task, fm10k_service_task);
  1655. /* kick off service timer now, even when interface is down */
  1656. mod_timer(&interface->service_timer, (HZ * 2) + jiffies);
  1657. /* print warning for non-optimal configurations */
  1658. fm10k_slot_warn(interface);
  1659. /* report MAC address for logging */
  1660. dev_info(&pdev->dev, "%pM\n", netdev->dev_addr);
  1661. /* enable SR-IOV after registering netdev to enforce PF/VF ordering */
  1662. fm10k_iov_configure(pdev, 0);
  1663. /* clear the service task disable bit to allow service task to start */
  1664. clear_bit(__FM10K_SERVICE_DISABLE, &interface->state);
  1665. return 0;
  1666. err_register:
  1667. fm10k_mbx_free_irq(interface);
  1668. err_mbx_interrupt:
  1669. fm10k_clear_queueing_scheme(interface);
  1670. err_sw_init:
  1671. if (interface->sw_addr)
  1672. iounmap(interface->sw_addr);
  1673. iounmap(interface->uc_addr);
  1674. err_ioremap:
  1675. free_netdev(netdev);
  1676. err_alloc_netdev:
  1677. pci_release_mem_regions(pdev);
  1678. err_pci_reg:
  1679. err_dma:
  1680. pci_disable_device(pdev);
  1681. return err;
  1682. }
  1683. /**
  1684. * fm10k_remove - Device Removal Routine
  1685. * @pdev: PCI device information struct
  1686. *
  1687. * fm10k_remove is called by the PCI subsystem to alert the driver
  1688. * that it should release a PCI device. The could be caused by a
  1689. * Hot-Plug event, or because the driver is going to be removed from
  1690. * memory.
  1691. **/
  1692. static void fm10k_remove(struct pci_dev *pdev)
  1693. {
  1694. struct fm10k_intfc *interface = pci_get_drvdata(pdev);
  1695. struct net_device *netdev = interface->netdev;
  1696. del_timer_sync(&interface->service_timer);
  1697. set_bit(__FM10K_SERVICE_DISABLE, &interface->state);
  1698. cancel_work_sync(&interface->service_task);
  1699. /* free netdev, this may bounce the interrupts due to setup_tc */
  1700. if (netdev->reg_state == NETREG_REGISTERED)
  1701. unregister_netdev(netdev);
  1702. /* release VFs */
  1703. fm10k_iov_disable(pdev);
  1704. /* disable mailbox interrupt */
  1705. fm10k_mbx_free_irq(interface);
  1706. /* free interrupts */
  1707. fm10k_clear_queueing_scheme(interface);
  1708. /* remove any debugfs interfaces */
  1709. fm10k_dbg_intfc_exit(interface);
  1710. if (interface->sw_addr)
  1711. iounmap(interface->sw_addr);
  1712. iounmap(interface->uc_addr);
  1713. free_netdev(netdev);
  1714. pci_release_mem_regions(pdev);
  1715. pci_disable_pcie_error_reporting(pdev);
  1716. pci_disable_device(pdev);
  1717. }
  1718. static void fm10k_prepare_suspend(struct fm10k_intfc *interface)
  1719. {
  1720. /* the watchdog task reads from registers, which might appear like
  1721. * a surprise remove if the PCIe device is disabled while we're
  1722. * stopped. We stop the watchdog task until after we resume software
  1723. * activity.
  1724. */
  1725. set_bit(__FM10K_SERVICE_DISABLE, &interface->state);
  1726. cancel_work_sync(&interface->service_task);
  1727. fm10k_prepare_for_reset(interface);
  1728. }
  1729. static int fm10k_handle_resume(struct fm10k_intfc *interface)
  1730. {
  1731. struct fm10k_hw *hw = &interface->hw;
  1732. int err;
  1733. /* reset statistics starting values */
  1734. hw->mac.ops.rebind_hw_stats(hw, &interface->stats);
  1735. err = fm10k_handle_reset(interface);
  1736. if (err)
  1737. return err;
  1738. /* assume host is not ready, to prevent race with watchdog in case we
  1739. * actually don't have connection to the switch
  1740. */
  1741. interface->host_ready = false;
  1742. fm10k_watchdog_host_not_ready(interface);
  1743. /* force link to stay down for a second to prevent link flutter */
  1744. interface->link_down_event = jiffies + (HZ);
  1745. set_bit(__FM10K_LINK_DOWN, &interface->state);
  1746. /* clear the service task disable bit to allow service task to start */
  1747. clear_bit(__FM10K_SERVICE_DISABLE, &interface->state);
  1748. fm10k_service_event_schedule(interface);
  1749. return err;
  1750. }
  1751. #ifdef CONFIG_PM
  1752. /**
  1753. * fm10k_resume - Restore device to pre-sleep state
  1754. * @pdev: PCI device information struct
  1755. *
  1756. * fm10k_resume is called after the system has powered back up from a sleep
  1757. * state and is ready to resume operation. This function is meant to restore
  1758. * the device back to its pre-sleep state.
  1759. **/
  1760. static int fm10k_resume(struct pci_dev *pdev)
  1761. {
  1762. struct fm10k_intfc *interface = pci_get_drvdata(pdev);
  1763. struct net_device *netdev = interface->netdev;
  1764. struct fm10k_hw *hw = &interface->hw;
  1765. u32 err;
  1766. pci_set_power_state(pdev, PCI_D0);
  1767. pci_restore_state(pdev);
  1768. /* pci_restore_state clears dev->state_saved so call
  1769. * pci_save_state to restore it.
  1770. */
  1771. pci_save_state(pdev);
  1772. err = pci_enable_device_mem(pdev);
  1773. if (err) {
  1774. dev_err(&pdev->dev, "Cannot enable PCI device from suspend\n");
  1775. return err;
  1776. }
  1777. pci_set_master(pdev);
  1778. pci_wake_from_d3(pdev, false);
  1779. /* refresh hw_addr in case it was dropped */
  1780. hw->hw_addr = interface->uc_addr;
  1781. err = fm10k_handle_resume(interface);
  1782. if (err)
  1783. return err;
  1784. netif_device_attach(netdev);
  1785. return 0;
  1786. }
  1787. /**
  1788. * fm10k_suspend - Prepare the device for a system sleep state
  1789. * @pdev: PCI device information struct
  1790. *
  1791. * fm10k_suspend is meant to shutdown the device prior to the system entering
  1792. * a sleep state. The fm10k hardware does not support wake on lan so the
  1793. * driver simply needs to shut down the device so it is in a low power state.
  1794. **/
  1795. static int fm10k_suspend(struct pci_dev *pdev,
  1796. pm_message_t __always_unused state)
  1797. {
  1798. struct fm10k_intfc *interface = pci_get_drvdata(pdev);
  1799. struct net_device *netdev = interface->netdev;
  1800. int err = 0;
  1801. netif_device_detach(netdev);
  1802. fm10k_prepare_suspend(interface);
  1803. err = pci_save_state(pdev);
  1804. if (err)
  1805. return err;
  1806. pci_disable_device(pdev);
  1807. pci_wake_from_d3(pdev, false);
  1808. pci_set_power_state(pdev, PCI_D3hot);
  1809. return 0;
  1810. }
  1811. #endif /* CONFIG_PM */
  1812. /**
  1813. * fm10k_io_error_detected - called when PCI error is detected
  1814. * @pdev: Pointer to PCI device
  1815. * @state: The current pci connection state
  1816. *
  1817. * This function is called after a PCI bus error affecting
  1818. * this device has been detected.
  1819. */
  1820. static pci_ers_result_t fm10k_io_error_detected(struct pci_dev *pdev,
  1821. pci_channel_state_t state)
  1822. {
  1823. struct fm10k_intfc *interface = pci_get_drvdata(pdev);
  1824. struct net_device *netdev = interface->netdev;
  1825. netif_device_detach(netdev);
  1826. if (state == pci_channel_io_perm_failure)
  1827. return PCI_ERS_RESULT_DISCONNECT;
  1828. fm10k_prepare_suspend(interface);
  1829. /* Request a slot reset. */
  1830. return PCI_ERS_RESULT_NEED_RESET;
  1831. }
  1832. /**
  1833. * fm10k_io_slot_reset - called after the pci bus has been reset.
  1834. * @pdev: Pointer to PCI device
  1835. *
  1836. * Restart the card from scratch, as if from a cold-boot.
  1837. */
  1838. static pci_ers_result_t fm10k_io_slot_reset(struct pci_dev *pdev)
  1839. {
  1840. pci_ers_result_t result;
  1841. if (pci_enable_device_mem(pdev)) {
  1842. dev_err(&pdev->dev,
  1843. "Cannot re-enable PCI device after reset.\n");
  1844. result = PCI_ERS_RESULT_DISCONNECT;
  1845. } else {
  1846. pci_set_master(pdev);
  1847. pci_restore_state(pdev);
  1848. /* After second error pci->state_saved is false, this
  1849. * resets it so EEH doesn't break.
  1850. */
  1851. pci_save_state(pdev);
  1852. pci_wake_from_d3(pdev, false);
  1853. result = PCI_ERS_RESULT_RECOVERED;
  1854. }
  1855. pci_cleanup_aer_uncorrect_error_status(pdev);
  1856. return result;
  1857. }
  1858. /**
  1859. * fm10k_io_resume - called when traffic can start flowing again.
  1860. * @pdev: Pointer to PCI device
  1861. *
  1862. * This callback is called when the error recovery driver tells us that
  1863. * its OK to resume normal operation.
  1864. */
  1865. static void fm10k_io_resume(struct pci_dev *pdev)
  1866. {
  1867. struct fm10k_intfc *interface = pci_get_drvdata(pdev);
  1868. struct net_device *netdev = interface->netdev;
  1869. int err;
  1870. err = fm10k_handle_resume(interface);
  1871. if (err)
  1872. dev_warn(&pdev->dev,
  1873. "fm10k_io_resume failed: %d\n", err);
  1874. else
  1875. netif_device_attach(netdev);
  1876. }
  1877. /**
  1878. * fm10k_io_reset_notify - called when PCI function is reset
  1879. * @pdev: Pointer to PCI device
  1880. *
  1881. * This callback is called when the PCI function is reset such as from
  1882. * /sys/class/net/<enpX>/device/reset or similar. When prepare is true, it
  1883. * means we should prepare for a function reset. If prepare is false, it means
  1884. * the function reset just occurred.
  1885. */
  1886. static void fm10k_io_reset_notify(struct pci_dev *pdev, bool prepare)
  1887. {
  1888. struct fm10k_intfc *interface = pci_get_drvdata(pdev);
  1889. int err = 0;
  1890. if (prepare) {
  1891. /* warn incase we have any active VF devices */
  1892. if (pci_num_vf(pdev))
  1893. dev_warn(&pdev->dev,
  1894. "PCIe FLR may cause issues for any active VF devices\n");
  1895. fm10k_prepare_suspend(interface);
  1896. } else {
  1897. err = fm10k_handle_resume(interface);
  1898. }
  1899. if (err) {
  1900. dev_warn(&pdev->dev,
  1901. "fm10k_io_reset_notify failed: %d\n", err);
  1902. netif_device_detach(interface->netdev);
  1903. }
  1904. }
  1905. static const struct pci_error_handlers fm10k_err_handler = {
  1906. .error_detected = fm10k_io_error_detected,
  1907. .slot_reset = fm10k_io_slot_reset,
  1908. .resume = fm10k_io_resume,
  1909. .reset_notify = fm10k_io_reset_notify,
  1910. };
  1911. static struct pci_driver fm10k_driver = {
  1912. .name = fm10k_driver_name,
  1913. .id_table = fm10k_pci_tbl,
  1914. .probe = fm10k_probe,
  1915. .remove = fm10k_remove,
  1916. #ifdef CONFIG_PM
  1917. .suspend = fm10k_suspend,
  1918. .resume = fm10k_resume,
  1919. #endif
  1920. .sriov_configure = fm10k_iov_configure,
  1921. .err_handler = &fm10k_err_handler
  1922. };
  1923. /**
  1924. * fm10k_register_pci_driver - register driver interface
  1925. *
  1926. * This function is called on module load in order to register the driver.
  1927. **/
  1928. int fm10k_register_pci_driver(void)
  1929. {
  1930. return pci_register_driver(&fm10k_driver);
  1931. }
  1932. /**
  1933. * fm10k_unregister_pci_driver - unregister driver interface
  1934. *
  1935. * This function is called on module unload in order to remove the driver.
  1936. **/
  1937. void fm10k_unregister_pci_driver(void)
  1938. {
  1939. pci_unregister_driver(&fm10k_driver);
  1940. }