bcm_sf2.h 5.4 KB

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  1. /*
  2. * Broadcom Starfighter2 private context
  3. *
  4. * Copyright (C) 2014, Broadcom Corporation
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. */
  11. #ifndef __BCM_SF2_H
  12. #define __BCM_SF2_H
  13. #include <linux/platform_device.h>
  14. #include <linux/kernel.h>
  15. #include <linux/io.h>
  16. #include <linux/spinlock.h>
  17. #include <linux/mutex.h>
  18. #include <linux/mii.h>
  19. #include <linux/ethtool.h>
  20. #include <linux/types.h>
  21. #include <linux/bitops.h>
  22. #include <linux/if_vlan.h>
  23. #include <net/dsa.h>
  24. #include "bcm_sf2_regs.h"
  25. struct bcm_sf2_hw_params {
  26. u16 top_rev;
  27. u16 core_rev;
  28. u16 gphy_rev;
  29. u32 num_gphy;
  30. u8 num_acb_queue;
  31. u8 num_rgmii;
  32. u8 num_ports;
  33. u8 fcb_pause_override:1;
  34. u8 acb_packets_inflight:1;
  35. };
  36. #define BCM_SF2_REGS_NAME {\
  37. "core", "reg", "intrl2_0", "intrl2_1", "fcb", "acb" \
  38. }
  39. #define BCM_SF2_REGS_NUM 6
  40. struct bcm_sf2_port_status {
  41. unsigned int link;
  42. struct ethtool_eee eee;
  43. u32 vlan_ctl_mask;
  44. u16 pvid;
  45. struct net_device *bridge_dev;
  46. };
  47. struct bcm_sf2_arl_entry {
  48. u8 port;
  49. u8 mac[ETH_ALEN];
  50. u16 vid;
  51. u8 is_valid:1;
  52. u8 is_age:1;
  53. u8 is_static:1;
  54. };
  55. struct bcm_sf2_vlan {
  56. u16 members;
  57. u16 untag;
  58. };
  59. static inline void bcm_sf2_mac_from_u64(u64 src, u8 *dst)
  60. {
  61. unsigned int i;
  62. for (i = 0; i < ETH_ALEN; i++)
  63. dst[ETH_ALEN - 1 - i] = (src >> (8 * i)) & 0xff;
  64. }
  65. static inline u64 bcm_sf2_mac_to_u64(const u8 *src)
  66. {
  67. unsigned int i;
  68. u64 dst = 0;
  69. for (i = 0; i < ETH_ALEN; i++)
  70. dst |= (u64)src[ETH_ALEN - 1 - i] << (8 * i);
  71. return dst;
  72. }
  73. static inline void bcm_sf2_arl_to_entry(struct bcm_sf2_arl_entry *ent,
  74. u64 mac_vid, u32 fwd_entry)
  75. {
  76. memset(ent, 0, sizeof(*ent));
  77. ent->port = fwd_entry & PORTID_MASK;
  78. ent->is_valid = !!(fwd_entry & ARL_VALID);
  79. ent->is_age = !!(fwd_entry & ARL_AGE);
  80. ent->is_static = !!(fwd_entry & ARL_STATIC);
  81. bcm_sf2_mac_from_u64(mac_vid, ent->mac);
  82. ent->vid = mac_vid >> VID_SHIFT;
  83. }
  84. static inline void bcm_sf2_arl_from_entry(u64 *mac_vid, u32 *fwd_entry,
  85. const struct bcm_sf2_arl_entry *ent)
  86. {
  87. *mac_vid = bcm_sf2_mac_to_u64(ent->mac);
  88. *mac_vid |= (u64)(ent->vid & VID_MASK) << VID_SHIFT;
  89. *fwd_entry = ent->port & PORTID_MASK;
  90. if (ent->is_valid)
  91. *fwd_entry |= ARL_VALID;
  92. if (ent->is_static)
  93. *fwd_entry |= ARL_STATIC;
  94. if (ent->is_age)
  95. *fwd_entry |= ARL_AGE;
  96. }
  97. struct bcm_sf2_priv {
  98. /* Base registers, keep those in order with BCM_SF2_REGS_NAME */
  99. void __iomem *core;
  100. void __iomem *reg;
  101. void __iomem *intrl2_0;
  102. void __iomem *intrl2_1;
  103. void __iomem *fcb;
  104. void __iomem *acb;
  105. /* spinlock protecting access to the indirect registers */
  106. spinlock_t indir_lock;
  107. int irq0;
  108. int irq1;
  109. u32 irq0_stat;
  110. u32 irq0_mask;
  111. u32 irq1_stat;
  112. u32 irq1_mask;
  113. /* Mutex protecting access to the MIB counters */
  114. struct mutex stats_mutex;
  115. struct bcm_sf2_hw_params hw_params;
  116. struct bcm_sf2_port_status port_sts[DSA_MAX_PORTS];
  117. /* Mask of ports enabled for Wake-on-LAN */
  118. u32 wol_ports_mask;
  119. /* MoCA port location */
  120. int moca_port;
  121. /* Bitmask of ports having an integrated PHY */
  122. unsigned int int_phy_mask;
  123. /* Master and slave MDIO bus controller */
  124. unsigned int indir_phy_mask;
  125. struct device_node *master_mii_dn;
  126. struct mii_bus *slave_mii_bus;
  127. struct mii_bus *master_mii_bus;
  128. /* Cache of programmed VLANs */
  129. struct bcm_sf2_vlan vlans[VLAN_N_VID];
  130. };
  131. struct bcm_sf2_hw_stats {
  132. const char *string;
  133. u16 reg;
  134. u8 sizeof_stat;
  135. };
  136. #define SF2_IO_MACRO(name) \
  137. static inline u32 name##_readl(struct bcm_sf2_priv *priv, u32 off) \
  138. { \
  139. return __raw_readl(priv->name + off); \
  140. } \
  141. static inline void name##_writel(struct bcm_sf2_priv *priv, \
  142. u32 val, u32 off) \
  143. { \
  144. __raw_writel(val, priv->name + off); \
  145. } \
  146. /* Accesses to 64-bits register requires us to latch the hi/lo pairs
  147. * using the REG_DIR_DATA_{READ,WRITE} ancillary registers. The 'indir_lock'
  148. * spinlock is automatically grabbed and released to provide relative
  149. * atomiticy with latched reads/writes.
  150. */
  151. #define SF2_IO64_MACRO(name) \
  152. static inline u64 name##_readq(struct bcm_sf2_priv *priv, u32 off) \
  153. { \
  154. u32 indir, dir; \
  155. spin_lock(&priv->indir_lock); \
  156. dir = __raw_readl(priv->name + off); \
  157. indir = reg_readl(priv, REG_DIR_DATA_READ); \
  158. spin_unlock(&priv->indir_lock); \
  159. return (u64)indir << 32 | dir; \
  160. } \
  161. static inline void name##_writeq(struct bcm_sf2_priv *priv, u64 val, \
  162. u32 off) \
  163. { \
  164. spin_lock(&priv->indir_lock); \
  165. reg_writel(priv, upper_32_bits(val), REG_DIR_DATA_WRITE); \
  166. __raw_writel(lower_32_bits(val), priv->name + off); \
  167. spin_unlock(&priv->indir_lock); \
  168. }
  169. #define SWITCH_INTR_L2(which) \
  170. static inline void intrl2_##which##_mask_clear(struct bcm_sf2_priv *priv, \
  171. u32 mask) \
  172. { \
  173. priv->irq##which##_mask &= ~(mask); \
  174. intrl2_##which##_writel(priv, mask, INTRL2_CPU_MASK_CLEAR); \
  175. } \
  176. static inline void intrl2_##which##_mask_set(struct bcm_sf2_priv *priv, \
  177. u32 mask) \
  178. { \
  179. intrl2_## which##_writel(priv, mask, INTRL2_CPU_MASK_SET); \
  180. priv->irq##which##_mask |= (mask); \
  181. } \
  182. SF2_IO_MACRO(core);
  183. SF2_IO_MACRO(reg);
  184. SF2_IO64_MACRO(core);
  185. SF2_IO_MACRO(intrl2_0);
  186. SF2_IO_MACRO(intrl2_1);
  187. SF2_IO_MACRO(fcb);
  188. SF2_IO_MACRO(acb);
  189. SWITCH_INTR_L2(0);
  190. SWITCH_INTR_L2(1);
  191. #endif /* __BCM_SF2_H */