verbs.c 53 KB

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  1. /*
  2. * Copyright (c) 2004 Mellanox Technologies Ltd. All rights reserved.
  3. * Copyright (c) 2004 Infinicon Corporation. All rights reserved.
  4. * Copyright (c) 2004 Intel Corporation. All rights reserved.
  5. * Copyright (c) 2004 Topspin Corporation. All rights reserved.
  6. * Copyright (c) 2004 Voltaire Corporation. All rights reserved.
  7. * Copyright (c) 2005 Sun Microsystems, Inc. All rights reserved.
  8. * Copyright (c) 2005, 2006 Cisco Systems. All rights reserved.
  9. *
  10. * This software is available to you under a choice of one of two
  11. * licenses. You may choose to be licensed under the terms of the GNU
  12. * General Public License (GPL) Version 2, available from the file
  13. * COPYING in the main directory of this source tree, or the
  14. * OpenIB.org BSD license below:
  15. *
  16. * Redistribution and use in source and binary forms, with or
  17. * without modification, are permitted provided that the following
  18. * conditions are met:
  19. *
  20. * - Redistributions of source code must retain the above
  21. * copyright notice, this list of conditions and the following
  22. * disclaimer.
  23. *
  24. * - Redistributions in binary form must reproduce the above
  25. * copyright notice, this list of conditions and the following
  26. * disclaimer in the documentation and/or other materials
  27. * provided with the distribution.
  28. *
  29. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  30. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  31. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  32. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  33. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  34. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  35. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  36. * SOFTWARE.
  37. */
  38. #include <linux/errno.h>
  39. #include <linux/err.h>
  40. #include <linux/export.h>
  41. #include <linux/string.h>
  42. #include <linux/slab.h>
  43. #include <linux/in.h>
  44. #include <linux/in6.h>
  45. #include <net/addrconf.h>
  46. #include <rdma/ib_verbs.h>
  47. #include <rdma/ib_cache.h>
  48. #include <rdma/ib_addr.h>
  49. #include <rdma/rw.h>
  50. #include "core_priv.h"
  51. static const char * const ib_events[] = {
  52. [IB_EVENT_CQ_ERR] = "CQ error",
  53. [IB_EVENT_QP_FATAL] = "QP fatal error",
  54. [IB_EVENT_QP_REQ_ERR] = "QP request error",
  55. [IB_EVENT_QP_ACCESS_ERR] = "QP access error",
  56. [IB_EVENT_COMM_EST] = "communication established",
  57. [IB_EVENT_SQ_DRAINED] = "send queue drained",
  58. [IB_EVENT_PATH_MIG] = "path migration successful",
  59. [IB_EVENT_PATH_MIG_ERR] = "path migration error",
  60. [IB_EVENT_DEVICE_FATAL] = "device fatal error",
  61. [IB_EVENT_PORT_ACTIVE] = "port active",
  62. [IB_EVENT_PORT_ERR] = "port error",
  63. [IB_EVENT_LID_CHANGE] = "LID change",
  64. [IB_EVENT_PKEY_CHANGE] = "P_key change",
  65. [IB_EVENT_SM_CHANGE] = "SM change",
  66. [IB_EVENT_SRQ_ERR] = "SRQ error",
  67. [IB_EVENT_SRQ_LIMIT_REACHED] = "SRQ limit reached",
  68. [IB_EVENT_QP_LAST_WQE_REACHED] = "last WQE reached",
  69. [IB_EVENT_CLIENT_REREGISTER] = "client reregister",
  70. [IB_EVENT_GID_CHANGE] = "GID changed",
  71. };
  72. const char *__attribute_const__ ib_event_msg(enum ib_event_type event)
  73. {
  74. size_t index = event;
  75. return (index < ARRAY_SIZE(ib_events) && ib_events[index]) ?
  76. ib_events[index] : "unrecognized event";
  77. }
  78. EXPORT_SYMBOL(ib_event_msg);
  79. static const char * const wc_statuses[] = {
  80. [IB_WC_SUCCESS] = "success",
  81. [IB_WC_LOC_LEN_ERR] = "local length error",
  82. [IB_WC_LOC_QP_OP_ERR] = "local QP operation error",
  83. [IB_WC_LOC_EEC_OP_ERR] = "local EE context operation error",
  84. [IB_WC_LOC_PROT_ERR] = "local protection error",
  85. [IB_WC_WR_FLUSH_ERR] = "WR flushed",
  86. [IB_WC_MW_BIND_ERR] = "memory management operation error",
  87. [IB_WC_BAD_RESP_ERR] = "bad response error",
  88. [IB_WC_LOC_ACCESS_ERR] = "local access error",
  89. [IB_WC_REM_INV_REQ_ERR] = "invalid request error",
  90. [IB_WC_REM_ACCESS_ERR] = "remote access error",
  91. [IB_WC_REM_OP_ERR] = "remote operation error",
  92. [IB_WC_RETRY_EXC_ERR] = "transport retry counter exceeded",
  93. [IB_WC_RNR_RETRY_EXC_ERR] = "RNR retry counter exceeded",
  94. [IB_WC_LOC_RDD_VIOL_ERR] = "local RDD violation error",
  95. [IB_WC_REM_INV_RD_REQ_ERR] = "remote invalid RD request",
  96. [IB_WC_REM_ABORT_ERR] = "operation aborted",
  97. [IB_WC_INV_EECN_ERR] = "invalid EE context number",
  98. [IB_WC_INV_EEC_STATE_ERR] = "invalid EE context state",
  99. [IB_WC_FATAL_ERR] = "fatal error",
  100. [IB_WC_RESP_TIMEOUT_ERR] = "response timeout error",
  101. [IB_WC_GENERAL_ERR] = "general error",
  102. };
  103. const char *__attribute_const__ ib_wc_status_msg(enum ib_wc_status status)
  104. {
  105. size_t index = status;
  106. return (index < ARRAY_SIZE(wc_statuses) && wc_statuses[index]) ?
  107. wc_statuses[index] : "unrecognized status";
  108. }
  109. EXPORT_SYMBOL(ib_wc_status_msg);
  110. __attribute_const__ int ib_rate_to_mult(enum ib_rate rate)
  111. {
  112. switch (rate) {
  113. case IB_RATE_2_5_GBPS: return 1;
  114. case IB_RATE_5_GBPS: return 2;
  115. case IB_RATE_10_GBPS: return 4;
  116. case IB_RATE_20_GBPS: return 8;
  117. case IB_RATE_30_GBPS: return 12;
  118. case IB_RATE_40_GBPS: return 16;
  119. case IB_RATE_60_GBPS: return 24;
  120. case IB_RATE_80_GBPS: return 32;
  121. case IB_RATE_120_GBPS: return 48;
  122. default: return -1;
  123. }
  124. }
  125. EXPORT_SYMBOL(ib_rate_to_mult);
  126. __attribute_const__ enum ib_rate mult_to_ib_rate(int mult)
  127. {
  128. switch (mult) {
  129. case 1: return IB_RATE_2_5_GBPS;
  130. case 2: return IB_RATE_5_GBPS;
  131. case 4: return IB_RATE_10_GBPS;
  132. case 8: return IB_RATE_20_GBPS;
  133. case 12: return IB_RATE_30_GBPS;
  134. case 16: return IB_RATE_40_GBPS;
  135. case 24: return IB_RATE_60_GBPS;
  136. case 32: return IB_RATE_80_GBPS;
  137. case 48: return IB_RATE_120_GBPS;
  138. default: return IB_RATE_PORT_CURRENT;
  139. }
  140. }
  141. EXPORT_SYMBOL(mult_to_ib_rate);
  142. __attribute_const__ int ib_rate_to_mbps(enum ib_rate rate)
  143. {
  144. switch (rate) {
  145. case IB_RATE_2_5_GBPS: return 2500;
  146. case IB_RATE_5_GBPS: return 5000;
  147. case IB_RATE_10_GBPS: return 10000;
  148. case IB_RATE_20_GBPS: return 20000;
  149. case IB_RATE_30_GBPS: return 30000;
  150. case IB_RATE_40_GBPS: return 40000;
  151. case IB_RATE_60_GBPS: return 60000;
  152. case IB_RATE_80_GBPS: return 80000;
  153. case IB_RATE_120_GBPS: return 120000;
  154. case IB_RATE_14_GBPS: return 14062;
  155. case IB_RATE_56_GBPS: return 56250;
  156. case IB_RATE_112_GBPS: return 112500;
  157. case IB_RATE_168_GBPS: return 168750;
  158. case IB_RATE_25_GBPS: return 25781;
  159. case IB_RATE_100_GBPS: return 103125;
  160. case IB_RATE_200_GBPS: return 206250;
  161. case IB_RATE_300_GBPS: return 309375;
  162. default: return -1;
  163. }
  164. }
  165. EXPORT_SYMBOL(ib_rate_to_mbps);
  166. __attribute_const__ enum rdma_transport_type
  167. rdma_node_get_transport(enum rdma_node_type node_type)
  168. {
  169. switch (node_type) {
  170. case RDMA_NODE_IB_CA:
  171. case RDMA_NODE_IB_SWITCH:
  172. case RDMA_NODE_IB_ROUTER:
  173. return RDMA_TRANSPORT_IB;
  174. case RDMA_NODE_RNIC:
  175. return RDMA_TRANSPORT_IWARP;
  176. case RDMA_NODE_USNIC:
  177. return RDMA_TRANSPORT_USNIC;
  178. case RDMA_NODE_USNIC_UDP:
  179. return RDMA_TRANSPORT_USNIC_UDP;
  180. default:
  181. BUG();
  182. return 0;
  183. }
  184. }
  185. EXPORT_SYMBOL(rdma_node_get_transport);
  186. enum rdma_link_layer rdma_port_get_link_layer(struct ib_device *device, u8 port_num)
  187. {
  188. if (device->get_link_layer)
  189. return device->get_link_layer(device, port_num);
  190. switch (rdma_node_get_transport(device->node_type)) {
  191. case RDMA_TRANSPORT_IB:
  192. return IB_LINK_LAYER_INFINIBAND;
  193. case RDMA_TRANSPORT_IWARP:
  194. case RDMA_TRANSPORT_USNIC:
  195. case RDMA_TRANSPORT_USNIC_UDP:
  196. return IB_LINK_LAYER_ETHERNET;
  197. default:
  198. return IB_LINK_LAYER_UNSPECIFIED;
  199. }
  200. }
  201. EXPORT_SYMBOL(rdma_port_get_link_layer);
  202. /* Protection domains */
  203. /**
  204. * ib_alloc_pd - Allocates an unused protection domain.
  205. * @device: The device on which to allocate the protection domain.
  206. *
  207. * A protection domain object provides an association between QPs, shared
  208. * receive queues, address handles, memory regions, and memory windows.
  209. *
  210. * Every PD has a local_dma_lkey which can be used as the lkey value for local
  211. * memory operations.
  212. */
  213. struct ib_pd *ib_alloc_pd(struct ib_device *device)
  214. {
  215. struct ib_pd *pd;
  216. pd = device->alloc_pd(device, NULL, NULL);
  217. if (IS_ERR(pd))
  218. return pd;
  219. pd->device = device;
  220. pd->uobject = NULL;
  221. pd->local_mr = NULL;
  222. atomic_set(&pd->usecnt, 0);
  223. if (device->attrs.device_cap_flags & IB_DEVICE_LOCAL_DMA_LKEY)
  224. pd->local_dma_lkey = device->local_dma_lkey;
  225. else {
  226. struct ib_mr *mr;
  227. mr = ib_get_dma_mr(pd, IB_ACCESS_LOCAL_WRITE);
  228. if (IS_ERR(mr)) {
  229. ib_dealloc_pd(pd);
  230. return (struct ib_pd *)mr;
  231. }
  232. pd->local_mr = mr;
  233. pd->local_dma_lkey = pd->local_mr->lkey;
  234. }
  235. return pd;
  236. }
  237. EXPORT_SYMBOL(ib_alloc_pd);
  238. /**
  239. * ib_dealloc_pd - Deallocates a protection domain.
  240. * @pd: The protection domain to deallocate.
  241. *
  242. * It is an error to call this function while any resources in the pd still
  243. * exist. The caller is responsible to synchronously destroy them and
  244. * guarantee no new allocations will happen.
  245. */
  246. void ib_dealloc_pd(struct ib_pd *pd)
  247. {
  248. int ret;
  249. if (pd->local_mr) {
  250. ret = ib_dereg_mr(pd->local_mr);
  251. WARN_ON(ret);
  252. pd->local_mr = NULL;
  253. }
  254. /* uverbs manipulates usecnt with proper locking, while the kabi
  255. requires the caller to guarantee we can't race here. */
  256. WARN_ON(atomic_read(&pd->usecnt));
  257. /* Making delalloc_pd a void return is a WIP, no driver should return
  258. an error here. */
  259. ret = pd->device->dealloc_pd(pd);
  260. WARN_ONCE(ret, "Infiniband HW driver failed dealloc_pd");
  261. }
  262. EXPORT_SYMBOL(ib_dealloc_pd);
  263. /* Address handles */
  264. struct ib_ah *ib_create_ah(struct ib_pd *pd, struct ib_ah_attr *ah_attr)
  265. {
  266. struct ib_ah *ah;
  267. ah = pd->device->create_ah(pd, ah_attr);
  268. if (!IS_ERR(ah)) {
  269. ah->device = pd->device;
  270. ah->pd = pd;
  271. ah->uobject = NULL;
  272. atomic_inc(&pd->usecnt);
  273. }
  274. return ah;
  275. }
  276. EXPORT_SYMBOL(ib_create_ah);
  277. static int ib_get_header_version(const union rdma_network_hdr *hdr)
  278. {
  279. const struct iphdr *ip4h = (struct iphdr *)&hdr->roce4grh;
  280. struct iphdr ip4h_checked;
  281. const struct ipv6hdr *ip6h = (struct ipv6hdr *)&hdr->ibgrh;
  282. /* If it's IPv6, the version must be 6, otherwise, the first
  283. * 20 bytes (before the IPv4 header) are garbled.
  284. */
  285. if (ip6h->version != 6)
  286. return (ip4h->version == 4) ? 4 : 0;
  287. /* version may be 6 or 4 because the first 20 bytes could be garbled */
  288. /* RoCE v2 requires no options, thus header length
  289. * must be 5 words
  290. */
  291. if (ip4h->ihl != 5)
  292. return 6;
  293. /* Verify checksum.
  294. * We can't write on scattered buffers so we need to copy to
  295. * temp buffer.
  296. */
  297. memcpy(&ip4h_checked, ip4h, sizeof(ip4h_checked));
  298. ip4h_checked.check = 0;
  299. ip4h_checked.check = ip_fast_csum((u8 *)&ip4h_checked, 5);
  300. /* if IPv4 header checksum is OK, believe it */
  301. if (ip4h->check == ip4h_checked.check)
  302. return 4;
  303. return 6;
  304. }
  305. static enum rdma_network_type ib_get_net_type_by_grh(struct ib_device *device,
  306. u8 port_num,
  307. const struct ib_grh *grh)
  308. {
  309. int grh_version;
  310. if (rdma_protocol_ib(device, port_num))
  311. return RDMA_NETWORK_IB;
  312. grh_version = ib_get_header_version((union rdma_network_hdr *)grh);
  313. if (grh_version == 4)
  314. return RDMA_NETWORK_IPV4;
  315. if (grh->next_hdr == IPPROTO_UDP)
  316. return RDMA_NETWORK_IPV6;
  317. return RDMA_NETWORK_ROCE_V1;
  318. }
  319. struct find_gid_index_context {
  320. u16 vlan_id;
  321. enum ib_gid_type gid_type;
  322. };
  323. static bool find_gid_index(const union ib_gid *gid,
  324. const struct ib_gid_attr *gid_attr,
  325. void *context)
  326. {
  327. struct find_gid_index_context *ctx =
  328. (struct find_gid_index_context *)context;
  329. if (ctx->gid_type != gid_attr->gid_type)
  330. return false;
  331. if ((!!(ctx->vlan_id != 0xffff) == !is_vlan_dev(gid_attr->ndev)) ||
  332. (is_vlan_dev(gid_attr->ndev) &&
  333. vlan_dev_vlan_id(gid_attr->ndev) != ctx->vlan_id))
  334. return false;
  335. return true;
  336. }
  337. static int get_sgid_index_from_eth(struct ib_device *device, u8 port_num,
  338. u16 vlan_id, const union ib_gid *sgid,
  339. enum ib_gid_type gid_type,
  340. u16 *gid_index)
  341. {
  342. struct find_gid_index_context context = {.vlan_id = vlan_id,
  343. .gid_type = gid_type};
  344. return ib_find_gid_by_filter(device, sgid, port_num, find_gid_index,
  345. &context, gid_index);
  346. }
  347. static int get_gids_from_rdma_hdr(union rdma_network_hdr *hdr,
  348. enum rdma_network_type net_type,
  349. union ib_gid *sgid, union ib_gid *dgid)
  350. {
  351. struct sockaddr_in src_in;
  352. struct sockaddr_in dst_in;
  353. __be32 src_saddr, dst_saddr;
  354. if (!sgid || !dgid)
  355. return -EINVAL;
  356. if (net_type == RDMA_NETWORK_IPV4) {
  357. memcpy(&src_in.sin_addr.s_addr,
  358. &hdr->roce4grh.saddr, 4);
  359. memcpy(&dst_in.sin_addr.s_addr,
  360. &hdr->roce4grh.daddr, 4);
  361. src_saddr = src_in.sin_addr.s_addr;
  362. dst_saddr = dst_in.sin_addr.s_addr;
  363. ipv6_addr_set_v4mapped(src_saddr,
  364. (struct in6_addr *)sgid);
  365. ipv6_addr_set_v4mapped(dst_saddr,
  366. (struct in6_addr *)dgid);
  367. return 0;
  368. } else if (net_type == RDMA_NETWORK_IPV6 ||
  369. net_type == RDMA_NETWORK_IB) {
  370. *dgid = hdr->ibgrh.dgid;
  371. *sgid = hdr->ibgrh.sgid;
  372. return 0;
  373. } else {
  374. return -EINVAL;
  375. }
  376. }
  377. int ib_init_ah_from_wc(struct ib_device *device, u8 port_num,
  378. const struct ib_wc *wc, const struct ib_grh *grh,
  379. struct ib_ah_attr *ah_attr)
  380. {
  381. u32 flow_class;
  382. u16 gid_index;
  383. int ret;
  384. enum rdma_network_type net_type = RDMA_NETWORK_IB;
  385. enum ib_gid_type gid_type = IB_GID_TYPE_IB;
  386. int hoplimit = 0xff;
  387. union ib_gid dgid;
  388. union ib_gid sgid;
  389. memset(ah_attr, 0, sizeof *ah_attr);
  390. if (rdma_cap_eth_ah(device, port_num)) {
  391. if (wc->wc_flags & IB_WC_WITH_NETWORK_HDR_TYPE)
  392. net_type = wc->network_hdr_type;
  393. else
  394. net_type = ib_get_net_type_by_grh(device, port_num, grh);
  395. gid_type = ib_network_to_gid_type(net_type);
  396. }
  397. ret = get_gids_from_rdma_hdr((union rdma_network_hdr *)grh, net_type,
  398. &sgid, &dgid);
  399. if (ret)
  400. return ret;
  401. if (rdma_protocol_roce(device, port_num)) {
  402. int if_index = 0;
  403. u16 vlan_id = wc->wc_flags & IB_WC_WITH_VLAN ?
  404. wc->vlan_id : 0xffff;
  405. struct net_device *idev;
  406. struct net_device *resolved_dev;
  407. if (!(wc->wc_flags & IB_WC_GRH))
  408. return -EPROTOTYPE;
  409. if (!device->get_netdev)
  410. return -EOPNOTSUPP;
  411. idev = device->get_netdev(device, port_num);
  412. if (!idev)
  413. return -ENODEV;
  414. ret = rdma_addr_find_l2_eth_by_grh(&dgid, &sgid,
  415. ah_attr->dmac,
  416. wc->wc_flags & IB_WC_WITH_VLAN ?
  417. NULL : &vlan_id,
  418. &if_index, &hoplimit);
  419. if (ret) {
  420. dev_put(idev);
  421. return ret;
  422. }
  423. resolved_dev = dev_get_by_index(&init_net, if_index);
  424. if (resolved_dev->flags & IFF_LOOPBACK) {
  425. dev_put(resolved_dev);
  426. resolved_dev = idev;
  427. dev_hold(resolved_dev);
  428. }
  429. rcu_read_lock();
  430. if (resolved_dev != idev && !rdma_is_upper_dev_rcu(idev,
  431. resolved_dev))
  432. ret = -EHOSTUNREACH;
  433. rcu_read_unlock();
  434. dev_put(idev);
  435. dev_put(resolved_dev);
  436. if (ret)
  437. return ret;
  438. ret = get_sgid_index_from_eth(device, port_num, vlan_id,
  439. &dgid, gid_type, &gid_index);
  440. if (ret)
  441. return ret;
  442. }
  443. ah_attr->dlid = wc->slid;
  444. ah_attr->sl = wc->sl;
  445. ah_attr->src_path_bits = wc->dlid_path_bits;
  446. ah_attr->port_num = port_num;
  447. if (wc->wc_flags & IB_WC_GRH) {
  448. ah_attr->ah_flags = IB_AH_GRH;
  449. ah_attr->grh.dgid = sgid;
  450. if (!rdma_cap_eth_ah(device, port_num)) {
  451. if (dgid.global.interface_id != cpu_to_be64(IB_SA_WELL_KNOWN_GUID)) {
  452. ret = ib_find_cached_gid_by_port(device, &dgid,
  453. IB_GID_TYPE_IB,
  454. port_num, NULL,
  455. &gid_index);
  456. if (ret)
  457. return ret;
  458. } else {
  459. gid_index = 0;
  460. }
  461. }
  462. ah_attr->grh.sgid_index = (u8) gid_index;
  463. flow_class = be32_to_cpu(grh->version_tclass_flow);
  464. ah_attr->grh.flow_label = flow_class & 0xFFFFF;
  465. ah_attr->grh.hop_limit = hoplimit;
  466. ah_attr->grh.traffic_class = (flow_class >> 20) & 0xFF;
  467. }
  468. return 0;
  469. }
  470. EXPORT_SYMBOL(ib_init_ah_from_wc);
  471. struct ib_ah *ib_create_ah_from_wc(struct ib_pd *pd, const struct ib_wc *wc,
  472. const struct ib_grh *grh, u8 port_num)
  473. {
  474. struct ib_ah_attr ah_attr;
  475. int ret;
  476. ret = ib_init_ah_from_wc(pd->device, port_num, wc, grh, &ah_attr);
  477. if (ret)
  478. return ERR_PTR(ret);
  479. return ib_create_ah(pd, &ah_attr);
  480. }
  481. EXPORT_SYMBOL(ib_create_ah_from_wc);
  482. int ib_modify_ah(struct ib_ah *ah, struct ib_ah_attr *ah_attr)
  483. {
  484. return ah->device->modify_ah ?
  485. ah->device->modify_ah(ah, ah_attr) :
  486. -ENOSYS;
  487. }
  488. EXPORT_SYMBOL(ib_modify_ah);
  489. int ib_query_ah(struct ib_ah *ah, struct ib_ah_attr *ah_attr)
  490. {
  491. return ah->device->query_ah ?
  492. ah->device->query_ah(ah, ah_attr) :
  493. -ENOSYS;
  494. }
  495. EXPORT_SYMBOL(ib_query_ah);
  496. int ib_destroy_ah(struct ib_ah *ah)
  497. {
  498. struct ib_pd *pd;
  499. int ret;
  500. pd = ah->pd;
  501. ret = ah->device->destroy_ah(ah);
  502. if (!ret)
  503. atomic_dec(&pd->usecnt);
  504. return ret;
  505. }
  506. EXPORT_SYMBOL(ib_destroy_ah);
  507. /* Shared receive queues */
  508. struct ib_srq *ib_create_srq(struct ib_pd *pd,
  509. struct ib_srq_init_attr *srq_init_attr)
  510. {
  511. struct ib_srq *srq;
  512. if (!pd->device->create_srq)
  513. return ERR_PTR(-ENOSYS);
  514. srq = pd->device->create_srq(pd, srq_init_attr, NULL);
  515. if (!IS_ERR(srq)) {
  516. srq->device = pd->device;
  517. srq->pd = pd;
  518. srq->uobject = NULL;
  519. srq->event_handler = srq_init_attr->event_handler;
  520. srq->srq_context = srq_init_attr->srq_context;
  521. srq->srq_type = srq_init_attr->srq_type;
  522. if (srq->srq_type == IB_SRQT_XRC) {
  523. srq->ext.xrc.xrcd = srq_init_attr->ext.xrc.xrcd;
  524. srq->ext.xrc.cq = srq_init_attr->ext.xrc.cq;
  525. atomic_inc(&srq->ext.xrc.xrcd->usecnt);
  526. atomic_inc(&srq->ext.xrc.cq->usecnt);
  527. }
  528. atomic_inc(&pd->usecnt);
  529. atomic_set(&srq->usecnt, 0);
  530. }
  531. return srq;
  532. }
  533. EXPORT_SYMBOL(ib_create_srq);
  534. int ib_modify_srq(struct ib_srq *srq,
  535. struct ib_srq_attr *srq_attr,
  536. enum ib_srq_attr_mask srq_attr_mask)
  537. {
  538. return srq->device->modify_srq ?
  539. srq->device->modify_srq(srq, srq_attr, srq_attr_mask, NULL) :
  540. -ENOSYS;
  541. }
  542. EXPORT_SYMBOL(ib_modify_srq);
  543. int ib_query_srq(struct ib_srq *srq,
  544. struct ib_srq_attr *srq_attr)
  545. {
  546. return srq->device->query_srq ?
  547. srq->device->query_srq(srq, srq_attr) : -ENOSYS;
  548. }
  549. EXPORT_SYMBOL(ib_query_srq);
  550. int ib_destroy_srq(struct ib_srq *srq)
  551. {
  552. struct ib_pd *pd;
  553. enum ib_srq_type srq_type;
  554. struct ib_xrcd *uninitialized_var(xrcd);
  555. struct ib_cq *uninitialized_var(cq);
  556. int ret;
  557. if (atomic_read(&srq->usecnt))
  558. return -EBUSY;
  559. pd = srq->pd;
  560. srq_type = srq->srq_type;
  561. if (srq_type == IB_SRQT_XRC) {
  562. xrcd = srq->ext.xrc.xrcd;
  563. cq = srq->ext.xrc.cq;
  564. }
  565. ret = srq->device->destroy_srq(srq);
  566. if (!ret) {
  567. atomic_dec(&pd->usecnt);
  568. if (srq_type == IB_SRQT_XRC) {
  569. atomic_dec(&xrcd->usecnt);
  570. atomic_dec(&cq->usecnt);
  571. }
  572. }
  573. return ret;
  574. }
  575. EXPORT_SYMBOL(ib_destroy_srq);
  576. /* Queue pairs */
  577. static void __ib_shared_qp_event_handler(struct ib_event *event, void *context)
  578. {
  579. struct ib_qp *qp = context;
  580. unsigned long flags;
  581. spin_lock_irqsave(&qp->device->event_handler_lock, flags);
  582. list_for_each_entry(event->element.qp, &qp->open_list, open_list)
  583. if (event->element.qp->event_handler)
  584. event->element.qp->event_handler(event, event->element.qp->qp_context);
  585. spin_unlock_irqrestore(&qp->device->event_handler_lock, flags);
  586. }
  587. static void __ib_insert_xrcd_qp(struct ib_xrcd *xrcd, struct ib_qp *qp)
  588. {
  589. mutex_lock(&xrcd->tgt_qp_mutex);
  590. list_add(&qp->xrcd_list, &xrcd->tgt_qp_list);
  591. mutex_unlock(&xrcd->tgt_qp_mutex);
  592. }
  593. static struct ib_qp *__ib_open_qp(struct ib_qp *real_qp,
  594. void (*event_handler)(struct ib_event *, void *),
  595. void *qp_context)
  596. {
  597. struct ib_qp *qp;
  598. unsigned long flags;
  599. qp = kzalloc(sizeof *qp, GFP_KERNEL);
  600. if (!qp)
  601. return ERR_PTR(-ENOMEM);
  602. qp->real_qp = real_qp;
  603. atomic_inc(&real_qp->usecnt);
  604. qp->device = real_qp->device;
  605. qp->event_handler = event_handler;
  606. qp->qp_context = qp_context;
  607. qp->qp_num = real_qp->qp_num;
  608. qp->qp_type = real_qp->qp_type;
  609. spin_lock_irqsave(&real_qp->device->event_handler_lock, flags);
  610. list_add(&qp->open_list, &real_qp->open_list);
  611. spin_unlock_irqrestore(&real_qp->device->event_handler_lock, flags);
  612. return qp;
  613. }
  614. struct ib_qp *ib_open_qp(struct ib_xrcd *xrcd,
  615. struct ib_qp_open_attr *qp_open_attr)
  616. {
  617. struct ib_qp *qp, *real_qp;
  618. if (qp_open_attr->qp_type != IB_QPT_XRC_TGT)
  619. return ERR_PTR(-EINVAL);
  620. qp = ERR_PTR(-EINVAL);
  621. mutex_lock(&xrcd->tgt_qp_mutex);
  622. list_for_each_entry(real_qp, &xrcd->tgt_qp_list, xrcd_list) {
  623. if (real_qp->qp_num == qp_open_attr->qp_num) {
  624. qp = __ib_open_qp(real_qp, qp_open_attr->event_handler,
  625. qp_open_attr->qp_context);
  626. break;
  627. }
  628. }
  629. mutex_unlock(&xrcd->tgt_qp_mutex);
  630. return qp;
  631. }
  632. EXPORT_SYMBOL(ib_open_qp);
  633. static struct ib_qp *ib_create_xrc_qp(struct ib_qp *qp,
  634. struct ib_qp_init_attr *qp_init_attr)
  635. {
  636. struct ib_qp *real_qp = qp;
  637. qp->event_handler = __ib_shared_qp_event_handler;
  638. qp->qp_context = qp;
  639. qp->pd = NULL;
  640. qp->send_cq = qp->recv_cq = NULL;
  641. qp->srq = NULL;
  642. qp->xrcd = qp_init_attr->xrcd;
  643. atomic_inc(&qp_init_attr->xrcd->usecnt);
  644. INIT_LIST_HEAD(&qp->open_list);
  645. qp = __ib_open_qp(real_qp, qp_init_attr->event_handler,
  646. qp_init_attr->qp_context);
  647. if (!IS_ERR(qp))
  648. __ib_insert_xrcd_qp(qp_init_attr->xrcd, real_qp);
  649. else
  650. real_qp->device->destroy_qp(real_qp);
  651. return qp;
  652. }
  653. struct ib_qp *ib_create_qp(struct ib_pd *pd,
  654. struct ib_qp_init_attr *qp_init_attr)
  655. {
  656. struct ib_device *device = pd ? pd->device : qp_init_attr->xrcd->device;
  657. struct ib_qp *qp;
  658. int ret;
  659. if (qp_init_attr->rwq_ind_tbl &&
  660. (qp_init_attr->recv_cq ||
  661. qp_init_attr->srq || qp_init_attr->cap.max_recv_wr ||
  662. qp_init_attr->cap.max_recv_sge))
  663. return ERR_PTR(-EINVAL);
  664. /*
  665. * If the callers is using the RDMA API calculate the resources
  666. * needed for the RDMA READ/WRITE operations.
  667. *
  668. * Note that these callers need to pass in a port number.
  669. */
  670. if (qp_init_attr->cap.max_rdma_ctxs)
  671. rdma_rw_init_qp(device, qp_init_attr);
  672. qp = device->create_qp(pd, qp_init_attr, NULL);
  673. if (IS_ERR(qp))
  674. return qp;
  675. qp->device = device;
  676. qp->real_qp = qp;
  677. qp->uobject = NULL;
  678. qp->qp_type = qp_init_attr->qp_type;
  679. qp->rwq_ind_tbl = qp_init_attr->rwq_ind_tbl;
  680. atomic_set(&qp->usecnt, 0);
  681. qp->mrs_used = 0;
  682. spin_lock_init(&qp->mr_lock);
  683. INIT_LIST_HEAD(&qp->rdma_mrs);
  684. INIT_LIST_HEAD(&qp->sig_mrs);
  685. if (qp_init_attr->qp_type == IB_QPT_XRC_TGT)
  686. return ib_create_xrc_qp(qp, qp_init_attr);
  687. qp->event_handler = qp_init_attr->event_handler;
  688. qp->qp_context = qp_init_attr->qp_context;
  689. if (qp_init_attr->qp_type == IB_QPT_XRC_INI) {
  690. qp->recv_cq = NULL;
  691. qp->srq = NULL;
  692. } else {
  693. qp->recv_cq = qp_init_attr->recv_cq;
  694. if (qp_init_attr->recv_cq)
  695. atomic_inc(&qp_init_attr->recv_cq->usecnt);
  696. qp->srq = qp_init_attr->srq;
  697. if (qp->srq)
  698. atomic_inc(&qp_init_attr->srq->usecnt);
  699. }
  700. qp->pd = pd;
  701. qp->send_cq = qp_init_attr->send_cq;
  702. qp->xrcd = NULL;
  703. atomic_inc(&pd->usecnt);
  704. if (qp_init_attr->send_cq)
  705. atomic_inc(&qp_init_attr->send_cq->usecnt);
  706. if (qp_init_attr->rwq_ind_tbl)
  707. atomic_inc(&qp->rwq_ind_tbl->usecnt);
  708. if (qp_init_attr->cap.max_rdma_ctxs) {
  709. ret = rdma_rw_init_mrs(qp, qp_init_attr);
  710. if (ret) {
  711. pr_err("failed to init MR pool ret= %d\n", ret);
  712. ib_destroy_qp(qp);
  713. qp = ERR_PTR(ret);
  714. }
  715. }
  716. /*
  717. * Note: all hw drivers guarantee that max_send_sge is lower than
  718. * the device RDMA WRITE SGE limit but not all hw drivers ensure that
  719. * max_send_sge <= max_sge_rd.
  720. */
  721. qp->max_write_sge = qp_init_attr->cap.max_send_sge;
  722. qp->max_read_sge = min_t(u32, qp_init_attr->cap.max_send_sge,
  723. device->attrs.max_sge_rd);
  724. return qp;
  725. }
  726. EXPORT_SYMBOL(ib_create_qp);
  727. static const struct {
  728. int valid;
  729. enum ib_qp_attr_mask req_param[IB_QPT_MAX];
  730. enum ib_qp_attr_mask opt_param[IB_QPT_MAX];
  731. } qp_state_table[IB_QPS_ERR + 1][IB_QPS_ERR + 1] = {
  732. [IB_QPS_RESET] = {
  733. [IB_QPS_RESET] = { .valid = 1 },
  734. [IB_QPS_INIT] = {
  735. .valid = 1,
  736. .req_param = {
  737. [IB_QPT_UD] = (IB_QP_PKEY_INDEX |
  738. IB_QP_PORT |
  739. IB_QP_QKEY),
  740. [IB_QPT_RAW_PACKET] = IB_QP_PORT,
  741. [IB_QPT_UC] = (IB_QP_PKEY_INDEX |
  742. IB_QP_PORT |
  743. IB_QP_ACCESS_FLAGS),
  744. [IB_QPT_RC] = (IB_QP_PKEY_INDEX |
  745. IB_QP_PORT |
  746. IB_QP_ACCESS_FLAGS),
  747. [IB_QPT_XRC_INI] = (IB_QP_PKEY_INDEX |
  748. IB_QP_PORT |
  749. IB_QP_ACCESS_FLAGS),
  750. [IB_QPT_XRC_TGT] = (IB_QP_PKEY_INDEX |
  751. IB_QP_PORT |
  752. IB_QP_ACCESS_FLAGS),
  753. [IB_QPT_SMI] = (IB_QP_PKEY_INDEX |
  754. IB_QP_QKEY),
  755. [IB_QPT_GSI] = (IB_QP_PKEY_INDEX |
  756. IB_QP_QKEY),
  757. }
  758. },
  759. },
  760. [IB_QPS_INIT] = {
  761. [IB_QPS_RESET] = { .valid = 1 },
  762. [IB_QPS_ERR] = { .valid = 1 },
  763. [IB_QPS_INIT] = {
  764. .valid = 1,
  765. .opt_param = {
  766. [IB_QPT_UD] = (IB_QP_PKEY_INDEX |
  767. IB_QP_PORT |
  768. IB_QP_QKEY),
  769. [IB_QPT_UC] = (IB_QP_PKEY_INDEX |
  770. IB_QP_PORT |
  771. IB_QP_ACCESS_FLAGS),
  772. [IB_QPT_RC] = (IB_QP_PKEY_INDEX |
  773. IB_QP_PORT |
  774. IB_QP_ACCESS_FLAGS),
  775. [IB_QPT_XRC_INI] = (IB_QP_PKEY_INDEX |
  776. IB_QP_PORT |
  777. IB_QP_ACCESS_FLAGS),
  778. [IB_QPT_XRC_TGT] = (IB_QP_PKEY_INDEX |
  779. IB_QP_PORT |
  780. IB_QP_ACCESS_FLAGS),
  781. [IB_QPT_SMI] = (IB_QP_PKEY_INDEX |
  782. IB_QP_QKEY),
  783. [IB_QPT_GSI] = (IB_QP_PKEY_INDEX |
  784. IB_QP_QKEY),
  785. }
  786. },
  787. [IB_QPS_RTR] = {
  788. .valid = 1,
  789. .req_param = {
  790. [IB_QPT_UC] = (IB_QP_AV |
  791. IB_QP_PATH_MTU |
  792. IB_QP_DEST_QPN |
  793. IB_QP_RQ_PSN),
  794. [IB_QPT_RC] = (IB_QP_AV |
  795. IB_QP_PATH_MTU |
  796. IB_QP_DEST_QPN |
  797. IB_QP_RQ_PSN |
  798. IB_QP_MAX_DEST_RD_ATOMIC |
  799. IB_QP_MIN_RNR_TIMER),
  800. [IB_QPT_XRC_INI] = (IB_QP_AV |
  801. IB_QP_PATH_MTU |
  802. IB_QP_DEST_QPN |
  803. IB_QP_RQ_PSN),
  804. [IB_QPT_XRC_TGT] = (IB_QP_AV |
  805. IB_QP_PATH_MTU |
  806. IB_QP_DEST_QPN |
  807. IB_QP_RQ_PSN |
  808. IB_QP_MAX_DEST_RD_ATOMIC |
  809. IB_QP_MIN_RNR_TIMER),
  810. },
  811. .opt_param = {
  812. [IB_QPT_UD] = (IB_QP_PKEY_INDEX |
  813. IB_QP_QKEY),
  814. [IB_QPT_UC] = (IB_QP_ALT_PATH |
  815. IB_QP_ACCESS_FLAGS |
  816. IB_QP_PKEY_INDEX),
  817. [IB_QPT_RC] = (IB_QP_ALT_PATH |
  818. IB_QP_ACCESS_FLAGS |
  819. IB_QP_PKEY_INDEX),
  820. [IB_QPT_XRC_INI] = (IB_QP_ALT_PATH |
  821. IB_QP_ACCESS_FLAGS |
  822. IB_QP_PKEY_INDEX),
  823. [IB_QPT_XRC_TGT] = (IB_QP_ALT_PATH |
  824. IB_QP_ACCESS_FLAGS |
  825. IB_QP_PKEY_INDEX),
  826. [IB_QPT_SMI] = (IB_QP_PKEY_INDEX |
  827. IB_QP_QKEY),
  828. [IB_QPT_GSI] = (IB_QP_PKEY_INDEX |
  829. IB_QP_QKEY),
  830. },
  831. },
  832. },
  833. [IB_QPS_RTR] = {
  834. [IB_QPS_RESET] = { .valid = 1 },
  835. [IB_QPS_ERR] = { .valid = 1 },
  836. [IB_QPS_RTS] = {
  837. .valid = 1,
  838. .req_param = {
  839. [IB_QPT_UD] = IB_QP_SQ_PSN,
  840. [IB_QPT_UC] = IB_QP_SQ_PSN,
  841. [IB_QPT_RC] = (IB_QP_TIMEOUT |
  842. IB_QP_RETRY_CNT |
  843. IB_QP_RNR_RETRY |
  844. IB_QP_SQ_PSN |
  845. IB_QP_MAX_QP_RD_ATOMIC),
  846. [IB_QPT_XRC_INI] = (IB_QP_TIMEOUT |
  847. IB_QP_RETRY_CNT |
  848. IB_QP_RNR_RETRY |
  849. IB_QP_SQ_PSN |
  850. IB_QP_MAX_QP_RD_ATOMIC),
  851. [IB_QPT_XRC_TGT] = (IB_QP_TIMEOUT |
  852. IB_QP_SQ_PSN),
  853. [IB_QPT_SMI] = IB_QP_SQ_PSN,
  854. [IB_QPT_GSI] = IB_QP_SQ_PSN,
  855. },
  856. .opt_param = {
  857. [IB_QPT_UD] = (IB_QP_CUR_STATE |
  858. IB_QP_QKEY),
  859. [IB_QPT_UC] = (IB_QP_CUR_STATE |
  860. IB_QP_ALT_PATH |
  861. IB_QP_ACCESS_FLAGS |
  862. IB_QP_PATH_MIG_STATE),
  863. [IB_QPT_RC] = (IB_QP_CUR_STATE |
  864. IB_QP_ALT_PATH |
  865. IB_QP_ACCESS_FLAGS |
  866. IB_QP_MIN_RNR_TIMER |
  867. IB_QP_PATH_MIG_STATE),
  868. [IB_QPT_XRC_INI] = (IB_QP_CUR_STATE |
  869. IB_QP_ALT_PATH |
  870. IB_QP_ACCESS_FLAGS |
  871. IB_QP_PATH_MIG_STATE),
  872. [IB_QPT_XRC_TGT] = (IB_QP_CUR_STATE |
  873. IB_QP_ALT_PATH |
  874. IB_QP_ACCESS_FLAGS |
  875. IB_QP_MIN_RNR_TIMER |
  876. IB_QP_PATH_MIG_STATE),
  877. [IB_QPT_SMI] = (IB_QP_CUR_STATE |
  878. IB_QP_QKEY),
  879. [IB_QPT_GSI] = (IB_QP_CUR_STATE |
  880. IB_QP_QKEY),
  881. }
  882. }
  883. },
  884. [IB_QPS_RTS] = {
  885. [IB_QPS_RESET] = { .valid = 1 },
  886. [IB_QPS_ERR] = { .valid = 1 },
  887. [IB_QPS_RTS] = {
  888. .valid = 1,
  889. .opt_param = {
  890. [IB_QPT_UD] = (IB_QP_CUR_STATE |
  891. IB_QP_QKEY),
  892. [IB_QPT_UC] = (IB_QP_CUR_STATE |
  893. IB_QP_ACCESS_FLAGS |
  894. IB_QP_ALT_PATH |
  895. IB_QP_PATH_MIG_STATE),
  896. [IB_QPT_RC] = (IB_QP_CUR_STATE |
  897. IB_QP_ACCESS_FLAGS |
  898. IB_QP_ALT_PATH |
  899. IB_QP_PATH_MIG_STATE |
  900. IB_QP_MIN_RNR_TIMER),
  901. [IB_QPT_XRC_INI] = (IB_QP_CUR_STATE |
  902. IB_QP_ACCESS_FLAGS |
  903. IB_QP_ALT_PATH |
  904. IB_QP_PATH_MIG_STATE),
  905. [IB_QPT_XRC_TGT] = (IB_QP_CUR_STATE |
  906. IB_QP_ACCESS_FLAGS |
  907. IB_QP_ALT_PATH |
  908. IB_QP_PATH_MIG_STATE |
  909. IB_QP_MIN_RNR_TIMER),
  910. [IB_QPT_SMI] = (IB_QP_CUR_STATE |
  911. IB_QP_QKEY),
  912. [IB_QPT_GSI] = (IB_QP_CUR_STATE |
  913. IB_QP_QKEY),
  914. }
  915. },
  916. [IB_QPS_SQD] = {
  917. .valid = 1,
  918. .opt_param = {
  919. [IB_QPT_UD] = IB_QP_EN_SQD_ASYNC_NOTIFY,
  920. [IB_QPT_UC] = IB_QP_EN_SQD_ASYNC_NOTIFY,
  921. [IB_QPT_RC] = IB_QP_EN_SQD_ASYNC_NOTIFY,
  922. [IB_QPT_XRC_INI] = IB_QP_EN_SQD_ASYNC_NOTIFY,
  923. [IB_QPT_XRC_TGT] = IB_QP_EN_SQD_ASYNC_NOTIFY, /* ??? */
  924. [IB_QPT_SMI] = IB_QP_EN_SQD_ASYNC_NOTIFY,
  925. [IB_QPT_GSI] = IB_QP_EN_SQD_ASYNC_NOTIFY
  926. }
  927. },
  928. },
  929. [IB_QPS_SQD] = {
  930. [IB_QPS_RESET] = { .valid = 1 },
  931. [IB_QPS_ERR] = { .valid = 1 },
  932. [IB_QPS_RTS] = {
  933. .valid = 1,
  934. .opt_param = {
  935. [IB_QPT_UD] = (IB_QP_CUR_STATE |
  936. IB_QP_QKEY),
  937. [IB_QPT_UC] = (IB_QP_CUR_STATE |
  938. IB_QP_ALT_PATH |
  939. IB_QP_ACCESS_FLAGS |
  940. IB_QP_PATH_MIG_STATE),
  941. [IB_QPT_RC] = (IB_QP_CUR_STATE |
  942. IB_QP_ALT_PATH |
  943. IB_QP_ACCESS_FLAGS |
  944. IB_QP_MIN_RNR_TIMER |
  945. IB_QP_PATH_MIG_STATE),
  946. [IB_QPT_XRC_INI] = (IB_QP_CUR_STATE |
  947. IB_QP_ALT_PATH |
  948. IB_QP_ACCESS_FLAGS |
  949. IB_QP_PATH_MIG_STATE),
  950. [IB_QPT_XRC_TGT] = (IB_QP_CUR_STATE |
  951. IB_QP_ALT_PATH |
  952. IB_QP_ACCESS_FLAGS |
  953. IB_QP_MIN_RNR_TIMER |
  954. IB_QP_PATH_MIG_STATE),
  955. [IB_QPT_SMI] = (IB_QP_CUR_STATE |
  956. IB_QP_QKEY),
  957. [IB_QPT_GSI] = (IB_QP_CUR_STATE |
  958. IB_QP_QKEY),
  959. }
  960. },
  961. [IB_QPS_SQD] = {
  962. .valid = 1,
  963. .opt_param = {
  964. [IB_QPT_UD] = (IB_QP_PKEY_INDEX |
  965. IB_QP_QKEY),
  966. [IB_QPT_UC] = (IB_QP_AV |
  967. IB_QP_ALT_PATH |
  968. IB_QP_ACCESS_FLAGS |
  969. IB_QP_PKEY_INDEX |
  970. IB_QP_PATH_MIG_STATE),
  971. [IB_QPT_RC] = (IB_QP_PORT |
  972. IB_QP_AV |
  973. IB_QP_TIMEOUT |
  974. IB_QP_RETRY_CNT |
  975. IB_QP_RNR_RETRY |
  976. IB_QP_MAX_QP_RD_ATOMIC |
  977. IB_QP_MAX_DEST_RD_ATOMIC |
  978. IB_QP_ALT_PATH |
  979. IB_QP_ACCESS_FLAGS |
  980. IB_QP_PKEY_INDEX |
  981. IB_QP_MIN_RNR_TIMER |
  982. IB_QP_PATH_MIG_STATE),
  983. [IB_QPT_XRC_INI] = (IB_QP_PORT |
  984. IB_QP_AV |
  985. IB_QP_TIMEOUT |
  986. IB_QP_RETRY_CNT |
  987. IB_QP_RNR_RETRY |
  988. IB_QP_MAX_QP_RD_ATOMIC |
  989. IB_QP_ALT_PATH |
  990. IB_QP_ACCESS_FLAGS |
  991. IB_QP_PKEY_INDEX |
  992. IB_QP_PATH_MIG_STATE),
  993. [IB_QPT_XRC_TGT] = (IB_QP_PORT |
  994. IB_QP_AV |
  995. IB_QP_TIMEOUT |
  996. IB_QP_MAX_DEST_RD_ATOMIC |
  997. IB_QP_ALT_PATH |
  998. IB_QP_ACCESS_FLAGS |
  999. IB_QP_PKEY_INDEX |
  1000. IB_QP_MIN_RNR_TIMER |
  1001. IB_QP_PATH_MIG_STATE),
  1002. [IB_QPT_SMI] = (IB_QP_PKEY_INDEX |
  1003. IB_QP_QKEY),
  1004. [IB_QPT_GSI] = (IB_QP_PKEY_INDEX |
  1005. IB_QP_QKEY),
  1006. }
  1007. }
  1008. },
  1009. [IB_QPS_SQE] = {
  1010. [IB_QPS_RESET] = { .valid = 1 },
  1011. [IB_QPS_ERR] = { .valid = 1 },
  1012. [IB_QPS_RTS] = {
  1013. .valid = 1,
  1014. .opt_param = {
  1015. [IB_QPT_UD] = (IB_QP_CUR_STATE |
  1016. IB_QP_QKEY),
  1017. [IB_QPT_UC] = (IB_QP_CUR_STATE |
  1018. IB_QP_ACCESS_FLAGS),
  1019. [IB_QPT_SMI] = (IB_QP_CUR_STATE |
  1020. IB_QP_QKEY),
  1021. [IB_QPT_GSI] = (IB_QP_CUR_STATE |
  1022. IB_QP_QKEY),
  1023. }
  1024. }
  1025. },
  1026. [IB_QPS_ERR] = {
  1027. [IB_QPS_RESET] = { .valid = 1 },
  1028. [IB_QPS_ERR] = { .valid = 1 }
  1029. }
  1030. };
  1031. int ib_modify_qp_is_ok(enum ib_qp_state cur_state, enum ib_qp_state next_state,
  1032. enum ib_qp_type type, enum ib_qp_attr_mask mask,
  1033. enum rdma_link_layer ll)
  1034. {
  1035. enum ib_qp_attr_mask req_param, opt_param;
  1036. if (cur_state < 0 || cur_state > IB_QPS_ERR ||
  1037. next_state < 0 || next_state > IB_QPS_ERR)
  1038. return 0;
  1039. if (mask & IB_QP_CUR_STATE &&
  1040. cur_state != IB_QPS_RTR && cur_state != IB_QPS_RTS &&
  1041. cur_state != IB_QPS_SQD && cur_state != IB_QPS_SQE)
  1042. return 0;
  1043. if (!qp_state_table[cur_state][next_state].valid)
  1044. return 0;
  1045. req_param = qp_state_table[cur_state][next_state].req_param[type];
  1046. opt_param = qp_state_table[cur_state][next_state].opt_param[type];
  1047. if ((mask & req_param) != req_param)
  1048. return 0;
  1049. if (mask & ~(req_param | opt_param | IB_QP_STATE))
  1050. return 0;
  1051. return 1;
  1052. }
  1053. EXPORT_SYMBOL(ib_modify_qp_is_ok);
  1054. int ib_resolve_eth_dmac(struct ib_qp *qp,
  1055. struct ib_qp_attr *qp_attr, int *qp_attr_mask)
  1056. {
  1057. int ret = 0;
  1058. if (*qp_attr_mask & IB_QP_AV) {
  1059. if (qp_attr->ah_attr.port_num < rdma_start_port(qp->device) ||
  1060. qp_attr->ah_attr.port_num > rdma_end_port(qp->device))
  1061. return -EINVAL;
  1062. if (!rdma_cap_eth_ah(qp->device, qp_attr->ah_attr.port_num))
  1063. return 0;
  1064. if (rdma_link_local_addr((struct in6_addr *)qp_attr->ah_attr.grh.dgid.raw)) {
  1065. rdma_get_ll_mac((struct in6_addr *)qp_attr->ah_attr.grh.dgid.raw,
  1066. qp_attr->ah_attr.dmac);
  1067. } else {
  1068. union ib_gid sgid;
  1069. struct ib_gid_attr sgid_attr;
  1070. int ifindex;
  1071. int hop_limit;
  1072. ret = ib_query_gid(qp->device,
  1073. qp_attr->ah_attr.port_num,
  1074. qp_attr->ah_attr.grh.sgid_index,
  1075. &sgid, &sgid_attr);
  1076. if (ret || !sgid_attr.ndev) {
  1077. if (!ret)
  1078. ret = -ENXIO;
  1079. goto out;
  1080. }
  1081. ifindex = sgid_attr.ndev->ifindex;
  1082. ret = rdma_addr_find_l2_eth_by_grh(&sgid,
  1083. &qp_attr->ah_attr.grh.dgid,
  1084. qp_attr->ah_attr.dmac,
  1085. NULL, &ifindex, &hop_limit);
  1086. dev_put(sgid_attr.ndev);
  1087. qp_attr->ah_attr.grh.hop_limit = hop_limit;
  1088. }
  1089. }
  1090. out:
  1091. return ret;
  1092. }
  1093. EXPORT_SYMBOL(ib_resolve_eth_dmac);
  1094. int ib_modify_qp(struct ib_qp *qp,
  1095. struct ib_qp_attr *qp_attr,
  1096. int qp_attr_mask)
  1097. {
  1098. int ret;
  1099. ret = ib_resolve_eth_dmac(qp, qp_attr, &qp_attr_mask);
  1100. if (ret)
  1101. return ret;
  1102. return qp->device->modify_qp(qp->real_qp, qp_attr, qp_attr_mask, NULL);
  1103. }
  1104. EXPORT_SYMBOL(ib_modify_qp);
  1105. int ib_query_qp(struct ib_qp *qp,
  1106. struct ib_qp_attr *qp_attr,
  1107. int qp_attr_mask,
  1108. struct ib_qp_init_attr *qp_init_attr)
  1109. {
  1110. return qp->device->query_qp ?
  1111. qp->device->query_qp(qp->real_qp, qp_attr, qp_attr_mask, qp_init_attr) :
  1112. -ENOSYS;
  1113. }
  1114. EXPORT_SYMBOL(ib_query_qp);
  1115. int ib_close_qp(struct ib_qp *qp)
  1116. {
  1117. struct ib_qp *real_qp;
  1118. unsigned long flags;
  1119. real_qp = qp->real_qp;
  1120. if (real_qp == qp)
  1121. return -EINVAL;
  1122. spin_lock_irqsave(&real_qp->device->event_handler_lock, flags);
  1123. list_del(&qp->open_list);
  1124. spin_unlock_irqrestore(&real_qp->device->event_handler_lock, flags);
  1125. atomic_dec(&real_qp->usecnt);
  1126. kfree(qp);
  1127. return 0;
  1128. }
  1129. EXPORT_SYMBOL(ib_close_qp);
  1130. static int __ib_destroy_shared_qp(struct ib_qp *qp)
  1131. {
  1132. struct ib_xrcd *xrcd;
  1133. struct ib_qp *real_qp;
  1134. int ret;
  1135. real_qp = qp->real_qp;
  1136. xrcd = real_qp->xrcd;
  1137. mutex_lock(&xrcd->tgt_qp_mutex);
  1138. ib_close_qp(qp);
  1139. if (atomic_read(&real_qp->usecnt) == 0)
  1140. list_del(&real_qp->xrcd_list);
  1141. else
  1142. real_qp = NULL;
  1143. mutex_unlock(&xrcd->tgt_qp_mutex);
  1144. if (real_qp) {
  1145. ret = ib_destroy_qp(real_qp);
  1146. if (!ret)
  1147. atomic_dec(&xrcd->usecnt);
  1148. else
  1149. __ib_insert_xrcd_qp(xrcd, real_qp);
  1150. }
  1151. return 0;
  1152. }
  1153. int ib_destroy_qp(struct ib_qp *qp)
  1154. {
  1155. struct ib_pd *pd;
  1156. struct ib_cq *scq, *rcq;
  1157. struct ib_srq *srq;
  1158. struct ib_rwq_ind_table *ind_tbl;
  1159. int ret;
  1160. WARN_ON_ONCE(qp->mrs_used > 0);
  1161. if (atomic_read(&qp->usecnt))
  1162. return -EBUSY;
  1163. if (qp->real_qp != qp)
  1164. return __ib_destroy_shared_qp(qp);
  1165. pd = qp->pd;
  1166. scq = qp->send_cq;
  1167. rcq = qp->recv_cq;
  1168. srq = qp->srq;
  1169. ind_tbl = qp->rwq_ind_tbl;
  1170. if (!qp->uobject)
  1171. rdma_rw_cleanup_mrs(qp);
  1172. ret = qp->device->destroy_qp(qp);
  1173. if (!ret) {
  1174. if (pd)
  1175. atomic_dec(&pd->usecnt);
  1176. if (scq)
  1177. atomic_dec(&scq->usecnt);
  1178. if (rcq)
  1179. atomic_dec(&rcq->usecnt);
  1180. if (srq)
  1181. atomic_dec(&srq->usecnt);
  1182. if (ind_tbl)
  1183. atomic_dec(&ind_tbl->usecnt);
  1184. }
  1185. return ret;
  1186. }
  1187. EXPORT_SYMBOL(ib_destroy_qp);
  1188. /* Completion queues */
  1189. struct ib_cq *ib_create_cq(struct ib_device *device,
  1190. ib_comp_handler comp_handler,
  1191. void (*event_handler)(struct ib_event *, void *),
  1192. void *cq_context,
  1193. const struct ib_cq_init_attr *cq_attr)
  1194. {
  1195. struct ib_cq *cq;
  1196. cq = device->create_cq(device, cq_attr, NULL, NULL);
  1197. if (!IS_ERR(cq)) {
  1198. cq->device = device;
  1199. cq->uobject = NULL;
  1200. cq->comp_handler = comp_handler;
  1201. cq->event_handler = event_handler;
  1202. cq->cq_context = cq_context;
  1203. atomic_set(&cq->usecnt, 0);
  1204. }
  1205. return cq;
  1206. }
  1207. EXPORT_SYMBOL(ib_create_cq);
  1208. int ib_modify_cq(struct ib_cq *cq, u16 cq_count, u16 cq_period)
  1209. {
  1210. return cq->device->modify_cq ?
  1211. cq->device->modify_cq(cq, cq_count, cq_period) : -ENOSYS;
  1212. }
  1213. EXPORT_SYMBOL(ib_modify_cq);
  1214. int ib_destroy_cq(struct ib_cq *cq)
  1215. {
  1216. if (atomic_read(&cq->usecnt))
  1217. return -EBUSY;
  1218. return cq->device->destroy_cq(cq);
  1219. }
  1220. EXPORT_SYMBOL(ib_destroy_cq);
  1221. int ib_resize_cq(struct ib_cq *cq, int cqe)
  1222. {
  1223. return cq->device->resize_cq ?
  1224. cq->device->resize_cq(cq, cqe, NULL) : -ENOSYS;
  1225. }
  1226. EXPORT_SYMBOL(ib_resize_cq);
  1227. /* Memory regions */
  1228. struct ib_mr *ib_get_dma_mr(struct ib_pd *pd, int mr_access_flags)
  1229. {
  1230. struct ib_mr *mr;
  1231. int err;
  1232. err = ib_check_mr_access(mr_access_flags);
  1233. if (err)
  1234. return ERR_PTR(err);
  1235. mr = pd->device->get_dma_mr(pd, mr_access_flags);
  1236. if (!IS_ERR(mr)) {
  1237. mr->device = pd->device;
  1238. mr->pd = pd;
  1239. mr->uobject = NULL;
  1240. atomic_inc(&pd->usecnt);
  1241. mr->need_inval = false;
  1242. }
  1243. return mr;
  1244. }
  1245. EXPORT_SYMBOL(ib_get_dma_mr);
  1246. int ib_dereg_mr(struct ib_mr *mr)
  1247. {
  1248. struct ib_pd *pd = mr->pd;
  1249. int ret;
  1250. ret = mr->device->dereg_mr(mr);
  1251. if (!ret)
  1252. atomic_dec(&pd->usecnt);
  1253. return ret;
  1254. }
  1255. EXPORT_SYMBOL(ib_dereg_mr);
  1256. /**
  1257. * ib_alloc_mr() - Allocates a memory region
  1258. * @pd: protection domain associated with the region
  1259. * @mr_type: memory region type
  1260. * @max_num_sg: maximum sg entries available for registration.
  1261. *
  1262. * Notes:
  1263. * Memory registeration page/sg lists must not exceed max_num_sg.
  1264. * For mr_type IB_MR_TYPE_MEM_REG, the total length cannot exceed
  1265. * max_num_sg * used_page_size.
  1266. *
  1267. */
  1268. struct ib_mr *ib_alloc_mr(struct ib_pd *pd,
  1269. enum ib_mr_type mr_type,
  1270. u32 max_num_sg)
  1271. {
  1272. struct ib_mr *mr;
  1273. if (!pd->device->alloc_mr)
  1274. return ERR_PTR(-ENOSYS);
  1275. mr = pd->device->alloc_mr(pd, mr_type, max_num_sg);
  1276. if (!IS_ERR(mr)) {
  1277. mr->device = pd->device;
  1278. mr->pd = pd;
  1279. mr->uobject = NULL;
  1280. atomic_inc(&pd->usecnt);
  1281. mr->need_inval = false;
  1282. }
  1283. return mr;
  1284. }
  1285. EXPORT_SYMBOL(ib_alloc_mr);
  1286. /* "Fast" memory regions */
  1287. struct ib_fmr *ib_alloc_fmr(struct ib_pd *pd,
  1288. int mr_access_flags,
  1289. struct ib_fmr_attr *fmr_attr)
  1290. {
  1291. struct ib_fmr *fmr;
  1292. if (!pd->device->alloc_fmr)
  1293. return ERR_PTR(-ENOSYS);
  1294. fmr = pd->device->alloc_fmr(pd, mr_access_flags, fmr_attr);
  1295. if (!IS_ERR(fmr)) {
  1296. fmr->device = pd->device;
  1297. fmr->pd = pd;
  1298. atomic_inc(&pd->usecnt);
  1299. }
  1300. return fmr;
  1301. }
  1302. EXPORT_SYMBOL(ib_alloc_fmr);
  1303. int ib_unmap_fmr(struct list_head *fmr_list)
  1304. {
  1305. struct ib_fmr *fmr;
  1306. if (list_empty(fmr_list))
  1307. return 0;
  1308. fmr = list_entry(fmr_list->next, struct ib_fmr, list);
  1309. return fmr->device->unmap_fmr(fmr_list);
  1310. }
  1311. EXPORT_SYMBOL(ib_unmap_fmr);
  1312. int ib_dealloc_fmr(struct ib_fmr *fmr)
  1313. {
  1314. struct ib_pd *pd;
  1315. int ret;
  1316. pd = fmr->pd;
  1317. ret = fmr->device->dealloc_fmr(fmr);
  1318. if (!ret)
  1319. atomic_dec(&pd->usecnt);
  1320. return ret;
  1321. }
  1322. EXPORT_SYMBOL(ib_dealloc_fmr);
  1323. /* Multicast groups */
  1324. int ib_attach_mcast(struct ib_qp *qp, union ib_gid *gid, u16 lid)
  1325. {
  1326. int ret;
  1327. if (!qp->device->attach_mcast)
  1328. return -ENOSYS;
  1329. if (gid->raw[0] != 0xff || qp->qp_type != IB_QPT_UD)
  1330. return -EINVAL;
  1331. ret = qp->device->attach_mcast(qp, gid, lid);
  1332. if (!ret)
  1333. atomic_inc(&qp->usecnt);
  1334. return ret;
  1335. }
  1336. EXPORT_SYMBOL(ib_attach_mcast);
  1337. int ib_detach_mcast(struct ib_qp *qp, union ib_gid *gid, u16 lid)
  1338. {
  1339. int ret;
  1340. if (!qp->device->detach_mcast)
  1341. return -ENOSYS;
  1342. if (gid->raw[0] != 0xff || qp->qp_type != IB_QPT_UD)
  1343. return -EINVAL;
  1344. ret = qp->device->detach_mcast(qp, gid, lid);
  1345. if (!ret)
  1346. atomic_dec(&qp->usecnt);
  1347. return ret;
  1348. }
  1349. EXPORT_SYMBOL(ib_detach_mcast);
  1350. struct ib_xrcd *ib_alloc_xrcd(struct ib_device *device)
  1351. {
  1352. struct ib_xrcd *xrcd;
  1353. if (!device->alloc_xrcd)
  1354. return ERR_PTR(-ENOSYS);
  1355. xrcd = device->alloc_xrcd(device, NULL, NULL);
  1356. if (!IS_ERR(xrcd)) {
  1357. xrcd->device = device;
  1358. xrcd->inode = NULL;
  1359. atomic_set(&xrcd->usecnt, 0);
  1360. mutex_init(&xrcd->tgt_qp_mutex);
  1361. INIT_LIST_HEAD(&xrcd->tgt_qp_list);
  1362. }
  1363. return xrcd;
  1364. }
  1365. EXPORT_SYMBOL(ib_alloc_xrcd);
  1366. int ib_dealloc_xrcd(struct ib_xrcd *xrcd)
  1367. {
  1368. struct ib_qp *qp;
  1369. int ret;
  1370. if (atomic_read(&xrcd->usecnt))
  1371. return -EBUSY;
  1372. while (!list_empty(&xrcd->tgt_qp_list)) {
  1373. qp = list_entry(xrcd->tgt_qp_list.next, struct ib_qp, xrcd_list);
  1374. ret = ib_destroy_qp(qp);
  1375. if (ret)
  1376. return ret;
  1377. }
  1378. return xrcd->device->dealloc_xrcd(xrcd);
  1379. }
  1380. EXPORT_SYMBOL(ib_dealloc_xrcd);
  1381. /**
  1382. * ib_create_wq - Creates a WQ associated with the specified protection
  1383. * domain.
  1384. * @pd: The protection domain associated with the WQ.
  1385. * @wq_init_attr: A list of initial attributes required to create the
  1386. * WQ. If WQ creation succeeds, then the attributes are updated to
  1387. * the actual capabilities of the created WQ.
  1388. *
  1389. * wq_init_attr->max_wr and wq_init_attr->max_sge determine
  1390. * the requested size of the WQ, and set to the actual values allocated
  1391. * on return.
  1392. * If ib_create_wq() succeeds, then max_wr and max_sge will always be
  1393. * at least as large as the requested values.
  1394. */
  1395. struct ib_wq *ib_create_wq(struct ib_pd *pd,
  1396. struct ib_wq_init_attr *wq_attr)
  1397. {
  1398. struct ib_wq *wq;
  1399. if (!pd->device->create_wq)
  1400. return ERR_PTR(-ENOSYS);
  1401. wq = pd->device->create_wq(pd, wq_attr, NULL);
  1402. if (!IS_ERR(wq)) {
  1403. wq->event_handler = wq_attr->event_handler;
  1404. wq->wq_context = wq_attr->wq_context;
  1405. wq->wq_type = wq_attr->wq_type;
  1406. wq->cq = wq_attr->cq;
  1407. wq->device = pd->device;
  1408. wq->pd = pd;
  1409. wq->uobject = NULL;
  1410. atomic_inc(&pd->usecnt);
  1411. atomic_inc(&wq_attr->cq->usecnt);
  1412. atomic_set(&wq->usecnt, 0);
  1413. }
  1414. return wq;
  1415. }
  1416. EXPORT_SYMBOL(ib_create_wq);
  1417. /**
  1418. * ib_destroy_wq - Destroys the specified WQ.
  1419. * @wq: The WQ to destroy.
  1420. */
  1421. int ib_destroy_wq(struct ib_wq *wq)
  1422. {
  1423. int err;
  1424. struct ib_cq *cq = wq->cq;
  1425. struct ib_pd *pd = wq->pd;
  1426. if (atomic_read(&wq->usecnt))
  1427. return -EBUSY;
  1428. err = wq->device->destroy_wq(wq);
  1429. if (!err) {
  1430. atomic_dec(&pd->usecnt);
  1431. atomic_dec(&cq->usecnt);
  1432. }
  1433. return err;
  1434. }
  1435. EXPORT_SYMBOL(ib_destroy_wq);
  1436. /**
  1437. * ib_modify_wq - Modifies the specified WQ.
  1438. * @wq: The WQ to modify.
  1439. * @wq_attr: On input, specifies the WQ attributes to modify.
  1440. * @wq_attr_mask: A bit-mask used to specify which attributes of the WQ
  1441. * are being modified.
  1442. * On output, the current values of selected WQ attributes are returned.
  1443. */
  1444. int ib_modify_wq(struct ib_wq *wq, struct ib_wq_attr *wq_attr,
  1445. u32 wq_attr_mask)
  1446. {
  1447. int err;
  1448. if (!wq->device->modify_wq)
  1449. return -ENOSYS;
  1450. err = wq->device->modify_wq(wq, wq_attr, wq_attr_mask, NULL);
  1451. return err;
  1452. }
  1453. EXPORT_SYMBOL(ib_modify_wq);
  1454. /*
  1455. * ib_create_rwq_ind_table - Creates a RQ Indirection Table.
  1456. * @device: The device on which to create the rwq indirection table.
  1457. * @ib_rwq_ind_table_init_attr: A list of initial attributes required to
  1458. * create the Indirection Table.
  1459. *
  1460. * Note: The life time of ib_rwq_ind_table_init_attr->ind_tbl is not less
  1461. * than the created ib_rwq_ind_table object and the caller is responsible
  1462. * for its memory allocation/free.
  1463. */
  1464. struct ib_rwq_ind_table *ib_create_rwq_ind_table(struct ib_device *device,
  1465. struct ib_rwq_ind_table_init_attr *init_attr)
  1466. {
  1467. struct ib_rwq_ind_table *rwq_ind_table;
  1468. int i;
  1469. u32 table_size;
  1470. if (!device->create_rwq_ind_table)
  1471. return ERR_PTR(-ENOSYS);
  1472. table_size = (1 << init_attr->log_ind_tbl_size);
  1473. rwq_ind_table = device->create_rwq_ind_table(device,
  1474. init_attr, NULL);
  1475. if (IS_ERR(rwq_ind_table))
  1476. return rwq_ind_table;
  1477. rwq_ind_table->ind_tbl = init_attr->ind_tbl;
  1478. rwq_ind_table->log_ind_tbl_size = init_attr->log_ind_tbl_size;
  1479. rwq_ind_table->device = device;
  1480. rwq_ind_table->uobject = NULL;
  1481. atomic_set(&rwq_ind_table->usecnt, 0);
  1482. for (i = 0; i < table_size; i++)
  1483. atomic_inc(&rwq_ind_table->ind_tbl[i]->usecnt);
  1484. return rwq_ind_table;
  1485. }
  1486. EXPORT_SYMBOL(ib_create_rwq_ind_table);
  1487. /*
  1488. * ib_destroy_rwq_ind_table - Destroys the specified Indirection Table.
  1489. * @wq_ind_table: The Indirection Table to destroy.
  1490. */
  1491. int ib_destroy_rwq_ind_table(struct ib_rwq_ind_table *rwq_ind_table)
  1492. {
  1493. int err, i;
  1494. u32 table_size = (1 << rwq_ind_table->log_ind_tbl_size);
  1495. struct ib_wq **ind_tbl = rwq_ind_table->ind_tbl;
  1496. if (atomic_read(&rwq_ind_table->usecnt))
  1497. return -EBUSY;
  1498. err = rwq_ind_table->device->destroy_rwq_ind_table(rwq_ind_table);
  1499. if (!err) {
  1500. for (i = 0; i < table_size; i++)
  1501. atomic_dec(&ind_tbl[i]->usecnt);
  1502. }
  1503. return err;
  1504. }
  1505. EXPORT_SYMBOL(ib_destroy_rwq_ind_table);
  1506. struct ib_flow *ib_create_flow(struct ib_qp *qp,
  1507. struct ib_flow_attr *flow_attr,
  1508. int domain)
  1509. {
  1510. struct ib_flow *flow_id;
  1511. if (!qp->device->create_flow)
  1512. return ERR_PTR(-ENOSYS);
  1513. flow_id = qp->device->create_flow(qp, flow_attr, domain);
  1514. if (!IS_ERR(flow_id))
  1515. atomic_inc(&qp->usecnt);
  1516. return flow_id;
  1517. }
  1518. EXPORT_SYMBOL(ib_create_flow);
  1519. int ib_destroy_flow(struct ib_flow *flow_id)
  1520. {
  1521. int err;
  1522. struct ib_qp *qp = flow_id->qp;
  1523. err = qp->device->destroy_flow(flow_id);
  1524. if (!err)
  1525. atomic_dec(&qp->usecnt);
  1526. return err;
  1527. }
  1528. EXPORT_SYMBOL(ib_destroy_flow);
  1529. int ib_check_mr_status(struct ib_mr *mr, u32 check_mask,
  1530. struct ib_mr_status *mr_status)
  1531. {
  1532. return mr->device->check_mr_status ?
  1533. mr->device->check_mr_status(mr, check_mask, mr_status) : -ENOSYS;
  1534. }
  1535. EXPORT_SYMBOL(ib_check_mr_status);
  1536. int ib_set_vf_link_state(struct ib_device *device, int vf, u8 port,
  1537. int state)
  1538. {
  1539. if (!device->set_vf_link_state)
  1540. return -ENOSYS;
  1541. return device->set_vf_link_state(device, vf, port, state);
  1542. }
  1543. EXPORT_SYMBOL(ib_set_vf_link_state);
  1544. int ib_get_vf_config(struct ib_device *device, int vf, u8 port,
  1545. struct ifla_vf_info *info)
  1546. {
  1547. if (!device->get_vf_config)
  1548. return -ENOSYS;
  1549. return device->get_vf_config(device, vf, port, info);
  1550. }
  1551. EXPORT_SYMBOL(ib_get_vf_config);
  1552. int ib_get_vf_stats(struct ib_device *device, int vf, u8 port,
  1553. struct ifla_vf_stats *stats)
  1554. {
  1555. if (!device->get_vf_stats)
  1556. return -ENOSYS;
  1557. return device->get_vf_stats(device, vf, port, stats);
  1558. }
  1559. EXPORT_SYMBOL(ib_get_vf_stats);
  1560. int ib_set_vf_guid(struct ib_device *device, int vf, u8 port, u64 guid,
  1561. int type)
  1562. {
  1563. if (!device->set_vf_guid)
  1564. return -ENOSYS;
  1565. return device->set_vf_guid(device, vf, port, guid, type);
  1566. }
  1567. EXPORT_SYMBOL(ib_set_vf_guid);
  1568. /**
  1569. * ib_map_mr_sg() - Map the largest prefix of a dma mapped SG list
  1570. * and set it the memory region.
  1571. * @mr: memory region
  1572. * @sg: dma mapped scatterlist
  1573. * @sg_nents: number of entries in sg
  1574. * @sg_offset: offset in bytes into sg
  1575. * @page_size: page vector desired page size
  1576. *
  1577. * Constraints:
  1578. * - The first sg element is allowed to have an offset.
  1579. * - Each sg element must be aligned to page_size (or physically
  1580. * contiguous to the previous element). In case an sg element has a
  1581. * non contiguous offset, the mapping prefix will not include it.
  1582. * - The last sg element is allowed to have length less than page_size.
  1583. * - If sg_nents total byte length exceeds the mr max_num_sge * page_size
  1584. * then only max_num_sg entries will be mapped.
  1585. * - If the MR was allocated with type IB_MR_TYPE_SG_GAPS_REG, non of these
  1586. * constraints holds and the page_size argument is ignored.
  1587. *
  1588. * Returns the number of sg elements that were mapped to the memory region.
  1589. *
  1590. * After this completes successfully, the memory region
  1591. * is ready for registration.
  1592. */
  1593. int ib_map_mr_sg(struct ib_mr *mr, struct scatterlist *sg, int sg_nents,
  1594. unsigned int *sg_offset, unsigned int page_size)
  1595. {
  1596. if (unlikely(!mr->device->map_mr_sg))
  1597. return -ENOSYS;
  1598. mr->page_size = page_size;
  1599. return mr->device->map_mr_sg(mr, sg, sg_nents, sg_offset);
  1600. }
  1601. EXPORT_SYMBOL(ib_map_mr_sg);
  1602. /**
  1603. * ib_sg_to_pages() - Convert the largest prefix of a sg list
  1604. * to a page vector
  1605. * @mr: memory region
  1606. * @sgl: dma mapped scatterlist
  1607. * @sg_nents: number of entries in sg
  1608. * @sg_offset_p: IN: start offset in bytes into sg
  1609. * OUT: offset in bytes for element n of the sg of the first
  1610. * byte that has not been processed where n is the return
  1611. * value of this function.
  1612. * @set_page: driver page assignment function pointer
  1613. *
  1614. * Core service helper for drivers to convert the largest
  1615. * prefix of given sg list to a page vector. The sg list
  1616. * prefix converted is the prefix that meet the requirements
  1617. * of ib_map_mr_sg.
  1618. *
  1619. * Returns the number of sg elements that were assigned to
  1620. * a page vector.
  1621. */
  1622. int ib_sg_to_pages(struct ib_mr *mr, struct scatterlist *sgl, int sg_nents,
  1623. unsigned int *sg_offset_p, int (*set_page)(struct ib_mr *, u64))
  1624. {
  1625. struct scatterlist *sg;
  1626. u64 last_end_dma_addr = 0;
  1627. unsigned int sg_offset = sg_offset_p ? *sg_offset_p : 0;
  1628. unsigned int last_page_off = 0;
  1629. u64 page_mask = ~((u64)mr->page_size - 1);
  1630. int i, ret;
  1631. if (unlikely(sg_nents <= 0 || sg_offset > sg_dma_len(&sgl[0])))
  1632. return -EINVAL;
  1633. mr->iova = sg_dma_address(&sgl[0]) + sg_offset;
  1634. mr->length = 0;
  1635. for_each_sg(sgl, sg, sg_nents, i) {
  1636. u64 dma_addr = sg_dma_address(sg) + sg_offset;
  1637. u64 prev_addr = dma_addr;
  1638. unsigned int dma_len = sg_dma_len(sg) - sg_offset;
  1639. u64 end_dma_addr = dma_addr + dma_len;
  1640. u64 page_addr = dma_addr & page_mask;
  1641. /*
  1642. * For the second and later elements, check whether either the
  1643. * end of element i-1 or the start of element i is not aligned
  1644. * on a page boundary.
  1645. */
  1646. if (i && (last_page_off != 0 || page_addr != dma_addr)) {
  1647. /* Stop mapping if there is a gap. */
  1648. if (last_end_dma_addr != dma_addr)
  1649. break;
  1650. /*
  1651. * Coalesce this element with the last. If it is small
  1652. * enough just update mr->length. Otherwise start
  1653. * mapping from the next page.
  1654. */
  1655. goto next_page;
  1656. }
  1657. do {
  1658. ret = set_page(mr, page_addr);
  1659. if (unlikely(ret < 0)) {
  1660. sg_offset = prev_addr - sg_dma_address(sg);
  1661. mr->length += prev_addr - dma_addr;
  1662. if (sg_offset_p)
  1663. *sg_offset_p = sg_offset;
  1664. return i || sg_offset ? i : ret;
  1665. }
  1666. prev_addr = page_addr;
  1667. next_page:
  1668. page_addr += mr->page_size;
  1669. } while (page_addr < end_dma_addr);
  1670. mr->length += dma_len;
  1671. last_end_dma_addr = end_dma_addr;
  1672. last_page_off = end_dma_addr & ~page_mask;
  1673. sg_offset = 0;
  1674. }
  1675. if (sg_offset_p)
  1676. *sg_offset_p = 0;
  1677. return i;
  1678. }
  1679. EXPORT_SYMBOL(ib_sg_to_pages);
  1680. struct ib_drain_cqe {
  1681. struct ib_cqe cqe;
  1682. struct completion done;
  1683. };
  1684. static void ib_drain_qp_done(struct ib_cq *cq, struct ib_wc *wc)
  1685. {
  1686. struct ib_drain_cqe *cqe = container_of(wc->wr_cqe, struct ib_drain_cqe,
  1687. cqe);
  1688. complete(&cqe->done);
  1689. }
  1690. /*
  1691. * Post a WR and block until its completion is reaped for the SQ.
  1692. */
  1693. static void __ib_drain_sq(struct ib_qp *qp)
  1694. {
  1695. struct ib_qp_attr attr = { .qp_state = IB_QPS_ERR };
  1696. struct ib_drain_cqe sdrain;
  1697. struct ib_send_wr swr = {}, *bad_swr;
  1698. int ret;
  1699. if (qp->send_cq->poll_ctx == IB_POLL_DIRECT) {
  1700. WARN_ONCE(qp->send_cq->poll_ctx == IB_POLL_DIRECT,
  1701. "IB_POLL_DIRECT poll_ctx not supported for drain\n");
  1702. return;
  1703. }
  1704. swr.wr_cqe = &sdrain.cqe;
  1705. sdrain.cqe.done = ib_drain_qp_done;
  1706. init_completion(&sdrain.done);
  1707. ret = ib_modify_qp(qp, &attr, IB_QP_STATE);
  1708. if (ret) {
  1709. WARN_ONCE(ret, "failed to drain send queue: %d\n", ret);
  1710. return;
  1711. }
  1712. ret = ib_post_send(qp, &swr, &bad_swr);
  1713. if (ret) {
  1714. WARN_ONCE(ret, "failed to drain send queue: %d\n", ret);
  1715. return;
  1716. }
  1717. wait_for_completion(&sdrain.done);
  1718. }
  1719. /*
  1720. * Post a WR and block until its completion is reaped for the RQ.
  1721. */
  1722. static void __ib_drain_rq(struct ib_qp *qp)
  1723. {
  1724. struct ib_qp_attr attr = { .qp_state = IB_QPS_ERR };
  1725. struct ib_drain_cqe rdrain;
  1726. struct ib_recv_wr rwr = {}, *bad_rwr;
  1727. int ret;
  1728. if (qp->recv_cq->poll_ctx == IB_POLL_DIRECT) {
  1729. WARN_ONCE(qp->recv_cq->poll_ctx == IB_POLL_DIRECT,
  1730. "IB_POLL_DIRECT poll_ctx not supported for drain\n");
  1731. return;
  1732. }
  1733. rwr.wr_cqe = &rdrain.cqe;
  1734. rdrain.cqe.done = ib_drain_qp_done;
  1735. init_completion(&rdrain.done);
  1736. ret = ib_modify_qp(qp, &attr, IB_QP_STATE);
  1737. if (ret) {
  1738. WARN_ONCE(ret, "failed to drain recv queue: %d\n", ret);
  1739. return;
  1740. }
  1741. ret = ib_post_recv(qp, &rwr, &bad_rwr);
  1742. if (ret) {
  1743. WARN_ONCE(ret, "failed to drain recv queue: %d\n", ret);
  1744. return;
  1745. }
  1746. wait_for_completion(&rdrain.done);
  1747. }
  1748. /**
  1749. * ib_drain_sq() - Block until all SQ CQEs have been consumed by the
  1750. * application.
  1751. * @qp: queue pair to drain
  1752. *
  1753. * If the device has a provider-specific drain function, then
  1754. * call that. Otherwise call the generic drain function
  1755. * __ib_drain_sq().
  1756. *
  1757. * The caller must:
  1758. *
  1759. * ensure there is room in the CQ and SQ for the drain work request and
  1760. * completion.
  1761. *
  1762. * allocate the CQ using ib_alloc_cq() and the CQ poll context cannot be
  1763. * IB_POLL_DIRECT.
  1764. *
  1765. * ensure that there are no other contexts that are posting WRs concurrently.
  1766. * Otherwise the drain is not guaranteed.
  1767. */
  1768. void ib_drain_sq(struct ib_qp *qp)
  1769. {
  1770. if (qp->device->drain_sq)
  1771. qp->device->drain_sq(qp);
  1772. else
  1773. __ib_drain_sq(qp);
  1774. }
  1775. EXPORT_SYMBOL(ib_drain_sq);
  1776. /**
  1777. * ib_drain_rq() - Block until all RQ CQEs have been consumed by the
  1778. * application.
  1779. * @qp: queue pair to drain
  1780. *
  1781. * If the device has a provider-specific drain function, then
  1782. * call that. Otherwise call the generic drain function
  1783. * __ib_drain_rq().
  1784. *
  1785. * The caller must:
  1786. *
  1787. * ensure there is room in the CQ and RQ for the drain work request and
  1788. * completion.
  1789. *
  1790. * allocate the CQ using ib_alloc_cq() and the CQ poll context cannot be
  1791. * IB_POLL_DIRECT.
  1792. *
  1793. * ensure that there are no other contexts that are posting WRs concurrently.
  1794. * Otherwise the drain is not guaranteed.
  1795. */
  1796. void ib_drain_rq(struct ib_qp *qp)
  1797. {
  1798. if (qp->device->drain_rq)
  1799. qp->device->drain_rq(qp);
  1800. else
  1801. __ib_drain_rq(qp);
  1802. }
  1803. EXPORT_SYMBOL(ib_drain_rq);
  1804. /**
  1805. * ib_drain_qp() - Block until all CQEs have been consumed by the
  1806. * application on both the RQ and SQ.
  1807. * @qp: queue pair to drain
  1808. *
  1809. * The caller must:
  1810. *
  1811. * ensure there is room in the CQ(s), SQ, and RQ for drain work requests
  1812. * and completions.
  1813. *
  1814. * allocate the CQs using ib_alloc_cq() and the CQ poll context cannot be
  1815. * IB_POLL_DIRECT.
  1816. *
  1817. * ensure that there are no other contexts that are posting WRs concurrently.
  1818. * Otherwise the drain is not guaranteed.
  1819. */
  1820. void ib_drain_qp(struct ib_qp *qp)
  1821. {
  1822. ib_drain_sq(qp);
  1823. if (!qp->srq)
  1824. ib_drain_rq(qp);
  1825. }
  1826. EXPORT_SYMBOL(ib_drain_qp);