i2c-mux-pca9541.c 10 KB

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  1. /*
  2. * I2C multiplexer driver for PCA9541 bus master selector
  3. *
  4. * Copyright (c) 2010 Ericsson AB.
  5. *
  6. * Author: Guenter Roeck <linux@roeck-us.net>
  7. *
  8. * Derived from:
  9. * pca954x.c
  10. *
  11. * Copyright (c) 2008-2009 Rodolfo Giometti <giometti@linux.it>
  12. * Copyright (c) 2008-2009 Eurotech S.p.A. <info@eurotech.it>
  13. *
  14. * This file is licensed under the terms of the GNU General Public
  15. * License version 2. This program is licensed "as is" without any
  16. * warranty of any kind, whether express or implied.
  17. */
  18. #include <linux/module.h>
  19. #include <linux/jiffies.h>
  20. #include <linux/delay.h>
  21. #include <linux/slab.h>
  22. #include <linux/device.h>
  23. #include <linux/i2c.h>
  24. #include <linux/i2c-mux.h>
  25. #include <linux/i2c/pca954x.h>
  26. /*
  27. * The PCA9541 is a bus master selector. It supports two I2C masters connected
  28. * to a single slave bus.
  29. *
  30. * Before each bus transaction, a master has to acquire bus ownership. After the
  31. * transaction is complete, bus ownership has to be released. This fits well
  32. * into the I2C multiplexer framework, which provides select and release
  33. * functions for this purpose. For this reason, this driver is modeled as
  34. * single-channel I2C bus multiplexer.
  35. *
  36. * This driver assumes that the two bus masters are controlled by two different
  37. * hosts. If a single host controls both masters, platform code has to ensure
  38. * that only one of the masters is instantiated at any given time.
  39. */
  40. #define PCA9541_CONTROL 0x01
  41. #define PCA9541_ISTAT 0x02
  42. #define PCA9541_CTL_MYBUS (1 << 0)
  43. #define PCA9541_CTL_NMYBUS (1 << 1)
  44. #define PCA9541_CTL_BUSON (1 << 2)
  45. #define PCA9541_CTL_NBUSON (1 << 3)
  46. #define PCA9541_CTL_BUSINIT (1 << 4)
  47. #define PCA9541_CTL_TESTON (1 << 6)
  48. #define PCA9541_CTL_NTESTON (1 << 7)
  49. #define PCA9541_ISTAT_INTIN (1 << 0)
  50. #define PCA9541_ISTAT_BUSINIT (1 << 1)
  51. #define PCA9541_ISTAT_BUSOK (1 << 2)
  52. #define PCA9541_ISTAT_BUSLOST (1 << 3)
  53. #define PCA9541_ISTAT_MYTEST (1 << 6)
  54. #define PCA9541_ISTAT_NMYTEST (1 << 7)
  55. #define BUSON (PCA9541_CTL_BUSON | PCA9541_CTL_NBUSON)
  56. #define MYBUS (PCA9541_CTL_MYBUS | PCA9541_CTL_NMYBUS)
  57. #define mybus(x) (!((x) & MYBUS) || ((x) & MYBUS) == MYBUS)
  58. #define busoff(x) (!((x) & BUSON) || ((x) & BUSON) == BUSON)
  59. /* arbitration timeouts, in jiffies */
  60. #define ARB_TIMEOUT (HZ / 8) /* 125 ms until forcing bus ownership */
  61. #define ARB2_TIMEOUT (HZ / 4) /* 250 ms until acquisition failure */
  62. /* arbitration retry delays, in us */
  63. #define SELECT_DELAY_SHORT 50
  64. #define SELECT_DELAY_LONG 1000
  65. struct pca9541 {
  66. struct i2c_client *client;
  67. unsigned long select_timeout;
  68. unsigned long arb_timeout;
  69. };
  70. static const struct i2c_device_id pca9541_id[] = {
  71. {"pca9541", 0},
  72. {}
  73. };
  74. MODULE_DEVICE_TABLE(i2c, pca9541_id);
  75. /*
  76. * Write to chip register. Don't use i2c_transfer()/i2c_smbus_xfer()
  77. * as they will try to lock the adapter a second time.
  78. */
  79. static int pca9541_reg_write(struct i2c_client *client, u8 command, u8 val)
  80. {
  81. struct i2c_adapter *adap = client->adapter;
  82. int ret;
  83. if (adap->algo->master_xfer) {
  84. struct i2c_msg msg;
  85. char buf[2];
  86. msg.addr = client->addr;
  87. msg.flags = 0;
  88. msg.len = 2;
  89. buf[0] = command;
  90. buf[1] = val;
  91. msg.buf = buf;
  92. ret = __i2c_transfer(adap, &msg, 1);
  93. } else {
  94. union i2c_smbus_data data;
  95. data.byte = val;
  96. ret = adap->algo->smbus_xfer(adap, client->addr,
  97. client->flags,
  98. I2C_SMBUS_WRITE,
  99. command,
  100. I2C_SMBUS_BYTE_DATA, &data);
  101. }
  102. return ret;
  103. }
  104. /*
  105. * Read from chip register. Don't use i2c_transfer()/i2c_smbus_xfer()
  106. * as they will try to lock adapter a second time.
  107. */
  108. static int pca9541_reg_read(struct i2c_client *client, u8 command)
  109. {
  110. struct i2c_adapter *adap = client->adapter;
  111. int ret;
  112. u8 val;
  113. if (adap->algo->master_xfer) {
  114. struct i2c_msg msg[2] = {
  115. {
  116. .addr = client->addr,
  117. .flags = 0,
  118. .len = 1,
  119. .buf = &command
  120. },
  121. {
  122. .addr = client->addr,
  123. .flags = I2C_M_RD,
  124. .len = 1,
  125. .buf = &val
  126. }
  127. };
  128. ret = __i2c_transfer(adap, msg, 2);
  129. if (ret == 2)
  130. ret = val;
  131. else if (ret >= 0)
  132. ret = -EIO;
  133. } else {
  134. union i2c_smbus_data data;
  135. ret = adap->algo->smbus_xfer(adap, client->addr,
  136. client->flags,
  137. I2C_SMBUS_READ,
  138. command,
  139. I2C_SMBUS_BYTE_DATA, &data);
  140. if (!ret)
  141. ret = data.byte;
  142. }
  143. return ret;
  144. }
  145. /*
  146. * Arbitration management functions
  147. */
  148. /* Release bus. Also reset NTESTON and BUSINIT if it was set. */
  149. static void pca9541_release_bus(struct i2c_client *client)
  150. {
  151. int reg;
  152. reg = pca9541_reg_read(client, PCA9541_CONTROL);
  153. if (reg >= 0 && !busoff(reg) && mybus(reg))
  154. pca9541_reg_write(client, PCA9541_CONTROL,
  155. (reg & PCA9541_CTL_NBUSON) >> 1);
  156. }
  157. /*
  158. * Arbitration is defined as a two-step process. A bus master can only activate
  159. * the slave bus if it owns it; otherwise it has to request ownership first.
  160. * This multi-step process ensures that access contention is resolved
  161. * gracefully.
  162. *
  163. * Bus Ownership Other master Action
  164. * state requested access
  165. * ----------------------------------------------------
  166. * off - yes wait for arbitration timeout or
  167. * for other master to drop request
  168. * off no no take ownership
  169. * off yes no turn on bus
  170. * on yes - done
  171. * on no - wait for arbitration timeout or
  172. * for other master to release bus
  173. *
  174. * The main contention point occurs if the slave bus is off and both masters
  175. * request ownership at the same time. In this case, one master will turn on
  176. * the slave bus, believing that it owns it. The other master will request
  177. * bus ownership. Result is that the bus is turned on, and master which did
  178. * _not_ own the slave bus before ends up owning it.
  179. */
  180. /* Control commands per PCA9541 datasheet */
  181. static const u8 pca9541_control[16] = {
  182. 4, 0, 1, 5, 4, 4, 5, 5, 0, 0, 1, 1, 0, 4, 5, 1
  183. };
  184. /*
  185. * Channel arbitration
  186. *
  187. * Return values:
  188. * <0: error
  189. * 0 : bus not acquired
  190. * 1 : bus acquired
  191. */
  192. static int pca9541_arbitrate(struct i2c_client *client)
  193. {
  194. struct i2c_mux_core *muxc = i2c_get_clientdata(client);
  195. struct pca9541 *data = i2c_mux_priv(muxc);
  196. int reg;
  197. reg = pca9541_reg_read(client, PCA9541_CONTROL);
  198. if (reg < 0)
  199. return reg;
  200. if (busoff(reg)) {
  201. int istat;
  202. /*
  203. * Bus is off. Request ownership or turn it on unless
  204. * other master requested ownership.
  205. */
  206. istat = pca9541_reg_read(client, PCA9541_ISTAT);
  207. if (!(istat & PCA9541_ISTAT_NMYTEST)
  208. || time_is_before_eq_jiffies(data->arb_timeout)) {
  209. /*
  210. * Other master did not request ownership,
  211. * or arbitration timeout expired. Take the bus.
  212. */
  213. pca9541_reg_write(client,
  214. PCA9541_CONTROL,
  215. pca9541_control[reg & 0x0f]
  216. | PCA9541_CTL_NTESTON);
  217. data->select_timeout = SELECT_DELAY_SHORT;
  218. } else {
  219. /*
  220. * Other master requested ownership.
  221. * Set extra long timeout to give it time to acquire it.
  222. */
  223. data->select_timeout = SELECT_DELAY_LONG * 2;
  224. }
  225. } else if (mybus(reg)) {
  226. /*
  227. * Bus is on, and we own it. We are done with acquisition.
  228. * Reset NTESTON and BUSINIT, then return success.
  229. */
  230. if (reg & (PCA9541_CTL_NTESTON | PCA9541_CTL_BUSINIT))
  231. pca9541_reg_write(client,
  232. PCA9541_CONTROL,
  233. reg & ~(PCA9541_CTL_NTESTON
  234. | PCA9541_CTL_BUSINIT));
  235. return 1;
  236. } else {
  237. /*
  238. * Other master owns the bus.
  239. * If arbitration timeout has expired, force ownership.
  240. * Otherwise request it.
  241. */
  242. data->select_timeout = SELECT_DELAY_LONG;
  243. if (time_is_before_eq_jiffies(data->arb_timeout)) {
  244. /* Time is up, take the bus and reset it. */
  245. pca9541_reg_write(client,
  246. PCA9541_CONTROL,
  247. pca9541_control[reg & 0x0f]
  248. | PCA9541_CTL_BUSINIT
  249. | PCA9541_CTL_NTESTON);
  250. } else {
  251. /* Request bus ownership if needed */
  252. if (!(reg & PCA9541_CTL_NTESTON))
  253. pca9541_reg_write(client,
  254. PCA9541_CONTROL,
  255. reg | PCA9541_CTL_NTESTON);
  256. }
  257. }
  258. return 0;
  259. }
  260. static int pca9541_select_chan(struct i2c_mux_core *muxc, u32 chan)
  261. {
  262. struct pca9541 *data = i2c_mux_priv(muxc);
  263. struct i2c_client *client = data->client;
  264. int ret;
  265. unsigned long timeout = jiffies + ARB2_TIMEOUT;
  266. /* give up after this time */
  267. data->arb_timeout = jiffies + ARB_TIMEOUT;
  268. /* force bus ownership after this time */
  269. do {
  270. ret = pca9541_arbitrate(client);
  271. if (ret)
  272. return ret < 0 ? ret : 0;
  273. if (data->select_timeout == SELECT_DELAY_SHORT)
  274. udelay(data->select_timeout);
  275. else
  276. msleep(data->select_timeout / 1000);
  277. } while (time_is_after_eq_jiffies(timeout));
  278. return -ETIMEDOUT;
  279. }
  280. static int pca9541_release_chan(struct i2c_mux_core *muxc, u32 chan)
  281. {
  282. struct pca9541 *data = i2c_mux_priv(muxc);
  283. struct i2c_client *client = data->client;
  284. pca9541_release_bus(client);
  285. return 0;
  286. }
  287. /*
  288. * I2C init/probing/exit functions
  289. */
  290. static int pca9541_probe(struct i2c_client *client,
  291. const struct i2c_device_id *id)
  292. {
  293. struct i2c_adapter *adap = client->adapter;
  294. struct pca954x_platform_data *pdata = dev_get_platdata(&client->dev);
  295. struct i2c_mux_core *muxc;
  296. struct pca9541 *data;
  297. int force;
  298. int ret;
  299. if (!i2c_check_functionality(adap, I2C_FUNC_SMBUS_BYTE_DATA))
  300. return -ENODEV;
  301. /*
  302. * I2C accesses are unprotected here.
  303. * We have to lock the adapter before releasing the bus.
  304. */
  305. i2c_lock_adapter(adap);
  306. pca9541_release_bus(client);
  307. i2c_unlock_adapter(adap);
  308. /* Create mux adapter */
  309. force = 0;
  310. if (pdata)
  311. force = pdata->modes[0].adap_id;
  312. muxc = i2c_mux_alloc(adap, &client->dev, 1, sizeof(*data), 0,
  313. pca9541_select_chan, pca9541_release_chan);
  314. if (!muxc)
  315. return -ENOMEM;
  316. data = i2c_mux_priv(muxc);
  317. data->client = client;
  318. i2c_set_clientdata(client, muxc);
  319. ret = i2c_mux_add_adapter(muxc, force, 0, 0);
  320. if (ret) {
  321. dev_err(&client->dev, "failed to register master selector\n");
  322. return ret;
  323. }
  324. dev_info(&client->dev, "registered master selector for I2C %s\n",
  325. client->name);
  326. return 0;
  327. }
  328. static int pca9541_remove(struct i2c_client *client)
  329. {
  330. struct i2c_mux_core *muxc = i2c_get_clientdata(client);
  331. i2c_mux_del_adapters(muxc);
  332. return 0;
  333. }
  334. static struct i2c_driver pca9541_driver = {
  335. .driver = {
  336. .name = "pca9541",
  337. },
  338. .probe = pca9541_probe,
  339. .remove = pca9541_remove,
  340. .id_table = pca9541_id,
  341. };
  342. module_i2c_driver(pca9541_driver);
  343. MODULE_AUTHOR("Guenter Roeck <linux@roeck-us.net>");
  344. MODULE_DESCRIPTION("PCA9541 I2C master selector driver");
  345. MODULE_LICENSE("GPL v2");