coresight-etm4x-sysfs.c 56 KB

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  1. /*
  2. * Copyright(C) 2015 Linaro Limited. All rights reserved.
  3. * Author: Mathieu Poirier <mathieu.poirier@linaro.org>
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License version 2 as published by
  7. * the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program. If not, see <http://www.gnu.org/licenses/>.
  16. */
  17. #include <linux/pm_runtime.h>
  18. #include <linux/sysfs.h>
  19. #include "coresight-etm4x.h"
  20. static int etm4_set_mode_exclude(struct etmv4_drvdata *drvdata, bool exclude)
  21. {
  22. u8 idx;
  23. struct etmv4_config *config = &drvdata->config;
  24. idx = config->addr_idx;
  25. /*
  26. * TRCACATRn.TYPE bit[1:0]: type of comparison
  27. * the trace unit performs
  28. */
  29. if (BMVAL(config->addr_acc[idx], 0, 1) == ETM_INSTR_ADDR) {
  30. if (idx % 2 != 0)
  31. return -EINVAL;
  32. /*
  33. * We are performing instruction address comparison. Set the
  34. * relevant bit of ViewInst Include/Exclude Control register
  35. * for corresponding address comparator pair.
  36. */
  37. if (config->addr_type[idx] != ETM_ADDR_TYPE_RANGE ||
  38. config->addr_type[idx + 1] != ETM_ADDR_TYPE_RANGE)
  39. return -EINVAL;
  40. if (exclude == true) {
  41. /*
  42. * Set exclude bit and unset the include bit
  43. * corresponding to comparator pair
  44. */
  45. config->viiectlr |= BIT(idx / 2 + 16);
  46. config->viiectlr &= ~BIT(idx / 2);
  47. } else {
  48. /*
  49. * Set include bit and unset exclude bit
  50. * corresponding to comparator pair
  51. */
  52. config->viiectlr |= BIT(idx / 2);
  53. config->viiectlr &= ~BIT(idx / 2 + 16);
  54. }
  55. }
  56. return 0;
  57. }
  58. static ssize_t nr_pe_cmp_show(struct device *dev,
  59. struct device_attribute *attr,
  60. char *buf)
  61. {
  62. unsigned long val;
  63. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  64. val = drvdata->nr_pe_cmp;
  65. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  66. }
  67. static DEVICE_ATTR_RO(nr_pe_cmp);
  68. static ssize_t nr_addr_cmp_show(struct device *dev,
  69. struct device_attribute *attr,
  70. char *buf)
  71. {
  72. unsigned long val;
  73. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  74. val = drvdata->nr_addr_cmp;
  75. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  76. }
  77. static DEVICE_ATTR_RO(nr_addr_cmp);
  78. static ssize_t nr_cntr_show(struct device *dev,
  79. struct device_attribute *attr,
  80. char *buf)
  81. {
  82. unsigned long val;
  83. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  84. val = drvdata->nr_cntr;
  85. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  86. }
  87. static DEVICE_ATTR_RO(nr_cntr);
  88. static ssize_t nr_ext_inp_show(struct device *dev,
  89. struct device_attribute *attr,
  90. char *buf)
  91. {
  92. unsigned long val;
  93. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  94. val = drvdata->nr_ext_inp;
  95. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  96. }
  97. static DEVICE_ATTR_RO(nr_ext_inp);
  98. static ssize_t numcidc_show(struct device *dev,
  99. struct device_attribute *attr,
  100. char *buf)
  101. {
  102. unsigned long val;
  103. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  104. val = drvdata->numcidc;
  105. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  106. }
  107. static DEVICE_ATTR_RO(numcidc);
  108. static ssize_t numvmidc_show(struct device *dev,
  109. struct device_attribute *attr,
  110. char *buf)
  111. {
  112. unsigned long val;
  113. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  114. val = drvdata->numvmidc;
  115. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  116. }
  117. static DEVICE_ATTR_RO(numvmidc);
  118. static ssize_t nrseqstate_show(struct device *dev,
  119. struct device_attribute *attr,
  120. char *buf)
  121. {
  122. unsigned long val;
  123. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  124. val = drvdata->nrseqstate;
  125. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  126. }
  127. static DEVICE_ATTR_RO(nrseqstate);
  128. static ssize_t nr_resource_show(struct device *dev,
  129. struct device_attribute *attr,
  130. char *buf)
  131. {
  132. unsigned long val;
  133. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  134. val = drvdata->nr_resource;
  135. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  136. }
  137. static DEVICE_ATTR_RO(nr_resource);
  138. static ssize_t nr_ss_cmp_show(struct device *dev,
  139. struct device_attribute *attr,
  140. char *buf)
  141. {
  142. unsigned long val;
  143. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  144. val = drvdata->nr_ss_cmp;
  145. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  146. }
  147. static DEVICE_ATTR_RO(nr_ss_cmp);
  148. static ssize_t reset_store(struct device *dev,
  149. struct device_attribute *attr,
  150. const char *buf, size_t size)
  151. {
  152. int i;
  153. unsigned long val;
  154. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  155. struct etmv4_config *config = &drvdata->config;
  156. if (kstrtoul(buf, 16, &val))
  157. return -EINVAL;
  158. spin_lock(&drvdata->spinlock);
  159. if (val)
  160. config->mode = 0x0;
  161. /* Disable data tracing: do not trace load and store data transfers */
  162. config->mode &= ~(ETM_MODE_LOAD | ETM_MODE_STORE);
  163. config->cfg &= ~(BIT(1) | BIT(2));
  164. /* Disable data value and data address tracing */
  165. config->mode &= ~(ETM_MODE_DATA_TRACE_ADDR |
  166. ETM_MODE_DATA_TRACE_VAL);
  167. config->cfg &= ~(BIT(16) | BIT(17));
  168. /* Disable all events tracing */
  169. config->eventctrl0 = 0x0;
  170. config->eventctrl1 = 0x0;
  171. /* Disable timestamp event */
  172. config->ts_ctrl = 0x0;
  173. /* Disable stalling */
  174. config->stall_ctrl = 0x0;
  175. /* Reset trace synchronization period to 2^8 = 256 bytes*/
  176. if (drvdata->syncpr == false)
  177. config->syncfreq = 0x8;
  178. /*
  179. * Enable ViewInst to trace everything with start-stop logic in
  180. * started state. ARM recommends start-stop logic is set before
  181. * each trace run.
  182. */
  183. config->vinst_ctrl |= BIT(0);
  184. if (drvdata->nr_addr_cmp == true) {
  185. config->mode |= ETM_MODE_VIEWINST_STARTSTOP;
  186. /* SSSTATUS, bit[9] */
  187. config->vinst_ctrl |= BIT(9);
  188. }
  189. /* No address range filtering for ViewInst */
  190. config->viiectlr = 0x0;
  191. /* No start-stop filtering for ViewInst */
  192. config->vissctlr = 0x0;
  193. /* Disable seq events */
  194. for (i = 0; i < drvdata->nrseqstate-1; i++)
  195. config->seq_ctrl[i] = 0x0;
  196. config->seq_rst = 0x0;
  197. config->seq_state = 0x0;
  198. /* Disable external input events */
  199. config->ext_inp = 0x0;
  200. config->cntr_idx = 0x0;
  201. for (i = 0; i < drvdata->nr_cntr; i++) {
  202. config->cntrldvr[i] = 0x0;
  203. config->cntr_ctrl[i] = 0x0;
  204. config->cntr_val[i] = 0x0;
  205. }
  206. config->res_idx = 0x0;
  207. for (i = 0; i < drvdata->nr_resource; i++)
  208. config->res_ctrl[i] = 0x0;
  209. for (i = 0; i < drvdata->nr_ss_cmp; i++) {
  210. config->ss_ctrl[i] = 0x0;
  211. config->ss_pe_cmp[i] = 0x0;
  212. }
  213. config->addr_idx = 0x0;
  214. for (i = 0; i < drvdata->nr_addr_cmp * 2; i++) {
  215. config->addr_val[i] = 0x0;
  216. config->addr_acc[i] = 0x0;
  217. config->addr_type[i] = ETM_ADDR_TYPE_NONE;
  218. }
  219. config->ctxid_idx = 0x0;
  220. for (i = 0; i < drvdata->numcidc; i++) {
  221. config->ctxid_pid[i] = 0x0;
  222. config->ctxid_vpid[i] = 0x0;
  223. }
  224. config->ctxid_mask0 = 0x0;
  225. config->ctxid_mask1 = 0x0;
  226. config->vmid_idx = 0x0;
  227. for (i = 0; i < drvdata->numvmidc; i++)
  228. config->vmid_val[i] = 0x0;
  229. config->vmid_mask0 = 0x0;
  230. config->vmid_mask1 = 0x0;
  231. drvdata->trcid = drvdata->cpu + 1;
  232. spin_unlock(&drvdata->spinlock);
  233. return size;
  234. }
  235. static DEVICE_ATTR_WO(reset);
  236. static ssize_t mode_show(struct device *dev,
  237. struct device_attribute *attr,
  238. char *buf)
  239. {
  240. unsigned long val;
  241. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  242. struct etmv4_config *config = &drvdata->config;
  243. val = config->mode;
  244. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  245. }
  246. static ssize_t mode_store(struct device *dev,
  247. struct device_attribute *attr,
  248. const char *buf, size_t size)
  249. {
  250. unsigned long val, mode;
  251. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  252. struct etmv4_config *config = &drvdata->config;
  253. if (kstrtoul(buf, 16, &val))
  254. return -EINVAL;
  255. spin_lock(&drvdata->spinlock);
  256. config->mode = val & ETMv4_MODE_ALL;
  257. if (config->mode & ETM_MODE_EXCLUDE)
  258. etm4_set_mode_exclude(drvdata, true);
  259. else
  260. etm4_set_mode_exclude(drvdata, false);
  261. if (drvdata->instrp0 == true) {
  262. /* start by clearing instruction P0 field */
  263. config->cfg &= ~(BIT(1) | BIT(2));
  264. if (config->mode & ETM_MODE_LOAD)
  265. /* 0b01 Trace load instructions as P0 instructions */
  266. config->cfg |= BIT(1);
  267. if (config->mode & ETM_MODE_STORE)
  268. /* 0b10 Trace store instructions as P0 instructions */
  269. config->cfg |= BIT(2);
  270. if (config->mode & ETM_MODE_LOAD_STORE)
  271. /*
  272. * 0b11 Trace load and store instructions
  273. * as P0 instructions
  274. */
  275. config->cfg |= BIT(1) | BIT(2);
  276. }
  277. /* bit[3], Branch broadcast mode */
  278. if ((config->mode & ETM_MODE_BB) && (drvdata->trcbb == true))
  279. config->cfg |= BIT(3);
  280. else
  281. config->cfg &= ~BIT(3);
  282. /* bit[4], Cycle counting instruction trace bit */
  283. if ((config->mode & ETMv4_MODE_CYCACC) &&
  284. (drvdata->trccci == true))
  285. config->cfg |= BIT(4);
  286. else
  287. config->cfg &= ~BIT(4);
  288. /* bit[6], Context ID tracing bit */
  289. if ((config->mode & ETMv4_MODE_CTXID) && (drvdata->ctxid_size))
  290. config->cfg |= BIT(6);
  291. else
  292. config->cfg &= ~BIT(6);
  293. if ((config->mode & ETM_MODE_VMID) && (drvdata->vmid_size))
  294. config->cfg |= BIT(7);
  295. else
  296. config->cfg &= ~BIT(7);
  297. /* bits[10:8], Conditional instruction tracing bit */
  298. mode = ETM_MODE_COND(config->mode);
  299. if (drvdata->trccond == true) {
  300. config->cfg &= ~(BIT(8) | BIT(9) | BIT(10));
  301. config->cfg |= mode << 8;
  302. }
  303. /* bit[11], Global timestamp tracing bit */
  304. if ((config->mode & ETMv4_MODE_TIMESTAMP) && (drvdata->ts_size))
  305. config->cfg |= BIT(11);
  306. else
  307. config->cfg &= ~BIT(11);
  308. /* bit[12], Return stack enable bit */
  309. if ((config->mode & ETM_MODE_RETURNSTACK) &&
  310. (drvdata->retstack == true))
  311. config->cfg |= BIT(12);
  312. else
  313. config->cfg &= ~BIT(12);
  314. /* bits[14:13], Q element enable field */
  315. mode = ETM_MODE_QELEM(config->mode);
  316. /* start by clearing QE bits */
  317. config->cfg &= ~(BIT(13) | BIT(14));
  318. /* if supported, Q elements with instruction counts are enabled */
  319. if ((mode & BIT(0)) && (drvdata->q_support & BIT(0)))
  320. config->cfg |= BIT(13);
  321. /*
  322. * if supported, Q elements with and without instruction
  323. * counts are enabled
  324. */
  325. if ((mode & BIT(1)) && (drvdata->q_support & BIT(1)))
  326. config->cfg |= BIT(14);
  327. /* bit[11], AMBA Trace Bus (ATB) trigger enable bit */
  328. if ((config->mode & ETM_MODE_ATB_TRIGGER) &&
  329. (drvdata->atbtrig == true))
  330. config->eventctrl1 |= BIT(11);
  331. else
  332. config->eventctrl1 &= ~BIT(11);
  333. /* bit[12], Low-power state behavior override bit */
  334. if ((config->mode & ETM_MODE_LPOVERRIDE) &&
  335. (drvdata->lpoverride == true))
  336. config->eventctrl1 |= BIT(12);
  337. else
  338. config->eventctrl1 &= ~BIT(12);
  339. /* bit[8], Instruction stall bit */
  340. if (config->mode & ETM_MODE_ISTALL_EN)
  341. config->stall_ctrl |= BIT(8);
  342. else
  343. config->stall_ctrl &= ~BIT(8);
  344. /* bit[10], Prioritize instruction trace bit */
  345. if (config->mode & ETM_MODE_INSTPRIO)
  346. config->stall_ctrl |= BIT(10);
  347. else
  348. config->stall_ctrl &= ~BIT(10);
  349. /* bit[13], Trace overflow prevention bit */
  350. if ((config->mode & ETM_MODE_NOOVERFLOW) &&
  351. (drvdata->nooverflow == true))
  352. config->stall_ctrl |= BIT(13);
  353. else
  354. config->stall_ctrl &= ~BIT(13);
  355. /* bit[9] Start/stop logic control bit */
  356. if (config->mode & ETM_MODE_VIEWINST_STARTSTOP)
  357. config->vinst_ctrl |= BIT(9);
  358. else
  359. config->vinst_ctrl &= ~BIT(9);
  360. /* bit[10], Whether a trace unit must trace a Reset exception */
  361. if (config->mode & ETM_MODE_TRACE_RESET)
  362. config->vinst_ctrl |= BIT(10);
  363. else
  364. config->vinst_ctrl &= ~BIT(10);
  365. /* bit[11], Whether a trace unit must trace a system error exception */
  366. if ((config->mode & ETM_MODE_TRACE_ERR) &&
  367. (drvdata->trc_error == true))
  368. config->vinst_ctrl |= BIT(11);
  369. else
  370. config->vinst_ctrl &= ~BIT(11);
  371. if (config->mode & (ETM_MODE_EXCL_KERN | ETM_MODE_EXCL_USER))
  372. etm4_config_trace_mode(config);
  373. spin_unlock(&drvdata->spinlock);
  374. return size;
  375. }
  376. static DEVICE_ATTR_RW(mode);
  377. static ssize_t pe_show(struct device *dev,
  378. struct device_attribute *attr,
  379. char *buf)
  380. {
  381. unsigned long val;
  382. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  383. struct etmv4_config *config = &drvdata->config;
  384. val = config->pe_sel;
  385. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  386. }
  387. static ssize_t pe_store(struct device *dev,
  388. struct device_attribute *attr,
  389. const char *buf, size_t size)
  390. {
  391. unsigned long val;
  392. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  393. struct etmv4_config *config = &drvdata->config;
  394. if (kstrtoul(buf, 16, &val))
  395. return -EINVAL;
  396. spin_lock(&drvdata->spinlock);
  397. if (val > drvdata->nr_pe) {
  398. spin_unlock(&drvdata->spinlock);
  399. return -EINVAL;
  400. }
  401. config->pe_sel = val;
  402. spin_unlock(&drvdata->spinlock);
  403. return size;
  404. }
  405. static DEVICE_ATTR_RW(pe);
  406. static ssize_t event_show(struct device *dev,
  407. struct device_attribute *attr,
  408. char *buf)
  409. {
  410. unsigned long val;
  411. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  412. struct etmv4_config *config = &drvdata->config;
  413. val = config->eventctrl0;
  414. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  415. }
  416. static ssize_t event_store(struct device *dev,
  417. struct device_attribute *attr,
  418. const char *buf, size_t size)
  419. {
  420. unsigned long val;
  421. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  422. struct etmv4_config *config = &drvdata->config;
  423. if (kstrtoul(buf, 16, &val))
  424. return -EINVAL;
  425. spin_lock(&drvdata->spinlock);
  426. switch (drvdata->nr_event) {
  427. case 0x0:
  428. /* EVENT0, bits[7:0] */
  429. config->eventctrl0 = val & 0xFF;
  430. break;
  431. case 0x1:
  432. /* EVENT1, bits[15:8] */
  433. config->eventctrl0 = val & 0xFFFF;
  434. break;
  435. case 0x2:
  436. /* EVENT2, bits[23:16] */
  437. config->eventctrl0 = val & 0xFFFFFF;
  438. break;
  439. case 0x3:
  440. /* EVENT3, bits[31:24] */
  441. config->eventctrl0 = val;
  442. break;
  443. default:
  444. break;
  445. }
  446. spin_unlock(&drvdata->spinlock);
  447. return size;
  448. }
  449. static DEVICE_ATTR_RW(event);
  450. static ssize_t event_instren_show(struct device *dev,
  451. struct device_attribute *attr,
  452. char *buf)
  453. {
  454. unsigned long val;
  455. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  456. struct etmv4_config *config = &drvdata->config;
  457. val = BMVAL(config->eventctrl1, 0, 3);
  458. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  459. }
  460. static ssize_t event_instren_store(struct device *dev,
  461. struct device_attribute *attr,
  462. const char *buf, size_t size)
  463. {
  464. unsigned long val;
  465. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  466. struct etmv4_config *config = &drvdata->config;
  467. if (kstrtoul(buf, 16, &val))
  468. return -EINVAL;
  469. spin_lock(&drvdata->spinlock);
  470. /* start by clearing all instruction event enable bits */
  471. config->eventctrl1 &= ~(BIT(0) | BIT(1) | BIT(2) | BIT(3));
  472. switch (drvdata->nr_event) {
  473. case 0x0:
  474. /* generate Event element for event 1 */
  475. config->eventctrl1 |= val & BIT(1);
  476. break;
  477. case 0x1:
  478. /* generate Event element for event 1 and 2 */
  479. config->eventctrl1 |= val & (BIT(0) | BIT(1));
  480. break;
  481. case 0x2:
  482. /* generate Event element for event 1, 2 and 3 */
  483. config->eventctrl1 |= val & (BIT(0) | BIT(1) | BIT(2));
  484. break;
  485. case 0x3:
  486. /* generate Event element for all 4 events */
  487. config->eventctrl1 |= val & 0xF;
  488. break;
  489. default:
  490. break;
  491. }
  492. spin_unlock(&drvdata->spinlock);
  493. return size;
  494. }
  495. static DEVICE_ATTR_RW(event_instren);
  496. static ssize_t event_ts_show(struct device *dev,
  497. struct device_attribute *attr,
  498. char *buf)
  499. {
  500. unsigned long val;
  501. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  502. struct etmv4_config *config = &drvdata->config;
  503. val = config->ts_ctrl;
  504. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  505. }
  506. static ssize_t event_ts_store(struct device *dev,
  507. struct device_attribute *attr,
  508. const char *buf, size_t size)
  509. {
  510. unsigned long val;
  511. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  512. struct etmv4_config *config = &drvdata->config;
  513. if (kstrtoul(buf, 16, &val))
  514. return -EINVAL;
  515. if (!drvdata->ts_size)
  516. return -EINVAL;
  517. config->ts_ctrl = val & ETMv4_EVENT_MASK;
  518. return size;
  519. }
  520. static DEVICE_ATTR_RW(event_ts);
  521. static ssize_t syncfreq_show(struct device *dev,
  522. struct device_attribute *attr,
  523. char *buf)
  524. {
  525. unsigned long val;
  526. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  527. struct etmv4_config *config = &drvdata->config;
  528. val = config->syncfreq;
  529. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  530. }
  531. static ssize_t syncfreq_store(struct device *dev,
  532. struct device_attribute *attr,
  533. const char *buf, size_t size)
  534. {
  535. unsigned long val;
  536. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  537. struct etmv4_config *config = &drvdata->config;
  538. if (kstrtoul(buf, 16, &val))
  539. return -EINVAL;
  540. if (drvdata->syncpr == true)
  541. return -EINVAL;
  542. config->syncfreq = val & ETMv4_SYNC_MASK;
  543. return size;
  544. }
  545. static DEVICE_ATTR_RW(syncfreq);
  546. static ssize_t cyc_threshold_show(struct device *dev,
  547. struct device_attribute *attr,
  548. char *buf)
  549. {
  550. unsigned long val;
  551. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  552. struct etmv4_config *config = &drvdata->config;
  553. val = config->ccctlr;
  554. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  555. }
  556. static ssize_t cyc_threshold_store(struct device *dev,
  557. struct device_attribute *attr,
  558. const char *buf, size_t size)
  559. {
  560. unsigned long val;
  561. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  562. struct etmv4_config *config = &drvdata->config;
  563. if (kstrtoul(buf, 16, &val))
  564. return -EINVAL;
  565. if (val < drvdata->ccitmin)
  566. return -EINVAL;
  567. config->ccctlr = val & ETM_CYC_THRESHOLD_MASK;
  568. return size;
  569. }
  570. static DEVICE_ATTR_RW(cyc_threshold);
  571. static ssize_t bb_ctrl_show(struct device *dev,
  572. struct device_attribute *attr,
  573. char *buf)
  574. {
  575. unsigned long val;
  576. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  577. struct etmv4_config *config = &drvdata->config;
  578. val = config->bb_ctrl;
  579. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  580. }
  581. static ssize_t bb_ctrl_store(struct device *dev,
  582. struct device_attribute *attr,
  583. const char *buf, size_t size)
  584. {
  585. unsigned long val;
  586. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  587. struct etmv4_config *config = &drvdata->config;
  588. if (kstrtoul(buf, 16, &val))
  589. return -EINVAL;
  590. if (drvdata->trcbb == false)
  591. return -EINVAL;
  592. if (!drvdata->nr_addr_cmp)
  593. return -EINVAL;
  594. /*
  595. * Bit[7:0] selects which address range comparator is used for
  596. * branch broadcast control.
  597. */
  598. if (BMVAL(val, 0, 7) > drvdata->nr_addr_cmp)
  599. return -EINVAL;
  600. config->bb_ctrl = val;
  601. return size;
  602. }
  603. static DEVICE_ATTR_RW(bb_ctrl);
  604. static ssize_t event_vinst_show(struct device *dev,
  605. struct device_attribute *attr,
  606. char *buf)
  607. {
  608. unsigned long val;
  609. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  610. struct etmv4_config *config = &drvdata->config;
  611. val = config->vinst_ctrl & ETMv4_EVENT_MASK;
  612. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  613. }
  614. static ssize_t event_vinst_store(struct device *dev,
  615. struct device_attribute *attr,
  616. const char *buf, size_t size)
  617. {
  618. unsigned long val;
  619. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  620. struct etmv4_config *config = &drvdata->config;
  621. if (kstrtoul(buf, 16, &val))
  622. return -EINVAL;
  623. spin_lock(&drvdata->spinlock);
  624. val &= ETMv4_EVENT_MASK;
  625. config->vinst_ctrl &= ~ETMv4_EVENT_MASK;
  626. config->vinst_ctrl |= val;
  627. spin_unlock(&drvdata->spinlock);
  628. return size;
  629. }
  630. static DEVICE_ATTR_RW(event_vinst);
  631. static ssize_t s_exlevel_vinst_show(struct device *dev,
  632. struct device_attribute *attr,
  633. char *buf)
  634. {
  635. unsigned long val;
  636. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  637. struct etmv4_config *config = &drvdata->config;
  638. val = BMVAL(config->vinst_ctrl, 16, 19);
  639. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  640. }
  641. static ssize_t s_exlevel_vinst_store(struct device *dev,
  642. struct device_attribute *attr,
  643. const char *buf, size_t size)
  644. {
  645. unsigned long val;
  646. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  647. struct etmv4_config *config = &drvdata->config;
  648. if (kstrtoul(buf, 16, &val))
  649. return -EINVAL;
  650. spin_lock(&drvdata->spinlock);
  651. /* clear all EXLEVEL_S bits (bit[18] is never implemented) */
  652. config->vinst_ctrl &= ~(BIT(16) | BIT(17) | BIT(19));
  653. /* enable instruction tracing for corresponding exception level */
  654. val &= drvdata->s_ex_level;
  655. config->vinst_ctrl |= (val << 16);
  656. spin_unlock(&drvdata->spinlock);
  657. return size;
  658. }
  659. static DEVICE_ATTR_RW(s_exlevel_vinst);
  660. static ssize_t ns_exlevel_vinst_show(struct device *dev,
  661. struct device_attribute *attr,
  662. char *buf)
  663. {
  664. unsigned long val;
  665. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  666. struct etmv4_config *config = &drvdata->config;
  667. /* EXLEVEL_NS, bits[23:20] */
  668. val = BMVAL(config->vinst_ctrl, 20, 23);
  669. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  670. }
  671. static ssize_t ns_exlevel_vinst_store(struct device *dev,
  672. struct device_attribute *attr,
  673. const char *buf, size_t size)
  674. {
  675. unsigned long val;
  676. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  677. struct etmv4_config *config = &drvdata->config;
  678. if (kstrtoul(buf, 16, &val))
  679. return -EINVAL;
  680. spin_lock(&drvdata->spinlock);
  681. /* clear EXLEVEL_NS bits (bit[23] is never implemented */
  682. config->vinst_ctrl &= ~(BIT(20) | BIT(21) | BIT(22));
  683. /* enable instruction tracing for corresponding exception level */
  684. val &= drvdata->ns_ex_level;
  685. config->vinst_ctrl |= (val << 20);
  686. spin_unlock(&drvdata->spinlock);
  687. return size;
  688. }
  689. static DEVICE_ATTR_RW(ns_exlevel_vinst);
  690. static ssize_t addr_idx_show(struct device *dev,
  691. struct device_attribute *attr,
  692. char *buf)
  693. {
  694. unsigned long val;
  695. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  696. struct etmv4_config *config = &drvdata->config;
  697. val = config->addr_idx;
  698. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  699. }
  700. static ssize_t addr_idx_store(struct device *dev,
  701. struct device_attribute *attr,
  702. const char *buf, size_t size)
  703. {
  704. unsigned long val;
  705. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  706. struct etmv4_config *config = &drvdata->config;
  707. if (kstrtoul(buf, 16, &val))
  708. return -EINVAL;
  709. if (val >= drvdata->nr_addr_cmp * 2)
  710. return -EINVAL;
  711. /*
  712. * Use spinlock to ensure index doesn't change while it gets
  713. * dereferenced multiple times within a spinlock block elsewhere.
  714. */
  715. spin_lock(&drvdata->spinlock);
  716. config->addr_idx = val;
  717. spin_unlock(&drvdata->spinlock);
  718. return size;
  719. }
  720. static DEVICE_ATTR_RW(addr_idx);
  721. static ssize_t addr_instdatatype_show(struct device *dev,
  722. struct device_attribute *attr,
  723. char *buf)
  724. {
  725. ssize_t len;
  726. u8 val, idx;
  727. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  728. struct etmv4_config *config = &drvdata->config;
  729. spin_lock(&drvdata->spinlock);
  730. idx = config->addr_idx;
  731. val = BMVAL(config->addr_acc[idx], 0, 1);
  732. len = scnprintf(buf, PAGE_SIZE, "%s\n",
  733. val == ETM_INSTR_ADDR ? "instr" :
  734. (val == ETM_DATA_LOAD_ADDR ? "data_load" :
  735. (val == ETM_DATA_STORE_ADDR ? "data_store" :
  736. "data_load_store")));
  737. spin_unlock(&drvdata->spinlock);
  738. return len;
  739. }
  740. static ssize_t addr_instdatatype_store(struct device *dev,
  741. struct device_attribute *attr,
  742. const char *buf, size_t size)
  743. {
  744. u8 idx;
  745. char str[20] = "";
  746. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  747. struct etmv4_config *config = &drvdata->config;
  748. if (strlen(buf) >= 20)
  749. return -EINVAL;
  750. if (sscanf(buf, "%s", str) != 1)
  751. return -EINVAL;
  752. spin_lock(&drvdata->spinlock);
  753. idx = config->addr_idx;
  754. if (!strcmp(str, "instr"))
  755. /* TYPE, bits[1:0] */
  756. config->addr_acc[idx] &= ~(BIT(0) | BIT(1));
  757. spin_unlock(&drvdata->spinlock);
  758. return size;
  759. }
  760. static DEVICE_ATTR_RW(addr_instdatatype);
  761. static ssize_t addr_single_show(struct device *dev,
  762. struct device_attribute *attr,
  763. char *buf)
  764. {
  765. u8 idx;
  766. unsigned long val;
  767. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  768. struct etmv4_config *config = &drvdata->config;
  769. idx = config->addr_idx;
  770. spin_lock(&drvdata->spinlock);
  771. if (!(config->addr_type[idx] == ETM_ADDR_TYPE_NONE ||
  772. config->addr_type[idx] == ETM_ADDR_TYPE_SINGLE)) {
  773. spin_unlock(&drvdata->spinlock);
  774. return -EPERM;
  775. }
  776. val = (unsigned long)config->addr_val[idx];
  777. spin_unlock(&drvdata->spinlock);
  778. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  779. }
  780. static ssize_t addr_single_store(struct device *dev,
  781. struct device_attribute *attr,
  782. const char *buf, size_t size)
  783. {
  784. u8 idx;
  785. unsigned long val;
  786. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  787. struct etmv4_config *config = &drvdata->config;
  788. if (kstrtoul(buf, 16, &val))
  789. return -EINVAL;
  790. spin_lock(&drvdata->spinlock);
  791. idx = config->addr_idx;
  792. if (!(config->addr_type[idx] == ETM_ADDR_TYPE_NONE ||
  793. config->addr_type[idx] == ETM_ADDR_TYPE_SINGLE)) {
  794. spin_unlock(&drvdata->spinlock);
  795. return -EPERM;
  796. }
  797. config->addr_val[idx] = (u64)val;
  798. config->addr_type[idx] = ETM_ADDR_TYPE_SINGLE;
  799. spin_unlock(&drvdata->spinlock);
  800. return size;
  801. }
  802. static DEVICE_ATTR_RW(addr_single);
  803. static ssize_t addr_range_show(struct device *dev,
  804. struct device_attribute *attr,
  805. char *buf)
  806. {
  807. u8 idx;
  808. unsigned long val1, val2;
  809. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  810. struct etmv4_config *config = &drvdata->config;
  811. spin_lock(&drvdata->spinlock);
  812. idx = config->addr_idx;
  813. if (idx % 2 != 0) {
  814. spin_unlock(&drvdata->spinlock);
  815. return -EPERM;
  816. }
  817. if (!((config->addr_type[idx] == ETM_ADDR_TYPE_NONE &&
  818. config->addr_type[idx + 1] == ETM_ADDR_TYPE_NONE) ||
  819. (config->addr_type[idx] == ETM_ADDR_TYPE_RANGE &&
  820. config->addr_type[idx + 1] == ETM_ADDR_TYPE_RANGE))) {
  821. spin_unlock(&drvdata->spinlock);
  822. return -EPERM;
  823. }
  824. val1 = (unsigned long)config->addr_val[idx];
  825. val2 = (unsigned long)config->addr_val[idx + 1];
  826. spin_unlock(&drvdata->spinlock);
  827. return scnprintf(buf, PAGE_SIZE, "%#lx %#lx\n", val1, val2);
  828. }
  829. static ssize_t addr_range_store(struct device *dev,
  830. struct device_attribute *attr,
  831. const char *buf, size_t size)
  832. {
  833. u8 idx;
  834. unsigned long val1, val2;
  835. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  836. struct etmv4_config *config = &drvdata->config;
  837. if (sscanf(buf, "%lx %lx", &val1, &val2) != 2)
  838. return -EINVAL;
  839. /* lower address comparator cannot have a higher address value */
  840. if (val1 > val2)
  841. return -EINVAL;
  842. spin_lock(&drvdata->spinlock);
  843. idx = config->addr_idx;
  844. if (idx % 2 != 0) {
  845. spin_unlock(&drvdata->spinlock);
  846. return -EPERM;
  847. }
  848. if (!((config->addr_type[idx] == ETM_ADDR_TYPE_NONE &&
  849. config->addr_type[idx + 1] == ETM_ADDR_TYPE_NONE) ||
  850. (config->addr_type[idx] == ETM_ADDR_TYPE_RANGE &&
  851. config->addr_type[idx + 1] == ETM_ADDR_TYPE_RANGE))) {
  852. spin_unlock(&drvdata->spinlock);
  853. return -EPERM;
  854. }
  855. config->addr_val[idx] = (u64)val1;
  856. config->addr_type[idx] = ETM_ADDR_TYPE_RANGE;
  857. config->addr_val[idx + 1] = (u64)val2;
  858. config->addr_type[idx + 1] = ETM_ADDR_TYPE_RANGE;
  859. /*
  860. * Program include or exclude control bits for vinst or vdata
  861. * whenever we change addr comparators to ETM_ADDR_TYPE_RANGE
  862. */
  863. if (config->mode & ETM_MODE_EXCLUDE)
  864. etm4_set_mode_exclude(drvdata, true);
  865. else
  866. etm4_set_mode_exclude(drvdata, false);
  867. spin_unlock(&drvdata->spinlock);
  868. return size;
  869. }
  870. static DEVICE_ATTR_RW(addr_range);
  871. static ssize_t addr_start_show(struct device *dev,
  872. struct device_attribute *attr,
  873. char *buf)
  874. {
  875. u8 idx;
  876. unsigned long val;
  877. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  878. struct etmv4_config *config = &drvdata->config;
  879. spin_lock(&drvdata->spinlock);
  880. idx = config->addr_idx;
  881. if (!(config->addr_type[idx] == ETM_ADDR_TYPE_NONE ||
  882. config->addr_type[idx] == ETM_ADDR_TYPE_START)) {
  883. spin_unlock(&drvdata->spinlock);
  884. return -EPERM;
  885. }
  886. val = (unsigned long)config->addr_val[idx];
  887. spin_unlock(&drvdata->spinlock);
  888. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  889. }
  890. static ssize_t addr_start_store(struct device *dev,
  891. struct device_attribute *attr,
  892. const char *buf, size_t size)
  893. {
  894. u8 idx;
  895. unsigned long val;
  896. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  897. struct etmv4_config *config = &drvdata->config;
  898. if (kstrtoul(buf, 16, &val))
  899. return -EINVAL;
  900. spin_lock(&drvdata->spinlock);
  901. idx = config->addr_idx;
  902. if (!drvdata->nr_addr_cmp) {
  903. spin_unlock(&drvdata->spinlock);
  904. return -EINVAL;
  905. }
  906. if (!(config->addr_type[idx] == ETM_ADDR_TYPE_NONE ||
  907. config->addr_type[idx] == ETM_ADDR_TYPE_START)) {
  908. spin_unlock(&drvdata->spinlock);
  909. return -EPERM;
  910. }
  911. config->addr_val[idx] = (u64)val;
  912. config->addr_type[idx] = ETM_ADDR_TYPE_START;
  913. config->vissctlr |= BIT(idx);
  914. /* SSSTATUS, bit[9] - turn on start/stop logic */
  915. config->vinst_ctrl |= BIT(9);
  916. spin_unlock(&drvdata->spinlock);
  917. return size;
  918. }
  919. static DEVICE_ATTR_RW(addr_start);
  920. static ssize_t addr_stop_show(struct device *dev,
  921. struct device_attribute *attr,
  922. char *buf)
  923. {
  924. u8 idx;
  925. unsigned long val;
  926. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  927. struct etmv4_config *config = &drvdata->config;
  928. spin_lock(&drvdata->spinlock);
  929. idx = config->addr_idx;
  930. if (!(config->addr_type[idx] == ETM_ADDR_TYPE_NONE ||
  931. config->addr_type[idx] == ETM_ADDR_TYPE_STOP)) {
  932. spin_unlock(&drvdata->spinlock);
  933. return -EPERM;
  934. }
  935. val = (unsigned long)config->addr_val[idx];
  936. spin_unlock(&drvdata->spinlock);
  937. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  938. }
  939. static ssize_t addr_stop_store(struct device *dev,
  940. struct device_attribute *attr,
  941. const char *buf, size_t size)
  942. {
  943. u8 idx;
  944. unsigned long val;
  945. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  946. struct etmv4_config *config = &drvdata->config;
  947. if (kstrtoul(buf, 16, &val))
  948. return -EINVAL;
  949. spin_lock(&drvdata->spinlock);
  950. idx = config->addr_idx;
  951. if (!drvdata->nr_addr_cmp) {
  952. spin_unlock(&drvdata->spinlock);
  953. return -EINVAL;
  954. }
  955. if (!(config->addr_type[idx] == ETM_ADDR_TYPE_NONE ||
  956. config->addr_type[idx] == ETM_ADDR_TYPE_STOP)) {
  957. spin_unlock(&drvdata->spinlock);
  958. return -EPERM;
  959. }
  960. config->addr_val[idx] = (u64)val;
  961. config->addr_type[idx] = ETM_ADDR_TYPE_STOP;
  962. config->vissctlr |= BIT(idx + 16);
  963. /* SSSTATUS, bit[9] - turn on start/stop logic */
  964. config->vinst_ctrl |= BIT(9);
  965. spin_unlock(&drvdata->spinlock);
  966. return size;
  967. }
  968. static DEVICE_ATTR_RW(addr_stop);
  969. static ssize_t addr_ctxtype_show(struct device *dev,
  970. struct device_attribute *attr,
  971. char *buf)
  972. {
  973. ssize_t len;
  974. u8 idx, val;
  975. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  976. struct etmv4_config *config = &drvdata->config;
  977. spin_lock(&drvdata->spinlock);
  978. idx = config->addr_idx;
  979. /* CONTEXTTYPE, bits[3:2] */
  980. val = BMVAL(config->addr_acc[idx], 2, 3);
  981. len = scnprintf(buf, PAGE_SIZE, "%s\n", val == ETM_CTX_NONE ? "none" :
  982. (val == ETM_CTX_CTXID ? "ctxid" :
  983. (val == ETM_CTX_VMID ? "vmid" : "all")));
  984. spin_unlock(&drvdata->spinlock);
  985. return len;
  986. }
  987. static ssize_t addr_ctxtype_store(struct device *dev,
  988. struct device_attribute *attr,
  989. const char *buf, size_t size)
  990. {
  991. u8 idx;
  992. char str[10] = "";
  993. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  994. struct etmv4_config *config = &drvdata->config;
  995. if (strlen(buf) >= 10)
  996. return -EINVAL;
  997. if (sscanf(buf, "%s", str) != 1)
  998. return -EINVAL;
  999. spin_lock(&drvdata->spinlock);
  1000. idx = config->addr_idx;
  1001. if (!strcmp(str, "none"))
  1002. /* start by clearing context type bits */
  1003. config->addr_acc[idx] &= ~(BIT(2) | BIT(3));
  1004. else if (!strcmp(str, "ctxid")) {
  1005. /* 0b01 The trace unit performs a Context ID */
  1006. if (drvdata->numcidc) {
  1007. config->addr_acc[idx] |= BIT(2);
  1008. config->addr_acc[idx] &= ~BIT(3);
  1009. }
  1010. } else if (!strcmp(str, "vmid")) {
  1011. /* 0b10 The trace unit performs a VMID */
  1012. if (drvdata->numvmidc) {
  1013. config->addr_acc[idx] &= ~BIT(2);
  1014. config->addr_acc[idx] |= BIT(3);
  1015. }
  1016. } else if (!strcmp(str, "all")) {
  1017. /*
  1018. * 0b11 The trace unit performs a Context ID
  1019. * comparison and a VMID
  1020. */
  1021. if (drvdata->numcidc)
  1022. config->addr_acc[idx] |= BIT(2);
  1023. if (drvdata->numvmidc)
  1024. config->addr_acc[idx] |= BIT(3);
  1025. }
  1026. spin_unlock(&drvdata->spinlock);
  1027. return size;
  1028. }
  1029. static DEVICE_ATTR_RW(addr_ctxtype);
  1030. static ssize_t addr_context_show(struct device *dev,
  1031. struct device_attribute *attr,
  1032. char *buf)
  1033. {
  1034. u8 idx;
  1035. unsigned long val;
  1036. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1037. struct etmv4_config *config = &drvdata->config;
  1038. spin_lock(&drvdata->spinlock);
  1039. idx = config->addr_idx;
  1040. /* context ID comparator bits[6:4] */
  1041. val = BMVAL(config->addr_acc[idx], 4, 6);
  1042. spin_unlock(&drvdata->spinlock);
  1043. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  1044. }
  1045. static ssize_t addr_context_store(struct device *dev,
  1046. struct device_attribute *attr,
  1047. const char *buf, size_t size)
  1048. {
  1049. u8 idx;
  1050. unsigned long val;
  1051. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1052. struct etmv4_config *config = &drvdata->config;
  1053. if (kstrtoul(buf, 16, &val))
  1054. return -EINVAL;
  1055. if ((drvdata->numcidc <= 1) && (drvdata->numvmidc <= 1))
  1056. return -EINVAL;
  1057. if (val >= (drvdata->numcidc >= drvdata->numvmidc ?
  1058. drvdata->numcidc : drvdata->numvmidc))
  1059. return -EINVAL;
  1060. spin_lock(&drvdata->spinlock);
  1061. idx = config->addr_idx;
  1062. /* clear context ID comparator bits[6:4] */
  1063. config->addr_acc[idx] &= ~(BIT(4) | BIT(5) | BIT(6));
  1064. config->addr_acc[idx] |= (val << 4);
  1065. spin_unlock(&drvdata->spinlock);
  1066. return size;
  1067. }
  1068. static DEVICE_ATTR_RW(addr_context);
  1069. static ssize_t seq_idx_show(struct device *dev,
  1070. struct device_attribute *attr,
  1071. char *buf)
  1072. {
  1073. unsigned long val;
  1074. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1075. struct etmv4_config *config = &drvdata->config;
  1076. val = config->seq_idx;
  1077. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  1078. }
  1079. static ssize_t seq_idx_store(struct device *dev,
  1080. struct device_attribute *attr,
  1081. const char *buf, size_t size)
  1082. {
  1083. unsigned long val;
  1084. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1085. struct etmv4_config *config = &drvdata->config;
  1086. if (kstrtoul(buf, 16, &val))
  1087. return -EINVAL;
  1088. if (val >= drvdata->nrseqstate - 1)
  1089. return -EINVAL;
  1090. /*
  1091. * Use spinlock to ensure index doesn't change while it gets
  1092. * dereferenced multiple times within a spinlock block elsewhere.
  1093. */
  1094. spin_lock(&drvdata->spinlock);
  1095. config->seq_idx = val;
  1096. spin_unlock(&drvdata->spinlock);
  1097. return size;
  1098. }
  1099. static DEVICE_ATTR_RW(seq_idx);
  1100. static ssize_t seq_state_show(struct device *dev,
  1101. struct device_attribute *attr,
  1102. char *buf)
  1103. {
  1104. unsigned long val;
  1105. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1106. struct etmv4_config *config = &drvdata->config;
  1107. val = config->seq_state;
  1108. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  1109. }
  1110. static ssize_t seq_state_store(struct device *dev,
  1111. struct device_attribute *attr,
  1112. const char *buf, size_t size)
  1113. {
  1114. unsigned long val;
  1115. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1116. struct etmv4_config *config = &drvdata->config;
  1117. if (kstrtoul(buf, 16, &val))
  1118. return -EINVAL;
  1119. if (val >= drvdata->nrseqstate)
  1120. return -EINVAL;
  1121. config->seq_state = val;
  1122. return size;
  1123. }
  1124. static DEVICE_ATTR_RW(seq_state);
  1125. static ssize_t seq_event_show(struct device *dev,
  1126. struct device_attribute *attr,
  1127. char *buf)
  1128. {
  1129. u8 idx;
  1130. unsigned long val;
  1131. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1132. struct etmv4_config *config = &drvdata->config;
  1133. spin_lock(&drvdata->spinlock);
  1134. idx = config->seq_idx;
  1135. val = config->seq_ctrl[idx];
  1136. spin_unlock(&drvdata->spinlock);
  1137. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  1138. }
  1139. static ssize_t seq_event_store(struct device *dev,
  1140. struct device_attribute *attr,
  1141. const char *buf, size_t size)
  1142. {
  1143. u8 idx;
  1144. unsigned long val;
  1145. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1146. struct etmv4_config *config = &drvdata->config;
  1147. if (kstrtoul(buf, 16, &val))
  1148. return -EINVAL;
  1149. spin_lock(&drvdata->spinlock);
  1150. idx = config->seq_idx;
  1151. /* RST, bits[7:0] */
  1152. config->seq_ctrl[idx] = val & 0xFF;
  1153. spin_unlock(&drvdata->spinlock);
  1154. return size;
  1155. }
  1156. static DEVICE_ATTR_RW(seq_event);
  1157. static ssize_t seq_reset_event_show(struct device *dev,
  1158. struct device_attribute *attr,
  1159. char *buf)
  1160. {
  1161. unsigned long val;
  1162. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1163. struct etmv4_config *config = &drvdata->config;
  1164. val = config->seq_rst;
  1165. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  1166. }
  1167. static ssize_t seq_reset_event_store(struct device *dev,
  1168. struct device_attribute *attr,
  1169. const char *buf, size_t size)
  1170. {
  1171. unsigned long val;
  1172. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1173. struct etmv4_config *config = &drvdata->config;
  1174. if (kstrtoul(buf, 16, &val))
  1175. return -EINVAL;
  1176. if (!(drvdata->nrseqstate))
  1177. return -EINVAL;
  1178. config->seq_rst = val & ETMv4_EVENT_MASK;
  1179. return size;
  1180. }
  1181. static DEVICE_ATTR_RW(seq_reset_event);
  1182. static ssize_t cntr_idx_show(struct device *dev,
  1183. struct device_attribute *attr,
  1184. char *buf)
  1185. {
  1186. unsigned long val;
  1187. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1188. struct etmv4_config *config = &drvdata->config;
  1189. val = config->cntr_idx;
  1190. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  1191. }
  1192. static ssize_t cntr_idx_store(struct device *dev,
  1193. struct device_attribute *attr,
  1194. const char *buf, size_t size)
  1195. {
  1196. unsigned long val;
  1197. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1198. struct etmv4_config *config = &drvdata->config;
  1199. if (kstrtoul(buf, 16, &val))
  1200. return -EINVAL;
  1201. if (val >= drvdata->nr_cntr)
  1202. return -EINVAL;
  1203. /*
  1204. * Use spinlock to ensure index doesn't change while it gets
  1205. * dereferenced multiple times within a spinlock block elsewhere.
  1206. */
  1207. spin_lock(&drvdata->spinlock);
  1208. config->cntr_idx = val;
  1209. spin_unlock(&drvdata->spinlock);
  1210. return size;
  1211. }
  1212. static DEVICE_ATTR_RW(cntr_idx);
  1213. static ssize_t cntrldvr_show(struct device *dev,
  1214. struct device_attribute *attr,
  1215. char *buf)
  1216. {
  1217. u8 idx;
  1218. unsigned long val;
  1219. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1220. struct etmv4_config *config = &drvdata->config;
  1221. spin_lock(&drvdata->spinlock);
  1222. idx = config->cntr_idx;
  1223. val = config->cntrldvr[idx];
  1224. spin_unlock(&drvdata->spinlock);
  1225. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  1226. }
  1227. static ssize_t cntrldvr_store(struct device *dev,
  1228. struct device_attribute *attr,
  1229. const char *buf, size_t size)
  1230. {
  1231. u8 idx;
  1232. unsigned long val;
  1233. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1234. struct etmv4_config *config = &drvdata->config;
  1235. if (kstrtoul(buf, 16, &val))
  1236. return -EINVAL;
  1237. if (val > ETM_CNTR_MAX_VAL)
  1238. return -EINVAL;
  1239. spin_lock(&drvdata->spinlock);
  1240. idx = config->cntr_idx;
  1241. config->cntrldvr[idx] = val;
  1242. spin_unlock(&drvdata->spinlock);
  1243. return size;
  1244. }
  1245. static DEVICE_ATTR_RW(cntrldvr);
  1246. static ssize_t cntr_val_show(struct device *dev,
  1247. struct device_attribute *attr,
  1248. char *buf)
  1249. {
  1250. u8 idx;
  1251. unsigned long val;
  1252. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1253. struct etmv4_config *config = &drvdata->config;
  1254. spin_lock(&drvdata->spinlock);
  1255. idx = config->cntr_idx;
  1256. val = config->cntr_val[idx];
  1257. spin_unlock(&drvdata->spinlock);
  1258. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  1259. }
  1260. static ssize_t cntr_val_store(struct device *dev,
  1261. struct device_attribute *attr,
  1262. const char *buf, size_t size)
  1263. {
  1264. u8 idx;
  1265. unsigned long val;
  1266. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1267. struct etmv4_config *config = &drvdata->config;
  1268. if (kstrtoul(buf, 16, &val))
  1269. return -EINVAL;
  1270. if (val > ETM_CNTR_MAX_VAL)
  1271. return -EINVAL;
  1272. spin_lock(&drvdata->spinlock);
  1273. idx = config->cntr_idx;
  1274. config->cntr_val[idx] = val;
  1275. spin_unlock(&drvdata->spinlock);
  1276. return size;
  1277. }
  1278. static DEVICE_ATTR_RW(cntr_val);
  1279. static ssize_t cntr_ctrl_show(struct device *dev,
  1280. struct device_attribute *attr,
  1281. char *buf)
  1282. {
  1283. u8 idx;
  1284. unsigned long val;
  1285. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1286. struct etmv4_config *config = &drvdata->config;
  1287. spin_lock(&drvdata->spinlock);
  1288. idx = config->cntr_idx;
  1289. val = config->cntr_ctrl[idx];
  1290. spin_unlock(&drvdata->spinlock);
  1291. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  1292. }
  1293. static ssize_t cntr_ctrl_store(struct device *dev,
  1294. struct device_attribute *attr,
  1295. const char *buf, size_t size)
  1296. {
  1297. u8 idx;
  1298. unsigned long val;
  1299. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1300. struct etmv4_config *config = &drvdata->config;
  1301. if (kstrtoul(buf, 16, &val))
  1302. return -EINVAL;
  1303. spin_lock(&drvdata->spinlock);
  1304. idx = config->cntr_idx;
  1305. config->cntr_ctrl[idx] = val;
  1306. spin_unlock(&drvdata->spinlock);
  1307. return size;
  1308. }
  1309. static DEVICE_ATTR_RW(cntr_ctrl);
  1310. static ssize_t res_idx_show(struct device *dev,
  1311. struct device_attribute *attr,
  1312. char *buf)
  1313. {
  1314. unsigned long val;
  1315. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1316. struct etmv4_config *config = &drvdata->config;
  1317. val = config->res_idx;
  1318. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  1319. }
  1320. static ssize_t res_idx_store(struct device *dev,
  1321. struct device_attribute *attr,
  1322. const char *buf, size_t size)
  1323. {
  1324. unsigned long val;
  1325. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1326. struct etmv4_config *config = &drvdata->config;
  1327. if (kstrtoul(buf, 16, &val))
  1328. return -EINVAL;
  1329. /* Resource selector pair 0 is always implemented and reserved */
  1330. if ((val == 0) || (val >= drvdata->nr_resource))
  1331. return -EINVAL;
  1332. /*
  1333. * Use spinlock to ensure index doesn't change while it gets
  1334. * dereferenced multiple times within a spinlock block elsewhere.
  1335. */
  1336. spin_lock(&drvdata->spinlock);
  1337. config->res_idx = val;
  1338. spin_unlock(&drvdata->spinlock);
  1339. return size;
  1340. }
  1341. static DEVICE_ATTR_RW(res_idx);
  1342. static ssize_t res_ctrl_show(struct device *dev,
  1343. struct device_attribute *attr,
  1344. char *buf)
  1345. {
  1346. u8 idx;
  1347. unsigned long val;
  1348. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1349. struct etmv4_config *config = &drvdata->config;
  1350. spin_lock(&drvdata->spinlock);
  1351. idx = config->res_idx;
  1352. val = config->res_ctrl[idx];
  1353. spin_unlock(&drvdata->spinlock);
  1354. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  1355. }
  1356. static ssize_t res_ctrl_store(struct device *dev,
  1357. struct device_attribute *attr,
  1358. const char *buf, size_t size)
  1359. {
  1360. u8 idx;
  1361. unsigned long val;
  1362. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1363. struct etmv4_config *config = &drvdata->config;
  1364. if (kstrtoul(buf, 16, &val))
  1365. return -EINVAL;
  1366. spin_lock(&drvdata->spinlock);
  1367. idx = config->res_idx;
  1368. /* For odd idx pair inversal bit is RES0 */
  1369. if (idx % 2 != 0)
  1370. /* PAIRINV, bit[21] */
  1371. val &= ~BIT(21);
  1372. config->res_ctrl[idx] = val;
  1373. spin_unlock(&drvdata->spinlock);
  1374. return size;
  1375. }
  1376. static DEVICE_ATTR_RW(res_ctrl);
  1377. static ssize_t ctxid_idx_show(struct device *dev,
  1378. struct device_attribute *attr,
  1379. char *buf)
  1380. {
  1381. unsigned long val;
  1382. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1383. struct etmv4_config *config = &drvdata->config;
  1384. val = config->ctxid_idx;
  1385. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  1386. }
  1387. static ssize_t ctxid_idx_store(struct device *dev,
  1388. struct device_attribute *attr,
  1389. const char *buf, size_t size)
  1390. {
  1391. unsigned long val;
  1392. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1393. struct etmv4_config *config = &drvdata->config;
  1394. if (kstrtoul(buf, 16, &val))
  1395. return -EINVAL;
  1396. if (val >= drvdata->numcidc)
  1397. return -EINVAL;
  1398. /*
  1399. * Use spinlock to ensure index doesn't change while it gets
  1400. * dereferenced multiple times within a spinlock block elsewhere.
  1401. */
  1402. spin_lock(&drvdata->spinlock);
  1403. config->ctxid_idx = val;
  1404. spin_unlock(&drvdata->spinlock);
  1405. return size;
  1406. }
  1407. static DEVICE_ATTR_RW(ctxid_idx);
  1408. static ssize_t ctxid_pid_show(struct device *dev,
  1409. struct device_attribute *attr,
  1410. char *buf)
  1411. {
  1412. u8 idx;
  1413. unsigned long val;
  1414. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1415. struct etmv4_config *config = &drvdata->config;
  1416. spin_lock(&drvdata->spinlock);
  1417. idx = config->ctxid_idx;
  1418. val = (unsigned long)config->ctxid_vpid[idx];
  1419. spin_unlock(&drvdata->spinlock);
  1420. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  1421. }
  1422. static ssize_t ctxid_pid_store(struct device *dev,
  1423. struct device_attribute *attr,
  1424. const char *buf, size_t size)
  1425. {
  1426. u8 idx;
  1427. unsigned long vpid, pid;
  1428. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1429. struct etmv4_config *config = &drvdata->config;
  1430. /*
  1431. * only implemented when ctxid tracing is enabled, i.e. at least one
  1432. * ctxid comparator is implemented and ctxid is greater than 0 bits
  1433. * in length
  1434. */
  1435. if (!drvdata->ctxid_size || !drvdata->numcidc)
  1436. return -EINVAL;
  1437. if (kstrtoul(buf, 16, &vpid))
  1438. return -EINVAL;
  1439. pid = coresight_vpid_to_pid(vpid);
  1440. spin_lock(&drvdata->spinlock);
  1441. idx = config->ctxid_idx;
  1442. config->ctxid_pid[idx] = (u64)pid;
  1443. config->ctxid_vpid[idx] = (u64)vpid;
  1444. spin_unlock(&drvdata->spinlock);
  1445. return size;
  1446. }
  1447. static DEVICE_ATTR_RW(ctxid_pid);
  1448. static ssize_t ctxid_masks_show(struct device *dev,
  1449. struct device_attribute *attr,
  1450. char *buf)
  1451. {
  1452. unsigned long val1, val2;
  1453. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1454. struct etmv4_config *config = &drvdata->config;
  1455. spin_lock(&drvdata->spinlock);
  1456. val1 = config->ctxid_mask0;
  1457. val2 = config->ctxid_mask1;
  1458. spin_unlock(&drvdata->spinlock);
  1459. return scnprintf(buf, PAGE_SIZE, "%#lx %#lx\n", val1, val2);
  1460. }
  1461. static ssize_t ctxid_masks_store(struct device *dev,
  1462. struct device_attribute *attr,
  1463. const char *buf, size_t size)
  1464. {
  1465. u8 i, j, maskbyte;
  1466. unsigned long val1, val2, mask;
  1467. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1468. struct etmv4_config *config = &drvdata->config;
  1469. /*
  1470. * only implemented when ctxid tracing is enabled, i.e. at least one
  1471. * ctxid comparator is implemented and ctxid is greater than 0 bits
  1472. * in length
  1473. */
  1474. if (!drvdata->ctxid_size || !drvdata->numcidc)
  1475. return -EINVAL;
  1476. if (sscanf(buf, "%lx %lx", &val1, &val2) != 2)
  1477. return -EINVAL;
  1478. spin_lock(&drvdata->spinlock);
  1479. /*
  1480. * each byte[0..3] controls mask value applied to ctxid
  1481. * comparator[0..3]
  1482. */
  1483. switch (drvdata->numcidc) {
  1484. case 0x1:
  1485. /* COMP0, bits[7:0] */
  1486. config->ctxid_mask0 = val1 & 0xFF;
  1487. break;
  1488. case 0x2:
  1489. /* COMP1, bits[15:8] */
  1490. config->ctxid_mask0 = val1 & 0xFFFF;
  1491. break;
  1492. case 0x3:
  1493. /* COMP2, bits[23:16] */
  1494. config->ctxid_mask0 = val1 & 0xFFFFFF;
  1495. break;
  1496. case 0x4:
  1497. /* COMP3, bits[31:24] */
  1498. config->ctxid_mask0 = val1;
  1499. break;
  1500. case 0x5:
  1501. /* COMP4, bits[7:0] */
  1502. config->ctxid_mask0 = val1;
  1503. config->ctxid_mask1 = val2 & 0xFF;
  1504. break;
  1505. case 0x6:
  1506. /* COMP5, bits[15:8] */
  1507. config->ctxid_mask0 = val1;
  1508. config->ctxid_mask1 = val2 & 0xFFFF;
  1509. break;
  1510. case 0x7:
  1511. /* COMP6, bits[23:16] */
  1512. config->ctxid_mask0 = val1;
  1513. config->ctxid_mask1 = val2 & 0xFFFFFF;
  1514. break;
  1515. case 0x8:
  1516. /* COMP7, bits[31:24] */
  1517. config->ctxid_mask0 = val1;
  1518. config->ctxid_mask1 = val2;
  1519. break;
  1520. default:
  1521. break;
  1522. }
  1523. /*
  1524. * If software sets a mask bit to 1, it must program relevant byte
  1525. * of ctxid comparator value 0x0, otherwise behavior is unpredictable.
  1526. * For example, if bit[3] of ctxid_mask0 is 1, we must clear bits[31:24]
  1527. * of ctxid comparator0 value (corresponding to byte 0) register.
  1528. */
  1529. mask = config->ctxid_mask0;
  1530. for (i = 0; i < drvdata->numcidc; i++) {
  1531. /* mask value of corresponding ctxid comparator */
  1532. maskbyte = mask & ETMv4_EVENT_MASK;
  1533. /*
  1534. * each bit corresponds to a byte of respective ctxid comparator
  1535. * value register
  1536. */
  1537. for (j = 0; j < 8; j++) {
  1538. if (maskbyte & 1)
  1539. config->ctxid_pid[i] &= ~(0xFF << (j * 8));
  1540. maskbyte >>= 1;
  1541. }
  1542. /* Select the next ctxid comparator mask value */
  1543. if (i == 3)
  1544. /* ctxid comparators[4-7] */
  1545. mask = config->ctxid_mask1;
  1546. else
  1547. mask >>= 0x8;
  1548. }
  1549. spin_unlock(&drvdata->spinlock);
  1550. return size;
  1551. }
  1552. static DEVICE_ATTR_RW(ctxid_masks);
  1553. static ssize_t vmid_idx_show(struct device *dev,
  1554. struct device_attribute *attr,
  1555. char *buf)
  1556. {
  1557. unsigned long val;
  1558. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1559. struct etmv4_config *config = &drvdata->config;
  1560. val = config->vmid_idx;
  1561. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  1562. }
  1563. static ssize_t vmid_idx_store(struct device *dev,
  1564. struct device_attribute *attr,
  1565. const char *buf, size_t size)
  1566. {
  1567. unsigned long val;
  1568. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1569. struct etmv4_config *config = &drvdata->config;
  1570. if (kstrtoul(buf, 16, &val))
  1571. return -EINVAL;
  1572. if (val >= drvdata->numvmidc)
  1573. return -EINVAL;
  1574. /*
  1575. * Use spinlock to ensure index doesn't change while it gets
  1576. * dereferenced multiple times within a spinlock block elsewhere.
  1577. */
  1578. spin_lock(&drvdata->spinlock);
  1579. config->vmid_idx = val;
  1580. spin_unlock(&drvdata->spinlock);
  1581. return size;
  1582. }
  1583. static DEVICE_ATTR_RW(vmid_idx);
  1584. static ssize_t vmid_val_show(struct device *dev,
  1585. struct device_attribute *attr,
  1586. char *buf)
  1587. {
  1588. unsigned long val;
  1589. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1590. struct etmv4_config *config = &drvdata->config;
  1591. val = (unsigned long)config->vmid_val[config->vmid_idx];
  1592. return scnprintf(buf, PAGE_SIZE, "%#lx\n", val);
  1593. }
  1594. static ssize_t vmid_val_store(struct device *dev,
  1595. struct device_attribute *attr,
  1596. const char *buf, size_t size)
  1597. {
  1598. unsigned long val;
  1599. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1600. struct etmv4_config *config = &drvdata->config;
  1601. /*
  1602. * only implemented when vmid tracing is enabled, i.e. at least one
  1603. * vmid comparator is implemented and at least 8 bit vmid size
  1604. */
  1605. if (!drvdata->vmid_size || !drvdata->numvmidc)
  1606. return -EINVAL;
  1607. if (kstrtoul(buf, 16, &val))
  1608. return -EINVAL;
  1609. spin_lock(&drvdata->spinlock);
  1610. config->vmid_val[config->vmid_idx] = (u64)val;
  1611. spin_unlock(&drvdata->spinlock);
  1612. return size;
  1613. }
  1614. static DEVICE_ATTR_RW(vmid_val);
  1615. static ssize_t vmid_masks_show(struct device *dev,
  1616. struct device_attribute *attr, char *buf)
  1617. {
  1618. unsigned long val1, val2;
  1619. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1620. struct etmv4_config *config = &drvdata->config;
  1621. spin_lock(&drvdata->spinlock);
  1622. val1 = config->vmid_mask0;
  1623. val2 = config->vmid_mask1;
  1624. spin_unlock(&drvdata->spinlock);
  1625. return scnprintf(buf, PAGE_SIZE, "%#lx %#lx\n", val1, val2);
  1626. }
  1627. static ssize_t vmid_masks_store(struct device *dev,
  1628. struct device_attribute *attr,
  1629. const char *buf, size_t size)
  1630. {
  1631. u8 i, j, maskbyte;
  1632. unsigned long val1, val2, mask;
  1633. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1634. struct etmv4_config *config = &drvdata->config;
  1635. /*
  1636. * only implemented when vmid tracing is enabled, i.e. at least one
  1637. * vmid comparator is implemented and at least 8 bit vmid size
  1638. */
  1639. if (!drvdata->vmid_size || !drvdata->numvmidc)
  1640. return -EINVAL;
  1641. if (sscanf(buf, "%lx %lx", &val1, &val2) != 2)
  1642. return -EINVAL;
  1643. spin_lock(&drvdata->spinlock);
  1644. /*
  1645. * each byte[0..3] controls mask value applied to vmid
  1646. * comparator[0..3]
  1647. */
  1648. switch (drvdata->numvmidc) {
  1649. case 0x1:
  1650. /* COMP0, bits[7:0] */
  1651. config->vmid_mask0 = val1 & 0xFF;
  1652. break;
  1653. case 0x2:
  1654. /* COMP1, bits[15:8] */
  1655. config->vmid_mask0 = val1 & 0xFFFF;
  1656. break;
  1657. case 0x3:
  1658. /* COMP2, bits[23:16] */
  1659. config->vmid_mask0 = val1 & 0xFFFFFF;
  1660. break;
  1661. case 0x4:
  1662. /* COMP3, bits[31:24] */
  1663. config->vmid_mask0 = val1;
  1664. break;
  1665. case 0x5:
  1666. /* COMP4, bits[7:0] */
  1667. config->vmid_mask0 = val1;
  1668. config->vmid_mask1 = val2 & 0xFF;
  1669. break;
  1670. case 0x6:
  1671. /* COMP5, bits[15:8] */
  1672. config->vmid_mask0 = val1;
  1673. config->vmid_mask1 = val2 & 0xFFFF;
  1674. break;
  1675. case 0x7:
  1676. /* COMP6, bits[23:16] */
  1677. config->vmid_mask0 = val1;
  1678. config->vmid_mask1 = val2 & 0xFFFFFF;
  1679. break;
  1680. case 0x8:
  1681. /* COMP7, bits[31:24] */
  1682. config->vmid_mask0 = val1;
  1683. config->vmid_mask1 = val2;
  1684. break;
  1685. default:
  1686. break;
  1687. }
  1688. /*
  1689. * If software sets a mask bit to 1, it must program relevant byte
  1690. * of vmid comparator value 0x0, otherwise behavior is unpredictable.
  1691. * For example, if bit[3] of vmid_mask0 is 1, we must clear bits[31:24]
  1692. * of vmid comparator0 value (corresponding to byte 0) register.
  1693. */
  1694. mask = config->vmid_mask0;
  1695. for (i = 0; i < drvdata->numvmidc; i++) {
  1696. /* mask value of corresponding vmid comparator */
  1697. maskbyte = mask & ETMv4_EVENT_MASK;
  1698. /*
  1699. * each bit corresponds to a byte of respective vmid comparator
  1700. * value register
  1701. */
  1702. for (j = 0; j < 8; j++) {
  1703. if (maskbyte & 1)
  1704. config->vmid_val[i] &= ~(0xFF << (j * 8));
  1705. maskbyte >>= 1;
  1706. }
  1707. /* Select the next vmid comparator mask value */
  1708. if (i == 3)
  1709. /* vmid comparators[4-7] */
  1710. mask = config->vmid_mask1;
  1711. else
  1712. mask >>= 0x8;
  1713. }
  1714. spin_unlock(&drvdata->spinlock);
  1715. return size;
  1716. }
  1717. static DEVICE_ATTR_RW(vmid_masks);
  1718. static ssize_t cpu_show(struct device *dev,
  1719. struct device_attribute *attr, char *buf)
  1720. {
  1721. int val;
  1722. struct etmv4_drvdata *drvdata = dev_get_drvdata(dev->parent);
  1723. val = drvdata->cpu;
  1724. return scnprintf(buf, PAGE_SIZE, "%d\n", val);
  1725. }
  1726. static DEVICE_ATTR_RO(cpu);
  1727. static struct attribute *coresight_etmv4_attrs[] = {
  1728. &dev_attr_nr_pe_cmp.attr,
  1729. &dev_attr_nr_addr_cmp.attr,
  1730. &dev_attr_nr_cntr.attr,
  1731. &dev_attr_nr_ext_inp.attr,
  1732. &dev_attr_numcidc.attr,
  1733. &dev_attr_numvmidc.attr,
  1734. &dev_attr_nrseqstate.attr,
  1735. &dev_attr_nr_resource.attr,
  1736. &dev_attr_nr_ss_cmp.attr,
  1737. &dev_attr_reset.attr,
  1738. &dev_attr_mode.attr,
  1739. &dev_attr_pe.attr,
  1740. &dev_attr_event.attr,
  1741. &dev_attr_event_instren.attr,
  1742. &dev_attr_event_ts.attr,
  1743. &dev_attr_syncfreq.attr,
  1744. &dev_attr_cyc_threshold.attr,
  1745. &dev_attr_bb_ctrl.attr,
  1746. &dev_attr_event_vinst.attr,
  1747. &dev_attr_s_exlevel_vinst.attr,
  1748. &dev_attr_ns_exlevel_vinst.attr,
  1749. &dev_attr_addr_idx.attr,
  1750. &dev_attr_addr_instdatatype.attr,
  1751. &dev_attr_addr_single.attr,
  1752. &dev_attr_addr_range.attr,
  1753. &dev_attr_addr_start.attr,
  1754. &dev_attr_addr_stop.attr,
  1755. &dev_attr_addr_ctxtype.attr,
  1756. &dev_attr_addr_context.attr,
  1757. &dev_attr_seq_idx.attr,
  1758. &dev_attr_seq_state.attr,
  1759. &dev_attr_seq_event.attr,
  1760. &dev_attr_seq_reset_event.attr,
  1761. &dev_attr_cntr_idx.attr,
  1762. &dev_attr_cntrldvr.attr,
  1763. &dev_attr_cntr_val.attr,
  1764. &dev_attr_cntr_ctrl.attr,
  1765. &dev_attr_res_idx.attr,
  1766. &dev_attr_res_ctrl.attr,
  1767. &dev_attr_ctxid_idx.attr,
  1768. &dev_attr_ctxid_pid.attr,
  1769. &dev_attr_ctxid_masks.attr,
  1770. &dev_attr_vmid_idx.attr,
  1771. &dev_attr_vmid_val.attr,
  1772. &dev_attr_vmid_masks.attr,
  1773. &dev_attr_cpu.attr,
  1774. NULL,
  1775. };
  1776. #define coresight_etm4x_simple_func(name, offset) \
  1777. coresight_simple_func(struct etmv4_drvdata, name, offset)
  1778. coresight_etm4x_simple_func(trcoslsr, TRCOSLSR);
  1779. coresight_etm4x_simple_func(trcpdcr, TRCPDCR);
  1780. coresight_etm4x_simple_func(trcpdsr, TRCPDSR);
  1781. coresight_etm4x_simple_func(trclsr, TRCLSR);
  1782. coresight_etm4x_simple_func(trcconfig, TRCCONFIGR);
  1783. coresight_etm4x_simple_func(trctraceid, TRCTRACEIDR);
  1784. coresight_etm4x_simple_func(trcauthstatus, TRCAUTHSTATUS);
  1785. coresight_etm4x_simple_func(trcdevid, TRCDEVID);
  1786. coresight_etm4x_simple_func(trcdevtype, TRCDEVTYPE);
  1787. coresight_etm4x_simple_func(trcpidr0, TRCPIDR0);
  1788. coresight_etm4x_simple_func(trcpidr1, TRCPIDR1);
  1789. coresight_etm4x_simple_func(trcpidr2, TRCPIDR2);
  1790. coresight_etm4x_simple_func(trcpidr3, TRCPIDR3);
  1791. static struct attribute *coresight_etmv4_mgmt_attrs[] = {
  1792. &dev_attr_trcoslsr.attr,
  1793. &dev_attr_trcpdcr.attr,
  1794. &dev_attr_trcpdsr.attr,
  1795. &dev_attr_trclsr.attr,
  1796. &dev_attr_trcconfig.attr,
  1797. &dev_attr_trctraceid.attr,
  1798. &dev_attr_trcauthstatus.attr,
  1799. &dev_attr_trcdevid.attr,
  1800. &dev_attr_trcdevtype.attr,
  1801. &dev_attr_trcpidr0.attr,
  1802. &dev_attr_trcpidr1.attr,
  1803. &dev_attr_trcpidr2.attr,
  1804. &dev_attr_trcpidr3.attr,
  1805. NULL,
  1806. };
  1807. coresight_etm4x_simple_func(trcidr0, TRCIDR0);
  1808. coresight_etm4x_simple_func(trcidr1, TRCIDR1);
  1809. coresight_etm4x_simple_func(trcidr2, TRCIDR2);
  1810. coresight_etm4x_simple_func(trcidr3, TRCIDR3);
  1811. coresight_etm4x_simple_func(trcidr4, TRCIDR4);
  1812. coresight_etm4x_simple_func(trcidr5, TRCIDR5);
  1813. /* trcidr[6,7] are reserved */
  1814. coresight_etm4x_simple_func(trcidr8, TRCIDR8);
  1815. coresight_etm4x_simple_func(trcidr9, TRCIDR9);
  1816. coresight_etm4x_simple_func(trcidr10, TRCIDR10);
  1817. coresight_etm4x_simple_func(trcidr11, TRCIDR11);
  1818. coresight_etm4x_simple_func(trcidr12, TRCIDR12);
  1819. coresight_etm4x_simple_func(trcidr13, TRCIDR13);
  1820. static struct attribute *coresight_etmv4_trcidr_attrs[] = {
  1821. &dev_attr_trcidr0.attr,
  1822. &dev_attr_trcidr1.attr,
  1823. &dev_attr_trcidr2.attr,
  1824. &dev_attr_trcidr3.attr,
  1825. &dev_attr_trcidr4.attr,
  1826. &dev_attr_trcidr5.attr,
  1827. /* trcidr[6,7] are reserved */
  1828. &dev_attr_trcidr8.attr,
  1829. &dev_attr_trcidr9.attr,
  1830. &dev_attr_trcidr10.attr,
  1831. &dev_attr_trcidr11.attr,
  1832. &dev_attr_trcidr12.attr,
  1833. &dev_attr_trcidr13.attr,
  1834. NULL,
  1835. };
  1836. static const struct attribute_group coresight_etmv4_group = {
  1837. .attrs = coresight_etmv4_attrs,
  1838. };
  1839. static const struct attribute_group coresight_etmv4_mgmt_group = {
  1840. .attrs = coresight_etmv4_mgmt_attrs,
  1841. .name = "mgmt",
  1842. };
  1843. static const struct attribute_group coresight_etmv4_trcidr_group = {
  1844. .attrs = coresight_etmv4_trcidr_attrs,
  1845. .name = "trcidr",
  1846. };
  1847. const struct attribute_group *coresight_etmv4_groups[] = {
  1848. &coresight_etmv4_group,
  1849. &coresight_etmv4_mgmt_group,
  1850. &coresight_etmv4_trcidr_group,
  1851. NULL,
  1852. };