ipuv3-plane.c 13 KB

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  1. /*
  2. * i.MX IPUv3 DP Overlay Planes
  3. *
  4. * Copyright (C) 2013 Philipp Zabel, Pengutronix
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * as published by the Free Software Foundation; either version 2
  9. * of the License, or (at your option) any later version.
  10. * This program is distributed in the hope that it will be useful,
  11. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  12. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  13. * GNU General Public License for more details.
  14. */
  15. #include <drm/drmP.h>
  16. #include <drm/drm_atomic.h>
  17. #include <drm/drm_atomic_helper.h>
  18. #include <drm/drm_fb_cma_helper.h>
  19. #include <drm/drm_gem_cma_helper.h>
  20. #include <drm/drm_plane_helper.h>
  21. #include "video/imx-ipu-v3.h"
  22. #include "ipuv3-plane.h"
  23. static inline struct ipu_plane *to_ipu_plane(struct drm_plane *p)
  24. {
  25. return container_of(p, struct ipu_plane, base);
  26. }
  27. static const uint32_t ipu_plane_formats[] = {
  28. DRM_FORMAT_ARGB1555,
  29. DRM_FORMAT_XRGB1555,
  30. DRM_FORMAT_ABGR1555,
  31. DRM_FORMAT_XBGR1555,
  32. DRM_FORMAT_RGBA5551,
  33. DRM_FORMAT_BGRA5551,
  34. DRM_FORMAT_ARGB4444,
  35. DRM_FORMAT_ARGB8888,
  36. DRM_FORMAT_XRGB8888,
  37. DRM_FORMAT_ABGR8888,
  38. DRM_FORMAT_XBGR8888,
  39. DRM_FORMAT_RGBA8888,
  40. DRM_FORMAT_RGBX8888,
  41. DRM_FORMAT_BGRA8888,
  42. DRM_FORMAT_BGRA8888,
  43. DRM_FORMAT_UYVY,
  44. DRM_FORMAT_VYUY,
  45. DRM_FORMAT_YUYV,
  46. DRM_FORMAT_YVYU,
  47. DRM_FORMAT_YUV420,
  48. DRM_FORMAT_YVU420,
  49. DRM_FORMAT_RGB565,
  50. };
  51. int ipu_plane_irq(struct ipu_plane *ipu_plane)
  52. {
  53. return ipu_idmac_channel_irq(ipu_plane->ipu, ipu_plane->ipu_ch,
  54. IPU_IRQ_EOF);
  55. }
  56. static inline unsigned long
  57. drm_plane_state_to_eba(struct drm_plane_state *state)
  58. {
  59. struct drm_framebuffer *fb = state->fb;
  60. struct drm_gem_cma_object *cma_obj;
  61. cma_obj = drm_fb_cma_get_gem_obj(fb, 0);
  62. BUG_ON(!cma_obj);
  63. return cma_obj->paddr + fb->offsets[0] +
  64. fb->pitches[0] * (state->src_y >> 16) +
  65. (fb->bits_per_pixel >> 3) * (state->src_x >> 16);
  66. }
  67. static inline unsigned long
  68. drm_plane_state_to_ubo(struct drm_plane_state *state)
  69. {
  70. struct drm_framebuffer *fb = state->fb;
  71. struct drm_gem_cma_object *cma_obj;
  72. unsigned long eba = drm_plane_state_to_eba(state);
  73. cma_obj = drm_fb_cma_get_gem_obj(fb, 1);
  74. BUG_ON(!cma_obj);
  75. return cma_obj->paddr + fb->offsets[1] +
  76. fb->pitches[1] * (state->src_y >> 16) / 2 +
  77. (state->src_x >> 16) / 2 - eba;
  78. }
  79. static inline unsigned long
  80. drm_plane_state_to_vbo(struct drm_plane_state *state)
  81. {
  82. struct drm_framebuffer *fb = state->fb;
  83. struct drm_gem_cma_object *cma_obj;
  84. unsigned long eba = drm_plane_state_to_eba(state);
  85. cma_obj = drm_fb_cma_get_gem_obj(fb, 2);
  86. BUG_ON(!cma_obj);
  87. return cma_obj->paddr + fb->offsets[2] +
  88. fb->pitches[2] * (state->src_y >> 16) / 2 +
  89. (state->src_x >> 16) / 2 - eba;
  90. }
  91. static void ipu_plane_atomic_set_base(struct ipu_plane *ipu_plane,
  92. struct drm_plane_state *old_state)
  93. {
  94. struct drm_plane *plane = &ipu_plane->base;
  95. struct drm_plane_state *state = plane->state;
  96. struct drm_framebuffer *fb = state->fb;
  97. unsigned long eba, ubo, vbo;
  98. int active;
  99. eba = drm_plane_state_to_eba(state);
  100. switch (fb->pixel_format) {
  101. case DRM_FORMAT_YUV420:
  102. case DRM_FORMAT_YVU420:
  103. if (old_state->fb)
  104. break;
  105. /*
  106. * Multiplanar formats have to meet the following restrictions:
  107. * - The (up to) three plane addresses are EBA, EBA+UBO, EBA+VBO
  108. * - EBA, UBO and VBO are a multiple of 8
  109. * - UBO and VBO are unsigned and not larger than 0xfffff8
  110. * - Only EBA may be changed while scanout is active
  111. * - The strides of U and V planes must be identical.
  112. */
  113. ubo = drm_plane_state_to_ubo(state);
  114. vbo = drm_plane_state_to_vbo(state);
  115. if (fb->pixel_format == DRM_FORMAT_YUV420)
  116. ipu_cpmem_set_yuv_planar_full(ipu_plane->ipu_ch,
  117. fb->pitches[1], ubo, vbo);
  118. else
  119. ipu_cpmem_set_yuv_planar_full(ipu_plane->ipu_ch,
  120. fb->pitches[1], vbo, ubo);
  121. dev_dbg(ipu_plane->base.dev->dev,
  122. "phy = %lu %lu %lu, x = %d, y = %d", eba, ubo, vbo,
  123. state->src_x >> 16, state->src_y >> 16);
  124. break;
  125. default:
  126. dev_dbg(ipu_plane->base.dev->dev, "phys = %lu, x = %d, y = %d",
  127. eba, state->src_x >> 16, state->src_y >> 16);
  128. break;
  129. }
  130. if (old_state->fb) {
  131. active = ipu_idmac_get_current_buffer(ipu_plane->ipu_ch);
  132. ipu_cpmem_set_buffer(ipu_plane->ipu_ch, !active, eba);
  133. ipu_idmac_select_buffer(ipu_plane->ipu_ch, !active);
  134. } else {
  135. ipu_cpmem_set_buffer(ipu_plane->ipu_ch, 0, eba);
  136. ipu_cpmem_set_buffer(ipu_plane->ipu_ch, 1, eba);
  137. }
  138. }
  139. void ipu_plane_put_resources(struct ipu_plane *ipu_plane)
  140. {
  141. if (!IS_ERR_OR_NULL(ipu_plane->dp))
  142. ipu_dp_put(ipu_plane->dp);
  143. if (!IS_ERR_OR_NULL(ipu_plane->dmfc))
  144. ipu_dmfc_put(ipu_plane->dmfc);
  145. if (!IS_ERR_OR_NULL(ipu_plane->ipu_ch))
  146. ipu_idmac_put(ipu_plane->ipu_ch);
  147. }
  148. int ipu_plane_get_resources(struct ipu_plane *ipu_plane)
  149. {
  150. int ret;
  151. ipu_plane->ipu_ch = ipu_idmac_get(ipu_plane->ipu, ipu_plane->dma);
  152. if (IS_ERR(ipu_plane->ipu_ch)) {
  153. ret = PTR_ERR(ipu_plane->ipu_ch);
  154. DRM_ERROR("failed to get idmac channel: %d\n", ret);
  155. return ret;
  156. }
  157. ipu_plane->dmfc = ipu_dmfc_get(ipu_plane->ipu, ipu_plane->dma);
  158. if (IS_ERR(ipu_plane->dmfc)) {
  159. ret = PTR_ERR(ipu_plane->dmfc);
  160. DRM_ERROR("failed to get dmfc: ret %d\n", ret);
  161. goto err_out;
  162. }
  163. if (ipu_plane->dp_flow >= 0) {
  164. ipu_plane->dp = ipu_dp_get(ipu_plane->ipu, ipu_plane->dp_flow);
  165. if (IS_ERR(ipu_plane->dp)) {
  166. ret = PTR_ERR(ipu_plane->dp);
  167. DRM_ERROR("failed to get dp flow: %d\n", ret);
  168. goto err_out;
  169. }
  170. }
  171. return 0;
  172. err_out:
  173. ipu_plane_put_resources(ipu_plane);
  174. return ret;
  175. }
  176. static void ipu_plane_enable(struct ipu_plane *ipu_plane)
  177. {
  178. if (ipu_plane->dp)
  179. ipu_dp_enable(ipu_plane->ipu);
  180. ipu_dmfc_enable_channel(ipu_plane->dmfc);
  181. ipu_idmac_enable_channel(ipu_plane->ipu_ch);
  182. if (ipu_plane->dp)
  183. ipu_dp_enable_channel(ipu_plane->dp);
  184. }
  185. static void ipu_plane_disable(struct ipu_plane *ipu_plane)
  186. {
  187. ipu_idmac_wait_busy(ipu_plane->ipu_ch, 50);
  188. if (ipu_plane->dp)
  189. ipu_dp_disable_channel(ipu_plane->dp);
  190. ipu_idmac_disable_channel(ipu_plane->ipu_ch);
  191. ipu_dmfc_disable_channel(ipu_plane->dmfc);
  192. if (ipu_plane->dp)
  193. ipu_dp_disable(ipu_plane->ipu);
  194. }
  195. static int ipu_disable_plane(struct drm_plane *plane)
  196. {
  197. struct ipu_plane *ipu_plane = to_ipu_plane(plane);
  198. DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
  199. ipu_plane_disable(ipu_plane);
  200. return 0;
  201. }
  202. static void ipu_plane_destroy(struct drm_plane *plane)
  203. {
  204. struct ipu_plane *ipu_plane = to_ipu_plane(plane);
  205. DRM_DEBUG_KMS("[%d] %s\n", __LINE__, __func__);
  206. ipu_disable_plane(plane);
  207. drm_plane_cleanup(plane);
  208. kfree(ipu_plane);
  209. }
  210. static const struct drm_plane_funcs ipu_plane_funcs = {
  211. .update_plane = drm_atomic_helper_update_plane,
  212. .disable_plane = drm_atomic_helper_disable_plane,
  213. .destroy = ipu_plane_destroy,
  214. .reset = drm_atomic_helper_plane_reset,
  215. .atomic_duplicate_state = drm_atomic_helper_plane_duplicate_state,
  216. .atomic_destroy_state = drm_atomic_helper_plane_destroy_state,
  217. };
  218. static int ipu_plane_atomic_check(struct drm_plane *plane,
  219. struct drm_plane_state *state)
  220. {
  221. struct drm_plane_state *old_state = plane->state;
  222. struct drm_crtc_state *crtc_state;
  223. struct device *dev = plane->dev->dev;
  224. struct drm_framebuffer *fb = state->fb;
  225. struct drm_framebuffer *old_fb = old_state->fb;
  226. unsigned long eba, ubo, vbo, old_ubo, old_vbo;
  227. /* Ok to disable */
  228. if (!fb)
  229. return 0;
  230. if (!state->crtc)
  231. return -EINVAL;
  232. crtc_state =
  233. drm_atomic_get_existing_crtc_state(state->state, state->crtc);
  234. if (WARN_ON(!crtc_state))
  235. return -EINVAL;
  236. /* CRTC should be enabled */
  237. if (!crtc_state->enable)
  238. return -EINVAL;
  239. /* no scaling */
  240. if (state->src_w >> 16 != state->crtc_w ||
  241. state->src_h >> 16 != state->crtc_h)
  242. return -EINVAL;
  243. switch (plane->type) {
  244. case DRM_PLANE_TYPE_PRIMARY:
  245. /* full plane doesn't support partial off screen */
  246. if (state->crtc_x || state->crtc_y ||
  247. state->crtc_w != crtc_state->adjusted_mode.hdisplay ||
  248. state->crtc_h != crtc_state->adjusted_mode.vdisplay)
  249. return -EINVAL;
  250. /* full plane minimum width is 13 pixels */
  251. if (state->crtc_w < 13)
  252. return -EINVAL;
  253. break;
  254. case DRM_PLANE_TYPE_OVERLAY:
  255. if (state->crtc_x < 0 || state->crtc_y < 0)
  256. return -EINVAL;
  257. if (state->crtc_x + state->crtc_w >
  258. crtc_state->adjusted_mode.hdisplay)
  259. return -EINVAL;
  260. if (state->crtc_y + state->crtc_h >
  261. crtc_state->adjusted_mode.vdisplay)
  262. return -EINVAL;
  263. break;
  264. default:
  265. dev_warn(dev, "Unsupported plane type\n");
  266. return -EINVAL;
  267. }
  268. if (state->crtc_h < 2)
  269. return -EINVAL;
  270. /*
  271. * since we cannot touch active IDMAC channels, we do not support
  272. * resizing the enabled plane or changing its format
  273. */
  274. if (old_fb && (state->src_w != old_state->src_w ||
  275. state->src_h != old_state->src_h ||
  276. fb->pixel_format != old_fb->pixel_format))
  277. return -EINVAL;
  278. eba = drm_plane_state_to_eba(state);
  279. if (eba & 0x7)
  280. return -EINVAL;
  281. if (fb->pitches[0] < 1 || fb->pitches[0] > 16384)
  282. return -EINVAL;
  283. if (old_fb && fb->pitches[0] != old_fb->pitches[0])
  284. return -EINVAL;
  285. switch (fb->pixel_format) {
  286. case DRM_FORMAT_YUV420:
  287. case DRM_FORMAT_YVU420:
  288. /*
  289. * Multiplanar formats have to meet the following restrictions:
  290. * - The (up to) three plane addresses are EBA, EBA+UBO, EBA+VBO
  291. * - EBA, UBO and VBO are a multiple of 8
  292. * - UBO and VBO are unsigned and not larger than 0xfffff8
  293. * - Only EBA may be changed while scanout is active
  294. * - The strides of U and V planes must be identical.
  295. */
  296. ubo = drm_plane_state_to_ubo(state);
  297. vbo = drm_plane_state_to_vbo(state);
  298. if ((ubo & 0x7) || (vbo & 0x7))
  299. return -EINVAL;
  300. if ((ubo > 0xfffff8) || (vbo > 0xfffff8))
  301. return -EINVAL;
  302. if (old_fb) {
  303. old_ubo = drm_plane_state_to_ubo(old_state);
  304. old_vbo = drm_plane_state_to_vbo(old_state);
  305. if (ubo != old_ubo || vbo != old_vbo)
  306. return -EINVAL;
  307. }
  308. if (fb->pitches[1] != fb->pitches[2])
  309. return -EINVAL;
  310. if (fb->pitches[1] < 1 || fb->pitches[1] > 16384)
  311. return -EINVAL;
  312. if (old_fb && old_fb->pitches[1] != fb->pitches[1])
  313. return -EINVAL;
  314. }
  315. return 0;
  316. }
  317. static void ipu_plane_atomic_disable(struct drm_plane *plane,
  318. struct drm_plane_state *old_state)
  319. {
  320. ipu_disable_plane(plane);
  321. }
  322. static void ipu_plane_atomic_update(struct drm_plane *plane,
  323. struct drm_plane_state *old_state)
  324. {
  325. struct ipu_plane *ipu_plane = to_ipu_plane(plane);
  326. struct drm_plane_state *state = plane->state;
  327. enum ipu_color_space ics;
  328. if (old_state->fb) {
  329. ipu_plane_atomic_set_base(ipu_plane, old_state);
  330. return;
  331. }
  332. switch (ipu_plane->dp_flow) {
  333. case IPU_DP_FLOW_SYNC_BG:
  334. ipu_dp_setup_channel(ipu_plane->dp,
  335. IPUV3_COLORSPACE_RGB,
  336. IPUV3_COLORSPACE_RGB);
  337. ipu_dp_set_global_alpha(ipu_plane->dp, true, 0, true);
  338. break;
  339. case IPU_DP_FLOW_SYNC_FG:
  340. ics = ipu_drm_fourcc_to_colorspace(state->fb->pixel_format);
  341. ipu_dp_setup_channel(ipu_plane->dp, ics,
  342. IPUV3_COLORSPACE_UNKNOWN);
  343. ipu_dp_set_window_pos(ipu_plane->dp, state->crtc_x,
  344. state->crtc_y);
  345. /* Enable local alpha on partial plane */
  346. switch (state->fb->pixel_format) {
  347. case DRM_FORMAT_ARGB1555:
  348. case DRM_FORMAT_ABGR1555:
  349. case DRM_FORMAT_RGBA5551:
  350. case DRM_FORMAT_BGRA5551:
  351. case DRM_FORMAT_ARGB4444:
  352. case DRM_FORMAT_ARGB8888:
  353. case DRM_FORMAT_ABGR8888:
  354. case DRM_FORMAT_RGBA8888:
  355. case DRM_FORMAT_BGRA8888:
  356. ipu_dp_set_global_alpha(ipu_plane->dp, false, 0, false);
  357. break;
  358. default:
  359. break;
  360. }
  361. }
  362. ipu_dmfc_config_wait4eot(ipu_plane->dmfc, state->crtc_w);
  363. ipu_cpmem_zero(ipu_plane->ipu_ch);
  364. ipu_cpmem_set_resolution(ipu_plane->ipu_ch, state->src_w >> 16,
  365. state->src_h >> 16);
  366. ipu_cpmem_set_fmt(ipu_plane->ipu_ch, state->fb->pixel_format);
  367. ipu_cpmem_set_high_priority(ipu_plane->ipu_ch);
  368. ipu_idmac_set_double_buffer(ipu_plane->ipu_ch, 1);
  369. ipu_cpmem_set_stride(ipu_plane->ipu_ch, state->fb->pitches[0]);
  370. ipu_plane_atomic_set_base(ipu_plane, old_state);
  371. ipu_plane_enable(ipu_plane);
  372. }
  373. static const struct drm_plane_helper_funcs ipu_plane_helper_funcs = {
  374. .atomic_check = ipu_plane_atomic_check,
  375. .atomic_disable = ipu_plane_atomic_disable,
  376. .atomic_update = ipu_plane_atomic_update,
  377. };
  378. struct ipu_plane *ipu_plane_init(struct drm_device *dev, struct ipu_soc *ipu,
  379. int dma, int dp, unsigned int possible_crtcs,
  380. enum drm_plane_type type)
  381. {
  382. struct ipu_plane *ipu_plane;
  383. int ret;
  384. DRM_DEBUG_KMS("channel %d, dp flow %d, possible_crtcs=0x%x\n",
  385. dma, dp, possible_crtcs);
  386. ipu_plane = kzalloc(sizeof(*ipu_plane), GFP_KERNEL);
  387. if (!ipu_plane) {
  388. DRM_ERROR("failed to allocate plane\n");
  389. return ERR_PTR(-ENOMEM);
  390. }
  391. ipu_plane->ipu = ipu;
  392. ipu_plane->dma = dma;
  393. ipu_plane->dp_flow = dp;
  394. ret = drm_universal_plane_init(dev, &ipu_plane->base, possible_crtcs,
  395. &ipu_plane_funcs, ipu_plane_formats,
  396. ARRAY_SIZE(ipu_plane_formats), type,
  397. NULL);
  398. if (ret) {
  399. DRM_ERROR("failed to initialize plane\n");
  400. kfree(ipu_plane);
  401. return ERR_PTR(ret);
  402. }
  403. drm_plane_helper_add(&ipu_plane->base, &ipu_plane_helper_funcs);
  404. return ipu_plane;
  405. }