adv7511_drv.c 30 KB

12345678910111213141516171819202122232425262728293031323334353637383940414243444546474849505152535455565758596061626364656667686970717273747576777879808182838485868788899091929394959697989910010110210310410510610710810911011111211311411511611711811912012112212312412512612712812913013113213313413513613713813914014114214314414514614714814915015115215315415515615715815916016116216316416516616716816917017117217317417517617717817918018118218318418518618718818919019119219319419519619719819920020120220320420520620720820921021121221321421521621721821922022122222322422522622722822923023123223323423523623723823924024124224324424524624724824925025125225325425525625725825926026126226326426526626726826927027127227327427527627727827928028128228328428528628728828929029129229329429529629729829930030130230330430530630730830931031131231331431531631731831932032132232332432532632732832933033133233333433533633733833934034134234334434534634734834935035135235335435535635735835936036136236336436536636736836937037137237337437537637737837938038138238338438538638738838939039139239339439539639739839940040140240340440540640740840941041141241341441541641741841942042142242342442542642742842943043143243343443543643743843944044144244344444544644744844945045145245345445545645745845946046146246346446546646746846947047147247347447547647747847948048148248348448548648748848949049149249349449549649749849950050150250350450550650750850951051151251351451551651751851952052152252352452552652752852953053153253353453553653753853954054154254354454554654754854955055155255355455555655755855956056156256356456556656756856957057157257357457557657757857958058158258358458558658758858959059159259359459559659759859960060160260360460560660760860961061161261361461561661761861962062162262362462562662762862963063163263363463563663763863964064164264364464564664764864965065165265365465565665765865966066166266366466566666766866967067167267367467567667767867968068168268368468568668768868969069169269369469569669769869970070170270370470570670770870971071171271371471571671771871972072172272372472572672772872973073173273373473573673773873974074174274374474574674774874975075175275375475575675775875976076176276376476576676776876977077177277377477577677777877978078178278378478578678778878979079179279379479579679779879980080180280380480580680780880981081181281381481581681781881982082182282382482582682782882983083183283383483583683783883984084184284384484584684784884985085185285385485585685785885986086186286386486586686786886987087187287387487587687787887988088188288388488588688788888989089189289389489589689789889990090190290390490590690790890991091191291391491591691791891992092192292392492592692792892993093193293393493593693793893994094194294394494594694794894995095195295395495595695795895996096196296396496596696796896997097197297397497597697797897998098198298398498598698798898999099199299399499599699799899910001001100210031004100510061007100810091010101110121013101410151016101710181019102010211022102310241025102610271028102910301031103210331034103510361037103810391040104110421043104410451046104710481049105010511052105310541055105610571058105910601061106210631064106510661067106810691070107110721073107410751076107710781079108010811082108310841085108610871088108910901091109210931094109510961097109810991100110111021103110411051106110711081109111011111112111311141115111611171118111911201121112211231124
  1. /*
  2. * Analog Devices ADV7511 HDMI transmitter driver
  3. *
  4. * Copyright 2012 Analog Devices Inc.
  5. *
  6. * Licensed under the GPL-2.
  7. */
  8. #include <linux/device.h>
  9. #include <linux/gpio/consumer.h>
  10. #include <linux/module.h>
  11. #include <linux/of_device.h>
  12. #include <linux/slab.h>
  13. #include <drm/drmP.h>
  14. #include <drm/drm_atomic.h>
  15. #include <drm/drm_atomic_helper.h>
  16. #include <drm/drm_edid.h>
  17. #include "adv7511.h"
  18. /* ADI recommended values for proper operation. */
  19. static const struct reg_sequence adv7511_fixed_registers[] = {
  20. { 0x98, 0x03 },
  21. { 0x9a, 0xe0 },
  22. { 0x9c, 0x30 },
  23. { 0x9d, 0x61 },
  24. { 0xa2, 0xa4 },
  25. { 0xa3, 0xa4 },
  26. { 0xe0, 0xd0 },
  27. { 0xf9, 0x00 },
  28. { 0x55, 0x02 },
  29. };
  30. /* -----------------------------------------------------------------------------
  31. * Register access
  32. */
  33. static const uint8_t adv7511_register_defaults[] = {
  34. 0x12, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 00 */
  35. 0x00, 0x00, 0x01, 0x0e, 0xbc, 0x18, 0x01, 0x13,
  36. 0x25, 0x37, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 10 */
  37. 0x46, 0x62, 0x04, 0xa8, 0x00, 0x00, 0x1c, 0x84,
  38. 0x1c, 0xbf, 0x04, 0xa8, 0x1e, 0x70, 0x02, 0x1e, /* 20 */
  39. 0x00, 0x00, 0x04, 0xa8, 0x08, 0x12, 0x1b, 0xac,
  40. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 30 */
  41. 0x00, 0x00, 0x00, 0x80, 0x00, 0x00, 0x00, 0xb0,
  42. 0x00, 0x50, 0x90, 0x7e, 0x79, 0x70, 0x00, 0x00, /* 40 */
  43. 0x00, 0xa8, 0x80, 0x00, 0x00, 0x00, 0x00, 0x00,
  44. 0x00, 0x00, 0x02, 0x0d, 0x00, 0x00, 0x00, 0x00, /* 50 */
  45. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  46. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 60 */
  47. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  48. 0x01, 0x0a, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 70 */
  49. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  50. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* 80 */
  51. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  52. 0x00, 0x00, 0x00, 0x00, 0xc0, 0x00, 0x00, 0x00, /* 90 */
  53. 0x0b, 0x02, 0x00, 0x18, 0x5a, 0x60, 0x00, 0x00,
  54. 0x00, 0x00, 0x80, 0x80, 0x08, 0x04, 0x00, 0x00, /* a0 */
  55. 0x00, 0x00, 0x00, 0x40, 0x00, 0x00, 0x40, 0x14,
  56. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* b0 */
  57. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  58. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, /* c0 */
  59. 0x00, 0x03, 0x00, 0x00, 0x02, 0x00, 0x01, 0x04,
  60. 0x30, 0xff, 0x80, 0x80, 0x80, 0x00, 0x00, 0x00, /* d0 */
  61. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x10, 0x01,
  62. 0x80, 0x75, 0x00, 0x00, 0x60, 0x00, 0x00, 0x00, /* e0 */
  63. 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  64. 0x00, 0x00, 0x00, 0x00, 0x00, 0x75, 0x11, 0x00, /* f0 */
  65. 0x00, 0x7c, 0x00, 0x00, 0x00, 0x00, 0x00, 0x00,
  66. };
  67. static bool adv7511_register_volatile(struct device *dev, unsigned int reg)
  68. {
  69. switch (reg) {
  70. case ADV7511_REG_CHIP_REVISION:
  71. case ADV7511_REG_SPDIF_FREQ:
  72. case ADV7511_REG_CTS_AUTOMATIC1:
  73. case ADV7511_REG_CTS_AUTOMATIC2:
  74. case ADV7511_REG_VIC_DETECTED:
  75. case ADV7511_REG_VIC_SEND:
  76. case ADV7511_REG_AUX_VIC_DETECTED:
  77. case ADV7511_REG_STATUS:
  78. case ADV7511_REG_GC(1):
  79. case ADV7511_REG_INT(0):
  80. case ADV7511_REG_INT(1):
  81. case ADV7511_REG_PLL_STATUS:
  82. case ADV7511_REG_AN(0):
  83. case ADV7511_REG_AN(1):
  84. case ADV7511_REG_AN(2):
  85. case ADV7511_REG_AN(3):
  86. case ADV7511_REG_AN(4):
  87. case ADV7511_REG_AN(5):
  88. case ADV7511_REG_AN(6):
  89. case ADV7511_REG_AN(7):
  90. case ADV7511_REG_HDCP_STATUS:
  91. case ADV7511_REG_BCAPS:
  92. case ADV7511_REG_BKSV(0):
  93. case ADV7511_REG_BKSV(1):
  94. case ADV7511_REG_BKSV(2):
  95. case ADV7511_REG_BKSV(3):
  96. case ADV7511_REG_BKSV(4):
  97. case ADV7511_REG_DDC_STATUS:
  98. case ADV7511_REG_EDID_READ_CTRL:
  99. case ADV7511_REG_BSTATUS(0):
  100. case ADV7511_REG_BSTATUS(1):
  101. case ADV7511_REG_CHIP_ID_HIGH:
  102. case ADV7511_REG_CHIP_ID_LOW:
  103. return true;
  104. }
  105. return false;
  106. }
  107. static const struct regmap_config adv7511_regmap_config = {
  108. .reg_bits = 8,
  109. .val_bits = 8,
  110. .max_register = 0xff,
  111. .cache_type = REGCACHE_RBTREE,
  112. .reg_defaults_raw = adv7511_register_defaults,
  113. .num_reg_defaults_raw = ARRAY_SIZE(adv7511_register_defaults),
  114. .volatile_reg = adv7511_register_volatile,
  115. };
  116. /* -----------------------------------------------------------------------------
  117. * Hardware configuration
  118. */
  119. static void adv7511_set_colormap(struct adv7511 *adv7511, bool enable,
  120. const uint16_t *coeff,
  121. unsigned int scaling_factor)
  122. {
  123. unsigned int i;
  124. regmap_update_bits(adv7511->regmap, ADV7511_REG_CSC_UPPER(1),
  125. ADV7511_CSC_UPDATE_MODE, ADV7511_CSC_UPDATE_MODE);
  126. if (enable) {
  127. for (i = 0; i < 12; ++i) {
  128. regmap_update_bits(adv7511->regmap,
  129. ADV7511_REG_CSC_UPPER(i),
  130. 0x1f, coeff[i] >> 8);
  131. regmap_write(adv7511->regmap,
  132. ADV7511_REG_CSC_LOWER(i),
  133. coeff[i] & 0xff);
  134. }
  135. }
  136. if (enable)
  137. regmap_update_bits(adv7511->regmap, ADV7511_REG_CSC_UPPER(0),
  138. 0xe0, 0x80 | (scaling_factor << 5));
  139. else
  140. regmap_update_bits(adv7511->regmap, ADV7511_REG_CSC_UPPER(0),
  141. 0x80, 0x00);
  142. regmap_update_bits(adv7511->regmap, ADV7511_REG_CSC_UPPER(1),
  143. ADV7511_CSC_UPDATE_MODE, 0);
  144. }
  145. static int adv7511_packet_enable(struct adv7511 *adv7511, unsigned int packet)
  146. {
  147. if (packet & 0xff)
  148. regmap_update_bits(adv7511->regmap, ADV7511_REG_PACKET_ENABLE0,
  149. packet, 0xff);
  150. if (packet & 0xff00) {
  151. packet >>= 8;
  152. regmap_update_bits(adv7511->regmap, ADV7511_REG_PACKET_ENABLE1,
  153. packet, 0xff);
  154. }
  155. return 0;
  156. }
  157. static int adv7511_packet_disable(struct adv7511 *adv7511, unsigned int packet)
  158. {
  159. if (packet & 0xff)
  160. regmap_update_bits(adv7511->regmap, ADV7511_REG_PACKET_ENABLE0,
  161. packet, 0x00);
  162. if (packet & 0xff00) {
  163. packet >>= 8;
  164. regmap_update_bits(adv7511->regmap, ADV7511_REG_PACKET_ENABLE1,
  165. packet, 0x00);
  166. }
  167. return 0;
  168. }
  169. /* Coefficients for adv7511 color space conversion */
  170. static const uint16_t adv7511_csc_ycbcr_to_rgb[] = {
  171. 0x0734, 0x04ad, 0x0000, 0x1c1b,
  172. 0x1ddc, 0x04ad, 0x1f24, 0x0135,
  173. 0x0000, 0x04ad, 0x087c, 0x1b77,
  174. };
  175. static void adv7511_set_config_csc(struct adv7511 *adv7511,
  176. struct drm_connector *connector,
  177. bool rgb)
  178. {
  179. struct adv7511_video_config config;
  180. bool output_format_422, output_format_ycbcr;
  181. unsigned int mode;
  182. uint8_t infoframe[17];
  183. if (adv7511->edid)
  184. config.hdmi_mode = drm_detect_hdmi_monitor(adv7511->edid);
  185. else
  186. config.hdmi_mode = false;
  187. hdmi_avi_infoframe_init(&config.avi_infoframe);
  188. config.avi_infoframe.scan_mode = HDMI_SCAN_MODE_UNDERSCAN;
  189. if (rgb) {
  190. config.csc_enable = false;
  191. config.avi_infoframe.colorspace = HDMI_COLORSPACE_RGB;
  192. } else {
  193. config.csc_scaling_factor = ADV7511_CSC_SCALING_4;
  194. config.csc_coefficents = adv7511_csc_ycbcr_to_rgb;
  195. if ((connector->display_info.color_formats &
  196. DRM_COLOR_FORMAT_YCRCB422) &&
  197. config.hdmi_mode) {
  198. config.csc_enable = false;
  199. config.avi_infoframe.colorspace =
  200. HDMI_COLORSPACE_YUV422;
  201. } else {
  202. config.csc_enable = true;
  203. config.avi_infoframe.colorspace = HDMI_COLORSPACE_RGB;
  204. }
  205. }
  206. if (config.hdmi_mode) {
  207. mode = ADV7511_HDMI_CFG_MODE_HDMI;
  208. switch (config.avi_infoframe.colorspace) {
  209. case HDMI_COLORSPACE_YUV444:
  210. output_format_422 = false;
  211. output_format_ycbcr = true;
  212. break;
  213. case HDMI_COLORSPACE_YUV422:
  214. output_format_422 = true;
  215. output_format_ycbcr = true;
  216. break;
  217. default:
  218. output_format_422 = false;
  219. output_format_ycbcr = false;
  220. break;
  221. }
  222. } else {
  223. mode = ADV7511_HDMI_CFG_MODE_DVI;
  224. output_format_422 = false;
  225. output_format_ycbcr = false;
  226. }
  227. adv7511_packet_disable(adv7511, ADV7511_PACKET_ENABLE_AVI_INFOFRAME);
  228. adv7511_set_colormap(adv7511, config.csc_enable,
  229. config.csc_coefficents,
  230. config.csc_scaling_factor);
  231. regmap_update_bits(adv7511->regmap, ADV7511_REG_VIDEO_INPUT_CFG1, 0x81,
  232. (output_format_422 << 7) | output_format_ycbcr);
  233. regmap_update_bits(adv7511->regmap, ADV7511_REG_HDCP_HDMI_CFG,
  234. ADV7511_HDMI_CFG_MODE_MASK, mode);
  235. hdmi_avi_infoframe_pack(&config.avi_infoframe, infoframe,
  236. sizeof(infoframe));
  237. /* The AVI infoframe id is not configurable */
  238. regmap_bulk_write(adv7511->regmap, ADV7511_REG_AVI_INFOFRAME_VERSION,
  239. infoframe + 1, sizeof(infoframe) - 1);
  240. adv7511_packet_enable(adv7511, ADV7511_PACKET_ENABLE_AVI_INFOFRAME);
  241. }
  242. static void adv7511_set_link_config(struct adv7511 *adv7511,
  243. const struct adv7511_link_config *config)
  244. {
  245. /*
  246. * The input style values documented in the datasheet don't match the
  247. * hardware register field values :-(
  248. */
  249. static const unsigned int input_styles[4] = { 0, 2, 1, 3 };
  250. unsigned int clock_delay;
  251. unsigned int color_depth;
  252. unsigned int input_id;
  253. clock_delay = (config->clock_delay + 1200) / 400;
  254. color_depth = config->input_color_depth == 8 ? 3
  255. : (config->input_color_depth == 10 ? 1 : 2);
  256. /* TODO Support input ID 6 */
  257. if (config->input_colorspace != HDMI_COLORSPACE_YUV422)
  258. input_id = config->input_clock == ADV7511_INPUT_CLOCK_DDR
  259. ? 5 : 0;
  260. else if (config->input_clock == ADV7511_INPUT_CLOCK_DDR)
  261. input_id = config->embedded_sync ? 8 : 7;
  262. else if (config->input_clock == ADV7511_INPUT_CLOCK_2X)
  263. input_id = config->embedded_sync ? 4 : 3;
  264. else
  265. input_id = config->embedded_sync ? 2 : 1;
  266. regmap_update_bits(adv7511->regmap, ADV7511_REG_I2C_FREQ_ID_CFG, 0xf,
  267. input_id);
  268. regmap_update_bits(adv7511->regmap, ADV7511_REG_VIDEO_INPUT_CFG1, 0x7e,
  269. (color_depth << 4) |
  270. (input_styles[config->input_style] << 2));
  271. regmap_write(adv7511->regmap, ADV7511_REG_VIDEO_INPUT_CFG2,
  272. config->input_justification << 3);
  273. regmap_write(adv7511->regmap, ADV7511_REG_TIMING_GEN_SEQ,
  274. config->sync_pulse << 2);
  275. regmap_write(adv7511->regmap, 0xba, clock_delay << 5);
  276. adv7511->embedded_sync = config->embedded_sync;
  277. adv7511->hsync_polarity = config->hsync_polarity;
  278. adv7511->vsync_polarity = config->vsync_polarity;
  279. adv7511->rgb = config->input_colorspace == HDMI_COLORSPACE_RGB;
  280. }
  281. static void adv7511_power_on(struct adv7511 *adv7511)
  282. {
  283. adv7511->current_edid_segment = -1;
  284. regmap_update_bits(adv7511->regmap, ADV7511_REG_POWER,
  285. ADV7511_POWER_POWER_DOWN, 0);
  286. if (adv7511->i2c_main->irq) {
  287. /*
  288. * Documentation says the INT_ENABLE registers are reset in
  289. * POWER_DOWN mode. My 7511w preserved the bits, however.
  290. * Still, let's be safe and stick to the documentation.
  291. */
  292. regmap_write(adv7511->regmap, ADV7511_REG_INT_ENABLE(0),
  293. ADV7511_INT0_EDID_READY);
  294. regmap_write(adv7511->regmap, ADV7511_REG_INT_ENABLE(1),
  295. ADV7511_INT1_DDC_ERROR);
  296. }
  297. /*
  298. * Per spec it is allowed to pulse the HPD signal to indicate that the
  299. * EDID information has changed. Some monitors do this when they wakeup
  300. * from standby or are enabled. When the HPD goes low the adv7511 is
  301. * reset and the outputs are disabled which might cause the monitor to
  302. * go to standby again. To avoid this we ignore the HPD pin for the
  303. * first few seconds after enabling the output.
  304. */
  305. regmap_update_bits(adv7511->regmap, ADV7511_REG_POWER2,
  306. ADV7511_REG_POWER2_HPD_SRC_MASK,
  307. ADV7511_REG_POWER2_HPD_SRC_NONE);
  308. /*
  309. * Most of the registers are reset during power down or when HPD is low.
  310. */
  311. regcache_sync(adv7511->regmap);
  312. if (adv7511->type == ADV7533)
  313. adv7533_dsi_power_on(adv7511);
  314. adv7511->powered = true;
  315. }
  316. static void adv7511_power_off(struct adv7511 *adv7511)
  317. {
  318. /* TODO: setup additional power down modes */
  319. regmap_update_bits(adv7511->regmap, ADV7511_REG_POWER,
  320. ADV7511_POWER_POWER_DOWN,
  321. ADV7511_POWER_POWER_DOWN);
  322. regcache_mark_dirty(adv7511->regmap);
  323. if (adv7511->type == ADV7533)
  324. adv7533_dsi_power_off(adv7511);
  325. adv7511->powered = false;
  326. }
  327. /* -----------------------------------------------------------------------------
  328. * Interrupt and hotplug detection
  329. */
  330. static bool adv7511_hpd(struct adv7511 *adv7511)
  331. {
  332. unsigned int irq0;
  333. int ret;
  334. ret = regmap_read(adv7511->regmap, ADV7511_REG_INT(0), &irq0);
  335. if (ret < 0)
  336. return false;
  337. if (irq0 & ADV7511_INT0_HPD) {
  338. regmap_write(adv7511->regmap, ADV7511_REG_INT(0),
  339. ADV7511_INT0_HPD);
  340. return true;
  341. }
  342. return false;
  343. }
  344. static int adv7511_irq_process(struct adv7511 *adv7511, bool process_hpd)
  345. {
  346. unsigned int irq0, irq1;
  347. int ret;
  348. ret = regmap_read(adv7511->regmap, ADV7511_REG_INT(0), &irq0);
  349. if (ret < 0)
  350. return ret;
  351. ret = regmap_read(adv7511->regmap, ADV7511_REG_INT(1), &irq1);
  352. if (ret < 0)
  353. return ret;
  354. regmap_write(adv7511->regmap, ADV7511_REG_INT(0), irq0);
  355. regmap_write(adv7511->regmap, ADV7511_REG_INT(1), irq1);
  356. if (process_hpd && irq0 & ADV7511_INT0_HPD && adv7511->bridge.encoder)
  357. drm_helper_hpd_irq_event(adv7511->connector.dev);
  358. if (irq0 & ADV7511_INT0_EDID_READY || irq1 & ADV7511_INT1_DDC_ERROR) {
  359. adv7511->edid_read = true;
  360. if (adv7511->i2c_main->irq)
  361. wake_up_all(&adv7511->wq);
  362. }
  363. return 0;
  364. }
  365. static irqreturn_t adv7511_irq_handler(int irq, void *devid)
  366. {
  367. struct adv7511 *adv7511 = devid;
  368. int ret;
  369. ret = adv7511_irq_process(adv7511, true);
  370. return ret < 0 ? IRQ_NONE : IRQ_HANDLED;
  371. }
  372. /* -----------------------------------------------------------------------------
  373. * EDID retrieval
  374. */
  375. static int adv7511_wait_for_edid(struct adv7511 *adv7511, int timeout)
  376. {
  377. int ret;
  378. if (adv7511->i2c_main->irq) {
  379. ret = wait_event_interruptible_timeout(adv7511->wq,
  380. adv7511->edid_read, msecs_to_jiffies(timeout));
  381. } else {
  382. for (; timeout > 0; timeout -= 25) {
  383. ret = adv7511_irq_process(adv7511, false);
  384. if (ret < 0)
  385. break;
  386. if (adv7511->edid_read)
  387. break;
  388. msleep(25);
  389. }
  390. }
  391. return adv7511->edid_read ? 0 : -EIO;
  392. }
  393. static int adv7511_get_edid_block(void *data, u8 *buf, unsigned int block,
  394. size_t len)
  395. {
  396. struct adv7511 *adv7511 = data;
  397. struct i2c_msg xfer[2];
  398. uint8_t offset;
  399. unsigned int i;
  400. int ret;
  401. if (len > 128)
  402. return -EINVAL;
  403. if (adv7511->current_edid_segment != block / 2) {
  404. unsigned int status;
  405. ret = regmap_read(adv7511->regmap, ADV7511_REG_DDC_STATUS,
  406. &status);
  407. if (ret < 0)
  408. return ret;
  409. if (status != 2) {
  410. adv7511->edid_read = false;
  411. regmap_write(adv7511->regmap, ADV7511_REG_EDID_SEGMENT,
  412. block);
  413. ret = adv7511_wait_for_edid(adv7511, 200);
  414. if (ret < 0)
  415. return ret;
  416. }
  417. /* Break this apart, hopefully more I2C controllers will
  418. * support 64 byte transfers than 256 byte transfers
  419. */
  420. xfer[0].addr = adv7511->i2c_edid->addr;
  421. xfer[0].flags = 0;
  422. xfer[0].len = 1;
  423. xfer[0].buf = &offset;
  424. xfer[1].addr = adv7511->i2c_edid->addr;
  425. xfer[1].flags = I2C_M_RD;
  426. xfer[1].len = 64;
  427. xfer[1].buf = adv7511->edid_buf;
  428. offset = 0;
  429. for (i = 0; i < 4; ++i) {
  430. ret = i2c_transfer(adv7511->i2c_edid->adapter, xfer,
  431. ARRAY_SIZE(xfer));
  432. if (ret < 0)
  433. return ret;
  434. else if (ret != 2)
  435. return -EIO;
  436. xfer[1].buf += 64;
  437. offset += 64;
  438. }
  439. adv7511->current_edid_segment = block / 2;
  440. }
  441. if (block % 2 == 0)
  442. memcpy(buf, adv7511->edid_buf, len);
  443. else
  444. memcpy(buf, adv7511->edid_buf + 128, len);
  445. return 0;
  446. }
  447. /* -----------------------------------------------------------------------------
  448. * ADV75xx helpers
  449. */
  450. static int adv7511_get_modes(struct adv7511 *adv7511,
  451. struct drm_connector *connector)
  452. {
  453. struct edid *edid;
  454. unsigned int count;
  455. /* Reading the EDID only works if the device is powered */
  456. if (!adv7511->powered) {
  457. regmap_update_bits(adv7511->regmap, ADV7511_REG_POWER,
  458. ADV7511_POWER_POWER_DOWN, 0);
  459. if (adv7511->i2c_main->irq) {
  460. regmap_write(adv7511->regmap, ADV7511_REG_INT_ENABLE(0),
  461. ADV7511_INT0_EDID_READY);
  462. regmap_write(adv7511->regmap, ADV7511_REG_INT_ENABLE(1),
  463. ADV7511_INT1_DDC_ERROR);
  464. }
  465. adv7511->current_edid_segment = -1;
  466. }
  467. edid = drm_do_get_edid(connector, adv7511_get_edid_block, adv7511);
  468. if (!adv7511->powered)
  469. regmap_update_bits(adv7511->regmap, ADV7511_REG_POWER,
  470. ADV7511_POWER_POWER_DOWN,
  471. ADV7511_POWER_POWER_DOWN);
  472. kfree(adv7511->edid);
  473. adv7511->edid = edid;
  474. if (!edid)
  475. return 0;
  476. drm_mode_connector_update_edid_property(connector, edid);
  477. count = drm_add_edid_modes(connector, edid);
  478. adv7511_set_config_csc(adv7511, connector, adv7511->rgb);
  479. return count;
  480. }
  481. static enum drm_connector_status
  482. adv7511_detect(struct adv7511 *adv7511, struct drm_connector *connector)
  483. {
  484. enum drm_connector_status status;
  485. unsigned int val;
  486. bool hpd;
  487. int ret;
  488. ret = regmap_read(adv7511->regmap, ADV7511_REG_STATUS, &val);
  489. if (ret < 0)
  490. return connector_status_disconnected;
  491. if (val & ADV7511_STATUS_HPD)
  492. status = connector_status_connected;
  493. else
  494. status = connector_status_disconnected;
  495. hpd = adv7511_hpd(adv7511);
  496. /* The chip resets itself when the cable is disconnected, so in case
  497. * there is a pending HPD interrupt and the cable is connected there was
  498. * at least one transition from disconnected to connected and the chip
  499. * has to be reinitialized. */
  500. if (status == connector_status_connected && hpd && adv7511->powered) {
  501. regcache_mark_dirty(adv7511->regmap);
  502. adv7511_power_on(adv7511);
  503. adv7511_get_modes(adv7511, connector);
  504. if (adv7511->status == connector_status_connected)
  505. status = connector_status_disconnected;
  506. } else {
  507. /* Renable HPD sensing */
  508. regmap_update_bits(adv7511->regmap, ADV7511_REG_POWER2,
  509. ADV7511_REG_POWER2_HPD_SRC_MASK,
  510. ADV7511_REG_POWER2_HPD_SRC_BOTH);
  511. }
  512. adv7511->status = status;
  513. return status;
  514. }
  515. static int adv7511_mode_valid(struct adv7511 *adv7511,
  516. struct drm_display_mode *mode)
  517. {
  518. if (mode->clock > 165000)
  519. return MODE_CLOCK_HIGH;
  520. return MODE_OK;
  521. }
  522. static void adv7511_mode_set(struct adv7511 *adv7511,
  523. struct drm_display_mode *mode,
  524. struct drm_display_mode *adj_mode)
  525. {
  526. unsigned int low_refresh_rate;
  527. unsigned int hsync_polarity = 0;
  528. unsigned int vsync_polarity = 0;
  529. if (adv7511->embedded_sync) {
  530. unsigned int hsync_offset, hsync_len;
  531. unsigned int vsync_offset, vsync_len;
  532. hsync_offset = adj_mode->crtc_hsync_start -
  533. adj_mode->crtc_hdisplay;
  534. vsync_offset = adj_mode->crtc_vsync_start -
  535. adj_mode->crtc_vdisplay;
  536. hsync_len = adj_mode->crtc_hsync_end -
  537. adj_mode->crtc_hsync_start;
  538. vsync_len = adj_mode->crtc_vsync_end -
  539. adj_mode->crtc_vsync_start;
  540. /* The hardware vsync generator has a off-by-one bug */
  541. vsync_offset += 1;
  542. regmap_write(adv7511->regmap, ADV7511_REG_HSYNC_PLACEMENT_MSB,
  543. ((hsync_offset >> 10) & 0x7) << 5);
  544. regmap_write(adv7511->regmap, ADV7511_REG_SYNC_DECODER(0),
  545. (hsync_offset >> 2) & 0xff);
  546. regmap_write(adv7511->regmap, ADV7511_REG_SYNC_DECODER(1),
  547. ((hsync_offset & 0x3) << 6) |
  548. ((hsync_len >> 4) & 0x3f));
  549. regmap_write(adv7511->regmap, ADV7511_REG_SYNC_DECODER(2),
  550. ((hsync_len & 0xf) << 4) |
  551. ((vsync_offset >> 6) & 0xf));
  552. regmap_write(adv7511->regmap, ADV7511_REG_SYNC_DECODER(3),
  553. ((vsync_offset & 0x3f) << 2) |
  554. ((vsync_len >> 8) & 0x3));
  555. regmap_write(adv7511->regmap, ADV7511_REG_SYNC_DECODER(4),
  556. vsync_len & 0xff);
  557. hsync_polarity = !(adj_mode->flags & DRM_MODE_FLAG_PHSYNC);
  558. vsync_polarity = !(adj_mode->flags & DRM_MODE_FLAG_PVSYNC);
  559. } else {
  560. enum adv7511_sync_polarity mode_hsync_polarity;
  561. enum adv7511_sync_polarity mode_vsync_polarity;
  562. /**
  563. * If the input signal is always low or always high we want to
  564. * invert or let it passthrough depending on the polarity of the
  565. * current mode.
  566. **/
  567. if (adj_mode->flags & DRM_MODE_FLAG_NHSYNC)
  568. mode_hsync_polarity = ADV7511_SYNC_POLARITY_LOW;
  569. else
  570. mode_hsync_polarity = ADV7511_SYNC_POLARITY_HIGH;
  571. if (adj_mode->flags & DRM_MODE_FLAG_NVSYNC)
  572. mode_vsync_polarity = ADV7511_SYNC_POLARITY_LOW;
  573. else
  574. mode_vsync_polarity = ADV7511_SYNC_POLARITY_HIGH;
  575. if (adv7511->hsync_polarity != mode_hsync_polarity &&
  576. adv7511->hsync_polarity !=
  577. ADV7511_SYNC_POLARITY_PASSTHROUGH)
  578. hsync_polarity = 1;
  579. if (adv7511->vsync_polarity != mode_vsync_polarity &&
  580. adv7511->vsync_polarity !=
  581. ADV7511_SYNC_POLARITY_PASSTHROUGH)
  582. vsync_polarity = 1;
  583. }
  584. if (mode->vrefresh <= 24000)
  585. low_refresh_rate = ADV7511_LOW_REFRESH_RATE_24HZ;
  586. else if (mode->vrefresh <= 25000)
  587. low_refresh_rate = ADV7511_LOW_REFRESH_RATE_25HZ;
  588. else if (mode->vrefresh <= 30000)
  589. low_refresh_rate = ADV7511_LOW_REFRESH_RATE_30HZ;
  590. else
  591. low_refresh_rate = ADV7511_LOW_REFRESH_RATE_NONE;
  592. regmap_update_bits(adv7511->regmap, 0xfb,
  593. 0x6, low_refresh_rate << 1);
  594. regmap_update_bits(adv7511->regmap, 0x17,
  595. 0x60, (vsync_polarity << 6) | (hsync_polarity << 5));
  596. if (adv7511->type == ADV7533)
  597. adv7533_mode_set(adv7511, adj_mode);
  598. drm_mode_copy(&adv7511->curr_mode, adj_mode);
  599. /*
  600. * TODO Test first order 4:2:2 to 4:4:4 up conversion method, which is
  601. * supposed to give better results.
  602. */
  603. adv7511->f_tmds = mode->clock;
  604. }
  605. /* Connector funcs */
  606. static struct adv7511 *connector_to_adv7511(struct drm_connector *connector)
  607. {
  608. return container_of(connector, struct adv7511, connector);
  609. }
  610. static int adv7511_connector_get_modes(struct drm_connector *connector)
  611. {
  612. struct adv7511 *adv = connector_to_adv7511(connector);
  613. return adv7511_get_modes(adv, connector);
  614. }
  615. static enum drm_mode_status
  616. adv7511_connector_mode_valid(struct drm_connector *connector,
  617. struct drm_display_mode *mode)
  618. {
  619. struct adv7511 *adv = connector_to_adv7511(connector);
  620. return adv7511_mode_valid(adv, mode);
  621. }
  622. static struct drm_connector_helper_funcs adv7511_connector_helper_funcs = {
  623. .get_modes = adv7511_connector_get_modes,
  624. .mode_valid = adv7511_connector_mode_valid,
  625. };
  626. static enum drm_connector_status
  627. adv7511_connector_detect(struct drm_connector *connector, bool force)
  628. {
  629. struct adv7511 *adv = connector_to_adv7511(connector);
  630. return adv7511_detect(adv, connector);
  631. }
  632. static struct drm_connector_funcs adv7511_connector_funcs = {
  633. .dpms = drm_atomic_helper_connector_dpms,
  634. .fill_modes = drm_helper_probe_single_connector_modes,
  635. .detect = adv7511_connector_detect,
  636. .destroy = drm_connector_cleanup,
  637. .reset = drm_atomic_helper_connector_reset,
  638. .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
  639. .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
  640. };
  641. /* Bridge funcs */
  642. static struct adv7511 *bridge_to_adv7511(struct drm_bridge *bridge)
  643. {
  644. return container_of(bridge, struct adv7511, bridge);
  645. }
  646. static void adv7511_bridge_enable(struct drm_bridge *bridge)
  647. {
  648. struct adv7511 *adv = bridge_to_adv7511(bridge);
  649. adv7511_power_on(adv);
  650. }
  651. static void adv7511_bridge_disable(struct drm_bridge *bridge)
  652. {
  653. struct adv7511 *adv = bridge_to_adv7511(bridge);
  654. adv7511_power_off(adv);
  655. }
  656. static void adv7511_bridge_mode_set(struct drm_bridge *bridge,
  657. struct drm_display_mode *mode,
  658. struct drm_display_mode *adj_mode)
  659. {
  660. struct adv7511 *adv = bridge_to_adv7511(bridge);
  661. adv7511_mode_set(adv, mode, adj_mode);
  662. }
  663. static int adv7511_bridge_attach(struct drm_bridge *bridge)
  664. {
  665. struct adv7511 *adv = bridge_to_adv7511(bridge);
  666. int ret;
  667. if (!bridge->encoder) {
  668. DRM_ERROR("Parent encoder object not found");
  669. return -ENODEV;
  670. }
  671. adv->connector.polled = DRM_CONNECTOR_POLL_HPD;
  672. ret = drm_connector_init(bridge->dev, &adv->connector,
  673. &adv7511_connector_funcs,
  674. DRM_MODE_CONNECTOR_HDMIA);
  675. if (ret) {
  676. DRM_ERROR("Failed to initialize connector with drm\n");
  677. return ret;
  678. }
  679. drm_connector_helper_add(&adv->connector,
  680. &adv7511_connector_helper_funcs);
  681. drm_mode_connector_attach_encoder(&adv->connector, bridge->encoder);
  682. if (adv->type == ADV7533)
  683. ret = adv7533_attach_dsi(adv);
  684. return ret;
  685. }
  686. static struct drm_bridge_funcs adv7511_bridge_funcs = {
  687. .enable = adv7511_bridge_enable,
  688. .disable = adv7511_bridge_disable,
  689. .mode_set = adv7511_bridge_mode_set,
  690. .attach = adv7511_bridge_attach,
  691. };
  692. /* -----------------------------------------------------------------------------
  693. * Probe & remove
  694. */
  695. static int adv7511_parse_dt(struct device_node *np,
  696. struct adv7511_link_config *config)
  697. {
  698. const char *str;
  699. int ret;
  700. of_property_read_u32(np, "adi,input-depth", &config->input_color_depth);
  701. if (config->input_color_depth != 8 && config->input_color_depth != 10 &&
  702. config->input_color_depth != 12)
  703. return -EINVAL;
  704. ret = of_property_read_string(np, "adi,input-colorspace", &str);
  705. if (ret < 0)
  706. return ret;
  707. if (!strcmp(str, "rgb"))
  708. config->input_colorspace = HDMI_COLORSPACE_RGB;
  709. else if (!strcmp(str, "yuv422"))
  710. config->input_colorspace = HDMI_COLORSPACE_YUV422;
  711. else if (!strcmp(str, "yuv444"))
  712. config->input_colorspace = HDMI_COLORSPACE_YUV444;
  713. else
  714. return -EINVAL;
  715. ret = of_property_read_string(np, "adi,input-clock", &str);
  716. if (ret < 0)
  717. return ret;
  718. if (!strcmp(str, "1x"))
  719. config->input_clock = ADV7511_INPUT_CLOCK_1X;
  720. else if (!strcmp(str, "2x"))
  721. config->input_clock = ADV7511_INPUT_CLOCK_2X;
  722. else if (!strcmp(str, "ddr"))
  723. config->input_clock = ADV7511_INPUT_CLOCK_DDR;
  724. else
  725. return -EINVAL;
  726. if (config->input_colorspace == HDMI_COLORSPACE_YUV422 ||
  727. config->input_clock != ADV7511_INPUT_CLOCK_1X) {
  728. ret = of_property_read_u32(np, "adi,input-style",
  729. &config->input_style);
  730. if (ret)
  731. return ret;
  732. if (config->input_style < 1 || config->input_style > 3)
  733. return -EINVAL;
  734. ret = of_property_read_string(np, "adi,input-justification",
  735. &str);
  736. if (ret < 0)
  737. return ret;
  738. if (!strcmp(str, "left"))
  739. config->input_justification =
  740. ADV7511_INPUT_JUSTIFICATION_LEFT;
  741. else if (!strcmp(str, "evenly"))
  742. config->input_justification =
  743. ADV7511_INPUT_JUSTIFICATION_EVENLY;
  744. else if (!strcmp(str, "right"))
  745. config->input_justification =
  746. ADV7511_INPUT_JUSTIFICATION_RIGHT;
  747. else
  748. return -EINVAL;
  749. } else {
  750. config->input_style = 1;
  751. config->input_justification = ADV7511_INPUT_JUSTIFICATION_LEFT;
  752. }
  753. of_property_read_u32(np, "adi,clock-delay", &config->clock_delay);
  754. if (config->clock_delay < -1200 || config->clock_delay > 1600)
  755. return -EINVAL;
  756. config->embedded_sync = of_property_read_bool(np, "adi,embedded-sync");
  757. /* Hardcode the sync pulse configurations for now. */
  758. config->sync_pulse = ADV7511_INPUT_SYNC_PULSE_NONE;
  759. config->vsync_polarity = ADV7511_SYNC_POLARITY_PASSTHROUGH;
  760. config->hsync_polarity = ADV7511_SYNC_POLARITY_PASSTHROUGH;
  761. return 0;
  762. }
  763. static const int edid_i2c_addr = 0x7e;
  764. static const int packet_i2c_addr = 0x70;
  765. static const int cec_i2c_addr = 0x78;
  766. static int adv7511_probe(struct i2c_client *i2c, const struct i2c_device_id *id)
  767. {
  768. struct adv7511_link_config link_config;
  769. struct adv7511 *adv7511;
  770. struct device *dev = &i2c->dev;
  771. unsigned int val;
  772. int ret;
  773. if (!dev->of_node)
  774. return -EINVAL;
  775. adv7511 = devm_kzalloc(dev, sizeof(*adv7511), GFP_KERNEL);
  776. if (!adv7511)
  777. return -ENOMEM;
  778. adv7511->powered = false;
  779. adv7511->status = connector_status_disconnected;
  780. if (dev->of_node)
  781. adv7511->type = (enum adv7511_type)of_device_get_match_data(dev);
  782. else
  783. adv7511->type = id->driver_data;
  784. memset(&link_config, 0, sizeof(link_config));
  785. if (adv7511->type == ADV7511)
  786. ret = adv7511_parse_dt(dev->of_node, &link_config);
  787. else
  788. ret = adv7533_parse_dt(dev->of_node, adv7511);
  789. if (ret)
  790. return ret;
  791. /*
  792. * The power down GPIO is optional. If present, toggle it from active to
  793. * inactive to wake up the encoder.
  794. */
  795. adv7511->gpio_pd = devm_gpiod_get_optional(dev, "pd", GPIOD_OUT_HIGH);
  796. if (IS_ERR(adv7511->gpio_pd))
  797. return PTR_ERR(adv7511->gpio_pd);
  798. if (adv7511->gpio_pd) {
  799. mdelay(5);
  800. gpiod_set_value_cansleep(adv7511->gpio_pd, 0);
  801. }
  802. adv7511->regmap = devm_regmap_init_i2c(i2c, &adv7511_regmap_config);
  803. if (IS_ERR(adv7511->regmap))
  804. return PTR_ERR(adv7511->regmap);
  805. ret = regmap_read(adv7511->regmap, ADV7511_REG_CHIP_REVISION, &val);
  806. if (ret)
  807. return ret;
  808. dev_dbg(dev, "Rev. %d\n", val);
  809. if (adv7511->type == ADV7511)
  810. ret = regmap_register_patch(adv7511->regmap,
  811. adv7511_fixed_registers,
  812. ARRAY_SIZE(adv7511_fixed_registers));
  813. else
  814. ret = adv7533_patch_registers(adv7511);
  815. if (ret)
  816. return ret;
  817. regmap_write(adv7511->regmap, ADV7511_REG_EDID_I2C_ADDR, edid_i2c_addr);
  818. regmap_write(adv7511->regmap, ADV7511_REG_PACKET_I2C_ADDR,
  819. packet_i2c_addr);
  820. regmap_write(adv7511->regmap, ADV7511_REG_CEC_I2C_ADDR, cec_i2c_addr);
  821. adv7511_packet_disable(adv7511, 0xffff);
  822. adv7511->i2c_main = i2c;
  823. adv7511->i2c_edid = i2c_new_dummy(i2c->adapter, edid_i2c_addr >> 1);
  824. if (!adv7511->i2c_edid)
  825. return -ENOMEM;
  826. if (adv7511->type == ADV7533) {
  827. ret = adv7533_init_cec(adv7511);
  828. if (ret)
  829. goto err_i2c_unregister_edid;
  830. }
  831. if (i2c->irq) {
  832. init_waitqueue_head(&adv7511->wq);
  833. ret = devm_request_threaded_irq(dev, i2c->irq, NULL,
  834. adv7511_irq_handler,
  835. IRQF_ONESHOT, dev_name(dev),
  836. adv7511);
  837. if (ret)
  838. goto err_unregister_cec;
  839. }
  840. /* CEC is unused for now */
  841. regmap_write(adv7511->regmap, ADV7511_REG_CEC_CTRL,
  842. ADV7511_CEC_CTRL_POWER_DOWN);
  843. adv7511_power_off(adv7511);
  844. i2c_set_clientdata(i2c, adv7511);
  845. if (adv7511->type == ADV7511)
  846. adv7511_set_link_config(adv7511, &link_config);
  847. adv7511->bridge.funcs = &adv7511_bridge_funcs;
  848. adv7511->bridge.of_node = dev->of_node;
  849. ret = drm_bridge_add(&adv7511->bridge);
  850. if (ret) {
  851. dev_err(dev, "failed to add adv7511 bridge\n");
  852. goto err_unregister_cec;
  853. }
  854. return 0;
  855. err_unregister_cec:
  856. adv7533_uninit_cec(adv7511);
  857. err_i2c_unregister_edid:
  858. i2c_unregister_device(adv7511->i2c_edid);
  859. return ret;
  860. }
  861. static int adv7511_remove(struct i2c_client *i2c)
  862. {
  863. struct adv7511 *adv7511 = i2c_get_clientdata(i2c);
  864. if (adv7511->type == ADV7533) {
  865. adv7533_detach_dsi(adv7511);
  866. adv7533_uninit_cec(adv7511);
  867. }
  868. drm_bridge_remove(&adv7511->bridge);
  869. i2c_unregister_device(adv7511->i2c_edid);
  870. kfree(adv7511->edid);
  871. return 0;
  872. }
  873. static const struct i2c_device_id adv7511_i2c_ids[] = {
  874. { "adv7511", ADV7511 },
  875. { "adv7511w", ADV7511 },
  876. { "adv7513", ADV7511 },
  877. #ifdef CONFIG_DRM_I2C_ADV7533
  878. { "adv7533", ADV7533 },
  879. #endif
  880. { }
  881. };
  882. MODULE_DEVICE_TABLE(i2c, adv7511_i2c_ids);
  883. static const struct of_device_id adv7511_of_ids[] = {
  884. { .compatible = "adi,adv7511", .data = (void *)ADV7511 },
  885. { .compatible = "adi,adv7511w", .data = (void *)ADV7511 },
  886. { .compatible = "adi,adv7513", .data = (void *)ADV7511 },
  887. #ifdef CONFIG_DRM_I2C_ADV7533
  888. { .compatible = "adi,adv7533", .data = (void *)ADV7533 },
  889. #endif
  890. { }
  891. };
  892. MODULE_DEVICE_TABLE(of, adv7511_of_ids);
  893. static struct mipi_dsi_driver adv7533_dsi_driver = {
  894. .driver.name = "adv7533",
  895. };
  896. static struct i2c_driver adv7511_driver = {
  897. .driver = {
  898. .name = "adv7511",
  899. .of_match_table = adv7511_of_ids,
  900. },
  901. .id_table = adv7511_i2c_ids,
  902. .probe = adv7511_probe,
  903. .remove = adv7511_remove,
  904. };
  905. static int __init adv7511_init(void)
  906. {
  907. if (IS_ENABLED(CONFIG_DRM_MIPI_DSI))
  908. mipi_dsi_driver_register(&adv7533_dsi_driver);
  909. return i2c_add_driver(&adv7511_driver);
  910. }
  911. module_init(adv7511_init);
  912. static void __exit adv7511_exit(void)
  913. {
  914. i2c_del_driver(&adv7511_driver);
  915. if (IS_ENABLED(CONFIG_DRM_MIPI_DSI))
  916. mipi_dsi_driver_unregister(&adv7533_dsi_driver);
  917. }
  918. module_exit(adv7511_exit);
  919. MODULE_AUTHOR("Lars-Peter Clausen <lars@metafoo.de>");
  920. MODULE_DESCRIPTION("ADV7511 HDMI transmitter driver");
  921. MODULE_LICENSE("GPL");