tpm_tis_core.c 21 KB

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  1. /*
  2. * Copyright (C) 2005, 2006 IBM Corporation
  3. * Copyright (C) 2014, 2015 Intel Corporation
  4. *
  5. * Authors:
  6. * Leendert van Doorn <leendert@watson.ibm.com>
  7. * Kylene Hall <kjhall@us.ibm.com>
  8. *
  9. * Maintained by: <tpmdd-devel@lists.sourceforge.net>
  10. *
  11. * Device driver for TCG/TCPA TPM (trusted platform module).
  12. * Specifications at www.trustedcomputinggroup.org
  13. *
  14. * This device driver implements the TPM interface as defined in
  15. * the TCG TPM Interface Spec version 1.2, revision 1.0.
  16. *
  17. * This program is free software; you can redistribute it and/or
  18. * modify it under the terms of the GNU General Public License as
  19. * published by the Free Software Foundation, version 2 of the
  20. * License.
  21. */
  22. #include <linux/init.h>
  23. #include <linux/module.h>
  24. #include <linux/moduleparam.h>
  25. #include <linux/pnp.h>
  26. #include <linux/slab.h>
  27. #include <linux/interrupt.h>
  28. #include <linux/wait.h>
  29. #include <linux/acpi.h>
  30. #include <linux/freezer.h>
  31. #include "tpm.h"
  32. #include "tpm_tis_core.h"
  33. /* Before we attempt to access the TPM we must see that the valid bit is set.
  34. * The specification says that this bit is 0 at reset and remains 0 until the
  35. * 'TPM has gone through its self test and initialization and has established
  36. * correct values in the other bits.'
  37. */
  38. static int wait_startup(struct tpm_chip *chip, int l)
  39. {
  40. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  41. unsigned long stop = jiffies + chip->timeout_a;
  42. do {
  43. int rc;
  44. u8 access;
  45. rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access);
  46. if (rc < 0)
  47. return rc;
  48. if (access & TPM_ACCESS_VALID)
  49. return 0;
  50. msleep(TPM_TIMEOUT);
  51. } while (time_before(jiffies, stop));
  52. return -1;
  53. }
  54. static int check_locality(struct tpm_chip *chip, int l)
  55. {
  56. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  57. int rc;
  58. u8 access;
  59. rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access);
  60. if (rc < 0)
  61. return rc;
  62. if ((access & (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID)) ==
  63. (TPM_ACCESS_ACTIVE_LOCALITY | TPM_ACCESS_VALID))
  64. return priv->locality = l;
  65. return -1;
  66. }
  67. static void release_locality(struct tpm_chip *chip, int l, int force)
  68. {
  69. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  70. int rc;
  71. u8 access;
  72. rc = tpm_tis_read8(priv, TPM_ACCESS(l), &access);
  73. if (rc < 0)
  74. return;
  75. if (force || (access &
  76. (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID)) ==
  77. (TPM_ACCESS_REQUEST_PENDING | TPM_ACCESS_VALID))
  78. tpm_tis_write8(priv, TPM_ACCESS(l), TPM_ACCESS_ACTIVE_LOCALITY);
  79. }
  80. static int request_locality(struct tpm_chip *chip, int l)
  81. {
  82. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  83. unsigned long stop, timeout;
  84. long rc;
  85. if (check_locality(chip, l) >= 0)
  86. return l;
  87. rc = tpm_tis_write8(priv, TPM_ACCESS(l), TPM_ACCESS_REQUEST_USE);
  88. if (rc < 0)
  89. return rc;
  90. stop = jiffies + chip->timeout_a;
  91. if (chip->flags & TPM_CHIP_FLAG_IRQ) {
  92. again:
  93. timeout = stop - jiffies;
  94. if ((long)timeout <= 0)
  95. return -1;
  96. rc = wait_event_interruptible_timeout(priv->int_queue,
  97. (check_locality
  98. (chip, l) >= 0),
  99. timeout);
  100. if (rc > 0)
  101. return l;
  102. if (rc == -ERESTARTSYS && freezing(current)) {
  103. clear_thread_flag(TIF_SIGPENDING);
  104. goto again;
  105. }
  106. } else {
  107. /* wait for burstcount */
  108. do {
  109. if (check_locality(chip, l) >= 0)
  110. return l;
  111. msleep(TPM_TIMEOUT);
  112. } while (time_before(jiffies, stop));
  113. }
  114. return -1;
  115. }
  116. static u8 tpm_tis_status(struct tpm_chip *chip)
  117. {
  118. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  119. int rc;
  120. u8 status;
  121. rc = tpm_tis_read8(priv, TPM_STS(priv->locality), &status);
  122. if (rc < 0)
  123. return 0;
  124. return status;
  125. }
  126. static void tpm_tis_ready(struct tpm_chip *chip)
  127. {
  128. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  129. /* this causes the current command to be aborted */
  130. tpm_tis_write8(priv, TPM_STS(priv->locality), TPM_STS_COMMAND_READY);
  131. }
  132. static int get_burstcount(struct tpm_chip *chip)
  133. {
  134. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  135. unsigned long stop;
  136. int burstcnt, rc;
  137. u32 value;
  138. /* wait for burstcount */
  139. /* which timeout value, spec has 2 answers (c & d) */
  140. stop = jiffies + chip->timeout_d;
  141. do {
  142. rc = tpm_tis_read32(priv, TPM_STS(priv->locality), &value);
  143. if (rc < 0)
  144. return rc;
  145. burstcnt = (value >> 8) & 0xFFFF;
  146. if (burstcnt)
  147. return burstcnt;
  148. msleep(TPM_TIMEOUT);
  149. } while (time_before(jiffies, stop));
  150. return -EBUSY;
  151. }
  152. static int recv_data(struct tpm_chip *chip, u8 *buf, size_t count)
  153. {
  154. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  155. int size = 0, burstcnt, rc;
  156. while (size < count &&
  157. wait_for_tpm_stat(chip,
  158. TPM_STS_DATA_AVAIL | TPM_STS_VALID,
  159. chip->timeout_c,
  160. &priv->read_queue, true) == 0) {
  161. burstcnt = min_t(int, get_burstcount(chip), count - size);
  162. rc = tpm_tis_read_bytes(priv, TPM_DATA_FIFO(priv->locality),
  163. burstcnt, buf + size);
  164. if (rc < 0)
  165. return rc;
  166. size += burstcnt;
  167. }
  168. return size;
  169. }
  170. static int tpm_tis_recv(struct tpm_chip *chip, u8 *buf, size_t count)
  171. {
  172. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  173. int size = 0;
  174. int expected, status;
  175. if (count < TPM_HEADER_SIZE) {
  176. size = -EIO;
  177. goto out;
  178. }
  179. size = recv_data(chip, buf, TPM_HEADER_SIZE);
  180. /* read first 10 bytes, including tag, paramsize, and result */
  181. if (size < TPM_HEADER_SIZE) {
  182. dev_err(&chip->dev, "Unable to read header\n");
  183. goto out;
  184. }
  185. expected = be32_to_cpu(*(__be32 *) (buf + 2));
  186. if (expected > count) {
  187. size = -EIO;
  188. goto out;
  189. }
  190. size += recv_data(chip, &buf[TPM_HEADER_SIZE],
  191. expected - TPM_HEADER_SIZE);
  192. if (size < expected) {
  193. dev_err(&chip->dev, "Unable to read remainder of result\n");
  194. size = -ETIME;
  195. goto out;
  196. }
  197. wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
  198. &priv->int_queue, false);
  199. status = tpm_tis_status(chip);
  200. if (status & TPM_STS_DATA_AVAIL) { /* retry? */
  201. dev_err(&chip->dev, "Error left over data\n");
  202. size = -EIO;
  203. goto out;
  204. }
  205. out:
  206. tpm_tis_ready(chip);
  207. release_locality(chip, priv->locality, 0);
  208. return size;
  209. }
  210. /*
  211. * If interrupts are used (signaled by an irq set in the vendor structure)
  212. * tpm.c can skip polling for the data to be available as the interrupt is
  213. * waited for here
  214. */
  215. static int tpm_tis_send_data(struct tpm_chip *chip, u8 *buf, size_t len)
  216. {
  217. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  218. int rc, status, burstcnt;
  219. size_t count = 0;
  220. bool itpm = priv->flags & TPM_TIS_ITPM_POSSIBLE;
  221. if (request_locality(chip, 0) < 0)
  222. return -EBUSY;
  223. status = tpm_tis_status(chip);
  224. if ((status & TPM_STS_COMMAND_READY) == 0) {
  225. tpm_tis_ready(chip);
  226. if (wait_for_tpm_stat
  227. (chip, TPM_STS_COMMAND_READY, chip->timeout_b,
  228. &priv->int_queue, false) < 0) {
  229. rc = -ETIME;
  230. goto out_err;
  231. }
  232. }
  233. while (count < len - 1) {
  234. burstcnt = min_t(int, get_burstcount(chip), len - count - 1);
  235. rc = tpm_tis_write_bytes(priv, TPM_DATA_FIFO(priv->locality),
  236. burstcnt, buf + count);
  237. if (rc < 0)
  238. goto out_err;
  239. count += burstcnt;
  240. wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
  241. &priv->int_queue, false);
  242. status = tpm_tis_status(chip);
  243. if (!itpm && (status & TPM_STS_DATA_EXPECT) == 0) {
  244. rc = -EIO;
  245. goto out_err;
  246. }
  247. }
  248. /* write last byte */
  249. rc = tpm_tis_write8(priv, TPM_DATA_FIFO(priv->locality), buf[count]);
  250. if (rc < 0)
  251. goto out_err;
  252. wait_for_tpm_stat(chip, TPM_STS_VALID, chip->timeout_c,
  253. &priv->int_queue, false);
  254. status = tpm_tis_status(chip);
  255. if (!itpm && (status & TPM_STS_DATA_EXPECT) != 0) {
  256. rc = -EIO;
  257. goto out_err;
  258. }
  259. return 0;
  260. out_err:
  261. tpm_tis_ready(chip);
  262. release_locality(chip, priv->locality, 0);
  263. return rc;
  264. }
  265. static void disable_interrupts(struct tpm_chip *chip)
  266. {
  267. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  268. u32 intmask;
  269. int rc;
  270. rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask);
  271. if (rc < 0)
  272. intmask = 0;
  273. intmask &= ~TPM_GLOBAL_INT_ENABLE;
  274. rc = tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
  275. devm_free_irq(chip->dev.parent, priv->irq, chip);
  276. priv->irq = 0;
  277. chip->flags &= ~TPM_CHIP_FLAG_IRQ;
  278. }
  279. /*
  280. * If interrupts are used (signaled by an irq set in the vendor structure)
  281. * tpm.c can skip polling for the data to be available as the interrupt is
  282. * waited for here
  283. */
  284. static int tpm_tis_send_main(struct tpm_chip *chip, u8 *buf, size_t len)
  285. {
  286. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  287. int rc;
  288. u32 ordinal;
  289. unsigned long dur;
  290. rc = tpm_tis_send_data(chip, buf, len);
  291. if (rc < 0)
  292. return rc;
  293. /* go and do it */
  294. rc = tpm_tis_write8(priv, TPM_STS(priv->locality), TPM_STS_GO);
  295. if (rc < 0)
  296. goto out_err;
  297. if (chip->flags & TPM_CHIP_FLAG_IRQ) {
  298. ordinal = be32_to_cpu(*((__be32 *) (buf + 6)));
  299. if (chip->flags & TPM_CHIP_FLAG_TPM2)
  300. dur = tpm2_calc_ordinal_duration(chip, ordinal);
  301. else
  302. dur = tpm_calc_ordinal_duration(chip, ordinal);
  303. if (wait_for_tpm_stat
  304. (chip, TPM_STS_DATA_AVAIL | TPM_STS_VALID, dur,
  305. &priv->read_queue, false) < 0) {
  306. rc = -ETIME;
  307. goto out_err;
  308. }
  309. }
  310. return len;
  311. out_err:
  312. tpm_tis_ready(chip);
  313. release_locality(chip, priv->locality, 0);
  314. return rc;
  315. }
  316. static int tpm_tis_send(struct tpm_chip *chip, u8 *buf, size_t len)
  317. {
  318. int rc, irq;
  319. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  320. if (!(chip->flags & TPM_CHIP_FLAG_IRQ) || priv->irq_tested)
  321. return tpm_tis_send_main(chip, buf, len);
  322. /* Verify receipt of the expected IRQ */
  323. irq = priv->irq;
  324. priv->irq = 0;
  325. chip->flags &= ~TPM_CHIP_FLAG_IRQ;
  326. rc = tpm_tis_send_main(chip, buf, len);
  327. priv->irq = irq;
  328. chip->flags |= TPM_CHIP_FLAG_IRQ;
  329. if (!priv->irq_tested)
  330. msleep(1);
  331. if (!priv->irq_tested)
  332. disable_interrupts(chip);
  333. priv->irq_tested = true;
  334. return rc;
  335. }
  336. struct tis_vendor_timeout_override {
  337. u32 did_vid;
  338. unsigned long timeout_us[4];
  339. };
  340. static const struct tis_vendor_timeout_override vendor_timeout_overrides[] = {
  341. /* Atmel 3204 */
  342. { 0x32041114, { (TIS_SHORT_TIMEOUT*1000), (TIS_LONG_TIMEOUT*1000),
  343. (TIS_SHORT_TIMEOUT*1000), (TIS_SHORT_TIMEOUT*1000) } },
  344. };
  345. static bool tpm_tis_update_timeouts(struct tpm_chip *chip,
  346. unsigned long *timeout_cap)
  347. {
  348. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  349. int i, rc;
  350. u32 did_vid;
  351. rc = tpm_tis_read32(priv, TPM_DID_VID(0), &did_vid);
  352. if (rc < 0)
  353. return rc;
  354. for (i = 0; i != ARRAY_SIZE(vendor_timeout_overrides); i++) {
  355. if (vendor_timeout_overrides[i].did_vid != did_vid)
  356. continue;
  357. memcpy(timeout_cap, vendor_timeout_overrides[i].timeout_us,
  358. sizeof(vendor_timeout_overrides[i].timeout_us));
  359. return true;
  360. }
  361. return false;
  362. }
  363. /*
  364. * Early probing for iTPM with STS_DATA_EXPECT flaw.
  365. * Try sending command without itpm flag set and if that
  366. * fails, repeat with itpm flag set.
  367. */
  368. static int probe_itpm(struct tpm_chip *chip)
  369. {
  370. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  371. int rc = 0;
  372. u8 cmd_getticks[] = {
  373. 0x00, 0xc1, 0x00, 0x00, 0x00, 0x0a,
  374. 0x00, 0x00, 0x00, 0xf1
  375. };
  376. size_t len = sizeof(cmd_getticks);
  377. bool itpm;
  378. u16 vendor;
  379. rc = tpm_tis_read16(priv, TPM_DID_VID(0), &vendor);
  380. if (rc < 0)
  381. return rc;
  382. /* probe only iTPMS */
  383. if (vendor != TPM_VID_INTEL)
  384. return 0;
  385. itpm = false;
  386. rc = tpm_tis_send_data(chip, cmd_getticks, len);
  387. if (rc == 0)
  388. goto out;
  389. tpm_tis_ready(chip);
  390. release_locality(chip, priv->locality, 0);
  391. itpm = true;
  392. rc = tpm_tis_send_data(chip, cmd_getticks, len);
  393. if (rc == 0) {
  394. dev_info(&chip->dev, "Detected an iTPM.\n");
  395. rc = 1;
  396. } else
  397. rc = -EFAULT;
  398. out:
  399. tpm_tis_ready(chip);
  400. release_locality(chip, priv->locality, 0);
  401. return rc;
  402. }
  403. static bool tpm_tis_req_canceled(struct tpm_chip *chip, u8 status)
  404. {
  405. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  406. switch (priv->manufacturer_id) {
  407. case TPM_VID_WINBOND:
  408. return ((status == TPM_STS_VALID) ||
  409. (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY)));
  410. case TPM_VID_STM:
  411. return (status == (TPM_STS_VALID | TPM_STS_COMMAND_READY));
  412. default:
  413. return (status == TPM_STS_COMMAND_READY);
  414. }
  415. }
  416. static irqreturn_t tis_int_handler(int dummy, void *dev_id)
  417. {
  418. struct tpm_chip *chip = dev_id;
  419. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  420. u32 interrupt;
  421. int i, rc;
  422. rc = tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt);
  423. if (rc < 0)
  424. return IRQ_NONE;
  425. if (interrupt == 0)
  426. return IRQ_NONE;
  427. priv->irq_tested = true;
  428. if (interrupt & TPM_INTF_DATA_AVAIL_INT)
  429. wake_up_interruptible(&priv->read_queue);
  430. if (interrupt & TPM_INTF_LOCALITY_CHANGE_INT)
  431. for (i = 0; i < 5; i++)
  432. if (check_locality(chip, i) >= 0)
  433. break;
  434. if (interrupt &
  435. (TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_STS_VALID_INT |
  436. TPM_INTF_CMD_READY_INT))
  437. wake_up_interruptible(&priv->int_queue);
  438. /* Clear interrupts handled with TPM_EOI */
  439. rc = tpm_tis_write32(priv, TPM_INT_STATUS(priv->locality), interrupt);
  440. if (rc < 0)
  441. return IRQ_NONE;
  442. tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &interrupt);
  443. return IRQ_HANDLED;
  444. }
  445. /* Register the IRQ and issue a command that will cause an interrupt. If an
  446. * irq is seen then leave the chip setup for IRQ operation, otherwise reverse
  447. * everything and leave in polling mode. Returns 0 on success.
  448. */
  449. static int tpm_tis_probe_irq_single(struct tpm_chip *chip, u32 intmask,
  450. int flags, int irq)
  451. {
  452. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  453. u8 original_int_vec;
  454. int rc;
  455. u32 int_status;
  456. if (devm_request_irq(chip->dev.parent, irq, tis_int_handler, flags,
  457. dev_name(&chip->dev), chip) != 0) {
  458. dev_info(&chip->dev, "Unable to request irq: %d for probe\n",
  459. irq);
  460. return -1;
  461. }
  462. priv->irq = irq;
  463. rc = tpm_tis_read8(priv, TPM_INT_VECTOR(priv->locality),
  464. &original_int_vec);
  465. if (rc < 0)
  466. return rc;
  467. rc = tpm_tis_write8(priv, TPM_INT_VECTOR(priv->locality), irq);
  468. if (rc < 0)
  469. return rc;
  470. rc = tpm_tis_read32(priv, TPM_INT_STATUS(priv->locality), &int_status);
  471. if (rc < 0)
  472. return rc;
  473. /* Clear all existing */
  474. rc = tpm_tis_write32(priv, TPM_INT_STATUS(priv->locality), int_status);
  475. if (rc < 0)
  476. return rc;
  477. /* Turn on */
  478. rc = tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality),
  479. intmask | TPM_GLOBAL_INT_ENABLE);
  480. if (rc < 0)
  481. return rc;
  482. priv->irq_tested = false;
  483. /* Generate an interrupt by having the core call through to
  484. * tpm_tis_send
  485. */
  486. if (chip->flags & TPM_CHIP_FLAG_TPM2)
  487. tpm2_gen_interrupt(chip);
  488. else
  489. tpm_gen_interrupt(chip);
  490. /* tpm_tis_send will either confirm the interrupt is working or it
  491. * will call disable_irq which undoes all of the above.
  492. */
  493. if (!(chip->flags & TPM_CHIP_FLAG_IRQ)) {
  494. rc = tpm_tis_write8(priv, original_int_vec,
  495. TPM_INT_VECTOR(priv->locality));
  496. if (rc < 0)
  497. return rc;
  498. return 1;
  499. }
  500. return 0;
  501. }
  502. /* Try to find the IRQ the TPM is using. This is for legacy x86 systems that
  503. * do not have ACPI/etc. We typically expect the interrupt to be declared if
  504. * present.
  505. */
  506. static void tpm_tis_probe_irq(struct tpm_chip *chip, u32 intmask)
  507. {
  508. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  509. u8 original_int_vec;
  510. int i, rc;
  511. rc = tpm_tis_read8(priv, TPM_INT_VECTOR(priv->locality),
  512. &original_int_vec);
  513. if (rc < 0)
  514. return;
  515. if (!original_int_vec) {
  516. if (IS_ENABLED(CONFIG_X86))
  517. for (i = 3; i <= 15; i++)
  518. if (!tpm_tis_probe_irq_single(chip, intmask, 0,
  519. i))
  520. return;
  521. } else if (!tpm_tis_probe_irq_single(chip, intmask, 0,
  522. original_int_vec))
  523. return;
  524. }
  525. void tpm_tis_remove(struct tpm_chip *chip)
  526. {
  527. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  528. u32 reg = TPM_INT_ENABLE(priv->locality);
  529. u32 interrupt;
  530. int rc;
  531. rc = tpm_tis_read32(priv, reg, &interrupt);
  532. if (rc < 0)
  533. interrupt = 0;
  534. tpm_tis_write32(priv, reg, ~TPM_GLOBAL_INT_ENABLE & interrupt);
  535. release_locality(chip, priv->locality, 1);
  536. }
  537. EXPORT_SYMBOL_GPL(tpm_tis_remove);
  538. static const struct tpm_class_ops tpm_tis = {
  539. .flags = TPM_OPS_AUTO_STARTUP,
  540. .status = tpm_tis_status,
  541. .recv = tpm_tis_recv,
  542. .send = tpm_tis_send,
  543. .cancel = tpm_tis_ready,
  544. .update_timeouts = tpm_tis_update_timeouts,
  545. .req_complete_mask = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
  546. .req_complete_val = TPM_STS_DATA_AVAIL | TPM_STS_VALID,
  547. .req_canceled = tpm_tis_req_canceled,
  548. };
  549. int tpm_tis_core_init(struct device *dev, struct tpm_tis_data *priv, int irq,
  550. const struct tpm_tis_phy_ops *phy_ops,
  551. acpi_handle acpi_dev_handle)
  552. {
  553. u32 vendor, intfcaps, intmask;
  554. u8 rid;
  555. int rc, probe;
  556. struct tpm_chip *chip;
  557. chip = tpmm_chip_alloc(dev, &tpm_tis);
  558. if (IS_ERR(chip))
  559. return PTR_ERR(chip);
  560. #ifdef CONFIG_ACPI
  561. chip->acpi_dev_handle = acpi_dev_handle;
  562. #endif
  563. /* Maximum timeouts */
  564. chip->timeout_a = msecs_to_jiffies(TIS_TIMEOUT_A_MAX);
  565. chip->timeout_b = msecs_to_jiffies(TIS_TIMEOUT_B_MAX);
  566. chip->timeout_c = msecs_to_jiffies(TIS_TIMEOUT_C_MAX);
  567. chip->timeout_d = msecs_to_jiffies(TIS_TIMEOUT_D_MAX);
  568. priv->phy_ops = phy_ops;
  569. dev_set_drvdata(&chip->dev, priv);
  570. if (wait_startup(chip, 0) != 0) {
  571. rc = -ENODEV;
  572. goto out_err;
  573. }
  574. /* Take control of the TPM's interrupt hardware and shut it off */
  575. rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask);
  576. if (rc < 0)
  577. goto out_err;
  578. intmask |= TPM_INTF_CMD_READY_INT | TPM_INTF_LOCALITY_CHANGE_INT |
  579. TPM_INTF_DATA_AVAIL_INT | TPM_INTF_STS_VALID_INT;
  580. intmask &= ~TPM_GLOBAL_INT_ENABLE;
  581. tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
  582. if (request_locality(chip, 0) != 0) {
  583. rc = -ENODEV;
  584. goto out_err;
  585. }
  586. rc = tpm2_probe(chip);
  587. if (rc)
  588. goto out_err;
  589. rc = tpm_tis_read32(priv, TPM_DID_VID(0), &vendor);
  590. if (rc < 0)
  591. goto out_err;
  592. priv->manufacturer_id = vendor;
  593. rc = tpm_tis_read8(priv, TPM_RID(0), &rid);
  594. if (rc < 0)
  595. goto out_err;
  596. dev_info(dev, "%s TPM (device-id 0x%X, rev-id %d)\n",
  597. (chip->flags & TPM_CHIP_FLAG_TPM2) ? "2.0" : "1.2",
  598. vendor >> 16, rid);
  599. if (!(priv->flags & TPM_TIS_ITPM_POSSIBLE)) {
  600. probe = probe_itpm(chip);
  601. if (probe < 0) {
  602. rc = -ENODEV;
  603. goto out_err;
  604. }
  605. if (!!probe)
  606. priv->flags |= TPM_TIS_ITPM_POSSIBLE;
  607. }
  608. /* Figure out the capabilities */
  609. rc = tpm_tis_read32(priv, TPM_INTF_CAPS(priv->locality), &intfcaps);
  610. if (rc < 0)
  611. goto out_err;
  612. dev_dbg(dev, "TPM interface capabilities (0x%x):\n",
  613. intfcaps);
  614. if (intfcaps & TPM_INTF_BURST_COUNT_STATIC)
  615. dev_dbg(dev, "\tBurst Count Static\n");
  616. if (intfcaps & TPM_INTF_CMD_READY_INT)
  617. dev_dbg(dev, "\tCommand Ready Int Support\n");
  618. if (intfcaps & TPM_INTF_INT_EDGE_FALLING)
  619. dev_dbg(dev, "\tInterrupt Edge Falling\n");
  620. if (intfcaps & TPM_INTF_INT_EDGE_RISING)
  621. dev_dbg(dev, "\tInterrupt Edge Rising\n");
  622. if (intfcaps & TPM_INTF_INT_LEVEL_LOW)
  623. dev_dbg(dev, "\tInterrupt Level Low\n");
  624. if (intfcaps & TPM_INTF_INT_LEVEL_HIGH)
  625. dev_dbg(dev, "\tInterrupt Level High\n");
  626. if (intfcaps & TPM_INTF_LOCALITY_CHANGE_INT)
  627. dev_dbg(dev, "\tLocality Change Int Support\n");
  628. if (intfcaps & TPM_INTF_STS_VALID_INT)
  629. dev_dbg(dev, "\tSts Valid Int Support\n");
  630. if (intfcaps & TPM_INTF_DATA_AVAIL_INT)
  631. dev_dbg(dev, "\tData Avail Int Support\n");
  632. /* Very early on issue a command to the TPM in polling mode to make
  633. * sure it works. May as well use that command to set the proper
  634. * timeouts for the driver.
  635. */
  636. if (tpm_get_timeouts(chip)) {
  637. dev_err(dev, "Could not get TPM timeouts and durations\n");
  638. rc = -ENODEV;
  639. goto out_err;
  640. }
  641. /* INTERRUPT Setup */
  642. init_waitqueue_head(&priv->read_queue);
  643. init_waitqueue_head(&priv->int_queue);
  644. if (irq != -1) {
  645. if (irq) {
  646. tpm_tis_probe_irq_single(chip, intmask, IRQF_SHARED,
  647. irq);
  648. if (!(chip->flags & TPM_CHIP_FLAG_IRQ))
  649. dev_err(&chip->dev, FW_BUG
  650. "TPM interrupt not working, polling instead\n");
  651. } else {
  652. tpm_tis_probe_irq(chip, intmask);
  653. }
  654. }
  655. return tpm_chip_register(chip);
  656. out_err:
  657. tpm_tis_remove(chip);
  658. return rc;
  659. }
  660. EXPORT_SYMBOL_GPL(tpm_tis_core_init);
  661. #ifdef CONFIG_PM_SLEEP
  662. static void tpm_tis_reenable_interrupts(struct tpm_chip *chip)
  663. {
  664. struct tpm_tis_data *priv = dev_get_drvdata(&chip->dev);
  665. u32 intmask;
  666. int rc;
  667. /* reenable interrupts that device may have lost or
  668. * BIOS/firmware may have disabled
  669. */
  670. rc = tpm_tis_write8(priv, TPM_INT_VECTOR(priv->locality), priv->irq);
  671. if (rc < 0)
  672. return;
  673. rc = tpm_tis_read32(priv, TPM_INT_ENABLE(priv->locality), &intmask);
  674. if (rc < 0)
  675. return;
  676. intmask |= TPM_INTF_CMD_READY_INT
  677. | TPM_INTF_LOCALITY_CHANGE_INT | TPM_INTF_DATA_AVAIL_INT
  678. | TPM_INTF_STS_VALID_INT | TPM_GLOBAL_INT_ENABLE;
  679. tpm_tis_write32(priv, TPM_INT_ENABLE(priv->locality), intmask);
  680. }
  681. int tpm_tis_resume(struct device *dev)
  682. {
  683. struct tpm_chip *chip = dev_get_drvdata(dev);
  684. int ret;
  685. if (chip->flags & TPM_CHIP_FLAG_IRQ)
  686. tpm_tis_reenable_interrupts(chip);
  687. ret = tpm_pm_resume(dev);
  688. if (ret)
  689. return ret;
  690. /* TPM 1.2 requires self-test on resume. This function actually returns
  691. * an error code but for unknown reason it isn't handled.
  692. */
  693. if (!(chip->flags & TPM_CHIP_FLAG_TPM2))
  694. tpm_do_selftest(chip);
  695. return 0;
  696. }
  697. EXPORT_SYMBOL_GPL(tpm_tis_resume);
  698. #endif
  699. MODULE_AUTHOR("Leendert van Doorn (leendert@watson.ibm.com)");
  700. MODULE_DESCRIPTION("TPM Driver");
  701. MODULE_VERSION("2.0");
  702. MODULE_LICENSE("GPL");