core.c 74 KB

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  1. /*
  2. * Copyright(c) 2013-2015 Intel Corporation. All rights reserved.
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of version 2 of the GNU General Public License as
  6. * published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope that it will be useful, but
  9. * WITHOUT ANY WARRANTY; without even the implied warranty of
  10. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  11. * General Public License for more details.
  12. */
  13. #include <linux/list_sort.h>
  14. #include <linux/libnvdimm.h>
  15. #include <linux/module.h>
  16. #include <linux/mutex.h>
  17. #include <linux/ndctl.h>
  18. #include <linux/sysfs.h>
  19. #include <linux/delay.h>
  20. #include <linux/list.h>
  21. #include <linux/acpi.h>
  22. #include <linux/sort.h>
  23. #include <linux/pmem.h>
  24. #include <linux/io.h>
  25. #include <linux/nd.h>
  26. #include <asm/cacheflush.h>
  27. #include "nfit.h"
  28. /*
  29. * For readq() and writeq() on 32-bit builds, the hi-lo, lo-hi order is
  30. * irrelevant.
  31. */
  32. #include <linux/io-64-nonatomic-hi-lo.h>
  33. static bool force_enable_dimms;
  34. module_param(force_enable_dimms, bool, S_IRUGO|S_IWUSR);
  35. MODULE_PARM_DESC(force_enable_dimms, "Ignore _STA (ACPI DIMM device) status");
  36. static unsigned int scrub_timeout = NFIT_ARS_TIMEOUT;
  37. module_param(scrub_timeout, uint, S_IRUGO|S_IWUSR);
  38. MODULE_PARM_DESC(scrub_timeout, "Initial scrub timeout in seconds");
  39. /* after three payloads of overflow, it's dead jim */
  40. static unsigned int scrub_overflow_abort = 3;
  41. module_param(scrub_overflow_abort, uint, S_IRUGO|S_IWUSR);
  42. MODULE_PARM_DESC(scrub_overflow_abort,
  43. "Number of times we overflow ARS results before abort");
  44. static bool disable_vendor_specific;
  45. module_param(disable_vendor_specific, bool, S_IRUGO);
  46. MODULE_PARM_DESC(disable_vendor_specific,
  47. "Limit commands to the publicly specified set\n");
  48. LIST_HEAD(acpi_descs);
  49. DEFINE_MUTEX(acpi_desc_lock);
  50. static struct workqueue_struct *nfit_wq;
  51. struct nfit_table_prev {
  52. struct list_head spas;
  53. struct list_head memdevs;
  54. struct list_head dcrs;
  55. struct list_head bdws;
  56. struct list_head idts;
  57. struct list_head flushes;
  58. };
  59. static u8 nfit_uuid[NFIT_UUID_MAX][16];
  60. const u8 *to_nfit_uuid(enum nfit_uuids id)
  61. {
  62. return nfit_uuid[id];
  63. }
  64. EXPORT_SYMBOL(to_nfit_uuid);
  65. static struct acpi_nfit_desc *to_acpi_nfit_desc(
  66. struct nvdimm_bus_descriptor *nd_desc)
  67. {
  68. return container_of(nd_desc, struct acpi_nfit_desc, nd_desc);
  69. }
  70. static struct acpi_device *to_acpi_dev(struct acpi_nfit_desc *acpi_desc)
  71. {
  72. struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
  73. /*
  74. * If provider == 'ACPI.NFIT' we can assume 'dev' is a struct
  75. * acpi_device.
  76. */
  77. if (!nd_desc->provider_name
  78. || strcmp(nd_desc->provider_name, "ACPI.NFIT") != 0)
  79. return NULL;
  80. return to_acpi_device(acpi_desc->dev);
  81. }
  82. static int xlat_status(void *buf, unsigned int cmd)
  83. {
  84. struct nd_cmd_clear_error *clear_err;
  85. struct nd_cmd_ars_status *ars_status;
  86. struct nd_cmd_ars_start *ars_start;
  87. struct nd_cmd_ars_cap *ars_cap;
  88. u16 flags;
  89. switch (cmd) {
  90. case ND_CMD_ARS_CAP:
  91. ars_cap = buf;
  92. if ((ars_cap->status & 0xffff) == NFIT_ARS_CAP_NONE)
  93. return -ENOTTY;
  94. /* Command failed */
  95. if (ars_cap->status & 0xffff)
  96. return -EIO;
  97. /* No supported scan types for this range */
  98. flags = ND_ARS_PERSISTENT | ND_ARS_VOLATILE;
  99. if ((ars_cap->status >> 16 & flags) == 0)
  100. return -ENOTTY;
  101. break;
  102. case ND_CMD_ARS_START:
  103. ars_start = buf;
  104. /* ARS is in progress */
  105. if ((ars_start->status & 0xffff) == NFIT_ARS_START_BUSY)
  106. return -EBUSY;
  107. /* Command failed */
  108. if (ars_start->status & 0xffff)
  109. return -EIO;
  110. break;
  111. case ND_CMD_ARS_STATUS:
  112. ars_status = buf;
  113. /* Command failed */
  114. if (ars_status->status & 0xffff)
  115. return -EIO;
  116. /* Check extended status (Upper two bytes) */
  117. if (ars_status->status == NFIT_ARS_STATUS_DONE)
  118. return 0;
  119. /* ARS is in progress */
  120. if (ars_status->status == NFIT_ARS_STATUS_BUSY)
  121. return -EBUSY;
  122. /* No ARS performed for the current boot */
  123. if (ars_status->status == NFIT_ARS_STATUS_NONE)
  124. return -EAGAIN;
  125. /*
  126. * ARS interrupted, either we overflowed or some other
  127. * agent wants the scan to stop. If we didn't overflow
  128. * then just continue with the returned results.
  129. */
  130. if (ars_status->status == NFIT_ARS_STATUS_INTR) {
  131. if (ars_status->flags & NFIT_ARS_F_OVERFLOW)
  132. return -ENOSPC;
  133. return 0;
  134. }
  135. /* Unknown status */
  136. if (ars_status->status >> 16)
  137. return -EIO;
  138. break;
  139. case ND_CMD_CLEAR_ERROR:
  140. clear_err = buf;
  141. if (clear_err->status & 0xffff)
  142. return -EIO;
  143. if (!clear_err->cleared)
  144. return -EIO;
  145. if (clear_err->length > clear_err->cleared)
  146. return clear_err->cleared;
  147. break;
  148. default:
  149. break;
  150. }
  151. return 0;
  152. }
  153. static int acpi_nfit_ctl(struct nvdimm_bus_descriptor *nd_desc,
  154. struct nvdimm *nvdimm, unsigned int cmd, void *buf,
  155. unsigned int buf_len, int *cmd_rc)
  156. {
  157. struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc);
  158. union acpi_object in_obj, in_buf, *out_obj;
  159. const struct nd_cmd_desc *desc = NULL;
  160. struct device *dev = acpi_desc->dev;
  161. struct nd_cmd_pkg *call_pkg = NULL;
  162. const char *cmd_name, *dimm_name;
  163. unsigned long cmd_mask, dsm_mask;
  164. acpi_handle handle;
  165. unsigned int func;
  166. const u8 *uuid;
  167. u32 offset;
  168. int rc, i;
  169. func = cmd;
  170. if (cmd == ND_CMD_CALL) {
  171. call_pkg = buf;
  172. func = call_pkg->nd_command;
  173. }
  174. if (nvdimm) {
  175. struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
  176. struct acpi_device *adev = nfit_mem->adev;
  177. if (!adev)
  178. return -ENOTTY;
  179. if (call_pkg && nfit_mem->family != call_pkg->nd_family)
  180. return -ENOTTY;
  181. dimm_name = nvdimm_name(nvdimm);
  182. cmd_name = nvdimm_cmd_name(cmd);
  183. cmd_mask = nvdimm_cmd_mask(nvdimm);
  184. dsm_mask = nfit_mem->dsm_mask;
  185. desc = nd_cmd_dimm_desc(cmd);
  186. uuid = to_nfit_uuid(nfit_mem->family);
  187. handle = adev->handle;
  188. } else {
  189. struct acpi_device *adev = to_acpi_dev(acpi_desc);
  190. cmd_name = nvdimm_bus_cmd_name(cmd);
  191. cmd_mask = nd_desc->cmd_mask;
  192. dsm_mask = cmd_mask;
  193. desc = nd_cmd_bus_desc(cmd);
  194. uuid = to_nfit_uuid(NFIT_DEV_BUS);
  195. handle = adev->handle;
  196. dimm_name = "bus";
  197. }
  198. if (!desc || (cmd && (desc->out_num + desc->in_num == 0)))
  199. return -ENOTTY;
  200. if (!test_bit(cmd, &cmd_mask) || !test_bit(func, &dsm_mask))
  201. return -ENOTTY;
  202. in_obj.type = ACPI_TYPE_PACKAGE;
  203. in_obj.package.count = 1;
  204. in_obj.package.elements = &in_buf;
  205. in_buf.type = ACPI_TYPE_BUFFER;
  206. in_buf.buffer.pointer = buf;
  207. in_buf.buffer.length = 0;
  208. /* libnvdimm has already validated the input envelope */
  209. for (i = 0; i < desc->in_num; i++)
  210. in_buf.buffer.length += nd_cmd_in_size(nvdimm, cmd, desc,
  211. i, buf);
  212. if (call_pkg) {
  213. /* skip over package wrapper */
  214. in_buf.buffer.pointer = (void *) &call_pkg->nd_payload;
  215. in_buf.buffer.length = call_pkg->nd_size_in;
  216. }
  217. if (IS_ENABLED(CONFIG_ACPI_NFIT_DEBUG)) {
  218. dev_dbg(dev, "%s:%s cmd: %d: func: %d input length: %d\n",
  219. __func__, dimm_name, cmd, func,
  220. in_buf.buffer.length);
  221. print_hex_dump_debug("nvdimm in ", DUMP_PREFIX_OFFSET, 4, 4,
  222. in_buf.buffer.pointer,
  223. min_t(u32, 256, in_buf.buffer.length), true);
  224. }
  225. out_obj = acpi_evaluate_dsm(handle, uuid, 1, func, &in_obj);
  226. if (!out_obj) {
  227. dev_dbg(dev, "%s:%s _DSM failed cmd: %s\n", __func__, dimm_name,
  228. cmd_name);
  229. return -EINVAL;
  230. }
  231. if (call_pkg) {
  232. call_pkg->nd_fw_size = out_obj->buffer.length;
  233. memcpy(call_pkg->nd_payload + call_pkg->nd_size_in,
  234. out_obj->buffer.pointer,
  235. min(call_pkg->nd_fw_size, call_pkg->nd_size_out));
  236. ACPI_FREE(out_obj);
  237. /*
  238. * Need to support FW function w/o known size in advance.
  239. * Caller can determine required size based upon nd_fw_size.
  240. * If we return an error (like elsewhere) then caller wouldn't
  241. * be able to rely upon data returned to make calculation.
  242. */
  243. return 0;
  244. }
  245. if (out_obj->package.type != ACPI_TYPE_BUFFER) {
  246. dev_dbg(dev, "%s:%s unexpected output object type cmd: %s type: %d\n",
  247. __func__, dimm_name, cmd_name, out_obj->type);
  248. rc = -EINVAL;
  249. goto out;
  250. }
  251. if (IS_ENABLED(CONFIG_ACPI_NFIT_DEBUG)) {
  252. dev_dbg(dev, "%s:%s cmd: %s output length: %d\n", __func__,
  253. dimm_name, cmd_name, out_obj->buffer.length);
  254. print_hex_dump_debug(cmd_name, DUMP_PREFIX_OFFSET, 4,
  255. 4, out_obj->buffer.pointer, min_t(u32, 128,
  256. out_obj->buffer.length), true);
  257. }
  258. for (i = 0, offset = 0; i < desc->out_num; i++) {
  259. u32 out_size = nd_cmd_out_size(nvdimm, cmd, desc, i, buf,
  260. (u32 *) out_obj->buffer.pointer);
  261. if (offset + out_size > out_obj->buffer.length) {
  262. dev_dbg(dev, "%s:%s output object underflow cmd: %s field: %d\n",
  263. __func__, dimm_name, cmd_name, i);
  264. break;
  265. }
  266. if (in_buf.buffer.length + offset + out_size > buf_len) {
  267. dev_dbg(dev, "%s:%s output overrun cmd: %s field: %d\n",
  268. __func__, dimm_name, cmd_name, i);
  269. rc = -ENXIO;
  270. goto out;
  271. }
  272. memcpy(buf + in_buf.buffer.length + offset,
  273. out_obj->buffer.pointer + offset, out_size);
  274. offset += out_size;
  275. }
  276. if (offset + in_buf.buffer.length < buf_len) {
  277. if (i >= 1) {
  278. /*
  279. * status valid, return the number of bytes left
  280. * unfilled in the output buffer
  281. */
  282. rc = buf_len - offset - in_buf.buffer.length;
  283. if (cmd_rc)
  284. *cmd_rc = xlat_status(buf, cmd);
  285. } else {
  286. dev_err(dev, "%s:%s underrun cmd: %s buf_len: %d out_len: %d\n",
  287. __func__, dimm_name, cmd_name, buf_len,
  288. offset);
  289. rc = -ENXIO;
  290. }
  291. } else {
  292. rc = 0;
  293. if (cmd_rc)
  294. *cmd_rc = xlat_status(buf, cmd);
  295. }
  296. out:
  297. ACPI_FREE(out_obj);
  298. return rc;
  299. }
  300. static const char *spa_type_name(u16 type)
  301. {
  302. static const char *to_name[] = {
  303. [NFIT_SPA_VOLATILE] = "volatile",
  304. [NFIT_SPA_PM] = "pmem",
  305. [NFIT_SPA_DCR] = "dimm-control-region",
  306. [NFIT_SPA_BDW] = "block-data-window",
  307. [NFIT_SPA_VDISK] = "volatile-disk",
  308. [NFIT_SPA_VCD] = "volatile-cd",
  309. [NFIT_SPA_PDISK] = "persistent-disk",
  310. [NFIT_SPA_PCD] = "persistent-cd",
  311. };
  312. if (type > NFIT_SPA_PCD)
  313. return "unknown";
  314. return to_name[type];
  315. }
  316. int nfit_spa_type(struct acpi_nfit_system_address *spa)
  317. {
  318. int i;
  319. for (i = 0; i < NFIT_UUID_MAX; i++)
  320. if (memcmp(to_nfit_uuid(i), spa->range_guid, 16) == 0)
  321. return i;
  322. return -1;
  323. }
  324. static bool add_spa(struct acpi_nfit_desc *acpi_desc,
  325. struct nfit_table_prev *prev,
  326. struct acpi_nfit_system_address *spa)
  327. {
  328. struct device *dev = acpi_desc->dev;
  329. struct nfit_spa *nfit_spa;
  330. if (spa->header.length != sizeof(*spa))
  331. return false;
  332. list_for_each_entry(nfit_spa, &prev->spas, list) {
  333. if (memcmp(nfit_spa->spa, spa, sizeof(*spa)) == 0) {
  334. list_move_tail(&nfit_spa->list, &acpi_desc->spas);
  335. return true;
  336. }
  337. }
  338. nfit_spa = devm_kzalloc(dev, sizeof(*nfit_spa) + sizeof(*spa),
  339. GFP_KERNEL);
  340. if (!nfit_spa)
  341. return false;
  342. INIT_LIST_HEAD(&nfit_spa->list);
  343. memcpy(nfit_spa->spa, spa, sizeof(*spa));
  344. list_add_tail(&nfit_spa->list, &acpi_desc->spas);
  345. dev_dbg(dev, "%s: spa index: %d type: %s\n", __func__,
  346. spa->range_index,
  347. spa_type_name(nfit_spa_type(spa)));
  348. return true;
  349. }
  350. static bool add_memdev(struct acpi_nfit_desc *acpi_desc,
  351. struct nfit_table_prev *prev,
  352. struct acpi_nfit_memory_map *memdev)
  353. {
  354. struct device *dev = acpi_desc->dev;
  355. struct nfit_memdev *nfit_memdev;
  356. if (memdev->header.length != sizeof(*memdev))
  357. return false;
  358. list_for_each_entry(nfit_memdev, &prev->memdevs, list)
  359. if (memcmp(nfit_memdev->memdev, memdev, sizeof(*memdev)) == 0) {
  360. list_move_tail(&nfit_memdev->list, &acpi_desc->memdevs);
  361. return true;
  362. }
  363. nfit_memdev = devm_kzalloc(dev, sizeof(*nfit_memdev) + sizeof(*memdev),
  364. GFP_KERNEL);
  365. if (!nfit_memdev)
  366. return false;
  367. INIT_LIST_HEAD(&nfit_memdev->list);
  368. memcpy(nfit_memdev->memdev, memdev, sizeof(*memdev));
  369. list_add_tail(&nfit_memdev->list, &acpi_desc->memdevs);
  370. dev_dbg(dev, "%s: memdev handle: %#x spa: %d dcr: %d\n",
  371. __func__, memdev->device_handle, memdev->range_index,
  372. memdev->region_index);
  373. return true;
  374. }
  375. /*
  376. * An implementation may provide a truncated control region if no block windows
  377. * are defined.
  378. */
  379. static size_t sizeof_dcr(struct acpi_nfit_control_region *dcr)
  380. {
  381. if (dcr->header.length < offsetof(struct acpi_nfit_control_region,
  382. window_size))
  383. return 0;
  384. if (dcr->windows)
  385. return sizeof(*dcr);
  386. return offsetof(struct acpi_nfit_control_region, window_size);
  387. }
  388. static bool add_dcr(struct acpi_nfit_desc *acpi_desc,
  389. struct nfit_table_prev *prev,
  390. struct acpi_nfit_control_region *dcr)
  391. {
  392. struct device *dev = acpi_desc->dev;
  393. struct nfit_dcr *nfit_dcr;
  394. if (!sizeof_dcr(dcr))
  395. return false;
  396. list_for_each_entry(nfit_dcr, &prev->dcrs, list)
  397. if (memcmp(nfit_dcr->dcr, dcr, sizeof_dcr(dcr)) == 0) {
  398. list_move_tail(&nfit_dcr->list, &acpi_desc->dcrs);
  399. return true;
  400. }
  401. nfit_dcr = devm_kzalloc(dev, sizeof(*nfit_dcr) + sizeof(*dcr),
  402. GFP_KERNEL);
  403. if (!nfit_dcr)
  404. return false;
  405. INIT_LIST_HEAD(&nfit_dcr->list);
  406. memcpy(nfit_dcr->dcr, dcr, sizeof_dcr(dcr));
  407. list_add_tail(&nfit_dcr->list, &acpi_desc->dcrs);
  408. dev_dbg(dev, "%s: dcr index: %d windows: %d\n", __func__,
  409. dcr->region_index, dcr->windows);
  410. return true;
  411. }
  412. static bool add_bdw(struct acpi_nfit_desc *acpi_desc,
  413. struct nfit_table_prev *prev,
  414. struct acpi_nfit_data_region *bdw)
  415. {
  416. struct device *dev = acpi_desc->dev;
  417. struct nfit_bdw *nfit_bdw;
  418. if (bdw->header.length != sizeof(*bdw))
  419. return false;
  420. list_for_each_entry(nfit_bdw, &prev->bdws, list)
  421. if (memcmp(nfit_bdw->bdw, bdw, sizeof(*bdw)) == 0) {
  422. list_move_tail(&nfit_bdw->list, &acpi_desc->bdws);
  423. return true;
  424. }
  425. nfit_bdw = devm_kzalloc(dev, sizeof(*nfit_bdw) + sizeof(*bdw),
  426. GFP_KERNEL);
  427. if (!nfit_bdw)
  428. return false;
  429. INIT_LIST_HEAD(&nfit_bdw->list);
  430. memcpy(nfit_bdw->bdw, bdw, sizeof(*bdw));
  431. list_add_tail(&nfit_bdw->list, &acpi_desc->bdws);
  432. dev_dbg(dev, "%s: bdw dcr: %d windows: %d\n", __func__,
  433. bdw->region_index, bdw->windows);
  434. return true;
  435. }
  436. static size_t sizeof_idt(struct acpi_nfit_interleave *idt)
  437. {
  438. if (idt->header.length < sizeof(*idt))
  439. return 0;
  440. return sizeof(*idt) + sizeof(u32) * (idt->line_count - 1);
  441. }
  442. static bool add_idt(struct acpi_nfit_desc *acpi_desc,
  443. struct nfit_table_prev *prev,
  444. struct acpi_nfit_interleave *idt)
  445. {
  446. struct device *dev = acpi_desc->dev;
  447. struct nfit_idt *nfit_idt;
  448. if (!sizeof_idt(idt))
  449. return false;
  450. list_for_each_entry(nfit_idt, &prev->idts, list) {
  451. if (sizeof_idt(nfit_idt->idt) != sizeof_idt(idt))
  452. continue;
  453. if (memcmp(nfit_idt->idt, idt, sizeof_idt(idt)) == 0) {
  454. list_move_tail(&nfit_idt->list, &acpi_desc->idts);
  455. return true;
  456. }
  457. }
  458. nfit_idt = devm_kzalloc(dev, sizeof(*nfit_idt) + sizeof_idt(idt),
  459. GFP_KERNEL);
  460. if (!nfit_idt)
  461. return false;
  462. INIT_LIST_HEAD(&nfit_idt->list);
  463. memcpy(nfit_idt->idt, idt, sizeof_idt(idt));
  464. list_add_tail(&nfit_idt->list, &acpi_desc->idts);
  465. dev_dbg(dev, "%s: idt index: %d num_lines: %d\n", __func__,
  466. idt->interleave_index, idt->line_count);
  467. return true;
  468. }
  469. static size_t sizeof_flush(struct acpi_nfit_flush_address *flush)
  470. {
  471. if (flush->header.length < sizeof(*flush))
  472. return 0;
  473. return sizeof(*flush) + sizeof(u64) * (flush->hint_count - 1);
  474. }
  475. static bool add_flush(struct acpi_nfit_desc *acpi_desc,
  476. struct nfit_table_prev *prev,
  477. struct acpi_nfit_flush_address *flush)
  478. {
  479. struct device *dev = acpi_desc->dev;
  480. struct nfit_flush *nfit_flush;
  481. if (!sizeof_flush(flush))
  482. return false;
  483. list_for_each_entry(nfit_flush, &prev->flushes, list) {
  484. if (sizeof_flush(nfit_flush->flush) != sizeof_flush(flush))
  485. continue;
  486. if (memcmp(nfit_flush->flush, flush,
  487. sizeof_flush(flush)) == 0) {
  488. list_move_tail(&nfit_flush->list, &acpi_desc->flushes);
  489. return true;
  490. }
  491. }
  492. nfit_flush = devm_kzalloc(dev, sizeof(*nfit_flush)
  493. + sizeof_flush(flush), GFP_KERNEL);
  494. if (!nfit_flush)
  495. return false;
  496. INIT_LIST_HEAD(&nfit_flush->list);
  497. memcpy(nfit_flush->flush, flush, sizeof_flush(flush));
  498. list_add_tail(&nfit_flush->list, &acpi_desc->flushes);
  499. dev_dbg(dev, "%s: nfit_flush handle: %d hint_count: %d\n", __func__,
  500. flush->device_handle, flush->hint_count);
  501. return true;
  502. }
  503. static void *add_table(struct acpi_nfit_desc *acpi_desc,
  504. struct nfit_table_prev *prev, void *table, const void *end)
  505. {
  506. struct device *dev = acpi_desc->dev;
  507. struct acpi_nfit_header *hdr;
  508. void *err = ERR_PTR(-ENOMEM);
  509. if (table >= end)
  510. return NULL;
  511. hdr = table;
  512. if (!hdr->length) {
  513. dev_warn(dev, "found a zero length table '%d' parsing nfit\n",
  514. hdr->type);
  515. return NULL;
  516. }
  517. switch (hdr->type) {
  518. case ACPI_NFIT_TYPE_SYSTEM_ADDRESS:
  519. if (!add_spa(acpi_desc, prev, table))
  520. return err;
  521. break;
  522. case ACPI_NFIT_TYPE_MEMORY_MAP:
  523. if (!add_memdev(acpi_desc, prev, table))
  524. return err;
  525. break;
  526. case ACPI_NFIT_TYPE_CONTROL_REGION:
  527. if (!add_dcr(acpi_desc, prev, table))
  528. return err;
  529. break;
  530. case ACPI_NFIT_TYPE_DATA_REGION:
  531. if (!add_bdw(acpi_desc, prev, table))
  532. return err;
  533. break;
  534. case ACPI_NFIT_TYPE_INTERLEAVE:
  535. if (!add_idt(acpi_desc, prev, table))
  536. return err;
  537. break;
  538. case ACPI_NFIT_TYPE_FLUSH_ADDRESS:
  539. if (!add_flush(acpi_desc, prev, table))
  540. return err;
  541. break;
  542. case ACPI_NFIT_TYPE_SMBIOS:
  543. dev_dbg(dev, "%s: smbios\n", __func__);
  544. break;
  545. default:
  546. dev_err(dev, "unknown table '%d' parsing nfit\n", hdr->type);
  547. break;
  548. }
  549. return table + hdr->length;
  550. }
  551. static void nfit_mem_find_spa_bdw(struct acpi_nfit_desc *acpi_desc,
  552. struct nfit_mem *nfit_mem)
  553. {
  554. u32 device_handle = __to_nfit_memdev(nfit_mem)->device_handle;
  555. u16 dcr = nfit_mem->dcr->region_index;
  556. struct nfit_spa *nfit_spa;
  557. list_for_each_entry(nfit_spa, &acpi_desc->spas, list) {
  558. u16 range_index = nfit_spa->spa->range_index;
  559. int type = nfit_spa_type(nfit_spa->spa);
  560. struct nfit_memdev *nfit_memdev;
  561. if (type != NFIT_SPA_BDW)
  562. continue;
  563. list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
  564. if (nfit_memdev->memdev->range_index != range_index)
  565. continue;
  566. if (nfit_memdev->memdev->device_handle != device_handle)
  567. continue;
  568. if (nfit_memdev->memdev->region_index != dcr)
  569. continue;
  570. nfit_mem->spa_bdw = nfit_spa->spa;
  571. return;
  572. }
  573. }
  574. dev_dbg(acpi_desc->dev, "SPA-BDW not found for SPA-DCR %d\n",
  575. nfit_mem->spa_dcr->range_index);
  576. nfit_mem->bdw = NULL;
  577. }
  578. static void nfit_mem_init_bdw(struct acpi_nfit_desc *acpi_desc,
  579. struct nfit_mem *nfit_mem, struct acpi_nfit_system_address *spa)
  580. {
  581. u16 dcr = __to_nfit_memdev(nfit_mem)->region_index;
  582. struct nfit_memdev *nfit_memdev;
  583. struct nfit_bdw *nfit_bdw;
  584. struct nfit_idt *nfit_idt;
  585. u16 idt_idx, range_index;
  586. list_for_each_entry(nfit_bdw, &acpi_desc->bdws, list) {
  587. if (nfit_bdw->bdw->region_index != dcr)
  588. continue;
  589. nfit_mem->bdw = nfit_bdw->bdw;
  590. break;
  591. }
  592. if (!nfit_mem->bdw)
  593. return;
  594. nfit_mem_find_spa_bdw(acpi_desc, nfit_mem);
  595. if (!nfit_mem->spa_bdw)
  596. return;
  597. range_index = nfit_mem->spa_bdw->range_index;
  598. list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
  599. if (nfit_memdev->memdev->range_index != range_index ||
  600. nfit_memdev->memdev->region_index != dcr)
  601. continue;
  602. nfit_mem->memdev_bdw = nfit_memdev->memdev;
  603. idt_idx = nfit_memdev->memdev->interleave_index;
  604. list_for_each_entry(nfit_idt, &acpi_desc->idts, list) {
  605. if (nfit_idt->idt->interleave_index != idt_idx)
  606. continue;
  607. nfit_mem->idt_bdw = nfit_idt->idt;
  608. break;
  609. }
  610. break;
  611. }
  612. }
  613. static int nfit_mem_dcr_init(struct acpi_nfit_desc *acpi_desc,
  614. struct acpi_nfit_system_address *spa)
  615. {
  616. struct nfit_mem *nfit_mem, *found;
  617. struct nfit_memdev *nfit_memdev;
  618. int type = nfit_spa_type(spa);
  619. switch (type) {
  620. case NFIT_SPA_DCR:
  621. case NFIT_SPA_PM:
  622. break;
  623. default:
  624. return 0;
  625. }
  626. list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
  627. struct nfit_flush *nfit_flush;
  628. struct nfit_dcr *nfit_dcr;
  629. u32 device_handle;
  630. u16 dcr;
  631. if (nfit_memdev->memdev->range_index != spa->range_index)
  632. continue;
  633. found = NULL;
  634. dcr = nfit_memdev->memdev->region_index;
  635. device_handle = nfit_memdev->memdev->device_handle;
  636. list_for_each_entry(nfit_mem, &acpi_desc->dimms, list)
  637. if (__to_nfit_memdev(nfit_mem)->device_handle
  638. == device_handle) {
  639. found = nfit_mem;
  640. break;
  641. }
  642. if (found)
  643. nfit_mem = found;
  644. else {
  645. nfit_mem = devm_kzalloc(acpi_desc->dev,
  646. sizeof(*nfit_mem), GFP_KERNEL);
  647. if (!nfit_mem)
  648. return -ENOMEM;
  649. INIT_LIST_HEAD(&nfit_mem->list);
  650. nfit_mem->acpi_desc = acpi_desc;
  651. list_add(&nfit_mem->list, &acpi_desc->dimms);
  652. }
  653. list_for_each_entry(nfit_dcr, &acpi_desc->dcrs, list) {
  654. if (nfit_dcr->dcr->region_index != dcr)
  655. continue;
  656. /*
  657. * Record the control region for the dimm. For
  658. * the ACPI 6.1 case, where there are separate
  659. * control regions for the pmem vs blk
  660. * interfaces, be sure to record the extended
  661. * blk details.
  662. */
  663. if (!nfit_mem->dcr)
  664. nfit_mem->dcr = nfit_dcr->dcr;
  665. else if (nfit_mem->dcr->windows == 0
  666. && nfit_dcr->dcr->windows)
  667. nfit_mem->dcr = nfit_dcr->dcr;
  668. break;
  669. }
  670. list_for_each_entry(nfit_flush, &acpi_desc->flushes, list) {
  671. struct acpi_nfit_flush_address *flush;
  672. u16 i;
  673. if (nfit_flush->flush->device_handle != device_handle)
  674. continue;
  675. nfit_mem->nfit_flush = nfit_flush;
  676. flush = nfit_flush->flush;
  677. nfit_mem->flush_wpq = devm_kzalloc(acpi_desc->dev,
  678. flush->hint_count
  679. * sizeof(struct resource), GFP_KERNEL);
  680. if (!nfit_mem->flush_wpq)
  681. return -ENOMEM;
  682. for (i = 0; i < flush->hint_count; i++) {
  683. struct resource *res = &nfit_mem->flush_wpq[i];
  684. res->start = flush->hint_address[i];
  685. res->end = res->start + 8 - 1;
  686. }
  687. break;
  688. }
  689. if (dcr && !nfit_mem->dcr) {
  690. dev_err(acpi_desc->dev, "SPA %d missing DCR %d\n",
  691. spa->range_index, dcr);
  692. return -ENODEV;
  693. }
  694. if (type == NFIT_SPA_DCR) {
  695. struct nfit_idt *nfit_idt;
  696. u16 idt_idx;
  697. /* multiple dimms may share a SPA when interleaved */
  698. nfit_mem->spa_dcr = spa;
  699. nfit_mem->memdev_dcr = nfit_memdev->memdev;
  700. idt_idx = nfit_memdev->memdev->interleave_index;
  701. list_for_each_entry(nfit_idt, &acpi_desc->idts, list) {
  702. if (nfit_idt->idt->interleave_index != idt_idx)
  703. continue;
  704. nfit_mem->idt_dcr = nfit_idt->idt;
  705. break;
  706. }
  707. nfit_mem_init_bdw(acpi_desc, nfit_mem, spa);
  708. } else {
  709. /*
  710. * A single dimm may belong to multiple SPA-PM
  711. * ranges, record at least one in addition to
  712. * any SPA-DCR range.
  713. */
  714. nfit_mem->memdev_pmem = nfit_memdev->memdev;
  715. }
  716. }
  717. return 0;
  718. }
  719. static int nfit_mem_cmp(void *priv, struct list_head *_a, struct list_head *_b)
  720. {
  721. struct nfit_mem *a = container_of(_a, typeof(*a), list);
  722. struct nfit_mem *b = container_of(_b, typeof(*b), list);
  723. u32 handleA, handleB;
  724. handleA = __to_nfit_memdev(a)->device_handle;
  725. handleB = __to_nfit_memdev(b)->device_handle;
  726. if (handleA < handleB)
  727. return -1;
  728. else if (handleA > handleB)
  729. return 1;
  730. return 0;
  731. }
  732. static int nfit_mem_init(struct acpi_nfit_desc *acpi_desc)
  733. {
  734. struct nfit_spa *nfit_spa;
  735. /*
  736. * For each SPA-DCR or SPA-PMEM address range find its
  737. * corresponding MEMDEV(s). From each MEMDEV find the
  738. * corresponding DCR. Then, if we're operating on a SPA-DCR,
  739. * try to find a SPA-BDW and a corresponding BDW that references
  740. * the DCR. Throw it all into an nfit_mem object. Note, that
  741. * BDWs are optional.
  742. */
  743. list_for_each_entry(nfit_spa, &acpi_desc->spas, list) {
  744. int rc;
  745. rc = nfit_mem_dcr_init(acpi_desc, nfit_spa->spa);
  746. if (rc)
  747. return rc;
  748. }
  749. list_sort(NULL, &acpi_desc->dimms, nfit_mem_cmp);
  750. return 0;
  751. }
  752. static ssize_t revision_show(struct device *dev,
  753. struct device_attribute *attr, char *buf)
  754. {
  755. struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev);
  756. struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus);
  757. struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc);
  758. return sprintf(buf, "%d\n", acpi_desc->acpi_header.revision);
  759. }
  760. static DEVICE_ATTR_RO(revision);
  761. /*
  762. * This shows the number of full Address Range Scrubs that have been
  763. * completed since driver load time. Userspace can wait on this using
  764. * select/poll etc. A '+' at the end indicates an ARS is in progress
  765. */
  766. static ssize_t scrub_show(struct device *dev,
  767. struct device_attribute *attr, char *buf)
  768. {
  769. struct nvdimm_bus_descriptor *nd_desc;
  770. ssize_t rc = -ENXIO;
  771. device_lock(dev);
  772. nd_desc = dev_get_drvdata(dev);
  773. if (nd_desc) {
  774. struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc);
  775. rc = sprintf(buf, "%d%s", acpi_desc->scrub_count,
  776. (work_busy(&acpi_desc->work)) ? "+\n" : "\n");
  777. }
  778. device_unlock(dev);
  779. return rc;
  780. }
  781. static ssize_t scrub_store(struct device *dev,
  782. struct device_attribute *attr, const char *buf, size_t size)
  783. {
  784. struct nvdimm_bus_descriptor *nd_desc;
  785. ssize_t rc;
  786. long val;
  787. rc = kstrtol(buf, 0, &val);
  788. if (rc)
  789. return rc;
  790. if (val != 1)
  791. return -EINVAL;
  792. device_lock(dev);
  793. nd_desc = dev_get_drvdata(dev);
  794. if (nd_desc) {
  795. struct acpi_nfit_desc *acpi_desc = to_acpi_desc(nd_desc);
  796. rc = acpi_nfit_ars_rescan(acpi_desc);
  797. }
  798. device_unlock(dev);
  799. if (rc)
  800. return rc;
  801. return size;
  802. }
  803. static DEVICE_ATTR_RW(scrub);
  804. static bool ars_supported(struct nvdimm_bus *nvdimm_bus)
  805. {
  806. struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus);
  807. const unsigned long mask = 1 << ND_CMD_ARS_CAP | 1 << ND_CMD_ARS_START
  808. | 1 << ND_CMD_ARS_STATUS;
  809. return (nd_desc->cmd_mask & mask) == mask;
  810. }
  811. static umode_t nfit_visible(struct kobject *kobj, struct attribute *a, int n)
  812. {
  813. struct device *dev = container_of(kobj, struct device, kobj);
  814. struct nvdimm_bus *nvdimm_bus = to_nvdimm_bus(dev);
  815. if (a == &dev_attr_scrub.attr && !ars_supported(nvdimm_bus))
  816. return 0;
  817. return a->mode;
  818. }
  819. static struct attribute *acpi_nfit_attributes[] = {
  820. &dev_attr_revision.attr,
  821. &dev_attr_scrub.attr,
  822. NULL,
  823. };
  824. static struct attribute_group acpi_nfit_attribute_group = {
  825. .name = "nfit",
  826. .attrs = acpi_nfit_attributes,
  827. .is_visible = nfit_visible,
  828. };
  829. static const struct attribute_group *acpi_nfit_attribute_groups[] = {
  830. &nvdimm_bus_attribute_group,
  831. &acpi_nfit_attribute_group,
  832. NULL,
  833. };
  834. static struct acpi_nfit_memory_map *to_nfit_memdev(struct device *dev)
  835. {
  836. struct nvdimm *nvdimm = to_nvdimm(dev);
  837. struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
  838. return __to_nfit_memdev(nfit_mem);
  839. }
  840. static struct acpi_nfit_control_region *to_nfit_dcr(struct device *dev)
  841. {
  842. struct nvdimm *nvdimm = to_nvdimm(dev);
  843. struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
  844. return nfit_mem->dcr;
  845. }
  846. static ssize_t handle_show(struct device *dev,
  847. struct device_attribute *attr, char *buf)
  848. {
  849. struct acpi_nfit_memory_map *memdev = to_nfit_memdev(dev);
  850. return sprintf(buf, "%#x\n", memdev->device_handle);
  851. }
  852. static DEVICE_ATTR_RO(handle);
  853. static ssize_t phys_id_show(struct device *dev,
  854. struct device_attribute *attr, char *buf)
  855. {
  856. struct acpi_nfit_memory_map *memdev = to_nfit_memdev(dev);
  857. return sprintf(buf, "%#x\n", memdev->physical_id);
  858. }
  859. static DEVICE_ATTR_RO(phys_id);
  860. static ssize_t vendor_show(struct device *dev,
  861. struct device_attribute *attr, char *buf)
  862. {
  863. struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
  864. return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->vendor_id));
  865. }
  866. static DEVICE_ATTR_RO(vendor);
  867. static ssize_t rev_id_show(struct device *dev,
  868. struct device_attribute *attr, char *buf)
  869. {
  870. struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
  871. return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->revision_id));
  872. }
  873. static DEVICE_ATTR_RO(rev_id);
  874. static ssize_t device_show(struct device *dev,
  875. struct device_attribute *attr, char *buf)
  876. {
  877. struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
  878. return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->device_id));
  879. }
  880. static DEVICE_ATTR_RO(device);
  881. static ssize_t subsystem_vendor_show(struct device *dev,
  882. struct device_attribute *attr, char *buf)
  883. {
  884. struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
  885. return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->subsystem_vendor_id));
  886. }
  887. static DEVICE_ATTR_RO(subsystem_vendor);
  888. static ssize_t subsystem_rev_id_show(struct device *dev,
  889. struct device_attribute *attr, char *buf)
  890. {
  891. struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
  892. return sprintf(buf, "0x%04x\n",
  893. be16_to_cpu(dcr->subsystem_revision_id));
  894. }
  895. static DEVICE_ATTR_RO(subsystem_rev_id);
  896. static ssize_t subsystem_device_show(struct device *dev,
  897. struct device_attribute *attr, char *buf)
  898. {
  899. struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
  900. return sprintf(buf, "0x%04x\n", be16_to_cpu(dcr->subsystem_device_id));
  901. }
  902. static DEVICE_ATTR_RO(subsystem_device);
  903. static int num_nvdimm_formats(struct nvdimm *nvdimm)
  904. {
  905. struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
  906. int formats = 0;
  907. if (nfit_mem->memdev_pmem)
  908. formats++;
  909. if (nfit_mem->memdev_bdw)
  910. formats++;
  911. return formats;
  912. }
  913. static ssize_t format_show(struct device *dev,
  914. struct device_attribute *attr, char *buf)
  915. {
  916. struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
  917. return sprintf(buf, "0x%04x\n", le16_to_cpu(dcr->code));
  918. }
  919. static DEVICE_ATTR_RO(format);
  920. static ssize_t format1_show(struct device *dev,
  921. struct device_attribute *attr, char *buf)
  922. {
  923. u32 handle;
  924. ssize_t rc = -ENXIO;
  925. struct nfit_mem *nfit_mem;
  926. struct nfit_memdev *nfit_memdev;
  927. struct acpi_nfit_desc *acpi_desc;
  928. struct nvdimm *nvdimm = to_nvdimm(dev);
  929. struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
  930. nfit_mem = nvdimm_provider_data(nvdimm);
  931. acpi_desc = nfit_mem->acpi_desc;
  932. handle = to_nfit_memdev(dev)->device_handle;
  933. /* assumes DIMMs have at most 2 published interface codes */
  934. mutex_lock(&acpi_desc->init_mutex);
  935. list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
  936. struct acpi_nfit_memory_map *memdev = nfit_memdev->memdev;
  937. struct nfit_dcr *nfit_dcr;
  938. if (memdev->device_handle != handle)
  939. continue;
  940. list_for_each_entry(nfit_dcr, &acpi_desc->dcrs, list) {
  941. if (nfit_dcr->dcr->region_index != memdev->region_index)
  942. continue;
  943. if (nfit_dcr->dcr->code == dcr->code)
  944. continue;
  945. rc = sprintf(buf, "0x%04x\n",
  946. le16_to_cpu(nfit_dcr->dcr->code));
  947. break;
  948. }
  949. if (rc != ENXIO)
  950. break;
  951. }
  952. mutex_unlock(&acpi_desc->init_mutex);
  953. return rc;
  954. }
  955. static DEVICE_ATTR_RO(format1);
  956. static ssize_t formats_show(struct device *dev,
  957. struct device_attribute *attr, char *buf)
  958. {
  959. struct nvdimm *nvdimm = to_nvdimm(dev);
  960. return sprintf(buf, "%d\n", num_nvdimm_formats(nvdimm));
  961. }
  962. static DEVICE_ATTR_RO(formats);
  963. static ssize_t serial_show(struct device *dev,
  964. struct device_attribute *attr, char *buf)
  965. {
  966. struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
  967. return sprintf(buf, "0x%08x\n", be32_to_cpu(dcr->serial_number));
  968. }
  969. static DEVICE_ATTR_RO(serial);
  970. static ssize_t family_show(struct device *dev,
  971. struct device_attribute *attr, char *buf)
  972. {
  973. struct nvdimm *nvdimm = to_nvdimm(dev);
  974. struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
  975. if (nfit_mem->family < 0)
  976. return -ENXIO;
  977. return sprintf(buf, "%d\n", nfit_mem->family);
  978. }
  979. static DEVICE_ATTR_RO(family);
  980. static ssize_t dsm_mask_show(struct device *dev,
  981. struct device_attribute *attr, char *buf)
  982. {
  983. struct nvdimm *nvdimm = to_nvdimm(dev);
  984. struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
  985. if (nfit_mem->family < 0)
  986. return -ENXIO;
  987. return sprintf(buf, "%#lx\n", nfit_mem->dsm_mask);
  988. }
  989. static DEVICE_ATTR_RO(dsm_mask);
  990. static ssize_t flags_show(struct device *dev,
  991. struct device_attribute *attr, char *buf)
  992. {
  993. u16 flags = to_nfit_memdev(dev)->flags;
  994. return sprintf(buf, "%s%s%s%s%s\n",
  995. flags & ACPI_NFIT_MEM_SAVE_FAILED ? "save_fail " : "",
  996. flags & ACPI_NFIT_MEM_RESTORE_FAILED ? "restore_fail " : "",
  997. flags & ACPI_NFIT_MEM_FLUSH_FAILED ? "flush_fail " : "",
  998. flags & ACPI_NFIT_MEM_NOT_ARMED ? "not_armed " : "",
  999. flags & ACPI_NFIT_MEM_HEALTH_OBSERVED ? "smart_event " : "");
  1000. }
  1001. static DEVICE_ATTR_RO(flags);
  1002. static ssize_t id_show(struct device *dev,
  1003. struct device_attribute *attr, char *buf)
  1004. {
  1005. struct acpi_nfit_control_region *dcr = to_nfit_dcr(dev);
  1006. if (dcr->valid_fields & ACPI_NFIT_CONTROL_MFG_INFO_VALID)
  1007. return sprintf(buf, "%04x-%02x-%04x-%08x\n",
  1008. be16_to_cpu(dcr->vendor_id),
  1009. dcr->manufacturing_location,
  1010. be16_to_cpu(dcr->manufacturing_date),
  1011. be32_to_cpu(dcr->serial_number));
  1012. else
  1013. return sprintf(buf, "%04x-%08x\n",
  1014. be16_to_cpu(dcr->vendor_id),
  1015. be32_to_cpu(dcr->serial_number));
  1016. }
  1017. static DEVICE_ATTR_RO(id);
  1018. static struct attribute *acpi_nfit_dimm_attributes[] = {
  1019. &dev_attr_handle.attr,
  1020. &dev_attr_phys_id.attr,
  1021. &dev_attr_vendor.attr,
  1022. &dev_attr_device.attr,
  1023. &dev_attr_rev_id.attr,
  1024. &dev_attr_subsystem_vendor.attr,
  1025. &dev_attr_subsystem_device.attr,
  1026. &dev_attr_subsystem_rev_id.attr,
  1027. &dev_attr_format.attr,
  1028. &dev_attr_formats.attr,
  1029. &dev_attr_format1.attr,
  1030. &dev_attr_serial.attr,
  1031. &dev_attr_flags.attr,
  1032. &dev_attr_id.attr,
  1033. &dev_attr_family.attr,
  1034. &dev_attr_dsm_mask.attr,
  1035. NULL,
  1036. };
  1037. static umode_t acpi_nfit_dimm_attr_visible(struct kobject *kobj,
  1038. struct attribute *a, int n)
  1039. {
  1040. struct device *dev = container_of(kobj, struct device, kobj);
  1041. struct nvdimm *nvdimm = to_nvdimm(dev);
  1042. if (!to_nfit_dcr(dev))
  1043. return 0;
  1044. if (a == &dev_attr_format1.attr && num_nvdimm_formats(nvdimm) <= 1)
  1045. return 0;
  1046. return a->mode;
  1047. }
  1048. static struct attribute_group acpi_nfit_dimm_attribute_group = {
  1049. .name = "nfit",
  1050. .attrs = acpi_nfit_dimm_attributes,
  1051. .is_visible = acpi_nfit_dimm_attr_visible,
  1052. };
  1053. static const struct attribute_group *acpi_nfit_dimm_attribute_groups[] = {
  1054. &nvdimm_attribute_group,
  1055. &nd_device_attribute_group,
  1056. &acpi_nfit_dimm_attribute_group,
  1057. NULL,
  1058. };
  1059. static struct nvdimm *acpi_nfit_dimm_by_handle(struct acpi_nfit_desc *acpi_desc,
  1060. u32 device_handle)
  1061. {
  1062. struct nfit_mem *nfit_mem;
  1063. list_for_each_entry(nfit_mem, &acpi_desc->dimms, list)
  1064. if (__to_nfit_memdev(nfit_mem)->device_handle == device_handle)
  1065. return nfit_mem->nvdimm;
  1066. return NULL;
  1067. }
  1068. static int acpi_nfit_add_dimm(struct acpi_nfit_desc *acpi_desc,
  1069. struct nfit_mem *nfit_mem, u32 device_handle)
  1070. {
  1071. struct acpi_device *adev, *adev_dimm;
  1072. struct device *dev = acpi_desc->dev;
  1073. unsigned long dsm_mask;
  1074. const u8 *uuid;
  1075. int i;
  1076. /* nfit test assumes 1:1 relationship between commands and dsms */
  1077. nfit_mem->dsm_mask = acpi_desc->dimm_cmd_force_en;
  1078. nfit_mem->family = NVDIMM_FAMILY_INTEL;
  1079. adev = to_acpi_dev(acpi_desc);
  1080. if (!adev)
  1081. return 0;
  1082. adev_dimm = acpi_find_child_device(adev, device_handle, false);
  1083. nfit_mem->adev = adev_dimm;
  1084. if (!adev_dimm) {
  1085. dev_err(dev, "no ACPI.NFIT device with _ADR %#x, disabling...\n",
  1086. device_handle);
  1087. return force_enable_dimms ? 0 : -ENODEV;
  1088. }
  1089. /*
  1090. * Until standardization materializes we need to consider 4
  1091. * different command sets. Note, that checking for function0 (bit0)
  1092. * tells us if any commands are reachable through this uuid.
  1093. */
  1094. for (i = NVDIMM_FAMILY_INTEL; i <= NVDIMM_FAMILY_MSFT; i++)
  1095. if (acpi_check_dsm(adev_dimm->handle, to_nfit_uuid(i), 1, 1))
  1096. break;
  1097. /* limit the supported commands to those that are publicly documented */
  1098. nfit_mem->family = i;
  1099. if (nfit_mem->family == NVDIMM_FAMILY_INTEL) {
  1100. dsm_mask = 0x3fe;
  1101. if (disable_vendor_specific)
  1102. dsm_mask &= ~(1 << ND_CMD_VENDOR);
  1103. } else if (nfit_mem->family == NVDIMM_FAMILY_HPE1) {
  1104. dsm_mask = 0x1c3c76;
  1105. } else if (nfit_mem->family == NVDIMM_FAMILY_HPE2) {
  1106. dsm_mask = 0x1fe;
  1107. if (disable_vendor_specific)
  1108. dsm_mask &= ~(1 << 8);
  1109. } else if (nfit_mem->family == NVDIMM_FAMILY_MSFT) {
  1110. dsm_mask = 0xffffffff;
  1111. } else {
  1112. dev_dbg(dev, "unknown dimm command family\n");
  1113. nfit_mem->family = -1;
  1114. /* DSMs are optional, continue loading the driver... */
  1115. return 0;
  1116. }
  1117. uuid = to_nfit_uuid(nfit_mem->family);
  1118. for_each_set_bit(i, &dsm_mask, BITS_PER_LONG)
  1119. if (acpi_check_dsm(adev_dimm->handle, uuid, 1, 1ULL << i))
  1120. set_bit(i, &nfit_mem->dsm_mask);
  1121. return 0;
  1122. }
  1123. static int acpi_nfit_register_dimms(struct acpi_nfit_desc *acpi_desc)
  1124. {
  1125. struct nfit_mem *nfit_mem;
  1126. int dimm_count = 0;
  1127. list_for_each_entry(nfit_mem, &acpi_desc->dimms, list) {
  1128. struct acpi_nfit_flush_address *flush;
  1129. unsigned long flags = 0, cmd_mask;
  1130. struct nvdimm *nvdimm;
  1131. u32 device_handle;
  1132. u16 mem_flags;
  1133. int rc;
  1134. device_handle = __to_nfit_memdev(nfit_mem)->device_handle;
  1135. nvdimm = acpi_nfit_dimm_by_handle(acpi_desc, device_handle);
  1136. if (nvdimm) {
  1137. dimm_count++;
  1138. continue;
  1139. }
  1140. if (nfit_mem->bdw && nfit_mem->memdev_pmem)
  1141. flags |= NDD_ALIASING;
  1142. mem_flags = __to_nfit_memdev(nfit_mem)->flags;
  1143. if (mem_flags & ACPI_NFIT_MEM_NOT_ARMED)
  1144. flags |= NDD_UNARMED;
  1145. rc = acpi_nfit_add_dimm(acpi_desc, nfit_mem, device_handle);
  1146. if (rc)
  1147. continue;
  1148. /*
  1149. * TODO: provide translation for non-NVDIMM_FAMILY_INTEL
  1150. * devices (i.e. from nd_cmd to acpi_dsm) to standardize the
  1151. * userspace interface.
  1152. */
  1153. cmd_mask = 1UL << ND_CMD_CALL;
  1154. if (nfit_mem->family == NVDIMM_FAMILY_INTEL)
  1155. cmd_mask |= nfit_mem->dsm_mask;
  1156. flush = nfit_mem->nfit_flush ? nfit_mem->nfit_flush->flush
  1157. : NULL;
  1158. nvdimm = nvdimm_create(acpi_desc->nvdimm_bus, nfit_mem,
  1159. acpi_nfit_dimm_attribute_groups,
  1160. flags, cmd_mask, flush ? flush->hint_count : 0,
  1161. nfit_mem->flush_wpq);
  1162. if (!nvdimm)
  1163. return -ENOMEM;
  1164. nfit_mem->nvdimm = nvdimm;
  1165. dimm_count++;
  1166. if ((mem_flags & ACPI_NFIT_MEM_FAILED_MASK) == 0)
  1167. continue;
  1168. dev_info(acpi_desc->dev, "%s flags:%s%s%s%s\n",
  1169. nvdimm_name(nvdimm),
  1170. mem_flags & ACPI_NFIT_MEM_SAVE_FAILED ? " save_fail" : "",
  1171. mem_flags & ACPI_NFIT_MEM_RESTORE_FAILED ? " restore_fail":"",
  1172. mem_flags & ACPI_NFIT_MEM_FLUSH_FAILED ? " flush_fail" : "",
  1173. mem_flags & ACPI_NFIT_MEM_NOT_ARMED ? " not_armed" : "");
  1174. }
  1175. return nvdimm_bus_check_dimm_count(acpi_desc->nvdimm_bus, dimm_count);
  1176. }
  1177. static void acpi_nfit_init_dsms(struct acpi_nfit_desc *acpi_desc)
  1178. {
  1179. struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
  1180. const u8 *uuid = to_nfit_uuid(NFIT_DEV_BUS);
  1181. struct acpi_device *adev;
  1182. int i;
  1183. nd_desc->cmd_mask = acpi_desc->bus_cmd_force_en;
  1184. adev = to_acpi_dev(acpi_desc);
  1185. if (!adev)
  1186. return;
  1187. for (i = ND_CMD_ARS_CAP; i <= ND_CMD_CLEAR_ERROR; i++)
  1188. if (acpi_check_dsm(adev->handle, uuid, 1, 1ULL << i))
  1189. set_bit(i, &nd_desc->cmd_mask);
  1190. }
  1191. static ssize_t range_index_show(struct device *dev,
  1192. struct device_attribute *attr, char *buf)
  1193. {
  1194. struct nd_region *nd_region = to_nd_region(dev);
  1195. struct nfit_spa *nfit_spa = nd_region_provider_data(nd_region);
  1196. return sprintf(buf, "%d\n", nfit_spa->spa->range_index);
  1197. }
  1198. static DEVICE_ATTR_RO(range_index);
  1199. static struct attribute *acpi_nfit_region_attributes[] = {
  1200. &dev_attr_range_index.attr,
  1201. NULL,
  1202. };
  1203. static struct attribute_group acpi_nfit_region_attribute_group = {
  1204. .name = "nfit",
  1205. .attrs = acpi_nfit_region_attributes,
  1206. };
  1207. static const struct attribute_group *acpi_nfit_region_attribute_groups[] = {
  1208. &nd_region_attribute_group,
  1209. &nd_mapping_attribute_group,
  1210. &nd_device_attribute_group,
  1211. &nd_numa_attribute_group,
  1212. &acpi_nfit_region_attribute_group,
  1213. NULL,
  1214. };
  1215. /* enough info to uniquely specify an interleave set */
  1216. struct nfit_set_info {
  1217. struct nfit_set_info_map {
  1218. u64 region_offset;
  1219. u32 serial_number;
  1220. u32 pad;
  1221. } mapping[0];
  1222. };
  1223. static size_t sizeof_nfit_set_info(int num_mappings)
  1224. {
  1225. return sizeof(struct nfit_set_info)
  1226. + num_mappings * sizeof(struct nfit_set_info_map);
  1227. }
  1228. static int cmp_map(const void *m0, const void *m1)
  1229. {
  1230. const struct nfit_set_info_map *map0 = m0;
  1231. const struct nfit_set_info_map *map1 = m1;
  1232. return memcmp(&map0->region_offset, &map1->region_offset,
  1233. sizeof(u64));
  1234. }
  1235. /* Retrieve the nth entry referencing this spa */
  1236. static struct acpi_nfit_memory_map *memdev_from_spa(
  1237. struct acpi_nfit_desc *acpi_desc, u16 range_index, int n)
  1238. {
  1239. struct nfit_memdev *nfit_memdev;
  1240. list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list)
  1241. if (nfit_memdev->memdev->range_index == range_index)
  1242. if (n-- == 0)
  1243. return nfit_memdev->memdev;
  1244. return NULL;
  1245. }
  1246. static int acpi_nfit_init_interleave_set(struct acpi_nfit_desc *acpi_desc,
  1247. struct nd_region_desc *ndr_desc,
  1248. struct acpi_nfit_system_address *spa)
  1249. {
  1250. int i, spa_type = nfit_spa_type(spa);
  1251. struct device *dev = acpi_desc->dev;
  1252. struct nd_interleave_set *nd_set;
  1253. u16 nr = ndr_desc->num_mappings;
  1254. struct nfit_set_info *info;
  1255. if (spa_type == NFIT_SPA_PM || spa_type == NFIT_SPA_VOLATILE)
  1256. /* pass */;
  1257. else
  1258. return 0;
  1259. nd_set = devm_kzalloc(dev, sizeof(*nd_set), GFP_KERNEL);
  1260. if (!nd_set)
  1261. return -ENOMEM;
  1262. info = devm_kzalloc(dev, sizeof_nfit_set_info(nr), GFP_KERNEL);
  1263. if (!info)
  1264. return -ENOMEM;
  1265. for (i = 0; i < nr; i++) {
  1266. struct nd_mapping *nd_mapping = &ndr_desc->nd_mapping[i];
  1267. struct nfit_set_info_map *map = &info->mapping[i];
  1268. struct nvdimm *nvdimm = nd_mapping->nvdimm;
  1269. struct nfit_mem *nfit_mem = nvdimm_provider_data(nvdimm);
  1270. struct acpi_nfit_memory_map *memdev = memdev_from_spa(acpi_desc,
  1271. spa->range_index, i);
  1272. if (!memdev || !nfit_mem->dcr) {
  1273. dev_err(dev, "%s: failed to find DCR\n", __func__);
  1274. return -ENODEV;
  1275. }
  1276. map->region_offset = memdev->region_offset;
  1277. map->serial_number = nfit_mem->dcr->serial_number;
  1278. }
  1279. sort(&info->mapping[0], nr, sizeof(struct nfit_set_info_map),
  1280. cmp_map, NULL);
  1281. nd_set->cookie = nd_fletcher64(info, sizeof_nfit_set_info(nr), 0);
  1282. ndr_desc->nd_set = nd_set;
  1283. devm_kfree(dev, info);
  1284. return 0;
  1285. }
  1286. static u64 to_interleave_offset(u64 offset, struct nfit_blk_mmio *mmio)
  1287. {
  1288. struct acpi_nfit_interleave *idt = mmio->idt;
  1289. u32 sub_line_offset, line_index, line_offset;
  1290. u64 line_no, table_skip_count, table_offset;
  1291. line_no = div_u64_rem(offset, mmio->line_size, &sub_line_offset);
  1292. table_skip_count = div_u64_rem(line_no, mmio->num_lines, &line_index);
  1293. line_offset = idt->line_offset[line_index]
  1294. * mmio->line_size;
  1295. table_offset = table_skip_count * mmio->table_size;
  1296. return mmio->base_offset + line_offset + table_offset + sub_line_offset;
  1297. }
  1298. static u32 read_blk_stat(struct nfit_blk *nfit_blk, unsigned int bw)
  1299. {
  1300. struct nfit_blk_mmio *mmio = &nfit_blk->mmio[DCR];
  1301. u64 offset = nfit_blk->stat_offset + mmio->size * bw;
  1302. const u32 STATUS_MASK = 0x80000037;
  1303. if (mmio->num_lines)
  1304. offset = to_interleave_offset(offset, mmio);
  1305. return readl(mmio->addr.base + offset) & STATUS_MASK;
  1306. }
  1307. static void write_blk_ctl(struct nfit_blk *nfit_blk, unsigned int bw,
  1308. resource_size_t dpa, unsigned int len, unsigned int write)
  1309. {
  1310. u64 cmd, offset;
  1311. struct nfit_blk_mmio *mmio = &nfit_blk->mmio[DCR];
  1312. enum {
  1313. BCW_OFFSET_MASK = (1ULL << 48)-1,
  1314. BCW_LEN_SHIFT = 48,
  1315. BCW_LEN_MASK = (1ULL << 8) - 1,
  1316. BCW_CMD_SHIFT = 56,
  1317. };
  1318. cmd = (dpa >> L1_CACHE_SHIFT) & BCW_OFFSET_MASK;
  1319. len = len >> L1_CACHE_SHIFT;
  1320. cmd |= ((u64) len & BCW_LEN_MASK) << BCW_LEN_SHIFT;
  1321. cmd |= ((u64) write) << BCW_CMD_SHIFT;
  1322. offset = nfit_blk->cmd_offset + mmio->size * bw;
  1323. if (mmio->num_lines)
  1324. offset = to_interleave_offset(offset, mmio);
  1325. writeq(cmd, mmio->addr.base + offset);
  1326. nvdimm_flush(nfit_blk->nd_region);
  1327. if (nfit_blk->dimm_flags & NFIT_BLK_DCR_LATCH)
  1328. readq(mmio->addr.base + offset);
  1329. }
  1330. static int acpi_nfit_blk_single_io(struct nfit_blk *nfit_blk,
  1331. resource_size_t dpa, void *iobuf, size_t len, int rw,
  1332. unsigned int lane)
  1333. {
  1334. struct nfit_blk_mmio *mmio = &nfit_blk->mmio[BDW];
  1335. unsigned int copied = 0;
  1336. u64 base_offset;
  1337. int rc;
  1338. base_offset = nfit_blk->bdw_offset + dpa % L1_CACHE_BYTES
  1339. + lane * mmio->size;
  1340. write_blk_ctl(nfit_blk, lane, dpa, len, rw);
  1341. while (len) {
  1342. unsigned int c;
  1343. u64 offset;
  1344. if (mmio->num_lines) {
  1345. u32 line_offset;
  1346. offset = to_interleave_offset(base_offset + copied,
  1347. mmio);
  1348. div_u64_rem(offset, mmio->line_size, &line_offset);
  1349. c = min_t(size_t, len, mmio->line_size - line_offset);
  1350. } else {
  1351. offset = base_offset + nfit_blk->bdw_offset;
  1352. c = len;
  1353. }
  1354. if (rw)
  1355. memcpy_to_pmem(mmio->addr.aperture + offset,
  1356. iobuf + copied, c);
  1357. else {
  1358. if (nfit_blk->dimm_flags & NFIT_BLK_READ_FLUSH)
  1359. mmio_flush_range((void __force *)
  1360. mmio->addr.aperture + offset, c);
  1361. memcpy_from_pmem(iobuf + copied,
  1362. mmio->addr.aperture + offset, c);
  1363. }
  1364. copied += c;
  1365. len -= c;
  1366. }
  1367. if (rw)
  1368. nvdimm_flush(nfit_blk->nd_region);
  1369. rc = read_blk_stat(nfit_blk, lane) ? -EIO : 0;
  1370. return rc;
  1371. }
  1372. static int acpi_nfit_blk_region_do_io(struct nd_blk_region *ndbr,
  1373. resource_size_t dpa, void *iobuf, u64 len, int rw)
  1374. {
  1375. struct nfit_blk *nfit_blk = nd_blk_region_provider_data(ndbr);
  1376. struct nfit_blk_mmio *mmio = &nfit_blk->mmio[BDW];
  1377. struct nd_region *nd_region = nfit_blk->nd_region;
  1378. unsigned int lane, copied = 0;
  1379. int rc = 0;
  1380. lane = nd_region_acquire_lane(nd_region);
  1381. while (len) {
  1382. u64 c = min(len, mmio->size);
  1383. rc = acpi_nfit_blk_single_io(nfit_blk, dpa + copied,
  1384. iobuf + copied, c, rw, lane);
  1385. if (rc)
  1386. break;
  1387. copied += c;
  1388. len -= c;
  1389. }
  1390. nd_region_release_lane(nd_region, lane);
  1391. return rc;
  1392. }
  1393. static int nfit_blk_init_interleave(struct nfit_blk_mmio *mmio,
  1394. struct acpi_nfit_interleave *idt, u16 interleave_ways)
  1395. {
  1396. if (idt) {
  1397. mmio->num_lines = idt->line_count;
  1398. mmio->line_size = idt->line_size;
  1399. if (interleave_ways == 0)
  1400. return -ENXIO;
  1401. mmio->table_size = mmio->num_lines * interleave_ways
  1402. * mmio->line_size;
  1403. }
  1404. return 0;
  1405. }
  1406. static int acpi_nfit_blk_get_flags(struct nvdimm_bus_descriptor *nd_desc,
  1407. struct nvdimm *nvdimm, struct nfit_blk *nfit_blk)
  1408. {
  1409. struct nd_cmd_dimm_flags flags;
  1410. int rc;
  1411. memset(&flags, 0, sizeof(flags));
  1412. rc = nd_desc->ndctl(nd_desc, nvdimm, ND_CMD_DIMM_FLAGS, &flags,
  1413. sizeof(flags), NULL);
  1414. if (rc >= 0 && flags.status == 0)
  1415. nfit_blk->dimm_flags = flags.flags;
  1416. else if (rc == -ENOTTY) {
  1417. /* fall back to a conservative default */
  1418. nfit_blk->dimm_flags = NFIT_BLK_DCR_LATCH | NFIT_BLK_READ_FLUSH;
  1419. rc = 0;
  1420. } else
  1421. rc = -ENXIO;
  1422. return rc;
  1423. }
  1424. static int acpi_nfit_blk_region_enable(struct nvdimm_bus *nvdimm_bus,
  1425. struct device *dev)
  1426. {
  1427. struct nvdimm_bus_descriptor *nd_desc = to_nd_desc(nvdimm_bus);
  1428. struct nd_blk_region *ndbr = to_nd_blk_region(dev);
  1429. struct nfit_blk_mmio *mmio;
  1430. struct nfit_blk *nfit_blk;
  1431. struct nfit_mem *nfit_mem;
  1432. struct nvdimm *nvdimm;
  1433. int rc;
  1434. nvdimm = nd_blk_region_to_dimm(ndbr);
  1435. nfit_mem = nvdimm_provider_data(nvdimm);
  1436. if (!nfit_mem || !nfit_mem->dcr || !nfit_mem->bdw) {
  1437. dev_dbg(dev, "%s: missing%s%s%s\n", __func__,
  1438. nfit_mem ? "" : " nfit_mem",
  1439. (nfit_mem && nfit_mem->dcr) ? "" : " dcr",
  1440. (nfit_mem && nfit_mem->bdw) ? "" : " bdw");
  1441. return -ENXIO;
  1442. }
  1443. nfit_blk = devm_kzalloc(dev, sizeof(*nfit_blk), GFP_KERNEL);
  1444. if (!nfit_blk)
  1445. return -ENOMEM;
  1446. nd_blk_region_set_provider_data(ndbr, nfit_blk);
  1447. nfit_blk->nd_region = to_nd_region(dev);
  1448. /* map block aperture memory */
  1449. nfit_blk->bdw_offset = nfit_mem->bdw->offset;
  1450. mmio = &nfit_blk->mmio[BDW];
  1451. mmio->addr.base = devm_nvdimm_memremap(dev, nfit_mem->spa_bdw->address,
  1452. nfit_mem->spa_bdw->length, ARCH_MEMREMAP_PMEM);
  1453. if (!mmio->addr.base) {
  1454. dev_dbg(dev, "%s: %s failed to map bdw\n", __func__,
  1455. nvdimm_name(nvdimm));
  1456. return -ENOMEM;
  1457. }
  1458. mmio->size = nfit_mem->bdw->size;
  1459. mmio->base_offset = nfit_mem->memdev_bdw->region_offset;
  1460. mmio->idt = nfit_mem->idt_bdw;
  1461. mmio->spa = nfit_mem->spa_bdw;
  1462. rc = nfit_blk_init_interleave(mmio, nfit_mem->idt_bdw,
  1463. nfit_mem->memdev_bdw->interleave_ways);
  1464. if (rc) {
  1465. dev_dbg(dev, "%s: %s failed to init bdw interleave\n",
  1466. __func__, nvdimm_name(nvdimm));
  1467. return rc;
  1468. }
  1469. /* map block control memory */
  1470. nfit_blk->cmd_offset = nfit_mem->dcr->command_offset;
  1471. nfit_blk->stat_offset = nfit_mem->dcr->status_offset;
  1472. mmio = &nfit_blk->mmio[DCR];
  1473. mmio->addr.base = devm_nvdimm_ioremap(dev, nfit_mem->spa_dcr->address,
  1474. nfit_mem->spa_dcr->length);
  1475. if (!mmio->addr.base) {
  1476. dev_dbg(dev, "%s: %s failed to map dcr\n", __func__,
  1477. nvdimm_name(nvdimm));
  1478. return -ENOMEM;
  1479. }
  1480. mmio->size = nfit_mem->dcr->window_size;
  1481. mmio->base_offset = nfit_mem->memdev_dcr->region_offset;
  1482. mmio->idt = nfit_mem->idt_dcr;
  1483. mmio->spa = nfit_mem->spa_dcr;
  1484. rc = nfit_blk_init_interleave(mmio, nfit_mem->idt_dcr,
  1485. nfit_mem->memdev_dcr->interleave_ways);
  1486. if (rc) {
  1487. dev_dbg(dev, "%s: %s failed to init dcr interleave\n",
  1488. __func__, nvdimm_name(nvdimm));
  1489. return rc;
  1490. }
  1491. rc = acpi_nfit_blk_get_flags(nd_desc, nvdimm, nfit_blk);
  1492. if (rc < 0) {
  1493. dev_dbg(dev, "%s: %s failed get DIMM flags\n",
  1494. __func__, nvdimm_name(nvdimm));
  1495. return rc;
  1496. }
  1497. if (nvdimm_has_flush(nfit_blk->nd_region) < 0)
  1498. dev_warn(dev, "unable to guarantee persistence of writes\n");
  1499. if (mmio->line_size == 0)
  1500. return 0;
  1501. if ((u32) nfit_blk->cmd_offset % mmio->line_size
  1502. + 8 > mmio->line_size) {
  1503. dev_dbg(dev, "cmd_offset crosses interleave boundary\n");
  1504. return -ENXIO;
  1505. } else if ((u32) nfit_blk->stat_offset % mmio->line_size
  1506. + 8 > mmio->line_size) {
  1507. dev_dbg(dev, "stat_offset crosses interleave boundary\n");
  1508. return -ENXIO;
  1509. }
  1510. return 0;
  1511. }
  1512. static int ars_get_cap(struct acpi_nfit_desc *acpi_desc,
  1513. struct nd_cmd_ars_cap *cmd, struct nfit_spa *nfit_spa)
  1514. {
  1515. struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
  1516. struct acpi_nfit_system_address *spa = nfit_spa->spa;
  1517. int cmd_rc, rc;
  1518. cmd->address = spa->address;
  1519. cmd->length = spa->length;
  1520. rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_CAP, cmd,
  1521. sizeof(*cmd), &cmd_rc);
  1522. if (rc < 0)
  1523. return rc;
  1524. return cmd_rc;
  1525. }
  1526. static int ars_start(struct acpi_nfit_desc *acpi_desc, struct nfit_spa *nfit_spa)
  1527. {
  1528. int rc;
  1529. int cmd_rc;
  1530. struct nd_cmd_ars_start ars_start;
  1531. struct acpi_nfit_system_address *spa = nfit_spa->spa;
  1532. struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
  1533. memset(&ars_start, 0, sizeof(ars_start));
  1534. ars_start.address = spa->address;
  1535. ars_start.length = spa->length;
  1536. if (nfit_spa_type(spa) == NFIT_SPA_PM)
  1537. ars_start.type = ND_ARS_PERSISTENT;
  1538. else if (nfit_spa_type(spa) == NFIT_SPA_VOLATILE)
  1539. ars_start.type = ND_ARS_VOLATILE;
  1540. else
  1541. return -ENOTTY;
  1542. rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_START, &ars_start,
  1543. sizeof(ars_start), &cmd_rc);
  1544. if (rc < 0)
  1545. return rc;
  1546. return cmd_rc;
  1547. }
  1548. static int ars_continue(struct acpi_nfit_desc *acpi_desc)
  1549. {
  1550. int rc, cmd_rc;
  1551. struct nd_cmd_ars_start ars_start;
  1552. struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
  1553. struct nd_cmd_ars_status *ars_status = acpi_desc->ars_status;
  1554. memset(&ars_start, 0, sizeof(ars_start));
  1555. ars_start.address = ars_status->restart_address;
  1556. ars_start.length = ars_status->restart_length;
  1557. ars_start.type = ars_status->type;
  1558. rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_START, &ars_start,
  1559. sizeof(ars_start), &cmd_rc);
  1560. if (rc < 0)
  1561. return rc;
  1562. return cmd_rc;
  1563. }
  1564. static int ars_get_status(struct acpi_nfit_desc *acpi_desc)
  1565. {
  1566. struct nvdimm_bus_descriptor *nd_desc = &acpi_desc->nd_desc;
  1567. struct nd_cmd_ars_status *ars_status = acpi_desc->ars_status;
  1568. int rc, cmd_rc;
  1569. rc = nd_desc->ndctl(nd_desc, NULL, ND_CMD_ARS_STATUS, ars_status,
  1570. acpi_desc->ars_status_size, &cmd_rc);
  1571. if (rc < 0)
  1572. return rc;
  1573. return cmd_rc;
  1574. }
  1575. static int ars_status_process_records(struct nvdimm_bus *nvdimm_bus,
  1576. struct nd_cmd_ars_status *ars_status)
  1577. {
  1578. int rc;
  1579. u32 i;
  1580. for (i = 0; i < ars_status->num_records; i++) {
  1581. rc = nvdimm_bus_add_poison(nvdimm_bus,
  1582. ars_status->records[i].err_address,
  1583. ars_status->records[i].length);
  1584. if (rc)
  1585. return rc;
  1586. }
  1587. return 0;
  1588. }
  1589. static void acpi_nfit_remove_resource(void *data)
  1590. {
  1591. struct resource *res = data;
  1592. remove_resource(res);
  1593. }
  1594. static int acpi_nfit_insert_resource(struct acpi_nfit_desc *acpi_desc,
  1595. struct nd_region_desc *ndr_desc)
  1596. {
  1597. struct resource *res, *nd_res = ndr_desc->res;
  1598. int is_pmem, ret;
  1599. /* No operation if the region is already registered as PMEM */
  1600. is_pmem = region_intersects(nd_res->start, resource_size(nd_res),
  1601. IORESOURCE_MEM, IORES_DESC_PERSISTENT_MEMORY);
  1602. if (is_pmem == REGION_INTERSECTS)
  1603. return 0;
  1604. res = devm_kzalloc(acpi_desc->dev, sizeof(*res), GFP_KERNEL);
  1605. if (!res)
  1606. return -ENOMEM;
  1607. res->name = "Persistent Memory";
  1608. res->start = nd_res->start;
  1609. res->end = nd_res->end;
  1610. res->flags = IORESOURCE_MEM;
  1611. res->desc = IORES_DESC_PERSISTENT_MEMORY;
  1612. ret = insert_resource(&iomem_resource, res);
  1613. if (ret)
  1614. return ret;
  1615. ret = devm_add_action_or_reset(acpi_desc->dev,
  1616. acpi_nfit_remove_resource,
  1617. res);
  1618. if (ret)
  1619. return ret;
  1620. return 0;
  1621. }
  1622. static int acpi_nfit_init_mapping(struct acpi_nfit_desc *acpi_desc,
  1623. struct nd_mapping *nd_mapping, struct nd_region_desc *ndr_desc,
  1624. struct acpi_nfit_memory_map *memdev,
  1625. struct nfit_spa *nfit_spa)
  1626. {
  1627. struct nvdimm *nvdimm = acpi_nfit_dimm_by_handle(acpi_desc,
  1628. memdev->device_handle);
  1629. struct acpi_nfit_system_address *spa = nfit_spa->spa;
  1630. struct nd_blk_region_desc *ndbr_desc;
  1631. struct nfit_mem *nfit_mem;
  1632. int blk_valid = 0;
  1633. if (!nvdimm) {
  1634. dev_err(acpi_desc->dev, "spa%d dimm: %#x not found\n",
  1635. spa->range_index, memdev->device_handle);
  1636. return -ENODEV;
  1637. }
  1638. nd_mapping->nvdimm = nvdimm;
  1639. switch (nfit_spa_type(spa)) {
  1640. case NFIT_SPA_PM:
  1641. case NFIT_SPA_VOLATILE:
  1642. nd_mapping->start = memdev->address;
  1643. nd_mapping->size = memdev->region_size;
  1644. break;
  1645. case NFIT_SPA_DCR:
  1646. nfit_mem = nvdimm_provider_data(nvdimm);
  1647. if (!nfit_mem || !nfit_mem->bdw) {
  1648. dev_dbg(acpi_desc->dev, "spa%d %s missing bdw\n",
  1649. spa->range_index, nvdimm_name(nvdimm));
  1650. } else {
  1651. nd_mapping->size = nfit_mem->bdw->capacity;
  1652. nd_mapping->start = nfit_mem->bdw->start_address;
  1653. ndr_desc->num_lanes = nfit_mem->bdw->windows;
  1654. blk_valid = 1;
  1655. }
  1656. ndr_desc->nd_mapping = nd_mapping;
  1657. ndr_desc->num_mappings = blk_valid;
  1658. ndbr_desc = to_blk_region_desc(ndr_desc);
  1659. ndbr_desc->enable = acpi_nfit_blk_region_enable;
  1660. ndbr_desc->do_io = acpi_desc->blk_do_io;
  1661. nfit_spa->nd_region = nvdimm_blk_region_create(acpi_desc->nvdimm_bus,
  1662. ndr_desc);
  1663. if (!nfit_spa->nd_region)
  1664. return -ENOMEM;
  1665. break;
  1666. }
  1667. return 0;
  1668. }
  1669. static bool nfit_spa_is_virtual(struct acpi_nfit_system_address *spa)
  1670. {
  1671. return (nfit_spa_type(spa) == NFIT_SPA_VDISK ||
  1672. nfit_spa_type(spa) == NFIT_SPA_VCD ||
  1673. nfit_spa_type(spa) == NFIT_SPA_PDISK ||
  1674. nfit_spa_type(spa) == NFIT_SPA_PCD);
  1675. }
  1676. static int acpi_nfit_register_region(struct acpi_nfit_desc *acpi_desc,
  1677. struct nfit_spa *nfit_spa)
  1678. {
  1679. static struct nd_mapping nd_mappings[ND_MAX_MAPPINGS];
  1680. struct acpi_nfit_system_address *spa = nfit_spa->spa;
  1681. struct nd_blk_region_desc ndbr_desc;
  1682. struct nd_region_desc *ndr_desc;
  1683. struct nfit_memdev *nfit_memdev;
  1684. struct nvdimm_bus *nvdimm_bus;
  1685. struct resource res;
  1686. int count = 0, rc;
  1687. if (nfit_spa->nd_region)
  1688. return 0;
  1689. if (spa->range_index == 0 && !nfit_spa_is_virtual(spa)) {
  1690. dev_dbg(acpi_desc->dev, "%s: detected invalid spa index\n",
  1691. __func__);
  1692. return 0;
  1693. }
  1694. memset(&res, 0, sizeof(res));
  1695. memset(&nd_mappings, 0, sizeof(nd_mappings));
  1696. memset(&ndbr_desc, 0, sizeof(ndbr_desc));
  1697. res.start = spa->address;
  1698. res.end = res.start + spa->length - 1;
  1699. ndr_desc = &ndbr_desc.ndr_desc;
  1700. ndr_desc->res = &res;
  1701. ndr_desc->provider_data = nfit_spa;
  1702. ndr_desc->attr_groups = acpi_nfit_region_attribute_groups;
  1703. if (spa->flags & ACPI_NFIT_PROXIMITY_VALID)
  1704. ndr_desc->numa_node = acpi_map_pxm_to_online_node(
  1705. spa->proximity_domain);
  1706. else
  1707. ndr_desc->numa_node = NUMA_NO_NODE;
  1708. list_for_each_entry(nfit_memdev, &acpi_desc->memdevs, list) {
  1709. struct acpi_nfit_memory_map *memdev = nfit_memdev->memdev;
  1710. struct nd_mapping *nd_mapping;
  1711. if (memdev->range_index != spa->range_index)
  1712. continue;
  1713. if (count >= ND_MAX_MAPPINGS) {
  1714. dev_err(acpi_desc->dev, "spa%d exceeds max mappings %d\n",
  1715. spa->range_index, ND_MAX_MAPPINGS);
  1716. return -ENXIO;
  1717. }
  1718. nd_mapping = &nd_mappings[count++];
  1719. rc = acpi_nfit_init_mapping(acpi_desc, nd_mapping, ndr_desc,
  1720. memdev, nfit_spa);
  1721. if (rc)
  1722. goto out;
  1723. }
  1724. ndr_desc->nd_mapping = nd_mappings;
  1725. ndr_desc->num_mappings = count;
  1726. rc = acpi_nfit_init_interleave_set(acpi_desc, ndr_desc, spa);
  1727. if (rc)
  1728. goto out;
  1729. nvdimm_bus = acpi_desc->nvdimm_bus;
  1730. if (nfit_spa_type(spa) == NFIT_SPA_PM) {
  1731. rc = acpi_nfit_insert_resource(acpi_desc, ndr_desc);
  1732. if (rc) {
  1733. dev_warn(acpi_desc->dev,
  1734. "failed to insert pmem resource to iomem: %d\n",
  1735. rc);
  1736. goto out;
  1737. }
  1738. nfit_spa->nd_region = nvdimm_pmem_region_create(nvdimm_bus,
  1739. ndr_desc);
  1740. if (!nfit_spa->nd_region)
  1741. rc = -ENOMEM;
  1742. } else if (nfit_spa_type(spa) == NFIT_SPA_VOLATILE) {
  1743. nfit_spa->nd_region = nvdimm_volatile_region_create(nvdimm_bus,
  1744. ndr_desc);
  1745. if (!nfit_spa->nd_region)
  1746. rc = -ENOMEM;
  1747. } else if (nfit_spa_is_virtual(spa)) {
  1748. nfit_spa->nd_region = nvdimm_pmem_region_create(nvdimm_bus,
  1749. ndr_desc);
  1750. if (!nfit_spa->nd_region)
  1751. rc = -ENOMEM;
  1752. }
  1753. out:
  1754. if (rc)
  1755. dev_err(acpi_desc->dev, "failed to register spa range %d\n",
  1756. nfit_spa->spa->range_index);
  1757. return rc;
  1758. }
  1759. static int ars_status_alloc(struct acpi_nfit_desc *acpi_desc,
  1760. u32 max_ars)
  1761. {
  1762. struct device *dev = acpi_desc->dev;
  1763. struct nd_cmd_ars_status *ars_status;
  1764. if (acpi_desc->ars_status && acpi_desc->ars_status_size >= max_ars) {
  1765. memset(acpi_desc->ars_status, 0, acpi_desc->ars_status_size);
  1766. return 0;
  1767. }
  1768. if (acpi_desc->ars_status)
  1769. devm_kfree(dev, acpi_desc->ars_status);
  1770. acpi_desc->ars_status = NULL;
  1771. ars_status = devm_kzalloc(dev, max_ars, GFP_KERNEL);
  1772. if (!ars_status)
  1773. return -ENOMEM;
  1774. acpi_desc->ars_status = ars_status;
  1775. acpi_desc->ars_status_size = max_ars;
  1776. return 0;
  1777. }
  1778. static int acpi_nfit_query_poison(struct acpi_nfit_desc *acpi_desc,
  1779. struct nfit_spa *nfit_spa)
  1780. {
  1781. struct acpi_nfit_system_address *spa = nfit_spa->spa;
  1782. int rc;
  1783. if (!nfit_spa->max_ars) {
  1784. struct nd_cmd_ars_cap ars_cap;
  1785. memset(&ars_cap, 0, sizeof(ars_cap));
  1786. rc = ars_get_cap(acpi_desc, &ars_cap, nfit_spa);
  1787. if (rc < 0)
  1788. return rc;
  1789. nfit_spa->max_ars = ars_cap.max_ars_out;
  1790. nfit_spa->clear_err_unit = ars_cap.clear_err_unit;
  1791. /* check that the supported scrub types match the spa type */
  1792. if (nfit_spa_type(spa) == NFIT_SPA_VOLATILE &&
  1793. ((ars_cap.status >> 16) & ND_ARS_VOLATILE) == 0)
  1794. return -ENOTTY;
  1795. else if (nfit_spa_type(spa) == NFIT_SPA_PM &&
  1796. ((ars_cap.status >> 16) & ND_ARS_PERSISTENT) == 0)
  1797. return -ENOTTY;
  1798. }
  1799. if (ars_status_alloc(acpi_desc, nfit_spa->max_ars))
  1800. return -ENOMEM;
  1801. rc = ars_get_status(acpi_desc);
  1802. if (rc < 0 && rc != -ENOSPC)
  1803. return rc;
  1804. if (ars_status_process_records(acpi_desc->nvdimm_bus,
  1805. acpi_desc->ars_status))
  1806. return -ENOMEM;
  1807. return 0;
  1808. }
  1809. static void acpi_nfit_async_scrub(struct acpi_nfit_desc *acpi_desc,
  1810. struct nfit_spa *nfit_spa)
  1811. {
  1812. struct acpi_nfit_system_address *spa = nfit_spa->spa;
  1813. unsigned int overflow_retry = scrub_overflow_abort;
  1814. u64 init_ars_start = 0, init_ars_len = 0;
  1815. struct device *dev = acpi_desc->dev;
  1816. unsigned int tmo = scrub_timeout;
  1817. int rc;
  1818. if (!nfit_spa->ars_required || !nfit_spa->nd_region)
  1819. return;
  1820. rc = ars_start(acpi_desc, nfit_spa);
  1821. /*
  1822. * If we timed out the initial scan we'll still be busy here,
  1823. * and will wait another timeout before giving up permanently.
  1824. */
  1825. if (rc < 0 && rc != -EBUSY)
  1826. return;
  1827. do {
  1828. u64 ars_start, ars_len;
  1829. if (acpi_desc->cancel)
  1830. break;
  1831. rc = acpi_nfit_query_poison(acpi_desc, nfit_spa);
  1832. if (rc == -ENOTTY)
  1833. break;
  1834. if (rc == -EBUSY && !tmo) {
  1835. dev_warn(dev, "range %d ars timeout, aborting\n",
  1836. spa->range_index);
  1837. break;
  1838. }
  1839. if (rc == -EBUSY) {
  1840. /*
  1841. * Note, entries may be appended to the list
  1842. * while the lock is dropped, but the workqueue
  1843. * being active prevents entries being deleted /
  1844. * freed.
  1845. */
  1846. mutex_unlock(&acpi_desc->init_mutex);
  1847. ssleep(1);
  1848. tmo--;
  1849. mutex_lock(&acpi_desc->init_mutex);
  1850. continue;
  1851. }
  1852. /* we got some results, but there are more pending... */
  1853. if (rc == -ENOSPC && overflow_retry--) {
  1854. if (!init_ars_len) {
  1855. init_ars_len = acpi_desc->ars_status->length;
  1856. init_ars_start = acpi_desc->ars_status->address;
  1857. }
  1858. rc = ars_continue(acpi_desc);
  1859. }
  1860. if (rc < 0) {
  1861. dev_warn(dev, "range %d ars continuation failed\n",
  1862. spa->range_index);
  1863. break;
  1864. }
  1865. if (init_ars_len) {
  1866. ars_start = init_ars_start;
  1867. ars_len = init_ars_len;
  1868. } else {
  1869. ars_start = acpi_desc->ars_status->address;
  1870. ars_len = acpi_desc->ars_status->length;
  1871. }
  1872. dev_dbg(dev, "spa range: %d ars from %#llx + %#llx complete\n",
  1873. spa->range_index, ars_start, ars_len);
  1874. /* notify the region about new poison entries */
  1875. nvdimm_region_notify(nfit_spa->nd_region,
  1876. NVDIMM_REVALIDATE_POISON);
  1877. break;
  1878. } while (1);
  1879. }
  1880. static void acpi_nfit_scrub(struct work_struct *work)
  1881. {
  1882. struct device *dev;
  1883. u64 init_scrub_length = 0;
  1884. struct nfit_spa *nfit_spa;
  1885. u64 init_scrub_address = 0;
  1886. bool init_ars_done = false;
  1887. struct acpi_nfit_desc *acpi_desc;
  1888. unsigned int tmo = scrub_timeout;
  1889. unsigned int overflow_retry = scrub_overflow_abort;
  1890. acpi_desc = container_of(work, typeof(*acpi_desc), work);
  1891. dev = acpi_desc->dev;
  1892. /*
  1893. * We scrub in 2 phases. The first phase waits for any platform
  1894. * firmware initiated scrubs to complete and then we go search for the
  1895. * affected spa regions to mark them scanned. In the second phase we
  1896. * initiate a directed scrub for every range that was not scrubbed in
  1897. * phase 1. If we're called for a 'rescan', we harmlessly pass through
  1898. * the first phase, but really only care about running phase 2, where
  1899. * regions can be notified of new poison.
  1900. */
  1901. /* process platform firmware initiated scrubs */
  1902. retry:
  1903. mutex_lock(&acpi_desc->init_mutex);
  1904. list_for_each_entry(nfit_spa, &acpi_desc->spas, list) {
  1905. struct nd_cmd_ars_status *ars_status;
  1906. struct acpi_nfit_system_address *spa;
  1907. u64 ars_start, ars_len;
  1908. int rc;
  1909. if (acpi_desc->cancel)
  1910. break;
  1911. if (nfit_spa->nd_region)
  1912. continue;
  1913. if (init_ars_done) {
  1914. /*
  1915. * No need to re-query, we're now just
  1916. * reconciling all the ranges covered by the
  1917. * initial scrub
  1918. */
  1919. rc = 0;
  1920. } else
  1921. rc = acpi_nfit_query_poison(acpi_desc, nfit_spa);
  1922. if (rc == -ENOTTY) {
  1923. /* no ars capability, just register spa and move on */
  1924. acpi_nfit_register_region(acpi_desc, nfit_spa);
  1925. continue;
  1926. }
  1927. if (rc == -EBUSY && !tmo) {
  1928. /* fallthrough to directed scrub in phase 2 */
  1929. dev_warn(dev, "timeout awaiting ars results, continuing...\n");
  1930. break;
  1931. } else if (rc == -EBUSY) {
  1932. mutex_unlock(&acpi_desc->init_mutex);
  1933. ssleep(1);
  1934. tmo--;
  1935. goto retry;
  1936. }
  1937. /* we got some results, but there are more pending... */
  1938. if (rc == -ENOSPC && overflow_retry--) {
  1939. ars_status = acpi_desc->ars_status;
  1940. /*
  1941. * Record the original scrub range, so that we
  1942. * can recall all the ranges impacted by the
  1943. * initial scrub.
  1944. */
  1945. if (!init_scrub_length) {
  1946. init_scrub_length = ars_status->length;
  1947. init_scrub_address = ars_status->address;
  1948. }
  1949. rc = ars_continue(acpi_desc);
  1950. if (rc == 0) {
  1951. mutex_unlock(&acpi_desc->init_mutex);
  1952. goto retry;
  1953. }
  1954. }
  1955. if (rc < 0) {
  1956. /*
  1957. * Initial scrub failed, we'll give it one more
  1958. * try below...
  1959. */
  1960. break;
  1961. }
  1962. /* We got some final results, record completed ranges */
  1963. ars_status = acpi_desc->ars_status;
  1964. if (init_scrub_length) {
  1965. ars_start = init_scrub_address;
  1966. ars_len = ars_start + init_scrub_length;
  1967. } else {
  1968. ars_start = ars_status->address;
  1969. ars_len = ars_status->length;
  1970. }
  1971. spa = nfit_spa->spa;
  1972. if (!init_ars_done) {
  1973. init_ars_done = true;
  1974. dev_dbg(dev, "init scrub %#llx + %#llx complete\n",
  1975. ars_start, ars_len);
  1976. }
  1977. if (ars_start <= spa->address && ars_start + ars_len
  1978. >= spa->address + spa->length)
  1979. acpi_nfit_register_region(acpi_desc, nfit_spa);
  1980. }
  1981. /*
  1982. * For all the ranges not covered by an initial scrub we still
  1983. * want to see if there are errors, but it's ok to discover them
  1984. * asynchronously.
  1985. */
  1986. list_for_each_entry(nfit_spa, &acpi_desc->spas, list) {
  1987. /*
  1988. * Flag all the ranges that still need scrubbing, but
  1989. * register them now to make data available.
  1990. */
  1991. if (!nfit_spa->nd_region) {
  1992. nfit_spa->ars_required = 1;
  1993. acpi_nfit_register_region(acpi_desc, nfit_spa);
  1994. }
  1995. }
  1996. list_for_each_entry(nfit_spa, &acpi_desc->spas, list)
  1997. acpi_nfit_async_scrub(acpi_desc, nfit_spa);
  1998. acpi_desc->scrub_count++;
  1999. if (acpi_desc->scrub_count_state)
  2000. sysfs_notify_dirent(acpi_desc->scrub_count_state);
  2001. mutex_unlock(&acpi_desc->init_mutex);
  2002. }
  2003. static int acpi_nfit_register_regions(struct acpi_nfit_desc *acpi_desc)
  2004. {
  2005. struct nfit_spa *nfit_spa;
  2006. int rc;
  2007. list_for_each_entry(nfit_spa, &acpi_desc->spas, list)
  2008. if (nfit_spa_type(nfit_spa->spa) == NFIT_SPA_DCR) {
  2009. /* BLK regions don't need to wait for ars results */
  2010. rc = acpi_nfit_register_region(acpi_desc, nfit_spa);
  2011. if (rc)
  2012. return rc;
  2013. }
  2014. queue_work(nfit_wq, &acpi_desc->work);
  2015. return 0;
  2016. }
  2017. static int acpi_nfit_check_deletions(struct acpi_nfit_desc *acpi_desc,
  2018. struct nfit_table_prev *prev)
  2019. {
  2020. struct device *dev = acpi_desc->dev;
  2021. if (!list_empty(&prev->spas) ||
  2022. !list_empty(&prev->memdevs) ||
  2023. !list_empty(&prev->dcrs) ||
  2024. !list_empty(&prev->bdws) ||
  2025. !list_empty(&prev->idts) ||
  2026. !list_empty(&prev->flushes)) {
  2027. dev_err(dev, "new nfit deletes entries (unsupported)\n");
  2028. return -ENXIO;
  2029. }
  2030. return 0;
  2031. }
  2032. static int acpi_nfit_desc_init_scrub_attr(struct acpi_nfit_desc *acpi_desc)
  2033. {
  2034. struct device *dev = acpi_desc->dev;
  2035. struct kernfs_node *nfit;
  2036. struct device *bus_dev;
  2037. if (!ars_supported(acpi_desc->nvdimm_bus))
  2038. return 0;
  2039. bus_dev = to_nvdimm_bus_dev(acpi_desc->nvdimm_bus);
  2040. nfit = sysfs_get_dirent(bus_dev->kobj.sd, "nfit");
  2041. if (!nfit) {
  2042. dev_err(dev, "sysfs_get_dirent 'nfit' failed\n");
  2043. return -ENODEV;
  2044. }
  2045. acpi_desc->scrub_count_state = sysfs_get_dirent(nfit, "scrub");
  2046. sysfs_put(nfit);
  2047. if (!acpi_desc->scrub_count_state) {
  2048. dev_err(dev, "sysfs_get_dirent 'scrub' failed\n");
  2049. return -ENODEV;
  2050. }
  2051. return 0;
  2052. }
  2053. static void acpi_nfit_destruct(void *data)
  2054. {
  2055. struct acpi_nfit_desc *acpi_desc = data;
  2056. struct device *bus_dev = to_nvdimm_bus_dev(acpi_desc->nvdimm_bus);
  2057. /*
  2058. * Destruct under acpi_desc_lock so that nfit_handle_mce does not
  2059. * race teardown
  2060. */
  2061. mutex_lock(&acpi_desc_lock);
  2062. acpi_desc->cancel = 1;
  2063. /*
  2064. * Bounce the nvdimm bus lock to make sure any in-flight
  2065. * acpi_nfit_ars_rescan() submissions have had a chance to
  2066. * either submit or see ->cancel set.
  2067. */
  2068. device_lock(bus_dev);
  2069. device_unlock(bus_dev);
  2070. flush_workqueue(nfit_wq);
  2071. if (acpi_desc->scrub_count_state)
  2072. sysfs_put(acpi_desc->scrub_count_state);
  2073. nvdimm_bus_unregister(acpi_desc->nvdimm_bus);
  2074. acpi_desc->nvdimm_bus = NULL;
  2075. list_del(&acpi_desc->list);
  2076. mutex_unlock(&acpi_desc_lock);
  2077. }
  2078. int acpi_nfit_init(struct acpi_nfit_desc *acpi_desc, void *data, acpi_size sz)
  2079. {
  2080. struct device *dev = acpi_desc->dev;
  2081. struct nfit_table_prev prev;
  2082. const void *end;
  2083. int rc;
  2084. if (!acpi_desc->nvdimm_bus) {
  2085. acpi_nfit_init_dsms(acpi_desc);
  2086. acpi_desc->nvdimm_bus = nvdimm_bus_register(dev,
  2087. &acpi_desc->nd_desc);
  2088. if (!acpi_desc->nvdimm_bus)
  2089. return -ENOMEM;
  2090. rc = devm_add_action_or_reset(dev, acpi_nfit_destruct,
  2091. acpi_desc);
  2092. if (rc)
  2093. return rc;
  2094. rc = acpi_nfit_desc_init_scrub_attr(acpi_desc);
  2095. if (rc)
  2096. return rc;
  2097. /* register this acpi_desc for mce notifications */
  2098. mutex_lock(&acpi_desc_lock);
  2099. list_add_tail(&acpi_desc->list, &acpi_descs);
  2100. mutex_unlock(&acpi_desc_lock);
  2101. }
  2102. mutex_lock(&acpi_desc->init_mutex);
  2103. INIT_LIST_HEAD(&prev.spas);
  2104. INIT_LIST_HEAD(&prev.memdevs);
  2105. INIT_LIST_HEAD(&prev.dcrs);
  2106. INIT_LIST_HEAD(&prev.bdws);
  2107. INIT_LIST_HEAD(&prev.idts);
  2108. INIT_LIST_HEAD(&prev.flushes);
  2109. list_cut_position(&prev.spas, &acpi_desc->spas,
  2110. acpi_desc->spas.prev);
  2111. list_cut_position(&prev.memdevs, &acpi_desc->memdevs,
  2112. acpi_desc->memdevs.prev);
  2113. list_cut_position(&prev.dcrs, &acpi_desc->dcrs,
  2114. acpi_desc->dcrs.prev);
  2115. list_cut_position(&prev.bdws, &acpi_desc->bdws,
  2116. acpi_desc->bdws.prev);
  2117. list_cut_position(&prev.idts, &acpi_desc->idts,
  2118. acpi_desc->idts.prev);
  2119. list_cut_position(&prev.flushes, &acpi_desc->flushes,
  2120. acpi_desc->flushes.prev);
  2121. end = data + sz;
  2122. while (!IS_ERR_OR_NULL(data))
  2123. data = add_table(acpi_desc, &prev, data, end);
  2124. if (IS_ERR(data)) {
  2125. dev_dbg(dev, "%s: nfit table parsing error: %ld\n", __func__,
  2126. PTR_ERR(data));
  2127. rc = PTR_ERR(data);
  2128. goto out_unlock;
  2129. }
  2130. rc = acpi_nfit_check_deletions(acpi_desc, &prev);
  2131. if (rc)
  2132. goto out_unlock;
  2133. rc = nfit_mem_init(acpi_desc);
  2134. if (rc)
  2135. goto out_unlock;
  2136. rc = acpi_nfit_register_dimms(acpi_desc);
  2137. if (rc)
  2138. goto out_unlock;
  2139. rc = acpi_nfit_register_regions(acpi_desc);
  2140. out_unlock:
  2141. mutex_unlock(&acpi_desc->init_mutex);
  2142. return rc;
  2143. }
  2144. EXPORT_SYMBOL_GPL(acpi_nfit_init);
  2145. struct acpi_nfit_flush_work {
  2146. struct work_struct work;
  2147. struct completion cmp;
  2148. };
  2149. static void flush_probe(struct work_struct *work)
  2150. {
  2151. struct acpi_nfit_flush_work *flush;
  2152. flush = container_of(work, typeof(*flush), work);
  2153. complete(&flush->cmp);
  2154. }
  2155. static int acpi_nfit_flush_probe(struct nvdimm_bus_descriptor *nd_desc)
  2156. {
  2157. struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc);
  2158. struct device *dev = acpi_desc->dev;
  2159. struct acpi_nfit_flush_work flush;
  2160. /* bounce the device lock to flush acpi_nfit_add / acpi_nfit_notify */
  2161. device_lock(dev);
  2162. device_unlock(dev);
  2163. /*
  2164. * Scrub work could take 10s of seconds, userspace may give up so we
  2165. * need to be interruptible while waiting.
  2166. */
  2167. INIT_WORK_ONSTACK(&flush.work, flush_probe);
  2168. COMPLETION_INITIALIZER_ONSTACK(flush.cmp);
  2169. queue_work(nfit_wq, &flush.work);
  2170. return wait_for_completion_interruptible(&flush.cmp);
  2171. }
  2172. static int acpi_nfit_clear_to_send(struct nvdimm_bus_descriptor *nd_desc,
  2173. struct nvdimm *nvdimm, unsigned int cmd)
  2174. {
  2175. struct acpi_nfit_desc *acpi_desc = to_acpi_nfit_desc(nd_desc);
  2176. if (nvdimm)
  2177. return 0;
  2178. if (cmd != ND_CMD_ARS_START)
  2179. return 0;
  2180. /*
  2181. * The kernel and userspace may race to initiate a scrub, but
  2182. * the scrub thread is prepared to lose that initial race. It
  2183. * just needs guarantees that any ars it initiates are not
  2184. * interrupted by any intervening start reqeusts from userspace.
  2185. */
  2186. if (work_busy(&acpi_desc->work))
  2187. return -EBUSY;
  2188. return 0;
  2189. }
  2190. int acpi_nfit_ars_rescan(struct acpi_nfit_desc *acpi_desc)
  2191. {
  2192. struct device *dev = acpi_desc->dev;
  2193. struct nfit_spa *nfit_spa;
  2194. if (work_busy(&acpi_desc->work))
  2195. return -EBUSY;
  2196. if (acpi_desc->cancel)
  2197. return 0;
  2198. mutex_lock(&acpi_desc->init_mutex);
  2199. list_for_each_entry(nfit_spa, &acpi_desc->spas, list) {
  2200. struct acpi_nfit_system_address *spa = nfit_spa->spa;
  2201. if (nfit_spa_type(spa) != NFIT_SPA_PM)
  2202. continue;
  2203. nfit_spa->ars_required = 1;
  2204. }
  2205. queue_work(nfit_wq, &acpi_desc->work);
  2206. dev_dbg(dev, "%s: ars_scan triggered\n", __func__);
  2207. mutex_unlock(&acpi_desc->init_mutex);
  2208. return 0;
  2209. }
  2210. void acpi_nfit_desc_init(struct acpi_nfit_desc *acpi_desc, struct device *dev)
  2211. {
  2212. struct nvdimm_bus_descriptor *nd_desc;
  2213. dev_set_drvdata(dev, acpi_desc);
  2214. acpi_desc->dev = dev;
  2215. acpi_desc->blk_do_io = acpi_nfit_blk_region_do_io;
  2216. nd_desc = &acpi_desc->nd_desc;
  2217. nd_desc->provider_name = "ACPI.NFIT";
  2218. nd_desc->module = THIS_MODULE;
  2219. nd_desc->ndctl = acpi_nfit_ctl;
  2220. nd_desc->flush_probe = acpi_nfit_flush_probe;
  2221. nd_desc->clear_to_send = acpi_nfit_clear_to_send;
  2222. nd_desc->attr_groups = acpi_nfit_attribute_groups;
  2223. INIT_LIST_HEAD(&acpi_desc->spas);
  2224. INIT_LIST_HEAD(&acpi_desc->dcrs);
  2225. INIT_LIST_HEAD(&acpi_desc->bdws);
  2226. INIT_LIST_HEAD(&acpi_desc->idts);
  2227. INIT_LIST_HEAD(&acpi_desc->flushes);
  2228. INIT_LIST_HEAD(&acpi_desc->memdevs);
  2229. INIT_LIST_HEAD(&acpi_desc->dimms);
  2230. INIT_LIST_HEAD(&acpi_desc->list);
  2231. mutex_init(&acpi_desc->init_mutex);
  2232. INIT_WORK(&acpi_desc->work, acpi_nfit_scrub);
  2233. }
  2234. EXPORT_SYMBOL_GPL(acpi_nfit_desc_init);
  2235. static int acpi_nfit_add(struct acpi_device *adev)
  2236. {
  2237. struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL };
  2238. struct acpi_nfit_desc *acpi_desc;
  2239. struct device *dev = &adev->dev;
  2240. struct acpi_table_header *tbl;
  2241. acpi_status status = AE_OK;
  2242. acpi_size sz;
  2243. int rc = 0;
  2244. status = acpi_get_table_with_size(ACPI_SIG_NFIT, 0, &tbl, &sz);
  2245. if (ACPI_FAILURE(status)) {
  2246. /* This is ok, we could have an nvdimm hotplugged later */
  2247. dev_dbg(dev, "failed to find NFIT at startup\n");
  2248. return 0;
  2249. }
  2250. acpi_desc = devm_kzalloc(dev, sizeof(*acpi_desc), GFP_KERNEL);
  2251. if (!acpi_desc)
  2252. return -ENOMEM;
  2253. acpi_nfit_desc_init(acpi_desc, &adev->dev);
  2254. /* Save the acpi header for exporting the revision via sysfs */
  2255. acpi_desc->acpi_header = *tbl;
  2256. /* Evaluate _FIT and override with that if present */
  2257. status = acpi_evaluate_object(adev->handle, "_FIT", NULL, &buf);
  2258. if (ACPI_SUCCESS(status) && buf.length > 0) {
  2259. union acpi_object *obj = buf.pointer;
  2260. if (obj->type == ACPI_TYPE_BUFFER)
  2261. rc = acpi_nfit_init(acpi_desc, obj->buffer.pointer,
  2262. obj->buffer.length);
  2263. else
  2264. dev_dbg(dev, "%s invalid type %d, ignoring _FIT\n",
  2265. __func__, (int) obj->type);
  2266. kfree(buf.pointer);
  2267. } else
  2268. /* skip over the lead-in header table */
  2269. rc = acpi_nfit_init(acpi_desc, (void *) tbl
  2270. + sizeof(struct acpi_table_nfit),
  2271. sz - sizeof(struct acpi_table_nfit));
  2272. return rc;
  2273. }
  2274. static int acpi_nfit_remove(struct acpi_device *adev)
  2275. {
  2276. /* see acpi_nfit_destruct */
  2277. return 0;
  2278. }
  2279. static void acpi_nfit_notify(struct acpi_device *adev, u32 event)
  2280. {
  2281. struct acpi_nfit_desc *acpi_desc = dev_get_drvdata(&adev->dev);
  2282. struct acpi_buffer buf = { ACPI_ALLOCATE_BUFFER, NULL };
  2283. struct device *dev = &adev->dev;
  2284. union acpi_object *obj;
  2285. acpi_status status;
  2286. int ret;
  2287. dev_dbg(dev, "%s: event: %d\n", __func__, event);
  2288. device_lock(dev);
  2289. if (!dev->driver) {
  2290. /* dev->driver may be null if we're being removed */
  2291. dev_dbg(dev, "%s: no driver found for dev\n", __func__);
  2292. goto out_unlock;
  2293. }
  2294. if (!acpi_desc) {
  2295. acpi_desc = devm_kzalloc(dev, sizeof(*acpi_desc), GFP_KERNEL);
  2296. if (!acpi_desc)
  2297. goto out_unlock;
  2298. acpi_nfit_desc_init(acpi_desc, &adev->dev);
  2299. } else {
  2300. /*
  2301. * Finish previous registration before considering new
  2302. * regions.
  2303. */
  2304. flush_workqueue(nfit_wq);
  2305. }
  2306. /* Evaluate _FIT */
  2307. status = acpi_evaluate_object(adev->handle, "_FIT", NULL, &buf);
  2308. if (ACPI_FAILURE(status)) {
  2309. dev_err(dev, "failed to evaluate _FIT\n");
  2310. goto out_unlock;
  2311. }
  2312. obj = buf.pointer;
  2313. if (obj->type == ACPI_TYPE_BUFFER) {
  2314. ret = acpi_nfit_init(acpi_desc, obj->buffer.pointer,
  2315. obj->buffer.length);
  2316. if (ret)
  2317. dev_err(dev, "failed to merge updated NFIT\n");
  2318. } else
  2319. dev_err(dev, "Invalid _FIT\n");
  2320. kfree(buf.pointer);
  2321. out_unlock:
  2322. device_unlock(dev);
  2323. }
  2324. static const struct acpi_device_id acpi_nfit_ids[] = {
  2325. { "ACPI0012", 0 },
  2326. { "", 0 },
  2327. };
  2328. MODULE_DEVICE_TABLE(acpi, acpi_nfit_ids);
  2329. static struct acpi_driver acpi_nfit_driver = {
  2330. .name = KBUILD_MODNAME,
  2331. .ids = acpi_nfit_ids,
  2332. .ops = {
  2333. .add = acpi_nfit_add,
  2334. .remove = acpi_nfit_remove,
  2335. .notify = acpi_nfit_notify,
  2336. },
  2337. };
  2338. static __init int nfit_init(void)
  2339. {
  2340. BUILD_BUG_ON(sizeof(struct acpi_table_nfit) != 40);
  2341. BUILD_BUG_ON(sizeof(struct acpi_nfit_system_address) != 56);
  2342. BUILD_BUG_ON(sizeof(struct acpi_nfit_memory_map) != 48);
  2343. BUILD_BUG_ON(sizeof(struct acpi_nfit_interleave) != 20);
  2344. BUILD_BUG_ON(sizeof(struct acpi_nfit_smbios) != 9);
  2345. BUILD_BUG_ON(sizeof(struct acpi_nfit_control_region) != 80);
  2346. BUILD_BUG_ON(sizeof(struct acpi_nfit_data_region) != 40);
  2347. acpi_str_to_uuid(UUID_VOLATILE_MEMORY, nfit_uuid[NFIT_SPA_VOLATILE]);
  2348. acpi_str_to_uuid(UUID_PERSISTENT_MEMORY, nfit_uuid[NFIT_SPA_PM]);
  2349. acpi_str_to_uuid(UUID_CONTROL_REGION, nfit_uuid[NFIT_SPA_DCR]);
  2350. acpi_str_to_uuid(UUID_DATA_REGION, nfit_uuid[NFIT_SPA_BDW]);
  2351. acpi_str_to_uuid(UUID_VOLATILE_VIRTUAL_DISK, nfit_uuid[NFIT_SPA_VDISK]);
  2352. acpi_str_to_uuid(UUID_VOLATILE_VIRTUAL_CD, nfit_uuid[NFIT_SPA_VCD]);
  2353. acpi_str_to_uuid(UUID_PERSISTENT_VIRTUAL_DISK, nfit_uuid[NFIT_SPA_PDISK]);
  2354. acpi_str_to_uuid(UUID_PERSISTENT_VIRTUAL_CD, nfit_uuid[NFIT_SPA_PCD]);
  2355. acpi_str_to_uuid(UUID_NFIT_BUS, nfit_uuid[NFIT_DEV_BUS]);
  2356. acpi_str_to_uuid(UUID_NFIT_DIMM, nfit_uuid[NFIT_DEV_DIMM]);
  2357. acpi_str_to_uuid(UUID_NFIT_DIMM_N_HPE1, nfit_uuid[NFIT_DEV_DIMM_N_HPE1]);
  2358. acpi_str_to_uuid(UUID_NFIT_DIMM_N_HPE2, nfit_uuid[NFIT_DEV_DIMM_N_HPE2]);
  2359. acpi_str_to_uuid(UUID_NFIT_DIMM_N_MSFT, nfit_uuid[NFIT_DEV_DIMM_N_MSFT]);
  2360. nfit_wq = create_singlethread_workqueue("nfit");
  2361. if (!nfit_wq)
  2362. return -ENOMEM;
  2363. nfit_mce_register();
  2364. return acpi_bus_register_driver(&acpi_nfit_driver);
  2365. }
  2366. static __exit void nfit_exit(void)
  2367. {
  2368. nfit_mce_unregister();
  2369. acpi_bus_unregister_driver(&acpi_nfit_driver);
  2370. destroy_workqueue(nfit_wq);
  2371. WARN_ON(!list_empty(&acpi_descs));
  2372. }
  2373. module_init(nfit_init);
  2374. module_exit(nfit_exit);
  2375. MODULE_LICENSE("GPL v2");
  2376. MODULE_AUTHOR("Intel Corporation");