tlb_uv.c 57 KB

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  1. /*
  2. * SGI UltraViolet TLB flush routines.
  3. *
  4. * (c) 2008-2014 Cliff Wickman <cpw@sgi.com>, SGI.
  5. *
  6. * This code is released under the GNU General Public License version 2 or
  7. * later.
  8. */
  9. #include <linux/seq_file.h>
  10. #include <linux/proc_fs.h>
  11. #include <linux/debugfs.h>
  12. #include <linux/kernel.h>
  13. #include <linux/slab.h>
  14. #include <linux/delay.h>
  15. #include <asm/mmu_context.h>
  16. #include <asm/uv/uv.h>
  17. #include <asm/uv/uv_mmrs.h>
  18. #include <asm/uv/uv_hub.h>
  19. #include <asm/uv/uv_bau.h>
  20. #include <asm/apic.h>
  21. #include <asm/idle.h>
  22. #include <asm/tsc.h>
  23. #include <asm/irq_vectors.h>
  24. #include <asm/timer.h>
  25. /* timeouts in nanoseconds (indexed by UVH_AGING_PRESCALE_SEL urgency7 30:28) */
  26. static int timeout_base_ns[] = {
  27. 20,
  28. 160,
  29. 1280,
  30. 10240,
  31. 81920,
  32. 655360,
  33. 5242880,
  34. 167772160
  35. };
  36. static int timeout_us;
  37. static bool nobau = true;
  38. static int nobau_perm;
  39. static cycles_t congested_cycles;
  40. /* tunables: */
  41. static int max_concurr = MAX_BAU_CONCURRENT;
  42. static int max_concurr_const = MAX_BAU_CONCURRENT;
  43. static int plugged_delay = PLUGGED_DELAY;
  44. static int plugsb4reset = PLUGSB4RESET;
  45. static int giveup_limit = GIVEUP_LIMIT;
  46. static int timeoutsb4reset = TIMEOUTSB4RESET;
  47. static int ipi_reset_limit = IPI_RESET_LIMIT;
  48. static int complete_threshold = COMPLETE_THRESHOLD;
  49. static int congested_respns_us = CONGESTED_RESPONSE_US;
  50. static int congested_reps = CONGESTED_REPS;
  51. static int disabled_period = DISABLED_PERIOD;
  52. static struct tunables tunables[] = {
  53. {&max_concurr, MAX_BAU_CONCURRENT}, /* must be [0] */
  54. {&plugged_delay, PLUGGED_DELAY},
  55. {&plugsb4reset, PLUGSB4RESET},
  56. {&timeoutsb4reset, TIMEOUTSB4RESET},
  57. {&ipi_reset_limit, IPI_RESET_LIMIT},
  58. {&complete_threshold, COMPLETE_THRESHOLD},
  59. {&congested_respns_us, CONGESTED_RESPONSE_US},
  60. {&congested_reps, CONGESTED_REPS},
  61. {&disabled_period, DISABLED_PERIOD},
  62. {&giveup_limit, GIVEUP_LIMIT}
  63. };
  64. static struct dentry *tunables_dir;
  65. static struct dentry *tunables_file;
  66. /* these correspond to the statistics printed by ptc_seq_show() */
  67. static char *stat_description[] = {
  68. "sent: number of shootdown messages sent",
  69. "stime: time spent sending messages",
  70. "numuvhubs: number of hubs targeted with shootdown",
  71. "numuvhubs16: number times 16 or more hubs targeted",
  72. "numuvhubs8: number times 8 or more hubs targeted",
  73. "numuvhubs4: number times 4 or more hubs targeted",
  74. "numuvhubs2: number times 2 or more hubs targeted",
  75. "numuvhubs1: number times 1 hub targeted",
  76. "numcpus: number of cpus targeted with shootdown",
  77. "dto: number of destination timeouts",
  78. "retries: destination timeout retries sent",
  79. "rok: : destination timeouts successfully retried",
  80. "resetp: ipi-style resource resets for plugs",
  81. "resett: ipi-style resource resets for timeouts",
  82. "giveup: fall-backs to ipi-style shootdowns",
  83. "sto: number of source timeouts",
  84. "bz: number of stay-busy's",
  85. "throt: number times spun in throttle",
  86. "swack: image of UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE",
  87. "recv: shootdown messages received",
  88. "rtime: time spent processing messages",
  89. "all: shootdown all-tlb messages",
  90. "one: shootdown one-tlb messages",
  91. "mult: interrupts that found multiple messages",
  92. "none: interrupts that found no messages",
  93. "retry: number of retry messages processed",
  94. "canc: number messages canceled by retries",
  95. "nocan: number retries that found nothing to cancel",
  96. "reset: number of ipi-style reset requests processed",
  97. "rcan: number messages canceled by reset requests",
  98. "disable: number times use of the BAU was disabled",
  99. "enable: number times use of the BAU was re-enabled"
  100. };
  101. static int __init setup_bau(char *arg)
  102. {
  103. int result;
  104. if (!arg)
  105. return -EINVAL;
  106. result = strtobool(arg, &nobau);
  107. if (result)
  108. return result;
  109. /* we need to flip the logic here, so that bau=y sets nobau to false */
  110. nobau = !nobau;
  111. if (!nobau)
  112. pr_info("UV BAU Enabled\n");
  113. else
  114. pr_info("UV BAU Disabled\n");
  115. return 0;
  116. }
  117. early_param("bau", setup_bau);
  118. /* base pnode in this partition */
  119. static int uv_base_pnode __read_mostly;
  120. static DEFINE_PER_CPU(struct ptc_stats, ptcstats);
  121. static DEFINE_PER_CPU(struct bau_control, bau_control);
  122. static DEFINE_PER_CPU(cpumask_var_t, uv_flush_tlb_mask);
  123. static void
  124. set_bau_on(void)
  125. {
  126. int cpu;
  127. struct bau_control *bcp;
  128. if (nobau_perm) {
  129. pr_info("BAU not initialized; cannot be turned on\n");
  130. return;
  131. }
  132. nobau = false;
  133. for_each_present_cpu(cpu) {
  134. bcp = &per_cpu(bau_control, cpu);
  135. bcp->nobau = false;
  136. }
  137. pr_info("BAU turned on\n");
  138. return;
  139. }
  140. static void
  141. set_bau_off(void)
  142. {
  143. int cpu;
  144. struct bau_control *bcp;
  145. nobau = true;
  146. for_each_present_cpu(cpu) {
  147. bcp = &per_cpu(bau_control, cpu);
  148. bcp->nobau = true;
  149. }
  150. pr_info("BAU turned off\n");
  151. return;
  152. }
  153. /*
  154. * Determine the first node on a uvhub. 'Nodes' are used for kernel
  155. * memory allocation.
  156. */
  157. static int __init uvhub_to_first_node(int uvhub)
  158. {
  159. int node, b;
  160. for_each_online_node(node) {
  161. b = uv_node_to_blade_id(node);
  162. if (uvhub == b)
  163. return node;
  164. }
  165. return -1;
  166. }
  167. /*
  168. * Determine the apicid of the first cpu on a uvhub.
  169. */
  170. static int __init uvhub_to_first_apicid(int uvhub)
  171. {
  172. int cpu;
  173. for_each_present_cpu(cpu)
  174. if (uvhub == uv_cpu_to_blade_id(cpu))
  175. return per_cpu(x86_cpu_to_apicid, cpu);
  176. return -1;
  177. }
  178. /*
  179. * Free a software acknowledge hardware resource by clearing its Pending
  180. * bit. This will return a reply to the sender.
  181. * If the message has timed out, a reply has already been sent by the
  182. * hardware but the resource has not been released. In that case our
  183. * clear of the Timeout bit (as well) will free the resource. No reply will
  184. * be sent (the hardware will only do one reply per message).
  185. */
  186. static void reply_to_message(struct msg_desc *mdp, struct bau_control *bcp,
  187. int do_acknowledge)
  188. {
  189. unsigned long dw;
  190. struct bau_pq_entry *msg;
  191. msg = mdp->msg;
  192. if (!msg->canceled && do_acknowledge) {
  193. dw = (msg->swack_vec << UV_SW_ACK_NPENDING) | msg->swack_vec;
  194. write_mmr_sw_ack(dw);
  195. }
  196. msg->replied_to = 1;
  197. msg->swack_vec = 0;
  198. }
  199. /*
  200. * Process the receipt of a RETRY message
  201. */
  202. static void bau_process_retry_msg(struct msg_desc *mdp,
  203. struct bau_control *bcp)
  204. {
  205. int i;
  206. int cancel_count = 0;
  207. unsigned long msg_res;
  208. unsigned long mmr = 0;
  209. struct bau_pq_entry *msg = mdp->msg;
  210. struct bau_pq_entry *msg2;
  211. struct ptc_stats *stat = bcp->statp;
  212. stat->d_retries++;
  213. /*
  214. * cancel any message from msg+1 to the retry itself
  215. */
  216. for (msg2 = msg+1, i = 0; i < DEST_Q_SIZE; msg2++, i++) {
  217. if (msg2 > mdp->queue_last)
  218. msg2 = mdp->queue_first;
  219. if (msg2 == msg)
  220. break;
  221. /* same conditions for cancellation as do_reset */
  222. if ((msg2->replied_to == 0) && (msg2->canceled == 0) &&
  223. (msg2->swack_vec) && ((msg2->swack_vec &
  224. msg->swack_vec) == 0) &&
  225. (msg2->sending_cpu == msg->sending_cpu) &&
  226. (msg2->msg_type != MSG_NOOP)) {
  227. mmr = read_mmr_sw_ack();
  228. msg_res = msg2->swack_vec;
  229. /*
  230. * This is a message retry; clear the resources held
  231. * by the previous message only if they timed out.
  232. * If it has not timed out we have an unexpected
  233. * situation to report.
  234. */
  235. if (mmr & (msg_res << UV_SW_ACK_NPENDING)) {
  236. unsigned long mr;
  237. /*
  238. * Is the resource timed out?
  239. * Make everyone ignore the cancelled message.
  240. */
  241. msg2->canceled = 1;
  242. stat->d_canceled++;
  243. cancel_count++;
  244. mr = (msg_res << UV_SW_ACK_NPENDING) | msg_res;
  245. write_mmr_sw_ack(mr);
  246. }
  247. }
  248. }
  249. if (!cancel_count)
  250. stat->d_nocanceled++;
  251. }
  252. /*
  253. * Do all the things a cpu should do for a TLB shootdown message.
  254. * Other cpu's may come here at the same time for this message.
  255. */
  256. static void bau_process_message(struct msg_desc *mdp, struct bau_control *bcp,
  257. int do_acknowledge)
  258. {
  259. short socket_ack_count = 0;
  260. short *sp;
  261. struct atomic_short *asp;
  262. struct ptc_stats *stat = bcp->statp;
  263. struct bau_pq_entry *msg = mdp->msg;
  264. struct bau_control *smaster = bcp->socket_master;
  265. /*
  266. * This must be a normal message, or retry of a normal message
  267. */
  268. if (msg->address == TLB_FLUSH_ALL) {
  269. local_flush_tlb();
  270. stat->d_alltlb++;
  271. } else {
  272. __flush_tlb_one(msg->address);
  273. stat->d_onetlb++;
  274. }
  275. stat->d_requestee++;
  276. /*
  277. * One cpu on each uvhub has the additional job on a RETRY
  278. * of releasing the resource held by the message that is
  279. * being retried. That message is identified by sending
  280. * cpu number.
  281. */
  282. if (msg->msg_type == MSG_RETRY && bcp == bcp->uvhub_master)
  283. bau_process_retry_msg(mdp, bcp);
  284. /*
  285. * This is a swack message, so we have to reply to it.
  286. * Count each responding cpu on the socket. This avoids
  287. * pinging the count's cache line back and forth between
  288. * the sockets.
  289. */
  290. sp = &smaster->socket_acknowledge_count[mdp->msg_slot];
  291. asp = (struct atomic_short *)sp;
  292. socket_ack_count = atom_asr(1, asp);
  293. if (socket_ack_count == bcp->cpus_in_socket) {
  294. int msg_ack_count;
  295. /*
  296. * Both sockets dump their completed count total into
  297. * the message's count.
  298. */
  299. *sp = 0;
  300. asp = (struct atomic_short *)&msg->acknowledge_count;
  301. msg_ack_count = atom_asr(socket_ack_count, asp);
  302. if (msg_ack_count == bcp->cpus_in_uvhub) {
  303. /*
  304. * All cpus in uvhub saw it; reply
  305. * (unless we are in the UV2 workaround)
  306. */
  307. reply_to_message(mdp, bcp, do_acknowledge);
  308. }
  309. }
  310. return;
  311. }
  312. /*
  313. * Determine the first cpu on a pnode.
  314. */
  315. static int pnode_to_first_cpu(int pnode, struct bau_control *smaster)
  316. {
  317. int cpu;
  318. struct hub_and_pnode *hpp;
  319. for_each_present_cpu(cpu) {
  320. hpp = &smaster->thp[cpu];
  321. if (pnode == hpp->pnode)
  322. return cpu;
  323. }
  324. return -1;
  325. }
  326. /*
  327. * Last resort when we get a large number of destination timeouts is
  328. * to clear resources held by a given cpu.
  329. * Do this with IPI so that all messages in the BAU message queue
  330. * can be identified by their nonzero swack_vec field.
  331. *
  332. * This is entered for a single cpu on the uvhub.
  333. * The sender want's this uvhub to free a specific message's
  334. * swack resources.
  335. */
  336. static void do_reset(void *ptr)
  337. {
  338. int i;
  339. struct bau_control *bcp = &per_cpu(bau_control, smp_processor_id());
  340. struct reset_args *rap = (struct reset_args *)ptr;
  341. struct bau_pq_entry *msg;
  342. struct ptc_stats *stat = bcp->statp;
  343. stat->d_resets++;
  344. /*
  345. * We're looking for the given sender, and
  346. * will free its swack resource.
  347. * If all cpu's finally responded after the timeout, its
  348. * message 'replied_to' was set.
  349. */
  350. for (msg = bcp->queue_first, i = 0; i < DEST_Q_SIZE; msg++, i++) {
  351. unsigned long msg_res;
  352. /* do_reset: same conditions for cancellation as
  353. bau_process_retry_msg() */
  354. if ((msg->replied_to == 0) &&
  355. (msg->canceled == 0) &&
  356. (msg->sending_cpu == rap->sender) &&
  357. (msg->swack_vec) &&
  358. (msg->msg_type != MSG_NOOP)) {
  359. unsigned long mmr;
  360. unsigned long mr;
  361. /*
  362. * make everyone else ignore this message
  363. */
  364. msg->canceled = 1;
  365. /*
  366. * only reset the resource if it is still pending
  367. */
  368. mmr = read_mmr_sw_ack();
  369. msg_res = msg->swack_vec;
  370. mr = (msg_res << UV_SW_ACK_NPENDING) | msg_res;
  371. if (mmr & msg_res) {
  372. stat->d_rcanceled++;
  373. write_mmr_sw_ack(mr);
  374. }
  375. }
  376. }
  377. return;
  378. }
  379. /*
  380. * Use IPI to get all target uvhubs to release resources held by
  381. * a given sending cpu number.
  382. */
  383. static void reset_with_ipi(struct pnmask *distribution, struct bau_control *bcp)
  384. {
  385. int pnode;
  386. int apnode;
  387. int maskbits;
  388. int sender = bcp->cpu;
  389. cpumask_t *mask = bcp->uvhub_master->cpumask;
  390. struct bau_control *smaster = bcp->socket_master;
  391. struct reset_args reset_args;
  392. reset_args.sender = sender;
  393. cpumask_clear(mask);
  394. /* find a single cpu for each uvhub in this distribution mask */
  395. maskbits = sizeof(struct pnmask) * BITSPERBYTE;
  396. /* each bit is a pnode relative to the partition base pnode */
  397. for (pnode = 0; pnode < maskbits; pnode++) {
  398. int cpu;
  399. if (!bau_uvhub_isset(pnode, distribution))
  400. continue;
  401. apnode = pnode + bcp->partition_base_pnode;
  402. cpu = pnode_to_first_cpu(apnode, smaster);
  403. cpumask_set_cpu(cpu, mask);
  404. }
  405. /* IPI all cpus; preemption is already disabled */
  406. smp_call_function_many(mask, do_reset, (void *)&reset_args, 1);
  407. return;
  408. }
  409. /*
  410. * Not to be confused with cycles_2_ns() from tsc.c; this gives a relative
  411. * number, not an absolute. It converts a duration in cycles to a duration in
  412. * ns.
  413. */
  414. static inline unsigned long long cycles_2_ns(unsigned long long cyc)
  415. {
  416. struct cyc2ns_data *data = cyc2ns_read_begin();
  417. unsigned long long ns;
  418. ns = mul_u64_u32_shr(cyc, data->cyc2ns_mul, data->cyc2ns_shift);
  419. cyc2ns_read_end(data);
  420. return ns;
  421. }
  422. /*
  423. * The reverse of the above; converts a duration in ns to a duration in cycles.
  424. */
  425. static inline unsigned long long ns_2_cycles(unsigned long long ns)
  426. {
  427. struct cyc2ns_data *data = cyc2ns_read_begin();
  428. unsigned long long cyc;
  429. cyc = (ns << data->cyc2ns_shift) / data->cyc2ns_mul;
  430. cyc2ns_read_end(data);
  431. return cyc;
  432. }
  433. static inline unsigned long cycles_2_us(unsigned long long cyc)
  434. {
  435. return cycles_2_ns(cyc) / NSEC_PER_USEC;
  436. }
  437. static inline cycles_t sec_2_cycles(unsigned long sec)
  438. {
  439. return ns_2_cycles(sec * NSEC_PER_SEC);
  440. }
  441. static inline unsigned long long usec_2_cycles(unsigned long usec)
  442. {
  443. return ns_2_cycles(usec * NSEC_PER_USEC);
  444. }
  445. /*
  446. * wait for all cpus on this hub to finish their sends and go quiet
  447. * leaves uvhub_quiesce set so that no new broadcasts are started by
  448. * bau_flush_send_and_wait()
  449. */
  450. static inline void quiesce_local_uvhub(struct bau_control *hmaster)
  451. {
  452. atom_asr(1, (struct atomic_short *)&hmaster->uvhub_quiesce);
  453. }
  454. /*
  455. * mark this quiet-requestor as done
  456. */
  457. static inline void end_uvhub_quiesce(struct bau_control *hmaster)
  458. {
  459. atom_asr(-1, (struct atomic_short *)&hmaster->uvhub_quiesce);
  460. }
  461. static unsigned long uv1_read_status(unsigned long mmr_offset, int right_shift)
  462. {
  463. unsigned long descriptor_status;
  464. descriptor_status = uv_read_local_mmr(mmr_offset);
  465. descriptor_status >>= right_shift;
  466. descriptor_status &= UV_ACT_STATUS_MASK;
  467. return descriptor_status;
  468. }
  469. /*
  470. * Wait for completion of a broadcast software ack message
  471. * return COMPLETE, RETRY(PLUGGED or TIMEOUT) or GIVEUP
  472. */
  473. static int uv1_wait_completion(struct bau_desc *bau_desc,
  474. unsigned long mmr_offset, int right_shift,
  475. struct bau_control *bcp, long try)
  476. {
  477. unsigned long descriptor_status;
  478. cycles_t ttm;
  479. struct ptc_stats *stat = bcp->statp;
  480. descriptor_status = uv1_read_status(mmr_offset, right_shift);
  481. /* spin on the status MMR, waiting for it to go idle */
  482. while ((descriptor_status != DS_IDLE)) {
  483. /*
  484. * Our software ack messages may be blocked because
  485. * there are no swack resources available. As long
  486. * as none of them has timed out hardware will NACK
  487. * our message and its state will stay IDLE.
  488. */
  489. if (descriptor_status == DS_SOURCE_TIMEOUT) {
  490. stat->s_stimeout++;
  491. return FLUSH_GIVEUP;
  492. } else if (descriptor_status == DS_DESTINATION_TIMEOUT) {
  493. stat->s_dtimeout++;
  494. ttm = get_cycles();
  495. /*
  496. * Our retries may be blocked by all destination
  497. * swack resources being consumed, and a timeout
  498. * pending. In that case hardware returns the
  499. * ERROR that looks like a destination timeout.
  500. */
  501. if (cycles_2_us(ttm - bcp->send_message) < timeout_us) {
  502. bcp->conseccompletes = 0;
  503. return FLUSH_RETRY_PLUGGED;
  504. }
  505. bcp->conseccompletes = 0;
  506. return FLUSH_RETRY_TIMEOUT;
  507. } else {
  508. /*
  509. * descriptor_status is still BUSY
  510. */
  511. cpu_relax();
  512. }
  513. descriptor_status = uv1_read_status(mmr_offset, right_shift);
  514. }
  515. bcp->conseccompletes++;
  516. return FLUSH_COMPLETE;
  517. }
  518. /*
  519. * UV2 could have an extra bit of status in the ACTIVATION_STATUS_2 register.
  520. * But not currently used.
  521. */
  522. static unsigned long uv2_3_read_status(unsigned long offset, int rshft, int desc)
  523. {
  524. unsigned long descriptor_status;
  525. descriptor_status =
  526. ((read_lmmr(offset) >> rshft) & UV_ACT_STATUS_MASK) << 1;
  527. return descriptor_status;
  528. }
  529. /*
  530. * Return whether the status of the descriptor that is normally used for this
  531. * cpu (the one indexed by its hub-relative cpu number) is busy.
  532. * The status of the original 32 descriptors is always reflected in the 64
  533. * bits of UVH_LB_BAU_SB_ACTIVATION_STATUS_0.
  534. * The bit provided by the activation_status_2 register is irrelevant to
  535. * the status if it is only being tested for busy or not busy.
  536. */
  537. int normal_busy(struct bau_control *bcp)
  538. {
  539. int cpu = bcp->uvhub_cpu;
  540. int mmr_offset;
  541. int right_shift;
  542. mmr_offset = UVH_LB_BAU_SB_ACTIVATION_STATUS_0;
  543. right_shift = cpu * UV_ACT_STATUS_SIZE;
  544. return (((((read_lmmr(mmr_offset) >> right_shift) &
  545. UV_ACT_STATUS_MASK)) << 1) == UV2H_DESC_BUSY);
  546. }
  547. /*
  548. * Entered when a bau descriptor has gone into a permanent busy wait because
  549. * of a hardware bug.
  550. * Workaround the bug.
  551. */
  552. int handle_uv2_busy(struct bau_control *bcp)
  553. {
  554. struct ptc_stats *stat = bcp->statp;
  555. stat->s_uv2_wars++;
  556. bcp->busy = 1;
  557. return FLUSH_GIVEUP;
  558. }
  559. static int uv2_3_wait_completion(struct bau_desc *bau_desc,
  560. unsigned long mmr_offset, int right_shift,
  561. struct bau_control *bcp, long try)
  562. {
  563. unsigned long descriptor_stat;
  564. cycles_t ttm;
  565. int desc = bcp->uvhub_cpu;
  566. long busy_reps = 0;
  567. struct ptc_stats *stat = bcp->statp;
  568. descriptor_stat = uv2_3_read_status(mmr_offset, right_shift, desc);
  569. /* spin on the status MMR, waiting for it to go idle */
  570. while (descriptor_stat != UV2H_DESC_IDLE) {
  571. if ((descriptor_stat == UV2H_DESC_SOURCE_TIMEOUT)) {
  572. /*
  573. * A h/w bug on the destination side may
  574. * have prevented the message being marked
  575. * pending, thus it doesn't get replied to
  576. * and gets continually nacked until it times
  577. * out with a SOURCE_TIMEOUT.
  578. */
  579. stat->s_stimeout++;
  580. return FLUSH_GIVEUP;
  581. } else if (descriptor_stat == UV2H_DESC_DEST_TIMEOUT) {
  582. ttm = get_cycles();
  583. /*
  584. * Our retries may be blocked by all destination
  585. * swack resources being consumed, and a timeout
  586. * pending. In that case hardware returns the
  587. * ERROR that looks like a destination timeout.
  588. * Without using the extended status we have to
  589. * deduce from the short time that this was a
  590. * strong nack.
  591. */
  592. if (cycles_2_us(ttm - bcp->send_message) < timeout_us) {
  593. bcp->conseccompletes = 0;
  594. stat->s_plugged++;
  595. /* FLUSH_RETRY_PLUGGED causes hang on boot */
  596. return FLUSH_GIVEUP;
  597. }
  598. stat->s_dtimeout++;
  599. bcp->conseccompletes = 0;
  600. /* FLUSH_RETRY_TIMEOUT causes hang on boot */
  601. return FLUSH_GIVEUP;
  602. } else {
  603. busy_reps++;
  604. if (busy_reps > 1000000) {
  605. /* not to hammer on the clock */
  606. busy_reps = 0;
  607. ttm = get_cycles();
  608. if ((ttm - bcp->send_message) > bcp->timeout_interval)
  609. return handle_uv2_busy(bcp);
  610. }
  611. /*
  612. * descriptor_stat is still BUSY
  613. */
  614. cpu_relax();
  615. }
  616. descriptor_stat = uv2_3_read_status(mmr_offset, right_shift, desc);
  617. }
  618. bcp->conseccompletes++;
  619. return FLUSH_COMPLETE;
  620. }
  621. /*
  622. * There are 2 status registers; each and array[32] of 2 bits. Set up for
  623. * which register to read and position in that register based on cpu in
  624. * current hub.
  625. */
  626. static int wait_completion(struct bau_desc *bau_desc, struct bau_control *bcp, long try)
  627. {
  628. int right_shift;
  629. unsigned long mmr_offset;
  630. int desc = bcp->uvhub_cpu;
  631. if (desc < UV_CPUS_PER_AS) {
  632. mmr_offset = UVH_LB_BAU_SB_ACTIVATION_STATUS_0;
  633. right_shift = desc * UV_ACT_STATUS_SIZE;
  634. } else {
  635. mmr_offset = UVH_LB_BAU_SB_ACTIVATION_STATUS_1;
  636. right_shift = ((desc - UV_CPUS_PER_AS) * UV_ACT_STATUS_SIZE);
  637. }
  638. if (bcp->uvhub_version == 1)
  639. return uv1_wait_completion(bau_desc, mmr_offset, right_shift, bcp, try);
  640. else
  641. return uv2_3_wait_completion(bau_desc, mmr_offset, right_shift, bcp, try);
  642. }
  643. /*
  644. * Our retries are blocked by all destination sw ack resources being
  645. * in use, and a timeout is pending. In that case hardware immediately
  646. * returns the ERROR that looks like a destination timeout.
  647. */
  648. static void destination_plugged(struct bau_desc *bau_desc,
  649. struct bau_control *bcp,
  650. struct bau_control *hmaster, struct ptc_stats *stat)
  651. {
  652. udelay(bcp->plugged_delay);
  653. bcp->plugged_tries++;
  654. if (bcp->plugged_tries >= bcp->plugsb4reset) {
  655. bcp->plugged_tries = 0;
  656. quiesce_local_uvhub(hmaster);
  657. spin_lock(&hmaster->queue_lock);
  658. reset_with_ipi(&bau_desc->distribution, bcp);
  659. spin_unlock(&hmaster->queue_lock);
  660. end_uvhub_quiesce(hmaster);
  661. bcp->ipi_attempts++;
  662. stat->s_resets_plug++;
  663. }
  664. }
  665. static void destination_timeout(struct bau_desc *bau_desc,
  666. struct bau_control *bcp, struct bau_control *hmaster,
  667. struct ptc_stats *stat)
  668. {
  669. hmaster->max_concurr = 1;
  670. bcp->timeout_tries++;
  671. if (bcp->timeout_tries >= bcp->timeoutsb4reset) {
  672. bcp->timeout_tries = 0;
  673. quiesce_local_uvhub(hmaster);
  674. spin_lock(&hmaster->queue_lock);
  675. reset_with_ipi(&bau_desc->distribution, bcp);
  676. spin_unlock(&hmaster->queue_lock);
  677. end_uvhub_quiesce(hmaster);
  678. bcp->ipi_attempts++;
  679. stat->s_resets_timeout++;
  680. }
  681. }
  682. /*
  683. * Stop all cpus on a uvhub from using the BAU for a period of time.
  684. * This is reversed by check_enable.
  685. */
  686. static void disable_for_period(struct bau_control *bcp, struct ptc_stats *stat)
  687. {
  688. int tcpu;
  689. struct bau_control *tbcp;
  690. struct bau_control *hmaster;
  691. cycles_t tm1;
  692. hmaster = bcp->uvhub_master;
  693. spin_lock(&hmaster->disable_lock);
  694. if (!bcp->baudisabled) {
  695. stat->s_bau_disabled++;
  696. tm1 = get_cycles();
  697. for_each_present_cpu(tcpu) {
  698. tbcp = &per_cpu(bau_control, tcpu);
  699. if (tbcp->uvhub_master == hmaster) {
  700. tbcp->baudisabled = 1;
  701. tbcp->set_bau_on_time =
  702. tm1 + bcp->disabled_period;
  703. }
  704. }
  705. }
  706. spin_unlock(&hmaster->disable_lock);
  707. }
  708. static void count_max_concurr(int stat, struct bau_control *bcp,
  709. struct bau_control *hmaster)
  710. {
  711. bcp->plugged_tries = 0;
  712. bcp->timeout_tries = 0;
  713. if (stat != FLUSH_COMPLETE)
  714. return;
  715. if (bcp->conseccompletes <= bcp->complete_threshold)
  716. return;
  717. if (hmaster->max_concurr >= hmaster->max_concurr_const)
  718. return;
  719. hmaster->max_concurr++;
  720. }
  721. static void record_send_stats(cycles_t time1, cycles_t time2,
  722. struct bau_control *bcp, struct ptc_stats *stat,
  723. int completion_status, int try)
  724. {
  725. cycles_t elapsed;
  726. if (time2 > time1) {
  727. elapsed = time2 - time1;
  728. stat->s_time += elapsed;
  729. if ((completion_status == FLUSH_COMPLETE) && (try == 1)) {
  730. bcp->period_requests++;
  731. bcp->period_time += elapsed;
  732. if ((elapsed > congested_cycles) &&
  733. (bcp->period_requests > bcp->cong_reps) &&
  734. ((bcp->period_time / bcp->period_requests) >
  735. congested_cycles)) {
  736. stat->s_congested++;
  737. disable_for_period(bcp, stat);
  738. }
  739. }
  740. } else
  741. stat->s_requestor--;
  742. if (completion_status == FLUSH_COMPLETE && try > 1)
  743. stat->s_retriesok++;
  744. else if (completion_status == FLUSH_GIVEUP) {
  745. stat->s_giveup++;
  746. if (get_cycles() > bcp->period_end)
  747. bcp->period_giveups = 0;
  748. bcp->period_giveups++;
  749. if (bcp->period_giveups == 1)
  750. bcp->period_end = get_cycles() + bcp->disabled_period;
  751. if (bcp->period_giveups > bcp->giveup_limit) {
  752. disable_for_period(bcp, stat);
  753. stat->s_giveuplimit++;
  754. }
  755. }
  756. }
  757. /*
  758. * Because of a uv1 hardware bug only a limited number of concurrent
  759. * requests can be made.
  760. */
  761. static void uv1_throttle(struct bau_control *hmaster, struct ptc_stats *stat)
  762. {
  763. spinlock_t *lock = &hmaster->uvhub_lock;
  764. atomic_t *v;
  765. v = &hmaster->active_descriptor_count;
  766. if (!atomic_inc_unless_ge(lock, v, hmaster->max_concurr)) {
  767. stat->s_throttles++;
  768. do {
  769. cpu_relax();
  770. } while (!atomic_inc_unless_ge(lock, v, hmaster->max_concurr));
  771. }
  772. }
  773. /*
  774. * Handle the completion status of a message send.
  775. */
  776. static void handle_cmplt(int completion_status, struct bau_desc *bau_desc,
  777. struct bau_control *bcp, struct bau_control *hmaster,
  778. struct ptc_stats *stat)
  779. {
  780. if (completion_status == FLUSH_RETRY_PLUGGED)
  781. destination_plugged(bau_desc, bcp, hmaster, stat);
  782. else if (completion_status == FLUSH_RETRY_TIMEOUT)
  783. destination_timeout(bau_desc, bcp, hmaster, stat);
  784. }
  785. /*
  786. * Send a broadcast and wait for it to complete.
  787. *
  788. * The flush_mask contains the cpus the broadcast is to be sent to including
  789. * cpus that are on the local uvhub.
  790. *
  791. * Returns 0 if all flushing represented in the mask was done.
  792. * Returns 1 if it gives up entirely and the original cpu mask is to be
  793. * returned to the kernel.
  794. */
  795. int uv_flush_send_and_wait(struct cpumask *flush_mask, struct bau_control *bcp,
  796. struct bau_desc *bau_desc)
  797. {
  798. int seq_number = 0;
  799. int completion_stat = 0;
  800. int uv1 = 0;
  801. long try = 0;
  802. unsigned long index;
  803. cycles_t time1;
  804. cycles_t time2;
  805. struct ptc_stats *stat = bcp->statp;
  806. struct bau_control *hmaster = bcp->uvhub_master;
  807. struct uv1_bau_msg_header *uv1_hdr = NULL;
  808. struct uv2_3_bau_msg_header *uv2_3_hdr = NULL;
  809. if (bcp->uvhub_version == 1) {
  810. uv1 = 1;
  811. uv1_throttle(hmaster, stat);
  812. }
  813. while (hmaster->uvhub_quiesce)
  814. cpu_relax();
  815. time1 = get_cycles();
  816. if (uv1)
  817. uv1_hdr = &bau_desc->header.uv1_hdr;
  818. else
  819. /* uv2 and uv3 */
  820. uv2_3_hdr = &bau_desc->header.uv2_3_hdr;
  821. do {
  822. if (try == 0) {
  823. if (uv1)
  824. uv1_hdr->msg_type = MSG_REGULAR;
  825. else
  826. uv2_3_hdr->msg_type = MSG_REGULAR;
  827. seq_number = bcp->message_number++;
  828. } else {
  829. if (uv1)
  830. uv1_hdr->msg_type = MSG_RETRY;
  831. else
  832. uv2_3_hdr->msg_type = MSG_RETRY;
  833. stat->s_retry_messages++;
  834. }
  835. if (uv1)
  836. uv1_hdr->sequence = seq_number;
  837. else
  838. uv2_3_hdr->sequence = seq_number;
  839. index = (1UL << AS_PUSH_SHIFT) | bcp->uvhub_cpu;
  840. bcp->send_message = get_cycles();
  841. write_mmr_activation(index);
  842. try++;
  843. completion_stat = wait_completion(bau_desc, bcp, try);
  844. handle_cmplt(completion_stat, bau_desc, bcp, hmaster, stat);
  845. if (bcp->ipi_attempts >= bcp->ipi_reset_limit) {
  846. bcp->ipi_attempts = 0;
  847. stat->s_overipilimit++;
  848. completion_stat = FLUSH_GIVEUP;
  849. break;
  850. }
  851. cpu_relax();
  852. } while ((completion_stat == FLUSH_RETRY_PLUGGED) ||
  853. (completion_stat == FLUSH_RETRY_TIMEOUT));
  854. time2 = get_cycles();
  855. count_max_concurr(completion_stat, bcp, hmaster);
  856. while (hmaster->uvhub_quiesce)
  857. cpu_relax();
  858. atomic_dec(&hmaster->active_descriptor_count);
  859. record_send_stats(time1, time2, bcp, stat, completion_stat, try);
  860. if (completion_stat == FLUSH_GIVEUP)
  861. /* FLUSH_GIVEUP will fall back to using IPI's for tlb flush */
  862. return 1;
  863. return 0;
  864. }
  865. /*
  866. * The BAU is disabled for this uvhub. When the disabled time period has
  867. * expired re-enable it.
  868. * Return 0 if it is re-enabled for all cpus on this uvhub.
  869. */
  870. static int check_enable(struct bau_control *bcp, struct ptc_stats *stat)
  871. {
  872. int tcpu;
  873. struct bau_control *tbcp;
  874. struct bau_control *hmaster;
  875. hmaster = bcp->uvhub_master;
  876. spin_lock(&hmaster->disable_lock);
  877. if (bcp->baudisabled && (get_cycles() >= bcp->set_bau_on_time)) {
  878. stat->s_bau_reenabled++;
  879. for_each_present_cpu(tcpu) {
  880. tbcp = &per_cpu(bau_control, tcpu);
  881. if (tbcp->uvhub_master == hmaster) {
  882. tbcp->baudisabled = 0;
  883. tbcp->period_requests = 0;
  884. tbcp->period_time = 0;
  885. tbcp->period_giveups = 0;
  886. }
  887. }
  888. spin_unlock(&hmaster->disable_lock);
  889. return 0;
  890. }
  891. spin_unlock(&hmaster->disable_lock);
  892. return -1;
  893. }
  894. static void record_send_statistics(struct ptc_stats *stat, int locals, int hubs,
  895. int remotes, struct bau_desc *bau_desc)
  896. {
  897. stat->s_requestor++;
  898. stat->s_ntargcpu += remotes + locals;
  899. stat->s_ntargremotes += remotes;
  900. stat->s_ntarglocals += locals;
  901. /* uvhub statistics */
  902. hubs = bau_uvhub_weight(&bau_desc->distribution);
  903. if (locals) {
  904. stat->s_ntarglocaluvhub++;
  905. stat->s_ntargremoteuvhub += (hubs - 1);
  906. } else
  907. stat->s_ntargremoteuvhub += hubs;
  908. stat->s_ntarguvhub += hubs;
  909. if (hubs >= 16)
  910. stat->s_ntarguvhub16++;
  911. else if (hubs >= 8)
  912. stat->s_ntarguvhub8++;
  913. else if (hubs >= 4)
  914. stat->s_ntarguvhub4++;
  915. else if (hubs >= 2)
  916. stat->s_ntarguvhub2++;
  917. else
  918. stat->s_ntarguvhub1++;
  919. }
  920. /*
  921. * Translate a cpu mask to the uvhub distribution mask in the BAU
  922. * activation descriptor.
  923. */
  924. static int set_distrib_bits(struct cpumask *flush_mask, struct bau_control *bcp,
  925. struct bau_desc *bau_desc, int *localsp, int *remotesp)
  926. {
  927. int cpu;
  928. int pnode;
  929. int cnt = 0;
  930. struct hub_and_pnode *hpp;
  931. for_each_cpu(cpu, flush_mask) {
  932. /*
  933. * The distribution vector is a bit map of pnodes, relative
  934. * to the partition base pnode (and the partition base nasid
  935. * in the header).
  936. * Translate cpu to pnode and hub using a local memory array.
  937. */
  938. hpp = &bcp->socket_master->thp[cpu];
  939. pnode = hpp->pnode - bcp->partition_base_pnode;
  940. bau_uvhub_set(pnode, &bau_desc->distribution);
  941. cnt++;
  942. if (hpp->uvhub == bcp->uvhub)
  943. (*localsp)++;
  944. else
  945. (*remotesp)++;
  946. }
  947. if (!cnt)
  948. return 1;
  949. return 0;
  950. }
  951. /*
  952. * globally purge translation cache of a virtual address or all TLB's
  953. * @cpumask: mask of all cpu's in which the address is to be removed
  954. * @mm: mm_struct containing virtual address range
  955. * @start: start virtual address to be removed from TLB
  956. * @end: end virtual address to be remove from TLB
  957. * @cpu: the current cpu
  958. *
  959. * This is the entry point for initiating any UV global TLB shootdown.
  960. *
  961. * Purges the translation caches of all specified processors of the given
  962. * virtual address, or purges all TLB's on specified processors.
  963. *
  964. * The caller has derived the cpumask from the mm_struct. This function
  965. * is called only if there are bits set in the mask. (e.g. flush_tlb_page())
  966. *
  967. * The cpumask is converted into a uvhubmask of the uvhubs containing
  968. * those cpus.
  969. *
  970. * Note that this function should be called with preemption disabled.
  971. *
  972. * Returns NULL if all remote flushing was done.
  973. * Returns pointer to cpumask if some remote flushing remains to be
  974. * done. The returned pointer is valid till preemption is re-enabled.
  975. */
  976. const struct cpumask *uv_flush_tlb_others(const struct cpumask *cpumask,
  977. struct mm_struct *mm,
  978. unsigned long start,
  979. unsigned long end,
  980. unsigned int cpu)
  981. {
  982. int locals = 0;
  983. int remotes = 0;
  984. int hubs = 0;
  985. struct bau_desc *bau_desc;
  986. struct cpumask *flush_mask;
  987. struct ptc_stats *stat;
  988. struct bau_control *bcp;
  989. unsigned long descriptor_status;
  990. unsigned long status;
  991. bcp = &per_cpu(bau_control, cpu);
  992. if (bcp->nobau)
  993. return cpumask;
  994. stat = bcp->statp;
  995. stat->s_enters++;
  996. if (bcp->busy) {
  997. descriptor_status =
  998. read_lmmr(UVH_LB_BAU_SB_ACTIVATION_STATUS_0);
  999. status = ((descriptor_status >> (bcp->uvhub_cpu *
  1000. UV_ACT_STATUS_SIZE)) & UV_ACT_STATUS_MASK) << 1;
  1001. if (status == UV2H_DESC_BUSY)
  1002. return cpumask;
  1003. bcp->busy = 0;
  1004. }
  1005. /* bau was disabled due to slow response */
  1006. if (bcp->baudisabled) {
  1007. if (check_enable(bcp, stat)) {
  1008. stat->s_ipifordisabled++;
  1009. return cpumask;
  1010. }
  1011. }
  1012. /*
  1013. * Each sending cpu has a per-cpu mask which it fills from the caller's
  1014. * cpu mask. All cpus are converted to uvhubs and copied to the
  1015. * activation descriptor.
  1016. */
  1017. flush_mask = (struct cpumask *)per_cpu(uv_flush_tlb_mask, cpu);
  1018. /* don't actually do a shootdown of the local cpu */
  1019. cpumask_andnot(flush_mask, cpumask, cpumask_of(cpu));
  1020. if (cpumask_test_cpu(cpu, cpumask))
  1021. stat->s_ntargself++;
  1022. bau_desc = bcp->descriptor_base;
  1023. bau_desc += (ITEMS_PER_DESC * bcp->uvhub_cpu);
  1024. bau_uvhubs_clear(&bau_desc->distribution, UV_DISTRIBUTION_SIZE);
  1025. if (set_distrib_bits(flush_mask, bcp, bau_desc, &locals, &remotes))
  1026. return NULL;
  1027. record_send_statistics(stat, locals, hubs, remotes, bau_desc);
  1028. if (!end || (end - start) <= PAGE_SIZE)
  1029. bau_desc->payload.address = start;
  1030. else
  1031. bau_desc->payload.address = TLB_FLUSH_ALL;
  1032. bau_desc->payload.sending_cpu = cpu;
  1033. /*
  1034. * uv_flush_send_and_wait returns 0 if all cpu's were messaged,
  1035. * or 1 if it gave up and the original cpumask should be returned.
  1036. */
  1037. if (!uv_flush_send_and_wait(flush_mask, bcp, bau_desc))
  1038. return NULL;
  1039. else
  1040. return cpumask;
  1041. }
  1042. /*
  1043. * Search the message queue for any 'other' unprocessed message with the
  1044. * same software acknowledge resource bit vector as the 'msg' message.
  1045. */
  1046. struct bau_pq_entry *find_another_by_swack(struct bau_pq_entry *msg,
  1047. struct bau_control *bcp)
  1048. {
  1049. struct bau_pq_entry *msg_next = msg + 1;
  1050. unsigned char swack_vec = msg->swack_vec;
  1051. if (msg_next > bcp->queue_last)
  1052. msg_next = bcp->queue_first;
  1053. while (msg_next != msg) {
  1054. if ((msg_next->canceled == 0) && (msg_next->replied_to == 0) &&
  1055. (msg_next->swack_vec == swack_vec))
  1056. return msg_next;
  1057. msg_next++;
  1058. if (msg_next > bcp->queue_last)
  1059. msg_next = bcp->queue_first;
  1060. }
  1061. return NULL;
  1062. }
  1063. /*
  1064. * UV2 needs to work around a bug in which an arriving message has not
  1065. * set a bit in the UVH_LB_BAU_INTD_SOFTWARE_ACKNOWLEDGE register.
  1066. * Such a message must be ignored.
  1067. */
  1068. void process_uv2_message(struct msg_desc *mdp, struct bau_control *bcp)
  1069. {
  1070. unsigned long mmr_image;
  1071. unsigned char swack_vec;
  1072. struct bau_pq_entry *msg = mdp->msg;
  1073. struct bau_pq_entry *other_msg;
  1074. mmr_image = read_mmr_sw_ack();
  1075. swack_vec = msg->swack_vec;
  1076. if ((swack_vec & mmr_image) == 0) {
  1077. /*
  1078. * This message was assigned a swack resource, but no
  1079. * reserved acknowlegment is pending.
  1080. * The bug has prevented this message from setting the MMR.
  1081. */
  1082. /*
  1083. * Some message has set the MMR 'pending' bit; it might have
  1084. * been another message. Look for that message.
  1085. */
  1086. other_msg = find_another_by_swack(msg, bcp);
  1087. if (other_msg) {
  1088. /*
  1089. * There is another. Process this one but do not
  1090. * ack it.
  1091. */
  1092. bau_process_message(mdp, bcp, 0);
  1093. /*
  1094. * Let the natural processing of that other message
  1095. * acknowledge it. Don't get the processing of sw_ack's
  1096. * out of order.
  1097. */
  1098. return;
  1099. }
  1100. }
  1101. /*
  1102. * Either the MMR shows this one pending a reply or there is no
  1103. * other message using this sw_ack, so it is safe to acknowledge it.
  1104. */
  1105. bau_process_message(mdp, bcp, 1);
  1106. return;
  1107. }
  1108. /*
  1109. * The BAU message interrupt comes here. (registered by set_intr_gate)
  1110. * See entry_64.S
  1111. *
  1112. * We received a broadcast assist message.
  1113. *
  1114. * Interrupts are disabled; this interrupt could represent
  1115. * the receipt of several messages.
  1116. *
  1117. * All cores/threads on this hub get this interrupt.
  1118. * The last one to see it does the software ack.
  1119. * (the resource will not be freed until noninterruptable cpus see this
  1120. * interrupt; hardware may timeout the s/w ack and reply ERROR)
  1121. */
  1122. void uv_bau_message_interrupt(struct pt_regs *regs)
  1123. {
  1124. int count = 0;
  1125. cycles_t time_start;
  1126. struct bau_pq_entry *msg;
  1127. struct bau_control *bcp;
  1128. struct ptc_stats *stat;
  1129. struct msg_desc msgdesc;
  1130. ack_APIC_irq();
  1131. time_start = get_cycles();
  1132. bcp = &per_cpu(bau_control, smp_processor_id());
  1133. stat = bcp->statp;
  1134. msgdesc.queue_first = bcp->queue_first;
  1135. msgdesc.queue_last = bcp->queue_last;
  1136. msg = bcp->bau_msg_head;
  1137. while (msg->swack_vec) {
  1138. count++;
  1139. msgdesc.msg_slot = msg - msgdesc.queue_first;
  1140. msgdesc.msg = msg;
  1141. if (bcp->uvhub_version == 2)
  1142. process_uv2_message(&msgdesc, bcp);
  1143. else
  1144. /* no error workaround for uv1 or uv3 */
  1145. bau_process_message(&msgdesc, bcp, 1);
  1146. msg++;
  1147. if (msg > msgdesc.queue_last)
  1148. msg = msgdesc.queue_first;
  1149. bcp->bau_msg_head = msg;
  1150. }
  1151. stat->d_time += (get_cycles() - time_start);
  1152. if (!count)
  1153. stat->d_nomsg++;
  1154. else if (count > 1)
  1155. stat->d_multmsg++;
  1156. }
  1157. /*
  1158. * Each target uvhub (i.e. a uvhub that has cpu's) needs to have
  1159. * shootdown message timeouts enabled. The timeout does not cause
  1160. * an interrupt, but causes an error message to be returned to
  1161. * the sender.
  1162. */
  1163. static void __init enable_timeouts(void)
  1164. {
  1165. int uvhub;
  1166. int nuvhubs;
  1167. int pnode;
  1168. unsigned long mmr_image;
  1169. nuvhubs = uv_num_possible_blades();
  1170. for (uvhub = 0; uvhub < nuvhubs; uvhub++) {
  1171. if (!uv_blade_nr_possible_cpus(uvhub))
  1172. continue;
  1173. pnode = uv_blade_to_pnode(uvhub);
  1174. mmr_image = read_mmr_misc_control(pnode);
  1175. /*
  1176. * Set the timeout period and then lock it in, in three
  1177. * steps; captures and locks in the period.
  1178. *
  1179. * To program the period, the SOFT_ACK_MODE must be off.
  1180. */
  1181. mmr_image &= ~(1L << SOFTACK_MSHIFT);
  1182. write_mmr_misc_control(pnode, mmr_image);
  1183. /*
  1184. * Set the 4-bit period.
  1185. */
  1186. mmr_image &= ~((unsigned long)0xf << SOFTACK_PSHIFT);
  1187. mmr_image |= (SOFTACK_TIMEOUT_PERIOD << SOFTACK_PSHIFT);
  1188. write_mmr_misc_control(pnode, mmr_image);
  1189. /*
  1190. * UV1:
  1191. * Subsequent reversals of the timebase bit (3) cause an
  1192. * immediate timeout of one or all INTD resources as
  1193. * indicated in bits 2:0 (7 causes all of them to timeout).
  1194. */
  1195. mmr_image |= (1L << SOFTACK_MSHIFT);
  1196. if (is_uv2_hub()) {
  1197. /* do not touch the legacy mode bit */
  1198. /* hw bug workaround; do not use extended status */
  1199. mmr_image &= ~(1L << UV2_EXT_SHFT);
  1200. } else if (is_uv3_hub()) {
  1201. mmr_image &= ~(1L << PREFETCH_HINT_SHFT);
  1202. mmr_image |= (1L << SB_STATUS_SHFT);
  1203. }
  1204. write_mmr_misc_control(pnode, mmr_image);
  1205. }
  1206. }
  1207. static void *ptc_seq_start(struct seq_file *file, loff_t *offset)
  1208. {
  1209. if (*offset < num_possible_cpus())
  1210. return offset;
  1211. return NULL;
  1212. }
  1213. static void *ptc_seq_next(struct seq_file *file, void *data, loff_t *offset)
  1214. {
  1215. (*offset)++;
  1216. if (*offset < num_possible_cpus())
  1217. return offset;
  1218. return NULL;
  1219. }
  1220. static void ptc_seq_stop(struct seq_file *file, void *data)
  1221. {
  1222. }
  1223. /*
  1224. * Display the statistics thru /proc/sgi_uv/ptc_statistics
  1225. * 'data' points to the cpu number
  1226. * Note: see the descriptions in stat_description[].
  1227. */
  1228. static int ptc_seq_show(struct seq_file *file, void *data)
  1229. {
  1230. struct ptc_stats *stat;
  1231. struct bau_control *bcp;
  1232. int cpu;
  1233. cpu = *(loff_t *)data;
  1234. if (!cpu) {
  1235. seq_puts(file,
  1236. "# cpu bauoff sent stime self locals remotes ncpus localhub ");
  1237. seq_puts(file, "remotehub numuvhubs numuvhubs16 numuvhubs8 ");
  1238. seq_puts(file,
  1239. "numuvhubs4 numuvhubs2 numuvhubs1 dto snacks retries ");
  1240. seq_puts(file,
  1241. "rok resetp resett giveup sto bz throt disable ");
  1242. seq_puts(file,
  1243. "enable wars warshw warwaits enters ipidis plugged ");
  1244. seq_puts(file,
  1245. "ipiover glim cong swack recv rtime all one mult ");
  1246. seq_puts(file, "none retry canc nocan reset rcan\n");
  1247. }
  1248. if (cpu < num_possible_cpus() && cpu_online(cpu)) {
  1249. bcp = &per_cpu(bau_control, cpu);
  1250. if (bcp->nobau) {
  1251. seq_printf(file, "cpu %d bau disabled\n", cpu);
  1252. return 0;
  1253. }
  1254. stat = bcp->statp;
  1255. /* source side statistics */
  1256. seq_printf(file,
  1257. "cpu %d %d %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld ",
  1258. cpu, bcp->nobau, stat->s_requestor,
  1259. cycles_2_us(stat->s_time),
  1260. stat->s_ntargself, stat->s_ntarglocals,
  1261. stat->s_ntargremotes, stat->s_ntargcpu,
  1262. stat->s_ntarglocaluvhub, stat->s_ntargremoteuvhub,
  1263. stat->s_ntarguvhub, stat->s_ntarguvhub16);
  1264. seq_printf(file, "%ld %ld %ld %ld %ld %ld ",
  1265. stat->s_ntarguvhub8, stat->s_ntarguvhub4,
  1266. stat->s_ntarguvhub2, stat->s_ntarguvhub1,
  1267. stat->s_dtimeout, stat->s_strongnacks);
  1268. seq_printf(file, "%ld %ld %ld %ld %ld %ld %ld %ld ",
  1269. stat->s_retry_messages, stat->s_retriesok,
  1270. stat->s_resets_plug, stat->s_resets_timeout,
  1271. stat->s_giveup, stat->s_stimeout,
  1272. stat->s_busy, stat->s_throttles);
  1273. seq_printf(file, "%ld %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld ",
  1274. stat->s_bau_disabled, stat->s_bau_reenabled,
  1275. stat->s_uv2_wars, stat->s_uv2_wars_hw,
  1276. stat->s_uv2_war_waits, stat->s_enters,
  1277. stat->s_ipifordisabled, stat->s_plugged,
  1278. stat->s_overipilimit, stat->s_giveuplimit,
  1279. stat->s_congested);
  1280. /* destination side statistics */
  1281. seq_printf(file,
  1282. "%lx %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld %ld\n",
  1283. read_gmmr_sw_ack(uv_cpu_to_pnode(cpu)),
  1284. stat->d_requestee, cycles_2_us(stat->d_time),
  1285. stat->d_alltlb, stat->d_onetlb, stat->d_multmsg,
  1286. stat->d_nomsg, stat->d_retries, stat->d_canceled,
  1287. stat->d_nocanceled, stat->d_resets,
  1288. stat->d_rcanceled);
  1289. }
  1290. return 0;
  1291. }
  1292. /*
  1293. * Display the tunables thru debugfs
  1294. */
  1295. static ssize_t tunables_read(struct file *file, char __user *userbuf,
  1296. size_t count, loff_t *ppos)
  1297. {
  1298. char *buf;
  1299. int ret;
  1300. buf = kasprintf(GFP_KERNEL, "%s %s %s\n%d %d %d %d %d %d %d %d %d %d\n",
  1301. "max_concur plugged_delay plugsb4reset timeoutsb4reset",
  1302. "ipi_reset_limit complete_threshold congested_response_us",
  1303. "congested_reps disabled_period giveup_limit",
  1304. max_concurr, plugged_delay, plugsb4reset,
  1305. timeoutsb4reset, ipi_reset_limit, complete_threshold,
  1306. congested_respns_us, congested_reps, disabled_period,
  1307. giveup_limit);
  1308. if (!buf)
  1309. return -ENOMEM;
  1310. ret = simple_read_from_buffer(userbuf, count, ppos, buf, strlen(buf));
  1311. kfree(buf);
  1312. return ret;
  1313. }
  1314. /*
  1315. * handle a write to /proc/sgi_uv/ptc_statistics
  1316. * -1: reset the statistics
  1317. * 0: display meaning of the statistics
  1318. */
  1319. static ssize_t ptc_proc_write(struct file *file, const char __user *user,
  1320. size_t count, loff_t *data)
  1321. {
  1322. int cpu;
  1323. int i;
  1324. int elements;
  1325. long input_arg;
  1326. char optstr[64];
  1327. struct ptc_stats *stat;
  1328. if (count == 0 || count > sizeof(optstr))
  1329. return -EINVAL;
  1330. if (copy_from_user(optstr, user, count))
  1331. return -EFAULT;
  1332. optstr[count - 1] = '\0';
  1333. if (!strcmp(optstr, "on")) {
  1334. set_bau_on();
  1335. return count;
  1336. } else if (!strcmp(optstr, "off")) {
  1337. set_bau_off();
  1338. return count;
  1339. }
  1340. if (kstrtol(optstr, 10, &input_arg) < 0) {
  1341. printk(KERN_DEBUG "%s is invalid\n", optstr);
  1342. return -EINVAL;
  1343. }
  1344. if (input_arg == 0) {
  1345. elements = ARRAY_SIZE(stat_description);
  1346. printk(KERN_DEBUG "# cpu: cpu number\n");
  1347. printk(KERN_DEBUG "Sender statistics:\n");
  1348. for (i = 0; i < elements; i++)
  1349. printk(KERN_DEBUG "%s\n", stat_description[i]);
  1350. } else if (input_arg == -1) {
  1351. for_each_present_cpu(cpu) {
  1352. stat = &per_cpu(ptcstats, cpu);
  1353. memset(stat, 0, sizeof(struct ptc_stats));
  1354. }
  1355. }
  1356. return count;
  1357. }
  1358. static int local_atoi(const char *name)
  1359. {
  1360. int val = 0;
  1361. for (;; name++) {
  1362. switch (*name) {
  1363. case '0' ... '9':
  1364. val = 10*val+(*name-'0');
  1365. break;
  1366. default:
  1367. return val;
  1368. }
  1369. }
  1370. }
  1371. /*
  1372. * Parse the values written to /sys/kernel/debug/sgi_uv/bau_tunables.
  1373. * Zero values reset them to defaults.
  1374. */
  1375. static int parse_tunables_write(struct bau_control *bcp, char *instr,
  1376. int count)
  1377. {
  1378. char *p;
  1379. char *q;
  1380. int cnt = 0;
  1381. int val;
  1382. int e = ARRAY_SIZE(tunables);
  1383. p = instr + strspn(instr, WHITESPACE);
  1384. q = p;
  1385. for (; *p; p = q + strspn(q, WHITESPACE)) {
  1386. q = p + strcspn(p, WHITESPACE);
  1387. cnt++;
  1388. if (q == p)
  1389. break;
  1390. }
  1391. if (cnt != e) {
  1392. printk(KERN_INFO "bau tunable error: should be %d values\n", e);
  1393. return -EINVAL;
  1394. }
  1395. p = instr + strspn(instr, WHITESPACE);
  1396. q = p;
  1397. for (cnt = 0; *p; p = q + strspn(q, WHITESPACE), cnt++) {
  1398. q = p + strcspn(p, WHITESPACE);
  1399. val = local_atoi(p);
  1400. switch (cnt) {
  1401. case 0:
  1402. if (val == 0) {
  1403. max_concurr = MAX_BAU_CONCURRENT;
  1404. max_concurr_const = MAX_BAU_CONCURRENT;
  1405. continue;
  1406. }
  1407. if (val < 1 || val > bcp->cpus_in_uvhub) {
  1408. printk(KERN_DEBUG
  1409. "Error: BAU max concurrent %d is invalid\n",
  1410. val);
  1411. return -EINVAL;
  1412. }
  1413. max_concurr = val;
  1414. max_concurr_const = val;
  1415. continue;
  1416. default:
  1417. if (val == 0)
  1418. *tunables[cnt].tunp = tunables[cnt].deflt;
  1419. else
  1420. *tunables[cnt].tunp = val;
  1421. continue;
  1422. }
  1423. if (q == p)
  1424. break;
  1425. }
  1426. return 0;
  1427. }
  1428. /*
  1429. * Handle a write to debugfs. (/sys/kernel/debug/sgi_uv/bau_tunables)
  1430. */
  1431. static ssize_t tunables_write(struct file *file, const char __user *user,
  1432. size_t count, loff_t *data)
  1433. {
  1434. int cpu;
  1435. int ret;
  1436. char instr[100];
  1437. struct bau_control *bcp;
  1438. if (count == 0 || count > sizeof(instr)-1)
  1439. return -EINVAL;
  1440. if (copy_from_user(instr, user, count))
  1441. return -EFAULT;
  1442. instr[count] = '\0';
  1443. cpu = get_cpu();
  1444. bcp = &per_cpu(bau_control, cpu);
  1445. ret = parse_tunables_write(bcp, instr, count);
  1446. put_cpu();
  1447. if (ret)
  1448. return ret;
  1449. for_each_present_cpu(cpu) {
  1450. bcp = &per_cpu(bau_control, cpu);
  1451. bcp->max_concurr = max_concurr;
  1452. bcp->max_concurr_const = max_concurr;
  1453. bcp->plugged_delay = plugged_delay;
  1454. bcp->plugsb4reset = plugsb4reset;
  1455. bcp->timeoutsb4reset = timeoutsb4reset;
  1456. bcp->ipi_reset_limit = ipi_reset_limit;
  1457. bcp->complete_threshold = complete_threshold;
  1458. bcp->cong_response_us = congested_respns_us;
  1459. bcp->cong_reps = congested_reps;
  1460. bcp->disabled_period = sec_2_cycles(disabled_period);
  1461. bcp->giveup_limit = giveup_limit;
  1462. }
  1463. return count;
  1464. }
  1465. static const struct seq_operations uv_ptc_seq_ops = {
  1466. .start = ptc_seq_start,
  1467. .next = ptc_seq_next,
  1468. .stop = ptc_seq_stop,
  1469. .show = ptc_seq_show
  1470. };
  1471. static int ptc_proc_open(struct inode *inode, struct file *file)
  1472. {
  1473. return seq_open(file, &uv_ptc_seq_ops);
  1474. }
  1475. static int tunables_open(struct inode *inode, struct file *file)
  1476. {
  1477. return 0;
  1478. }
  1479. static const struct file_operations proc_uv_ptc_operations = {
  1480. .open = ptc_proc_open,
  1481. .read = seq_read,
  1482. .write = ptc_proc_write,
  1483. .llseek = seq_lseek,
  1484. .release = seq_release,
  1485. };
  1486. static const struct file_operations tunables_fops = {
  1487. .open = tunables_open,
  1488. .read = tunables_read,
  1489. .write = tunables_write,
  1490. .llseek = default_llseek,
  1491. };
  1492. static int __init uv_ptc_init(void)
  1493. {
  1494. struct proc_dir_entry *proc_uv_ptc;
  1495. if (!is_uv_system())
  1496. return 0;
  1497. proc_uv_ptc = proc_create(UV_PTC_BASENAME, 0444, NULL,
  1498. &proc_uv_ptc_operations);
  1499. if (!proc_uv_ptc) {
  1500. printk(KERN_ERR "unable to create %s proc entry\n",
  1501. UV_PTC_BASENAME);
  1502. return -EINVAL;
  1503. }
  1504. tunables_dir = debugfs_create_dir(UV_BAU_TUNABLES_DIR, NULL);
  1505. if (!tunables_dir) {
  1506. printk(KERN_ERR "unable to create debugfs directory %s\n",
  1507. UV_BAU_TUNABLES_DIR);
  1508. return -EINVAL;
  1509. }
  1510. tunables_file = debugfs_create_file(UV_BAU_TUNABLES_FILE, 0600,
  1511. tunables_dir, NULL, &tunables_fops);
  1512. if (!tunables_file) {
  1513. printk(KERN_ERR "unable to create debugfs file %s\n",
  1514. UV_BAU_TUNABLES_FILE);
  1515. return -EINVAL;
  1516. }
  1517. return 0;
  1518. }
  1519. /*
  1520. * Initialize the sending side's sending buffers.
  1521. */
  1522. static void activation_descriptor_init(int node, int pnode, int base_pnode)
  1523. {
  1524. int i;
  1525. int cpu;
  1526. int uv1 = 0;
  1527. unsigned long gpa;
  1528. unsigned long m;
  1529. unsigned long n;
  1530. size_t dsize;
  1531. struct bau_desc *bau_desc;
  1532. struct bau_desc *bd2;
  1533. struct uv1_bau_msg_header *uv1_hdr;
  1534. struct uv2_3_bau_msg_header *uv2_3_hdr;
  1535. struct bau_control *bcp;
  1536. /*
  1537. * each bau_desc is 64 bytes; there are 8 (ITEMS_PER_DESC)
  1538. * per cpu; and one per cpu on the uvhub (ADP_SZ)
  1539. */
  1540. dsize = sizeof(struct bau_desc) * ADP_SZ * ITEMS_PER_DESC;
  1541. bau_desc = kmalloc_node(dsize, GFP_KERNEL, node);
  1542. BUG_ON(!bau_desc);
  1543. gpa = uv_gpa(bau_desc);
  1544. n = uv_gpa_to_gnode(gpa);
  1545. m = uv_gpa_to_offset(gpa);
  1546. if (is_uv1_hub())
  1547. uv1 = 1;
  1548. /* the 14-bit pnode */
  1549. write_mmr_descriptor_base(pnode, (n << UV_DESC_PSHIFT | m));
  1550. /*
  1551. * Initializing all 8 (ITEMS_PER_DESC) descriptors for each
  1552. * cpu even though we only use the first one; one descriptor can
  1553. * describe a broadcast to 256 uv hubs.
  1554. */
  1555. for (i = 0, bd2 = bau_desc; i < (ADP_SZ * ITEMS_PER_DESC); i++, bd2++) {
  1556. memset(bd2, 0, sizeof(struct bau_desc));
  1557. if (uv1) {
  1558. uv1_hdr = &bd2->header.uv1_hdr;
  1559. uv1_hdr->swack_flag = 1;
  1560. /*
  1561. * The base_dest_nasid set in the message header
  1562. * is the nasid of the first uvhub in the partition.
  1563. * The bit map will indicate destination pnode numbers
  1564. * relative to that base. They may not be consecutive
  1565. * if nasid striding is being used.
  1566. */
  1567. uv1_hdr->base_dest_nasid =
  1568. UV_PNODE_TO_NASID(base_pnode);
  1569. uv1_hdr->dest_subnodeid = UV_LB_SUBNODEID;
  1570. uv1_hdr->command = UV_NET_ENDPOINT_INTD;
  1571. uv1_hdr->int_both = 1;
  1572. /*
  1573. * all others need to be set to zero:
  1574. * fairness chaining multilevel count replied_to
  1575. */
  1576. } else {
  1577. /*
  1578. * BIOS uses legacy mode, but uv2 and uv3 hardware always
  1579. * uses native mode for selective broadcasts.
  1580. */
  1581. uv2_3_hdr = &bd2->header.uv2_3_hdr;
  1582. uv2_3_hdr->swack_flag = 1;
  1583. uv2_3_hdr->base_dest_nasid =
  1584. UV_PNODE_TO_NASID(base_pnode);
  1585. uv2_3_hdr->dest_subnodeid = UV_LB_SUBNODEID;
  1586. uv2_3_hdr->command = UV_NET_ENDPOINT_INTD;
  1587. }
  1588. }
  1589. for_each_present_cpu(cpu) {
  1590. if (pnode != uv_blade_to_pnode(uv_cpu_to_blade_id(cpu)))
  1591. continue;
  1592. bcp = &per_cpu(bau_control, cpu);
  1593. bcp->descriptor_base = bau_desc;
  1594. }
  1595. }
  1596. /*
  1597. * initialize the destination side's receiving buffers
  1598. * entered for each uvhub in the partition
  1599. * - node is first node (kernel memory notion) on the uvhub
  1600. * - pnode is the uvhub's physical identifier
  1601. */
  1602. static void pq_init(int node, int pnode)
  1603. {
  1604. int cpu;
  1605. size_t plsize;
  1606. char *cp;
  1607. void *vp;
  1608. unsigned long pn;
  1609. unsigned long first;
  1610. unsigned long pn_first;
  1611. unsigned long last;
  1612. struct bau_pq_entry *pqp;
  1613. struct bau_control *bcp;
  1614. plsize = (DEST_Q_SIZE + 1) * sizeof(struct bau_pq_entry);
  1615. vp = kmalloc_node(plsize, GFP_KERNEL, node);
  1616. pqp = (struct bau_pq_entry *)vp;
  1617. BUG_ON(!pqp);
  1618. cp = (char *)pqp + 31;
  1619. pqp = (struct bau_pq_entry *)(((unsigned long)cp >> 5) << 5);
  1620. for_each_present_cpu(cpu) {
  1621. if (pnode != uv_cpu_to_pnode(cpu))
  1622. continue;
  1623. /* for every cpu on this pnode: */
  1624. bcp = &per_cpu(bau_control, cpu);
  1625. bcp->queue_first = pqp;
  1626. bcp->bau_msg_head = pqp;
  1627. bcp->queue_last = pqp + (DEST_Q_SIZE - 1);
  1628. }
  1629. /*
  1630. * need the gnode of where the memory was really allocated
  1631. */
  1632. pn = uv_gpa_to_gnode(uv_gpa(pqp));
  1633. first = uv_physnodeaddr(pqp);
  1634. pn_first = ((unsigned long)pn << UV_PAYLOADQ_PNODE_SHIFT) | first;
  1635. last = uv_physnodeaddr(pqp + (DEST_Q_SIZE - 1));
  1636. write_mmr_payload_first(pnode, pn_first);
  1637. write_mmr_payload_tail(pnode, first);
  1638. write_mmr_payload_last(pnode, last);
  1639. write_gmmr_sw_ack(pnode, 0xffffUL);
  1640. /* in effect, all msg_type's are set to MSG_NOOP */
  1641. memset(pqp, 0, sizeof(struct bau_pq_entry) * DEST_Q_SIZE);
  1642. }
  1643. /*
  1644. * Initialization of each UV hub's structures
  1645. */
  1646. static void __init init_uvhub(int uvhub, int vector, int base_pnode)
  1647. {
  1648. int node;
  1649. int pnode;
  1650. unsigned long apicid;
  1651. node = uvhub_to_first_node(uvhub);
  1652. pnode = uv_blade_to_pnode(uvhub);
  1653. activation_descriptor_init(node, pnode, base_pnode);
  1654. pq_init(node, pnode);
  1655. /*
  1656. * The below initialization can't be in firmware because the
  1657. * messaging IRQ will be determined by the OS.
  1658. */
  1659. apicid = uvhub_to_first_apicid(uvhub) | uv_apicid_hibits;
  1660. write_mmr_data_config(pnode, ((apicid << 32) | vector));
  1661. }
  1662. /*
  1663. * We will set BAU_MISC_CONTROL with a timeout period.
  1664. * But the BIOS has set UVH_AGING_PRESCALE_SEL and UVH_TRANSACTION_TIMEOUT.
  1665. * So the destination timeout period has to be calculated from them.
  1666. */
  1667. static int calculate_destination_timeout(void)
  1668. {
  1669. unsigned long mmr_image;
  1670. int mult1;
  1671. int mult2;
  1672. int index;
  1673. int base;
  1674. int ret;
  1675. unsigned long ts_ns;
  1676. if (is_uv1_hub()) {
  1677. mult1 = SOFTACK_TIMEOUT_PERIOD & BAU_MISC_CONTROL_MULT_MASK;
  1678. mmr_image = uv_read_local_mmr(UVH_AGING_PRESCALE_SEL);
  1679. index = (mmr_image >> BAU_URGENCY_7_SHIFT) & BAU_URGENCY_7_MASK;
  1680. mmr_image = uv_read_local_mmr(UVH_TRANSACTION_TIMEOUT);
  1681. mult2 = (mmr_image >> BAU_TRANS_SHIFT) & BAU_TRANS_MASK;
  1682. ts_ns = timeout_base_ns[index];
  1683. ts_ns *= (mult1 * mult2);
  1684. ret = ts_ns / 1000;
  1685. } else {
  1686. /* same destination timeout for uv2 and uv3 */
  1687. /* 4 bits 0/1 for 10/80us base, 3 bits of multiplier */
  1688. mmr_image = uv_read_local_mmr(UVH_LB_BAU_MISC_CONTROL);
  1689. mmr_image = (mmr_image & UV_SA_MASK) >> UV_SA_SHFT;
  1690. if (mmr_image & (1L << UV2_ACK_UNITS_SHFT))
  1691. base = 80;
  1692. else
  1693. base = 10;
  1694. mult1 = mmr_image & UV2_ACK_MASK;
  1695. ret = mult1 * base;
  1696. }
  1697. return ret;
  1698. }
  1699. static void __init init_per_cpu_tunables(void)
  1700. {
  1701. int cpu;
  1702. struct bau_control *bcp;
  1703. for_each_present_cpu(cpu) {
  1704. bcp = &per_cpu(bau_control, cpu);
  1705. bcp->baudisabled = 0;
  1706. if (nobau)
  1707. bcp->nobau = true;
  1708. bcp->statp = &per_cpu(ptcstats, cpu);
  1709. /* time interval to catch a hardware stay-busy bug */
  1710. bcp->timeout_interval = usec_2_cycles(2*timeout_us);
  1711. bcp->max_concurr = max_concurr;
  1712. bcp->max_concurr_const = max_concurr;
  1713. bcp->plugged_delay = plugged_delay;
  1714. bcp->plugsb4reset = plugsb4reset;
  1715. bcp->timeoutsb4reset = timeoutsb4reset;
  1716. bcp->ipi_reset_limit = ipi_reset_limit;
  1717. bcp->complete_threshold = complete_threshold;
  1718. bcp->cong_response_us = congested_respns_us;
  1719. bcp->cong_reps = congested_reps;
  1720. bcp->disabled_period = sec_2_cycles(disabled_period);
  1721. bcp->giveup_limit = giveup_limit;
  1722. spin_lock_init(&bcp->queue_lock);
  1723. spin_lock_init(&bcp->uvhub_lock);
  1724. spin_lock_init(&bcp->disable_lock);
  1725. }
  1726. }
  1727. /*
  1728. * Scan all cpus to collect blade and socket summaries.
  1729. */
  1730. static int __init get_cpu_topology(int base_pnode,
  1731. struct uvhub_desc *uvhub_descs,
  1732. unsigned char *uvhub_mask)
  1733. {
  1734. int cpu;
  1735. int pnode;
  1736. int uvhub;
  1737. int socket;
  1738. struct bau_control *bcp;
  1739. struct uvhub_desc *bdp;
  1740. struct socket_desc *sdp;
  1741. for_each_present_cpu(cpu) {
  1742. bcp = &per_cpu(bau_control, cpu);
  1743. memset(bcp, 0, sizeof(struct bau_control));
  1744. pnode = uv_cpu_hub_info(cpu)->pnode;
  1745. if ((pnode - base_pnode) >= UV_DISTRIBUTION_SIZE) {
  1746. printk(KERN_EMERG
  1747. "cpu %d pnode %d-%d beyond %d; BAU disabled\n",
  1748. cpu, pnode, base_pnode, UV_DISTRIBUTION_SIZE);
  1749. return 1;
  1750. }
  1751. bcp->osnode = cpu_to_node(cpu);
  1752. bcp->partition_base_pnode = base_pnode;
  1753. uvhub = uv_cpu_hub_info(cpu)->numa_blade_id;
  1754. *(uvhub_mask + (uvhub/8)) |= (1 << (uvhub%8));
  1755. bdp = &uvhub_descs[uvhub];
  1756. bdp->num_cpus++;
  1757. bdp->uvhub = uvhub;
  1758. bdp->pnode = pnode;
  1759. /* kludge: 'assuming' one node per socket, and assuming that
  1760. disabling a socket just leaves a gap in node numbers */
  1761. socket = bcp->osnode & 1;
  1762. bdp->socket_mask |= (1 << socket);
  1763. sdp = &bdp->socket[socket];
  1764. sdp->cpu_number[sdp->num_cpus] = cpu;
  1765. sdp->num_cpus++;
  1766. if (sdp->num_cpus > MAX_CPUS_PER_SOCKET) {
  1767. printk(KERN_EMERG "%d cpus per socket invalid\n",
  1768. sdp->num_cpus);
  1769. return 1;
  1770. }
  1771. }
  1772. return 0;
  1773. }
  1774. /*
  1775. * Each socket is to get a local array of pnodes/hubs.
  1776. */
  1777. static void make_per_cpu_thp(struct bau_control *smaster)
  1778. {
  1779. int cpu;
  1780. size_t hpsz = sizeof(struct hub_and_pnode) * num_possible_cpus();
  1781. smaster->thp = kmalloc_node(hpsz, GFP_KERNEL, smaster->osnode);
  1782. memset(smaster->thp, 0, hpsz);
  1783. for_each_present_cpu(cpu) {
  1784. smaster->thp[cpu].pnode = uv_cpu_hub_info(cpu)->pnode;
  1785. smaster->thp[cpu].uvhub = uv_cpu_hub_info(cpu)->numa_blade_id;
  1786. }
  1787. }
  1788. /*
  1789. * Each uvhub is to get a local cpumask.
  1790. */
  1791. static void make_per_hub_cpumask(struct bau_control *hmaster)
  1792. {
  1793. int sz = sizeof(cpumask_t);
  1794. hmaster->cpumask = kzalloc_node(sz, GFP_KERNEL, hmaster->osnode);
  1795. }
  1796. /*
  1797. * Initialize all the per_cpu information for the cpu's on a given socket,
  1798. * given what has been gathered into the socket_desc struct.
  1799. * And reports the chosen hub and socket masters back to the caller.
  1800. */
  1801. static int scan_sock(struct socket_desc *sdp, struct uvhub_desc *bdp,
  1802. struct bau_control **smasterp,
  1803. struct bau_control **hmasterp)
  1804. {
  1805. int i;
  1806. int cpu;
  1807. struct bau_control *bcp;
  1808. for (i = 0; i < sdp->num_cpus; i++) {
  1809. cpu = sdp->cpu_number[i];
  1810. bcp = &per_cpu(bau_control, cpu);
  1811. bcp->cpu = cpu;
  1812. if (i == 0) {
  1813. *smasterp = bcp;
  1814. if (!(*hmasterp))
  1815. *hmasterp = bcp;
  1816. }
  1817. bcp->cpus_in_uvhub = bdp->num_cpus;
  1818. bcp->cpus_in_socket = sdp->num_cpus;
  1819. bcp->socket_master = *smasterp;
  1820. bcp->uvhub = bdp->uvhub;
  1821. if (is_uv1_hub())
  1822. bcp->uvhub_version = 1;
  1823. else if (is_uv2_hub())
  1824. bcp->uvhub_version = 2;
  1825. else if (is_uv3_hub())
  1826. bcp->uvhub_version = 3;
  1827. else {
  1828. printk(KERN_EMERG "uvhub version not 1, 2 or 3\n");
  1829. return 1;
  1830. }
  1831. bcp->uvhub_master = *hmasterp;
  1832. bcp->uvhub_cpu = uv_cpu_blade_processor_id(cpu);
  1833. if (bcp->uvhub_cpu >= MAX_CPUS_PER_UVHUB) {
  1834. printk(KERN_EMERG "%d cpus per uvhub invalid\n",
  1835. bcp->uvhub_cpu);
  1836. return 1;
  1837. }
  1838. }
  1839. return 0;
  1840. }
  1841. /*
  1842. * Summarize the blade and socket topology into the per_cpu structures.
  1843. */
  1844. static int __init summarize_uvhub_sockets(int nuvhubs,
  1845. struct uvhub_desc *uvhub_descs,
  1846. unsigned char *uvhub_mask)
  1847. {
  1848. int socket;
  1849. int uvhub;
  1850. unsigned short socket_mask;
  1851. for (uvhub = 0; uvhub < nuvhubs; uvhub++) {
  1852. struct uvhub_desc *bdp;
  1853. struct bau_control *smaster = NULL;
  1854. struct bau_control *hmaster = NULL;
  1855. if (!(*(uvhub_mask + (uvhub/8)) & (1 << (uvhub%8))))
  1856. continue;
  1857. bdp = &uvhub_descs[uvhub];
  1858. socket_mask = bdp->socket_mask;
  1859. socket = 0;
  1860. while (socket_mask) {
  1861. struct socket_desc *sdp;
  1862. if ((socket_mask & 1)) {
  1863. sdp = &bdp->socket[socket];
  1864. if (scan_sock(sdp, bdp, &smaster, &hmaster))
  1865. return 1;
  1866. make_per_cpu_thp(smaster);
  1867. }
  1868. socket++;
  1869. socket_mask = (socket_mask >> 1);
  1870. }
  1871. make_per_hub_cpumask(hmaster);
  1872. }
  1873. return 0;
  1874. }
  1875. /*
  1876. * initialize the bau_control structure for each cpu
  1877. */
  1878. static int __init init_per_cpu(int nuvhubs, int base_part_pnode)
  1879. {
  1880. unsigned char *uvhub_mask;
  1881. void *vp;
  1882. struct uvhub_desc *uvhub_descs;
  1883. timeout_us = calculate_destination_timeout();
  1884. vp = kmalloc(nuvhubs * sizeof(struct uvhub_desc), GFP_KERNEL);
  1885. uvhub_descs = (struct uvhub_desc *)vp;
  1886. memset(uvhub_descs, 0, nuvhubs * sizeof(struct uvhub_desc));
  1887. uvhub_mask = kzalloc((nuvhubs+7)/8, GFP_KERNEL);
  1888. if (get_cpu_topology(base_part_pnode, uvhub_descs, uvhub_mask))
  1889. goto fail;
  1890. if (summarize_uvhub_sockets(nuvhubs, uvhub_descs, uvhub_mask))
  1891. goto fail;
  1892. kfree(uvhub_descs);
  1893. kfree(uvhub_mask);
  1894. init_per_cpu_tunables();
  1895. return 0;
  1896. fail:
  1897. kfree(uvhub_descs);
  1898. kfree(uvhub_mask);
  1899. return 1;
  1900. }
  1901. /*
  1902. * Initialization of BAU-related structures
  1903. */
  1904. static int __init uv_bau_init(void)
  1905. {
  1906. int uvhub;
  1907. int pnode;
  1908. int nuvhubs;
  1909. int cur_cpu;
  1910. int cpus;
  1911. int vector;
  1912. cpumask_var_t *mask;
  1913. if (!is_uv_system())
  1914. return 0;
  1915. for_each_possible_cpu(cur_cpu) {
  1916. mask = &per_cpu(uv_flush_tlb_mask, cur_cpu);
  1917. zalloc_cpumask_var_node(mask, GFP_KERNEL, cpu_to_node(cur_cpu));
  1918. }
  1919. nuvhubs = uv_num_possible_blades();
  1920. congested_cycles = usec_2_cycles(congested_respns_us);
  1921. uv_base_pnode = 0x7fffffff;
  1922. for (uvhub = 0; uvhub < nuvhubs; uvhub++) {
  1923. cpus = uv_blade_nr_possible_cpus(uvhub);
  1924. if (cpus && (uv_blade_to_pnode(uvhub) < uv_base_pnode))
  1925. uv_base_pnode = uv_blade_to_pnode(uvhub);
  1926. }
  1927. enable_timeouts();
  1928. if (init_per_cpu(nuvhubs, uv_base_pnode)) {
  1929. set_bau_off();
  1930. nobau_perm = 1;
  1931. return 0;
  1932. }
  1933. vector = UV_BAU_MESSAGE;
  1934. for_each_possible_blade(uvhub) {
  1935. if (uv_blade_nr_possible_cpus(uvhub))
  1936. init_uvhub(uvhub, vector, uv_base_pnode);
  1937. }
  1938. alloc_intr_gate(vector, uv_bau_message_intr1);
  1939. for_each_possible_blade(uvhub) {
  1940. if (uv_blade_nr_possible_cpus(uvhub)) {
  1941. unsigned long val;
  1942. unsigned long mmr;
  1943. pnode = uv_blade_to_pnode(uvhub);
  1944. /* INIT the bau */
  1945. val = 1L << 63;
  1946. write_gmmr_activation(pnode, val);
  1947. mmr = 1; /* should be 1 to broadcast to both sockets */
  1948. if (!is_uv1_hub())
  1949. write_mmr_data_broadcast(pnode, mmr);
  1950. }
  1951. }
  1952. return 0;
  1953. }
  1954. core_initcall(uv_bau_init);
  1955. fs_initcall(uv_ptc_init);