init_64.c 32 KB

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  1. /*
  2. * linux/arch/x86_64/mm/init.c
  3. *
  4. * Copyright (C) 1995 Linus Torvalds
  5. * Copyright (C) 2000 Pavel Machek <pavel@ucw.cz>
  6. * Copyright (C) 2002,2003 Andi Kleen <ak@suse.de>
  7. */
  8. #include <linux/signal.h>
  9. #include <linux/sched.h>
  10. #include <linux/kernel.h>
  11. #include <linux/errno.h>
  12. #include <linux/string.h>
  13. #include <linux/types.h>
  14. #include <linux/ptrace.h>
  15. #include <linux/mman.h>
  16. #include <linux/mm.h>
  17. #include <linux/swap.h>
  18. #include <linux/smp.h>
  19. #include <linux/init.h>
  20. #include <linux/initrd.h>
  21. #include <linux/pagemap.h>
  22. #include <linux/bootmem.h>
  23. #include <linux/memblock.h>
  24. #include <linux/proc_fs.h>
  25. #include <linux/pci.h>
  26. #include <linux/pfn.h>
  27. #include <linux/poison.h>
  28. #include <linux/dma-mapping.h>
  29. #include <linux/memory.h>
  30. #include <linux/memory_hotplug.h>
  31. #include <linux/memremap.h>
  32. #include <linux/nmi.h>
  33. #include <linux/gfp.h>
  34. #include <linux/kcore.h>
  35. #include <asm/processor.h>
  36. #include <asm/bios_ebda.h>
  37. #include <asm/uaccess.h>
  38. #include <asm/pgtable.h>
  39. #include <asm/pgalloc.h>
  40. #include <asm/dma.h>
  41. #include <asm/fixmap.h>
  42. #include <asm/e820.h>
  43. #include <asm/apic.h>
  44. #include <asm/tlb.h>
  45. #include <asm/mmu_context.h>
  46. #include <asm/proto.h>
  47. #include <asm/smp.h>
  48. #include <asm/sections.h>
  49. #include <asm/kdebug.h>
  50. #include <asm/numa.h>
  51. #include <asm/cacheflush.h>
  52. #include <asm/init.h>
  53. #include <asm/uv/uv.h>
  54. #include <asm/setup.h>
  55. #include "mm_internal.h"
  56. #include "ident_map.c"
  57. /*
  58. * NOTE: pagetable_init alloc all the fixmap pagetables contiguous on the
  59. * physical space so we can cache the place of the first one and move
  60. * around without checking the pgd every time.
  61. */
  62. pteval_t __supported_pte_mask __read_mostly = ~0;
  63. EXPORT_SYMBOL_GPL(__supported_pte_mask);
  64. int force_personality32;
  65. /*
  66. * noexec32=on|off
  67. * Control non executable heap for 32bit processes.
  68. * To control the stack too use noexec=off
  69. *
  70. * on PROT_READ does not imply PROT_EXEC for 32-bit processes (default)
  71. * off PROT_READ implies PROT_EXEC
  72. */
  73. static int __init nonx32_setup(char *str)
  74. {
  75. if (!strcmp(str, "on"))
  76. force_personality32 &= ~READ_IMPLIES_EXEC;
  77. else if (!strcmp(str, "off"))
  78. force_personality32 |= READ_IMPLIES_EXEC;
  79. return 1;
  80. }
  81. __setup("noexec32=", nonx32_setup);
  82. /*
  83. * When memory was added/removed make sure all the processes MM have
  84. * suitable PGD entries in the local PGD level page.
  85. */
  86. void sync_global_pgds(unsigned long start, unsigned long end, int removed)
  87. {
  88. unsigned long address;
  89. for (address = start; address <= end; address += PGDIR_SIZE) {
  90. const pgd_t *pgd_ref = pgd_offset_k(address);
  91. struct page *page;
  92. /*
  93. * When it is called after memory hot remove, pgd_none()
  94. * returns true. In this case (removed == 1), we must clear
  95. * the PGD entries in the local PGD level page.
  96. */
  97. if (pgd_none(*pgd_ref) && !removed)
  98. continue;
  99. spin_lock(&pgd_lock);
  100. list_for_each_entry(page, &pgd_list, lru) {
  101. pgd_t *pgd;
  102. spinlock_t *pgt_lock;
  103. pgd = (pgd_t *)page_address(page) + pgd_index(address);
  104. /* the pgt_lock only for Xen */
  105. pgt_lock = &pgd_page_get_mm(page)->page_table_lock;
  106. spin_lock(pgt_lock);
  107. if (!pgd_none(*pgd_ref) && !pgd_none(*pgd))
  108. BUG_ON(pgd_page_vaddr(*pgd)
  109. != pgd_page_vaddr(*pgd_ref));
  110. if (removed) {
  111. if (pgd_none(*pgd_ref) && !pgd_none(*pgd))
  112. pgd_clear(pgd);
  113. } else {
  114. if (pgd_none(*pgd))
  115. set_pgd(pgd, *pgd_ref);
  116. }
  117. spin_unlock(pgt_lock);
  118. }
  119. spin_unlock(&pgd_lock);
  120. }
  121. }
  122. /*
  123. * NOTE: This function is marked __ref because it calls __init function
  124. * (alloc_bootmem_pages). It's safe to do it ONLY when after_bootmem == 0.
  125. */
  126. static __ref void *spp_getpage(void)
  127. {
  128. void *ptr;
  129. if (after_bootmem)
  130. ptr = (void *) get_zeroed_page(GFP_ATOMIC | __GFP_NOTRACK);
  131. else
  132. ptr = alloc_bootmem_pages(PAGE_SIZE);
  133. if (!ptr || ((unsigned long)ptr & ~PAGE_MASK)) {
  134. panic("set_pte_phys: cannot allocate page data %s\n",
  135. after_bootmem ? "after bootmem" : "");
  136. }
  137. pr_debug("spp_getpage %p\n", ptr);
  138. return ptr;
  139. }
  140. static pud_t *fill_pud(pgd_t *pgd, unsigned long vaddr)
  141. {
  142. if (pgd_none(*pgd)) {
  143. pud_t *pud = (pud_t *)spp_getpage();
  144. pgd_populate(&init_mm, pgd, pud);
  145. if (pud != pud_offset(pgd, 0))
  146. printk(KERN_ERR "PAGETABLE BUG #00! %p <-> %p\n",
  147. pud, pud_offset(pgd, 0));
  148. }
  149. return pud_offset(pgd, vaddr);
  150. }
  151. static pmd_t *fill_pmd(pud_t *pud, unsigned long vaddr)
  152. {
  153. if (pud_none(*pud)) {
  154. pmd_t *pmd = (pmd_t *) spp_getpage();
  155. pud_populate(&init_mm, pud, pmd);
  156. if (pmd != pmd_offset(pud, 0))
  157. printk(KERN_ERR "PAGETABLE BUG #01! %p <-> %p\n",
  158. pmd, pmd_offset(pud, 0));
  159. }
  160. return pmd_offset(pud, vaddr);
  161. }
  162. static pte_t *fill_pte(pmd_t *pmd, unsigned long vaddr)
  163. {
  164. if (pmd_none(*pmd)) {
  165. pte_t *pte = (pte_t *) spp_getpage();
  166. pmd_populate_kernel(&init_mm, pmd, pte);
  167. if (pte != pte_offset_kernel(pmd, 0))
  168. printk(KERN_ERR "PAGETABLE BUG #02!\n");
  169. }
  170. return pte_offset_kernel(pmd, vaddr);
  171. }
  172. void set_pte_vaddr_pud(pud_t *pud_page, unsigned long vaddr, pte_t new_pte)
  173. {
  174. pud_t *pud;
  175. pmd_t *pmd;
  176. pte_t *pte;
  177. pud = pud_page + pud_index(vaddr);
  178. pmd = fill_pmd(pud, vaddr);
  179. pte = fill_pte(pmd, vaddr);
  180. set_pte(pte, new_pte);
  181. /*
  182. * It's enough to flush this one mapping.
  183. * (PGE mappings get flushed as well)
  184. */
  185. __flush_tlb_one(vaddr);
  186. }
  187. void set_pte_vaddr(unsigned long vaddr, pte_t pteval)
  188. {
  189. pgd_t *pgd;
  190. pud_t *pud_page;
  191. pr_debug("set_pte_vaddr %lx to %lx\n", vaddr, native_pte_val(pteval));
  192. pgd = pgd_offset_k(vaddr);
  193. if (pgd_none(*pgd)) {
  194. printk(KERN_ERR
  195. "PGD FIXMAP MISSING, it should be setup in head.S!\n");
  196. return;
  197. }
  198. pud_page = (pud_t*)pgd_page_vaddr(*pgd);
  199. set_pte_vaddr_pud(pud_page, vaddr, pteval);
  200. }
  201. pmd_t * __init populate_extra_pmd(unsigned long vaddr)
  202. {
  203. pgd_t *pgd;
  204. pud_t *pud;
  205. pgd = pgd_offset_k(vaddr);
  206. pud = fill_pud(pgd, vaddr);
  207. return fill_pmd(pud, vaddr);
  208. }
  209. pte_t * __init populate_extra_pte(unsigned long vaddr)
  210. {
  211. pmd_t *pmd;
  212. pmd = populate_extra_pmd(vaddr);
  213. return fill_pte(pmd, vaddr);
  214. }
  215. /*
  216. * Create large page table mappings for a range of physical addresses.
  217. */
  218. static void __init __init_extra_mapping(unsigned long phys, unsigned long size,
  219. enum page_cache_mode cache)
  220. {
  221. pgd_t *pgd;
  222. pud_t *pud;
  223. pmd_t *pmd;
  224. pgprot_t prot;
  225. pgprot_val(prot) = pgprot_val(PAGE_KERNEL_LARGE) |
  226. pgprot_val(pgprot_4k_2_large(cachemode2pgprot(cache)));
  227. BUG_ON((phys & ~PMD_MASK) || (size & ~PMD_MASK));
  228. for (; size; phys += PMD_SIZE, size -= PMD_SIZE) {
  229. pgd = pgd_offset_k((unsigned long)__va(phys));
  230. if (pgd_none(*pgd)) {
  231. pud = (pud_t *) spp_getpage();
  232. set_pgd(pgd, __pgd(__pa(pud) | _KERNPG_TABLE |
  233. _PAGE_USER));
  234. }
  235. pud = pud_offset(pgd, (unsigned long)__va(phys));
  236. if (pud_none(*pud)) {
  237. pmd = (pmd_t *) spp_getpage();
  238. set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE |
  239. _PAGE_USER));
  240. }
  241. pmd = pmd_offset(pud, phys);
  242. BUG_ON(!pmd_none(*pmd));
  243. set_pmd(pmd, __pmd(phys | pgprot_val(prot)));
  244. }
  245. }
  246. void __init init_extra_mapping_wb(unsigned long phys, unsigned long size)
  247. {
  248. __init_extra_mapping(phys, size, _PAGE_CACHE_MODE_WB);
  249. }
  250. void __init init_extra_mapping_uc(unsigned long phys, unsigned long size)
  251. {
  252. __init_extra_mapping(phys, size, _PAGE_CACHE_MODE_UC);
  253. }
  254. /*
  255. * The head.S code sets up the kernel high mapping:
  256. *
  257. * from __START_KERNEL_map to __START_KERNEL_map + size (== _end-_text)
  258. *
  259. * phys_base holds the negative offset to the kernel, which is added
  260. * to the compile time generated pmds. This results in invalid pmds up
  261. * to the point where we hit the physaddr 0 mapping.
  262. *
  263. * We limit the mappings to the region from _text to _brk_end. _brk_end
  264. * is rounded up to the 2MB boundary. This catches the invalid pmds as
  265. * well, as they are located before _text:
  266. */
  267. void __init cleanup_highmap(void)
  268. {
  269. unsigned long vaddr = __START_KERNEL_map;
  270. unsigned long vaddr_end = __START_KERNEL_map + KERNEL_IMAGE_SIZE;
  271. unsigned long end = roundup((unsigned long)_brk_end, PMD_SIZE) - 1;
  272. pmd_t *pmd = level2_kernel_pgt;
  273. /*
  274. * Native path, max_pfn_mapped is not set yet.
  275. * Xen has valid max_pfn_mapped set in
  276. * arch/x86/xen/mmu.c:xen_setup_kernel_pagetable().
  277. */
  278. if (max_pfn_mapped)
  279. vaddr_end = __START_KERNEL_map + (max_pfn_mapped << PAGE_SHIFT);
  280. for (; vaddr + PMD_SIZE - 1 < vaddr_end; pmd++, vaddr += PMD_SIZE) {
  281. if (pmd_none(*pmd))
  282. continue;
  283. if (vaddr < (unsigned long) _text || vaddr > end)
  284. set_pmd(pmd, __pmd(0));
  285. }
  286. }
  287. /*
  288. * Create PTE level page table mapping for physical addresses.
  289. * It returns the last physical address mapped.
  290. */
  291. static unsigned long __meminit
  292. phys_pte_init(pte_t *pte_page, unsigned long paddr, unsigned long paddr_end,
  293. pgprot_t prot)
  294. {
  295. unsigned long pages = 0, paddr_next;
  296. unsigned long paddr_last = paddr_end;
  297. pte_t *pte;
  298. int i;
  299. pte = pte_page + pte_index(paddr);
  300. i = pte_index(paddr);
  301. for (; i < PTRS_PER_PTE; i++, paddr = paddr_next, pte++) {
  302. paddr_next = (paddr & PAGE_MASK) + PAGE_SIZE;
  303. if (paddr >= paddr_end) {
  304. if (!after_bootmem &&
  305. !e820_any_mapped(paddr & PAGE_MASK, paddr_next,
  306. E820_RAM) &&
  307. !e820_any_mapped(paddr & PAGE_MASK, paddr_next,
  308. E820_RESERVED_KERN))
  309. set_pte(pte, __pte(0));
  310. continue;
  311. }
  312. /*
  313. * We will re-use the existing mapping.
  314. * Xen for example has some special requirements, like mapping
  315. * pagetable pages as RO. So assume someone who pre-setup
  316. * these mappings are more intelligent.
  317. */
  318. if (!pte_none(*pte)) {
  319. if (!after_bootmem)
  320. pages++;
  321. continue;
  322. }
  323. if (0)
  324. pr_info(" pte=%p addr=%lx pte=%016lx\n", pte, paddr,
  325. pfn_pte(paddr >> PAGE_SHIFT, PAGE_KERNEL).pte);
  326. pages++;
  327. set_pte(pte, pfn_pte(paddr >> PAGE_SHIFT, prot));
  328. paddr_last = (paddr & PAGE_MASK) + PAGE_SIZE;
  329. }
  330. update_page_count(PG_LEVEL_4K, pages);
  331. return paddr_last;
  332. }
  333. /*
  334. * Create PMD level page table mapping for physical addresses. The virtual
  335. * and physical address have to be aligned at this level.
  336. * It returns the last physical address mapped.
  337. */
  338. static unsigned long __meminit
  339. phys_pmd_init(pmd_t *pmd_page, unsigned long paddr, unsigned long paddr_end,
  340. unsigned long page_size_mask, pgprot_t prot)
  341. {
  342. unsigned long pages = 0, paddr_next;
  343. unsigned long paddr_last = paddr_end;
  344. int i = pmd_index(paddr);
  345. for (; i < PTRS_PER_PMD; i++, paddr = paddr_next) {
  346. pmd_t *pmd = pmd_page + pmd_index(paddr);
  347. pte_t *pte;
  348. pgprot_t new_prot = prot;
  349. paddr_next = (paddr & PMD_MASK) + PMD_SIZE;
  350. if (paddr >= paddr_end) {
  351. if (!after_bootmem &&
  352. !e820_any_mapped(paddr & PMD_MASK, paddr_next,
  353. E820_RAM) &&
  354. !e820_any_mapped(paddr & PMD_MASK, paddr_next,
  355. E820_RESERVED_KERN))
  356. set_pmd(pmd, __pmd(0));
  357. continue;
  358. }
  359. if (!pmd_none(*pmd)) {
  360. if (!pmd_large(*pmd)) {
  361. spin_lock(&init_mm.page_table_lock);
  362. pte = (pte_t *)pmd_page_vaddr(*pmd);
  363. paddr_last = phys_pte_init(pte, paddr,
  364. paddr_end, prot);
  365. spin_unlock(&init_mm.page_table_lock);
  366. continue;
  367. }
  368. /*
  369. * If we are ok with PG_LEVEL_2M mapping, then we will
  370. * use the existing mapping,
  371. *
  372. * Otherwise, we will split the large page mapping but
  373. * use the same existing protection bits except for
  374. * large page, so that we don't violate Intel's TLB
  375. * Application note (317080) which says, while changing
  376. * the page sizes, new and old translations should
  377. * not differ with respect to page frame and
  378. * attributes.
  379. */
  380. if (page_size_mask & (1 << PG_LEVEL_2M)) {
  381. if (!after_bootmem)
  382. pages++;
  383. paddr_last = paddr_next;
  384. continue;
  385. }
  386. new_prot = pte_pgprot(pte_clrhuge(*(pte_t *)pmd));
  387. }
  388. if (page_size_mask & (1<<PG_LEVEL_2M)) {
  389. pages++;
  390. spin_lock(&init_mm.page_table_lock);
  391. set_pte((pte_t *)pmd,
  392. pfn_pte((paddr & PMD_MASK) >> PAGE_SHIFT,
  393. __pgprot(pgprot_val(prot) | _PAGE_PSE)));
  394. spin_unlock(&init_mm.page_table_lock);
  395. paddr_last = paddr_next;
  396. continue;
  397. }
  398. pte = alloc_low_page();
  399. paddr_last = phys_pte_init(pte, paddr, paddr_end, new_prot);
  400. spin_lock(&init_mm.page_table_lock);
  401. pmd_populate_kernel(&init_mm, pmd, pte);
  402. spin_unlock(&init_mm.page_table_lock);
  403. }
  404. update_page_count(PG_LEVEL_2M, pages);
  405. return paddr_last;
  406. }
  407. /*
  408. * Create PUD level page table mapping for physical addresses. The virtual
  409. * and physical address do not have to be aligned at this level. KASLR can
  410. * randomize virtual addresses up to this level.
  411. * It returns the last physical address mapped.
  412. */
  413. static unsigned long __meminit
  414. phys_pud_init(pud_t *pud_page, unsigned long paddr, unsigned long paddr_end,
  415. unsigned long page_size_mask)
  416. {
  417. unsigned long pages = 0, paddr_next;
  418. unsigned long paddr_last = paddr_end;
  419. unsigned long vaddr = (unsigned long)__va(paddr);
  420. int i = pud_index(vaddr);
  421. for (; i < PTRS_PER_PUD; i++, paddr = paddr_next) {
  422. pud_t *pud;
  423. pmd_t *pmd;
  424. pgprot_t prot = PAGE_KERNEL;
  425. vaddr = (unsigned long)__va(paddr);
  426. pud = pud_page + pud_index(vaddr);
  427. paddr_next = (paddr & PUD_MASK) + PUD_SIZE;
  428. if (paddr >= paddr_end) {
  429. if (!after_bootmem &&
  430. !e820_any_mapped(paddr & PUD_MASK, paddr_next,
  431. E820_RAM) &&
  432. !e820_any_mapped(paddr & PUD_MASK, paddr_next,
  433. E820_RESERVED_KERN))
  434. set_pud(pud, __pud(0));
  435. continue;
  436. }
  437. if (!pud_none(*pud)) {
  438. if (!pud_large(*pud)) {
  439. pmd = pmd_offset(pud, 0);
  440. paddr_last = phys_pmd_init(pmd, paddr,
  441. paddr_end,
  442. page_size_mask,
  443. prot);
  444. __flush_tlb_all();
  445. continue;
  446. }
  447. /*
  448. * If we are ok with PG_LEVEL_1G mapping, then we will
  449. * use the existing mapping.
  450. *
  451. * Otherwise, we will split the gbpage mapping but use
  452. * the same existing protection bits except for large
  453. * page, so that we don't violate Intel's TLB
  454. * Application note (317080) which says, while changing
  455. * the page sizes, new and old translations should
  456. * not differ with respect to page frame and
  457. * attributes.
  458. */
  459. if (page_size_mask & (1 << PG_LEVEL_1G)) {
  460. if (!after_bootmem)
  461. pages++;
  462. paddr_last = paddr_next;
  463. continue;
  464. }
  465. prot = pte_pgprot(pte_clrhuge(*(pte_t *)pud));
  466. }
  467. if (page_size_mask & (1<<PG_LEVEL_1G)) {
  468. pages++;
  469. spin_lock(&init_mm.page_table_lock);
  470. set_pte((pte_t *)pud,
  471. pfn_pte((paddr & PUD_MASK) >> PAGE_SHIFT,
  472. PAGE_KERNEL_LARGE));
  473. spin_unlock(&init_mm.page_table_lock);
  474. paddr_last = paddr_next;
  475. continue;
  476. }
  477. pmd = alloc_low_page();
  478. paddr_last = phys_pmd_init(pmd, paddr, paddr_end,
  479. page_size_mask, prot);
  480. spin_lock(&init_mm.page_table_lock);
  481. pud_populate(&init_mm, pud, pmd);
  482. spin_unlock(&init_mm.page_table_lock);
  483. }
  484. __flush_tlb_all();
  485. update_page_count(PG_LEVEL_1G, pages);
  486. return paddr_last;
  487. }
  488. /*
  489. * Create page table mapping for the physical memory for specific physical
  490. * addresses. The virtual and physical addresses have to be aligned on PMD level
  491. * down. It returns the last physical address mapped.
  492. */
  493. unsigned long __meminit
  494. kernel_physical_mapping_init(unsigned long paddr_start,
  495. unsigned long paddr_end,
  496. unsigned long page_size_mask)
  497. {
  498. bool pgd_changed = false;
  499. unsigned long vaddr, vaddr_start, vaddr_end, vaddr_next, paddr_last;
  500. paddr_last = paddr_end;
  501. vaddr = (unsigned long)__va(paddr_start);
  502. vaddr_end = (unsigned long)__va(paddr_end);
  503. vaddr_start = vaddr;
  504. for (; vaddr < vaddr_end; vaddr = vaddr_next) {
  505. pgd_t *pgd = pgd_offset_k(vaddr);
  506. pud_t *pud;
  507. vaddr_next = (vaddr & PGDIR_MASK) + PGDIR_SIZE;
  508. if (pgd_val(*pgd)) {
  509. pud = (pud_t *)pgd_page_vaddr(*pgd);
  510. paddr_last = phys_pud_init(pud, __pa(vaddr),
  511. __pa(vaddr_end),
  512. page_size_mask);
  513. continue;
  514. }
  515. pud = alloc_low_page();
  516. paddr_last = phys_pud_init(pud, __pa(vaddr), __pa(vaddr_end),
  517. page_size_mask);
  518. spin_lock(&init_mm.page_table_lock);
  519. pgd_populate(&init_mm, pgd, pud);
  520. spin_unlock(&init_mm.page_table_lock);
  521. pgd_changed = true;
  522. }
  523. if (pgd_changed)
  524. sync_global_pgds(vaddr_start, vaddr_end - 1, 0);
  525. __flush_tlb_all();
  526. return paddr_last;
  527. }
  528. #ifndef CONFIG_NUMA
  529. void __init initmem_init(void)
  530. {
  531. memblock_set_node(0, (phys_addr_t)ULLONG_MAX, &memblock.memory, 0);
  532. }
  533. #endif
  534. void __init paging_init(void)
  535. {
  536. sparse_memory_present_with_active_regions(MAX_NUMNODES);
  537. sparse_init();
  538. /*
  539. * clear the default setting with node 0
  540. * note: don't use nodes_clear here, that is really clearing when
  541. * numa support is not compiled in, and later node_set_state
  542. * will not set it back.
  543. */
  544. node_clear_state(0, N_MEMORY);
  545. if (N_MEMORY != N_NORMAL_MEMORY)
  546. node_clear_state(0, N_NORMAL_MEMORY);
  547. zone_sizes_init();
  548. }
  549. /*
  550. * Memory hotplug specific functions
  551. */
  552. #ifdef CONFIG_MEMORY_HOTPLUG
  553. /*
  554. * After memory hotplug the variables max_pfn, max_low_pfn and high_memory need
  555. * updating.
  556. */
  557. static void update_end_of_memory_vars(u64 start, u64 size)
  558. {
  559. unsigned long end_pfn = PFN_UP(start + size);
  560. if (end_pfn > max_pfn) {
  561. max_pfn = end_pfn;
  562. max_low_pfn = end_pfn;
  563. high_memory = (void *)__va(max_pfn * PAGE_SIZE - 1) + 1;
  564. }
  565. }
  566. /*
  567. * Memory is added always to NORMAL zone. This means you will never get
  568. * additional DMA/DMA32 memory.
  569. */
  570. int arch_add_memory(int nid, u64 start, u64 size, bool for_device)
  571. {
  572. struct pglist_data *pgdat = NODE_DATA(nid);
  573. struct zone *zone = pgdat->node_zones +
  574. zone_for_memory(nid, start, size, ZONE_NORMAL, for_device);
  575. unsigned long start_pfn = start >> PAGE_SHIFT;
  576. unsigned long nr_pages = size >> PAGE_SHIFT;
  577. int ret;
  578. init_memory_mapping(start, start + size);
  579. ret = __add_pages(nid, zone, start_pfn, nr_pages);
  580. WARN_ON_ONCE(ret);
  581. /* update max_pfn, max_low_pfn and high_memory */
  582. update_end_of_memory_vars(start, size);
  583. return ret;
  584. }
  585. EXPORT_SYMBOL_GPL(arch_add_memory);
  586. #define PAGE_INUSE 0xFD
  587. static void __meminit free_pagetable(struct page *page, int order)
  588. {
  589. unsigned long magic;
  590. unsigned int nr_pages = 1 << order;
  591. struct vmem_altmap *altmap = to_vmem_altmap((unsigned long) page);
  592. if (altmap) {
  593. vmem_altmap_free(altmap, nr_pages);
  594. return;
  595. }
  596. /* bootmem page has reserved flag */
  597. if (PageReserved(page)) {
  598. __ClearPageReserved(page);
  599. magic = (unsigned long)page->lru.next;
  600. if (magic == SECTION_INFO || magic == MIX_SECTION_INFO) {
  601. while (nr_pages--)
  602. put_page_bootmem(page++);
  603. } else
  604. while (nr_pages--)
  605. free_reserved_page(page++);
  606. } else
  607. free_pages((unsigned long)page_address(page), order);
  608. }
  609. static void __meminit free_pte_table(pte_t *pte_start, pmd_t *pmd)
  610. {
  611. pte_t *pte;
  612. int i;
  613. for (i = 0; i < PTRS_PER_PTE; i++) {
  614. pte = pte_start + i;
  615. if (!pte_none(*pte))
  616. return;
  617. }
  618. /* free a pte talbe */
  619. free_pagetable(pmd_page(*pmd), 0);
  620. spin_lock(&init_mm.page_table_lock);
  621. pmd_clear(pmd);
  622. spin_unlock(&init_mm.page_table_lock);
  623. }
  624. static void __meminit free_pmd_table(pmd_t *pmd_start, pud_t *pud)
  625. {
  626. pmd_t *pmd;
  627. int i;
  628. for (i = 0; i < PTRS_PER_PMD; i++) {
  629. pmd = pmd_start + i;
  630. if (!pmd_none(*pmd))
  631. return;
  632. }
  633. /* free a pmd talbe */
  634. free_pagetable(pud_page(*pud), 0);
  635. spin_lock(&init_mm.page_table_lock);
  636. pud_clear(pud);
  637. spin_unlock(&init_mm.page_table_lock);
  638. }
  639. static void __meminit
  640. remove_pte_table(pte_t *pte_start, unsigned long addr, unsigned long end,
  641. bool direct)
  642. {
  643. unsigned long next, pages = 0;
  644. pte_t *pte;
  645. void *page_addr;
  646. phys_addr_t phys_addr;
  647. pte = pte_start + pte_index(addr);
  648. for (; addr < end; addr = next, pte++) {
  649. next = (addr + PAGE_SIZE) & PAGE_MASK;
  650. if (next > end)
  651. next = end;
  652. if (!pte_present(*pte))
  653. continue;
  654. /*
  655. * We mapped [0,1G) memory as identity mapping when
  656. * initializing, in arch/x86/kernel/head_64.S. These
  657. * pagetables cannot be removed.
  658. */
  659. phys_addr = pte_val(*pte) + (addr & PAGE_MASK);
  660. if (phys_addr < (phys_addr_t)0x40000000)
  661. return;
  662. if (PAGE_ALIGNED(addr) && PAGE_ALIGNED(next)) {
  663. /*
  664. * Do not free direct mapping pages since they were
  665. * freed when offlining, or simplely not in use.
  666. */
  667. if (!direct)
  668. free_pagetable(pte_page(*pte), 0);
  669. spin_lock(&init_mm.page_table_lock);
  670. pte_clear(&init_mm, addr, pte);
  671. spin_unlock(&init_mm.page_table_lock);
  672. /* For non-direct mapping, pages means nothing. */
  673. pages++;
  674. } else {
  675. /*
  676. * If we are here, we are freeing vmemmap pages since
  677. * direct mapped memory ranges to be freed are aligned.
  678. *
  679. * If we are not removing the whole page, it means
  680. * other page structs in this page are being used and
  681. * we canot remove them. So fill the unused page_structs
  682. * with 0xFD, and remove the page when it is wholly
  683. * filled with 0xFD.
  684. */
  685. memset((void *)addr, PAGE_INUSE, next - addr);
  686. page_addr = page_address(pte_page(*pte));
  687. if (!memchr_inv(page_addr, PAGE_INUSE, PAGE_SIZE)) {
  688. free_pagetable(pte_page(*pte), 0);
  689. spin_lock(&init_mm.page_table_lock);
  690. pte_clear(&init_mm, addr, pte);
  691. spin_unlock(&init_mm.page_table_lock);
  692. }
  693. }
  694. }
  695. /* Call free_pte_table() in remove_pmd_table(). */
  696. flush_tlb_all();
  697. if (direct)
  698. update_page_count(PG_LEVEL_4K, -pages);
  699. }
  700. static void __meminit
  701. remove_pmd_table(pmd_t *pmd_start, unsigned long addr, unsigned long end,
  702. bool direct)
  703. {
  704. unsigned long next, pages = 0;
  705. pte_t *pte_base;
  706. pmd_t *pmd;
  707. void *page_addr;
  708. pmd = pmd_start + pmd_index(addr);
  709. for (; addr < end; addr = next, pmd++) {
  710. next = pmd_addr_end(addr, end);
  711. if (!pmd_present(*pmd))
  712. continue;
  713. if (pmd_large(*pmd)) {
  714. if (IS_ALIGNED(addr, PMD_SIZE) &&
  715. IS_ALIGNED(next, PMD_SIZE)) {
  716. if (!direct)
  717. free_pagetable(pmd_page(*pmd),
  718. get_order(PMD_SIZE));
  719. spin_lock(&init_mm.page_table_lock);
  720. pmd_clear(pmd);
  721. spin_unlock(&init_mm.page_table_lock);
  722. pages++;
  723. } else {
  724. /* If here, we are freeing vmemmap pages. */
  725. memset((void *)addr, PAGE_INUSE, next - addr);
  726. page_addr = page_address(pmd_page(*pmd));
  727. if (!memchr_inv(page_addr, PAGE_INUSE,
  728. PMD_SIZE)) {
  729. free_pagetable(pmd_page(*pmd),
  730. get_order(PMD_SIZE));
  731. spin_lock(&init_mm.page_table_lock);
  732. pmd_clear(pmd);
  733. spin_unlock(&init_mm.page_table_lock);
  734. }
  735. }
  736. continue;
  737. }
  738. pte_base = (pte_t *)pmd_page_vaddr(*pmd);
  739. remove_pte_table(pte_base, addr, next, direct);
  740. free_pte_table(pte_base, pmd);
  741. }
  742. /* Call free_pmd_table() in remove_pud_table(). */
  743. if (direct)
  744. update_page_count(PG_LEVEL_2M, -pages);
  745. }
  746. static void __meminit
  747. remove_pud_table(pud_t *pud_start, unsigned long addr, unsigned long end,
  748. bool direct)
  749. {
  750. unsigned long next, pages = 0;
  751. pmd_t *pmd_base;
  752. pud_t *pud;
  753. void *page_addr;
  754. pud = pud_start + pud_index(addr);
  755. for (; addr < end; addr = next, pud++) {
  756. next = pud_addr_end(addr, end);
  757. if (!pud_present(*pud))
  758. continue;
  759. if (pud_large(*pud)) {
  760. if (IS_ALIGNED(addr, PUD_SIZE) &&
  761. IS_ALIGNED(next, PUD_SIZE)) {
  762. if (!direct)
  763. free_pagetable(pud_page(*pud),
  764. get_order(PUD_SIZE));
  765. spin_lock(&init_mm.page_table_lock);
  766. pud_clear(pud);
  767. spin_unlock(&init_mm.page_table_lock);
  768. pages++;
  769. } else {
  770. /* If here, we are freeing vmemmap pages. */
  771. memset((void *)addr, PAGE_INUSE, next - addr);
  772. page_addr = page_address(pud_page(*pud));
  773. if (!memchr_inv(page_addr, PAGE_INUSE,
  774. PUD_SIZE)) {
  775. free_pagetable(pud_page(*pud),
  776. get_order(PUD_SIZE));
  777. spin_lock(&init_mm.page_table_lock);
  778. pud_clear(pud);
  779. spin_unlock(&init_mm.page_table_lock);
  780. }
  781. }
  782. continue;
  783. }
  784. pmd_base = (pmd_t *)pud_page_vaddr(*pud);
  785. remove_pmd_table(pmd_base, addr, next, direct);
  786. free_pmd_table(pmd_base, pud);
  787. }
  788. if (direct)
  789. update_page_count(PG_LEVEL_1G, -pages);
  790. }
  791. /* start and end are both virtual address. */
  792. static void __meminit
  793. remove_pagetable(unsigned long start, unsigned long end, bool direct)
  794. {
  795. unsigned long next;
  796. unsigned long addr;
  797. pgd_t *pgd;
  798. pud_t *pud;
  799. for (addr = start; addr < end; addr = next) {
  800. next = pgd_addr_end(addr, end);
  801. pgd = pgd_offset_k(addr);
  802. if (!pgd_present(*pgd))
  803. continue;
  804. pud = (pud_t *)pgd_page_vaddr(*pgd);
  805. remove_pud_table(pud, addr, next, direct);
  806. }
  807. flush_tlb_all();
  808. }
  809. void __ref vmemmap_free(unsigned long start, unsigned long end)
  810. {
  811. remove_pagetable(start, end, false);
  812. }
  813. #ifdef CONFIG_MEMORY_HOTREMOVE
  814. static void __meminit
  815. kernel_physical_mapping_remove(unsigned long start, unsigned long end)
  816. {
  817. start = (unsigned long)__va(start);
  818. end = (unsigned long)__va(end);
  819. remove_pagetable(start, end, true);
  820. }
  821. int __ref arch_remove_memory(u64 start, u64 size)
  822. {
  823. unsigned long start_pfn = start >> PAGE_SHIFT;
  824. unsigned long nr_pages = size >> PAGE_SHIFT;
  825. struct page *page = pfn_to_page(start_pfn);
  826. struct vmem_altmap *altmap;
  827. struct zone *zone;
  828. int ret;
  829. /* With altmap the first mapped page is offset from @start */
  830. altmap = to_vmem_altmap((unsigned long) page);
  831. if (altmap)
  832. page += vmem_altmap_offset(altmap);
  833. zone = page_zone(page);
  834. ret = __remove_pages(zone, start_pfn, nr_pages);
  835. WARN_ON_ONCE(ret);
  836. kernel_physical_mapping_remove(start, start + size);
  837. return ret;
  838. }
  839. #endif
  840. #endif /* CONFIG_MEMORY_HOTPLUG */
  841. static struct kcore_list kcore_vsyscall;
  842. static void __init register_page_bootmem_info(void)
  843. {
  844. #ifdef CONFIG_NUMA
  845. int i;
  846. for_each_online_node(i)
  847. register_page_bootmem_info_node(NODE_DATA(i));
  848. #endif
  849. }
  850. void __init mem_init(void)
  851. {
  852. pci_iommu_alloc();
  853. /* clear_bss() already clear the empty_zero_page */
  854. register_page_bootmem_info();
  855. /* this will put all memory onto the freelists */
  856. free_all_bootmem();
  857. after_bootmem = 1;
  858. /* Register memory areas for /proc/kcore */
  859. kclist_add(&kcore_vsyscall, (void *)VSYSCALL_ADDR,
  860. PAGE_SIZE, KCORE_OTHER);
  861. mem_init_print_info(NULL);
  862. }
  863. const int rodata_test_data = 0xC3;
  864. EXPORT_SYMBOL_GPL(rodata_test_data);
  865. int kernel_set_to_readonly;
  866. void set_kernel_text_rw(void)
  867. {
  868. unsigned long start = PFN_ALIGN(_text);
  869. unsigned long end = PFN_ALIGN(__stop___ex_table);
  870. if (!kernel_set_to_readonly)
  871. return;
  872. pr_debug("Set kernel text: %lx - %lx for read write\n",
  873. start, end);
  874. /*
  875. * Make the kernel identity mapping for text RW. Kernel text
  876. * mapping will always be RO. Refer to the comment in
  877. * static_protections() in pageattr.c
  878. */
  879. set_memory_rw(start, (end - start) >> PAGE_SHIFT);
  880. }
  881. void set_kernel_text_ro(void)
  882. {
  883. unsigned long start = PFN_ALIGN(_text);
  884. unsigned long end = PFN_ALIGN(__stop___ex_table);
  885. if (!kernel_set_to_readonly)
  886. return;
  887. pr_debug("Set kernel text: %lx - %lx for read only\n",
  888. start, end);
  889. /*
  890. * Set the kernel identity mapping for text RO.
  891. */
  892. set_memory_ro(start, (end - start) >> PAGE_SHIFT);
  893. }
  894. void mark_rodata_ro(void)
  895. {
  896. unsigned long start = PFN_ALIGN(_text);
  897. unsigned long rodata_start = PFN_ALIGN(__start_rodata);
  898. unsigned long end = (unsigned long) &__end_rodata_hpage_align;
  899. unsigned long text_end = PFN_ALIGN(&__stop___ex_table);
  900. unsigned long rodata_end = PFN_ALIGN(&__end_rodata);
  901. unsigned long all_end;
  902. printk(KERN_INFO "Write protecting the kernel read-only data: %luk\n",
  903. (end - start) >> 10);
  904. set_memory_ro(start, (end - start) >> PAGE_SHIFT);
  905. kernel_set_to_readonly = 1;
  906. /*
  907. * The rodata/data/bss/brk section (but not the kernel text!)
  908. * should also be not-executable.
  909. *
  910. * We align all_end to PMD_SIZE because the existing mapping
  911. * is a full PMD. If we would align _brk_end to PAGE_SIZE we
  912. * split the PMD and the reminder between _brk_end and the end
  913. * of the PMD will remain mapped executable.
  914. *
  915. * Any PMD which was setup after the one which covers _brk_end
  916. * has been zapped already via cleanup_highmem().
  917. */
  918. all_end = roundup((unsigned long)_brk_end, PMD_SIZE);
  919. set_memory_nx(text_end, (all_end - text_end) >> PAGE_SHIFT);
  920. rodata_test();
  921. #ifdef CONFIG_CPA_DEBUG
  922. printk(KERN_INFO "Testing CPA: undo %lx-%lx\n", start, end);
  923. set_memory_rw(start, (end-start) >> PAGE_SHIFT);
  924. printk(KERN_INFO "Testing CPA: again\n");
  925. set_memory_ro(start, (end-start) >> PAGE_SHIFT);
  926. #endif
  927. free_init_pages("unused kernel",
  928. (unsigned long) __va(__pa_symbol(text_end)),
  929. (unsigned long) __va(__pa_symbol(rodata_start)));
  930. free_init_pages("unused kernel",
  931. (unsigned long) __va(__pa_symbol(rodata_end)),
  932. (unsigned long) __va(__pa_symbol(_sdata)));
  933. debug_checkwx();
  934. }
  935. int kern_addr_valid(unsigned long addr)
  936. {
  937. unsigned long above = ((long)addr) >> __VIRTUAL_MASK_SHIFT;
  938. pgd_t *pgd;
  939. pud_t *pud;
  940. pmd_t *pmd;
  941. pte_t *pte;
  942. if (above != 0 && above != -1UL)
  943. return 0;
  944. pgd = pgd_offset_k(addr);
  945. if (pgd_none(*pgd))
  946. return 0;
  947. pud = pud_offset(pgd, addr);
  948. if (pud_none(*pud))
  949. return 0;
  950. if (pud_large(*pud))
  951. return pfn_valid(pud_pfn(*pud));
  952. pmd = pmd_offset(pud, addr);
  953. if (pmd_none(*pmd))
  954. return 0;
  955. if (pmd_large(*pmd))
  956. return pfn_valid(pmd_pfn(*pmd));
  957. pte = pte_offset_kernel(pmd, addr);
  958. if (pte_none(*pte))
  959. return 0;
  960. return pfn_valid(pte_pfn(*pte));
  961. }
  962. static unsigned long probe_memory_block_size(void)
  963. {
  964. unsigned long bz = MIN_MEMORY_BLOCK_SIZE;
  965. /* if system is UV or has 64GB of RAM or more, use large blocks */
  966. if (is_uv_system() || ((max_pfn << PAGE_SHIFT) >= (64UL << 30)))
  967. bz = 2UL << 30; /* 2GB */
  968. pr_info("x86/mm: Memory block size: %ldMB\n", bz >> 20);
  969. return bz;
  970. }
  971. static unsigned long memory_block_size_probed;
  972. unsigned long memory_block_size_bytes(void)
  973. {
  974. if (!memory_block_size_probed)
  975. memory_block_size_probed = probe_memory_block_size();
  976. return memory_block_size_probed;
  977. }
  978. #ifdef CONFIG_SPARSEMEM_VMEMMAP
  979. /*
  980. * Initialise the sparsemem vmemmap using huge-pages at the PMD level.
  981. */
  982. static long __meminitdata addr_start, addr_end;
  983. static void __meminitdata *p_start, *p_end;
  984. static int __meminitdata node_start;
  985. static int __meminit vmemmap_populate_hugepages(unsigned long start,
  986. unsigned long end, int node, struct vmem_altmap *altmap)
  987. {
  988. unsigned long addr;
  989. unsigned long next;
  990. pgd_t *pgd;
  991. pud_t *pud;
  992. pmd_t *pmd;
  993. for (addr = start; addr < end; addr = next) {
  994. next = pmd_addr_end(addr, end);
  995. pgd = vmemmap_pgd_populate(addr, node);
  996. if (!pgd)
  997. return -ENOMEM;
  998. pud = vmemmap_pud_populate(pgd, addr, node);
  999. if (!pud)
  1000. return -ENOMEM;
  1001. pmd = pmd_offset(pud, addr);
  1002. if (pmd_none(*pmd)) {
  1003. void *p;
  1004. p = __vmemmap_alloc_block_buf(PMD_SIZE, node, altmap);
  1005. if (p) {
  1006. pte_t entry;
  1007. entry = pfn_pte(__pa(p) >> PAGE_SHIFT,
  1008. PAGE_KERNEL_LARGE);
  1009. set_pmd(pmd, __pmd(pte_val(entry)));
  1010. /* check to see if we have contiguous blocks */
  1011. if (p_end != p || node_start != node) {
  1012. if (p_start)
  1013. pr_debug(" [%lx-%lx] PMD -> [%p-%p] on node %d\n",
  1014. addr_start, addr_end-1, p_start, p_end-1, node_start);
  1015. addr_start = addr;
  1016. node_start = node;
  1017. p_start = p;
  1018. }
  1019. addr_end = addr + PMD_SIZE;
  1020. p_end = p + PMD_SIZE;
  1021. continue;
  1022. } else if (altmap)
  1023. return -ENOMEM; /* no fallback */
  1024. } else if (pmd_large(*pmd)) {
  1025. vmemmap_verify((pte_t *)pmd, node, addr, next);
  1026. continue;
  1027. }
  1028. pr_warn_once("vmemmap: falling back to regular page backing\n");
  1029. if (vmemmap_populate_basepages(addr, next, node))
  1030. return -ENOMEM;
  1031. }
  1032. return 0;
  1033. }
  1034. int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node)
  1035. {
  1036. struct vmem_altmap *altmap = to_vmem_altmap(start);
  1037. int err;
  1038. if (boot_cpu_has(X86_FEATURE_PSE))
  1039. err = vmemmap_populate_hugepages(start, end, node, altmap);
  1040. else if (altmap) {
  1041. pr_err_once("%s: no cpu support for altmap allocations\n",
  1042. __func__);
  1043. err = -ENOMEM;
  1044. } else
  1045. err = vmemmap_populate_basepages(start, end, node);
  1046. if (!err)
  1047. sync_global_pgds(start, end - 1, 0);
  1048. return err;
  1049. }
  1050. #if defined(CONFIG_MEMORY_HOTPLUG_SPARSE) && defined(CONFIG_HAVE_BOOTMEM_INFO_NODE)
  1051. void register_page_bootmem_memmap(unsigned long section_nr,
  1052. struct page *start_page, unsigned long size)
  1053. {
  1054. unsigned long addr = (unsigned long)start_page;
  1055. unsigned long end = (unsigned long)(start_page + size);
  1056. unsigned long next;
  1057. pgd_t *pgd;
  1058. pud_t *pud;
  1059. pmd_t *pmd;
  1060. unsigned int nr_pages;
  1061. struct page *page;
  1062. for (; addr < end; addr = next) {
  1063. pte_t *pte = NULL;
  1064. pgd = pgd_offset_k(addr);
  1065. if (pgd_none(*pgd)) {
  1066. next = (addr + PAGE_SIZE) & PAGE_MASK;
  1067. continue;
  1068. }
  1069. get_page_bootmem(section_nr, pgd_page(*pgd), MIX_SECTION_INFO);
  1070. pud = pud_offset(pgd, addr);
  1071. if (pud_none(*pud)) {
  1072. next = (addr + PAGE_SIZE) & PAGE_MASK;
  1073. continue;
  1074. }
  1075. get_page_bootmem(section_nr, pud_page(*pud), MIX_SECTION_INFO);
  1076. if (!boot_cpu_has(X86_FEATURE_PSE)) {
  1077. next = (addr + PAGE_SIZE) & PAGE_MASK;
  1078. pmd = pmd_offset(pud, addr);
  1079. if (pmd_none(*pmd))
  1080. continue;
  1081. get_page_bootmem(section_nr, pmd_page(*pmd),
  1082. MIX_SECTION_INFO);
  1083. pte = pte_offset_kernel(pmd, addr);
  1084. if (pte_none(*pte))
  1085. continue;
  1086. get_page_bootmem(section_nr, pte_page(*pte),
  1087. SECTION_INFO);
  1088. } else {
  1089. next = pmd_addr_end(addr, end);
  1090. pmd = pmd_offset(pud, addr);
  1091. if (pmd_none(*pmd))
  1092. continue;
  1093. nr_pages = 1 << (get_order(PMD_SIZE));
  1094. page = pmd_page(*pmd);
  1095. while (nr_pages--)
  1096. get_page_bootmem(section_nr, page++,
  1097. SECTION_INFO);
  1098. }
  1099. }
  1100. }
  1101. #endif
  1102. void __meminit vmemmap_populate_print_last(void)
  1103. {
  1104. if (p_start) {
  1105. pr_debug(" [%lx-%lx] PMD -> [%p-%p] on node %d\n",
  1106. addr_start, addr_end-1, p_start, p_end-1, node_start);
  1107. p_start = NULL;
  1108. p_end = NULL;
  1109. node_start = 0;
  1110. }
  1111. }
  1112. #endif