nmi.c 8.9 KB

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  1. /*
  2. * Machine check handler
  3. *
  4. * Copyright IBM Corp. 2000, 2009
  5. * Author(s): Ingo Adlung <adlung@de.ibm.com>,
  6. * Martin Schwidefsky <schwidefsky@de.ibm.com>,
  7. * Cornelia Huck <cornelia.huck@de.ibm.com>,
  8. * Heiko Carstens <heiko.carstens@de.ibm.com>,
  9. */
  10. #include <linux/kernel_stat.h>
  11. #include <linux/init.h>
  12. #include <linux/errno.h>
  13. #include <linux/hardirq.h>
  14. #include <linux/time.h>
  15. #include <linux/module.h>
  16. #include <asm/lowcore.h>
  17. #include <asm/smp.h>
  18. #include <asm/stp.h>
  19. #include <asm/cputime.h>
  20. #include <asm/nmi.h>
  21. #include <asm/crw.h>
  22. #include <asm/switch_to.h>
  23. #include <asm/ctl_reg.h>
  24. struct mcck_struct {
  25. unsigned int kill_task : 1;
  26. unsigned int channel_report : 1;
  27. unsigned int warning : 1;
  28. unsigned int stp_queue : 1;
  29. unsigned long mcck_code;
  30. };
  31. static DEFINE_PER_CPU(struct mcck_struct, cpu_mcck);
  32. static void s390_handle_damage(void)
  33. {
  34. smp_send_stop();
  35. disabled_wait((unsigned long) __builtin_return_address(0));
  36. while (1);
  37. }
  38. /*
  39. * Main machine check handler function. Will be called with interrupts enabled
  40. * or disabled and machine checks enabled or disabled.
  41. */
  42. void s390_handle_mcck(void)
  43. {
  44. unsigned long flags;
  45. struct mcck_struct mcck;
  46. /*
  47. * Disable machine checks and get the current state of accumulated
  48. * machine checks. Afterwards delete the old state and enable machine
  49. * checks again.
  50. */
  51. local_irq_save(flags);
  52. local_mcck_disable();
  53. mcck = *this_cpu_ptr(&cpu_mcck);
  54. memset(this_cpu_ptr(&cpu_mcck), 0, sizeof(mcck));
  55. clear_cpu_flag(CIF_MCCK_PENDING);
  56. local_mcck_enable();
  57. local_irq_restore(flags);
  58. if (mcck.channel_report)
  59. crw_handle_channel_report();
  60. /*
  61. * A warning may remain for a prolonged period on the bare iron.
  62. * (actually until the machine is powered off, or the problem is gone)
  63. * So we just stop listening for the WARNING MCH and avoid continuously
  64. * being interrupted. One caveat is however, that we must do this per
  65. * processor and cannot use the smp version of ctl_clear_bit().
  66. * On VM we only get one interrupt per virtally presented machinecheck.
  67. * Though one suffices, we may get one interrupt per (virtual) cpu.
  68. */
  69. if (mcck.warning) { /* WARNING pending ? */
  70. static int mchchk_wng_posted = 0;
  71. /* Use single cpu clear, as we cannot handle smp here. */
  72. __ctl_clear_bit(14, 24); /* Disable WARNING MCH */
  73. if (xchg(&mchchk_wng_posted, 1) == 0)
  74. kill_cad_pid(SIGPWR, 1);
  75. }
  76. if (mcck.stp_queue)
  77. stp_queue_work();
  78. if (mcck.kill_task) {
  79. local_irq_enable();
  80. printk(KERN_EMERG "mcck: Terminating task because of machine "
  81. "malfunction (code 0x%016lx).\n", mcck.mcck_code);
  82. printk(KERN_EMERG "mcck: task: %s, pid: %d.\n",
  83. current->comm, current->pid);
  84. do_exit(SIGSEGV);
  85. }
  86. }
  87. EXPORT_SYMBOL_GPL(s390_handle_mcck);
  88. /*
  89. * returns 0 if all registers could be validated
  90. * returns 1 otherwise
  91. */
  92. static int notrace s390_validate_registers(union mci mci)
  93. {
  94. int kill_task;
  95. u64 zero;
  96. void *fpt_save_area, *fpt_creg_save_area;
  97. kill_task = 0;
  98. zero = 0;
  99. if (!mci.gr) {
  100. /*
  101. * General purpose registers couldn't be restored and have
  102. * unknown contents. Process needs to be terminated.
  103. */
  104. kill_task = 1;
  105. }
  106. if (!mci.fp) {
  107. /*
  108. * Floating point registers can't be restored and
  109. * therefore the process needs to be terminated.
  110. */
  111. kill_task = 1;
  112. }
  113. fpt_save_area = &S390_lowcore.floating_pt_save_area;
  114. fpt_creg_save_area = &S390_lowcore.fpt_creg_save_area;
  115. if (!mci.fc) {
  116. /*
  117. * Floating point control register can't be restored.
  118. * Task will be terminated.
  119. */
  120. asm volatile("lfpc 0(%0)" : : "a" (&zero), "m" (zero));
  121. kill_task = 1;
  122. } else
  123. asm volatile("lfpc 0(%0)" : : "a" (fpt_creg_save_area));
  124. if (!MACHINE_HAS_VX) {
  125. /* Validate floating point registers */
  126. asm volatile(
  127. " ld 0,0(%0)\n"
  128. " ld 1,8(%0)\n"
  129. " ld 2,16(%0)\n"
  130. " ld 3,24(%0)\n"
  131. " ld 4,32(%0)\n"
  132. " ld 5,40(%0)\n"
  133. " ld 6,48(%0)\n"
  134. " ld 7,56(%0)\n"
  135. " ld 8,64(%0)\n"
  136. " ld 9,72(%0)\n"
  137. " ld 10,80(%0)\n"
  138. " ld 11,88(%0)\n"
  139. " ld 12,96(%0)\n"
  140. " ld 13,104(%0)\n"
  141. " ld 14,112(%0)\n"
  142. " ld 15,120(%0)\n"
  143. : : "a" (fpt_save_area));
  144. } else {
  145. /* Validate vector registers */
  146. union ctlreg0 cr0;
  147. if (!mci.vr) {
  148. /*
  149. * Vector registers can't be restored and therefore
  150. * the process needs to be terminated.
  151. */
  152. kill_task = 1;
  153. }
  154. cr0.val = S390_lowcore.cregs_save_area[0];
  155. cr0.afp = cr0.vx = 1;
  156. __ctl_load(cr0.val, 0, 0);
  157. asm volatile(
  158. " la 1,%0\n"
  159. " .word 0xe70f,0x1000,0x0036\n" /* vlm 0,15,0(1) */
  160. " .word 0xe70f,0x1100,0x0c36\n" /* vlm 16,31,256(1) */
  161. : : "Q" (*(struct vx_array *)
  162. &S390_lowcore.vector_save_area) : "1");
  163. __ctl_load(S390_lowcore.cregs_save_area[0], 0, 0);
  164. }
  165. /* Validate access registers */
  166. asm volatile(
  167. " lam 0,15,0(%0)"
  168. : : "a" (&S390_lowcore.access_regs_save_area));
  169. if (!mci.ar) {
  170. /*
  171. * Access registers have unknown contents.
  172. * Terminating task.
  173. */
  174. kill_task = 1;
  175. }
  176. /* Validate control registers */
  177. if (!mci.cr) {
  178. /*
  179. * Control registers have unknown contents.
  180. * Can't recover and therefore stopping machine.
  181. */
  182. s390_handle_damage();
  183. } else {
  184. asm volatile(
  185. " lctlg 0,15,0(%0)"
  186. : : "a" (&S390_lowcore.cregs_save_area));
  187. }
  188. /*
  189. * We don't even try to validate the TOD register, since we simply
  190. * can't write something sensible into that register.
  191. */
  192. /*
  193. * See if we can validate the TOD programmable register with its
  194. * old contents (should be zero) otherwise set it to zero.
  195. */
  196. if (!mci.pr)
  197. asm volatile(
  198. " sr 0,0\n"
  199. " sckpf"
  200. : : : "0", "cc");
  201. else
  202. asm volatile(
  203. " l 0,0(%0)\n"
  204. " sckpf"
  205. : : "a" (&S390_lowcore.tod_progreg_save_area)
  206. : "0", "cc");
  207. /* Validate clock comparator register */
  208. set_clock_comparator(S390_lowcore.clock_comparator);
  209. /* Check if old PSW is valid */
  210. if (!mci.wp)
  211. /*
  212. * Can't tell if we come from user or kernel mode
  213. * -> stopping machine.
  214. */
  215. s390_handle_damage();
  216. if (!mci.ms || !mci.pm || !mci.ia)
  217. kill_task = 1;
  218. return kill_task;
  219. }
  220. #define MAX_IPD_COUNT 29
  221. #define MAX_IPD_TIME (5 * 60 * USEC_PER_SEC) /* 5 minutes */
  222. #define ED_STP_ISLAND 6 /* External damage STP island check */
  223. #define ED_STP_SYNC 7 /* External damage STP sync check */
  224. /*
  225. * machine check handler.
  226. */
  227. void notrace s390_do_machine_check(struct pt_regs *regs)
  228. {
  229. static int ipd_count;
  230. static DEFINE_SPINLOCK(ipd_lock);
  231. static unsigned long long last_ipd;
  232. struct mcck_struct *mcck;
  233. unsigned long long tmp;
  234. union mci mci;
  235. int umode;
  236. nmi_enter();
  237. inc_irq_stat(NMI_NMI);
  238. mci.val = S390_lowcore.mcck_interruption_code;
  239. mcck = this_cpu_ptr(&cpu_mcck);
  240. umode = user_mode(regs);
  241. if (mci.sd) {
  242. /* System damage -> stopping machine */
  243. s390_handle_damage();
  244. }
  245. if (mci.pd) {
  246. if (mci.b) {
  247. /* Processing backup -> verify if we can survive this */
  248. u64 z_mcic, o_mcic, t_mcic;
  249. z_mcic = (1ULL<<63 | 1ULL<<59 | 1ULL<<29);
  250. o_mcic = (1ULL<<43 | 1ULL<<42 | 1ULL<<41 | 1ULL<<40 |
  251. 1ULL<<36 | 1ULL<<35 | 1ULL<<34 | 1ULL<<32 |
  252. 1ULL<<30 | 1ULL<<21 | 1ULL<<20 | 1ULL<<17 |
  253. 1ULL<<16);
  254. t_mcic = mci.val;
  255. if (((t_mcic & z_mcic) != 0) ||
  256. ((t_mcic & o_mcic) != o_mcic)) {
  257. s390_handle_damage();
  258. }
  259. /*
  260. * Nullifying exigent condition, therefore we might
  261. * retry this instruction.
  262. */
  263. spin_lock(&ipd_lock);
  264. tmp = get_tod_clock();
  265. if (((tmp - last_ipd) >> 12) < MAX_IPD_TIME)
  266. ipd_count++;
  267. else
  268. ipd_count = 1;
  269. last_ipd = tmp;
  270. if (ipd_count == MAX_IPD_COUNT)
  271. s390_handle_damage();
  272. spin_unlock(&ipd_lock);
  273. } else {
  274. /* Processing damage -> stopping machine */
  275. s390_handle_damage();
  276. }
  277. }
  278. if (s390_validate_registers(mci)) {
  279. if (umode) {
  280. /*
  281. * Couldn't restore all register contents while in
  282. * user mode -> mark task for termination.
  283. */
  284. mcck->kill_task = 1;
  285. mcck->mcck_code = mci.val;
  286. set_cpu_flag(CIF_MCCK_PENDING);
  287. } else {
  288. /*
  289. * Couldn't restore all register contents while in
  290. * kernel mode -> stopping machine.
  291. */
  292. s390_handle_damage();
  293. }
  294. }
  295. if (mci.cd) {
  296. /* Timing facility damage */
  297. s390_handle_damage();
  298. }
  299. if (mci.ed && mci.ec) {
  300. /* External damage */
  301. if (S390_lowcore.external_damage_code & (1U << ED_STP_SYNC))
  302. mcck->stp_queue |= stp_sync_check();
  303. if (S390_lowcore.external_damage_code & (1U << ED_STP_ISLAND))
  304. mcck->stp_queue |= stp_island_check();
  305. if (mcck->stp_queue)
  306. set_cpu_flag(CIF_MCCK_PENDING);
  307. }
  308. if (mci.se)
  309. /* Storage error uncorrected */
  310. s390_handle_damage();
  311. if (mci.ke)
  312. /* Storage key-error uncorrected */
  313. s390_handle_damage();
  314. if (mci.ds && mci.fa)
  315. /* Storage degradation */
  316. s390_handle_damage();
  317. if (mci.cp) {
  318. /* Channel report word pending */
  319. mcck->channel_report = 1;
  320. set_cpu_flag(CIF_MCCK_PENDING);
  321. }
  322. if (mci.w) {
  323. /* Warning pending */
  324. mcck->warning = 1;
  325. set_cpu_flag(CIF_MCCK_PENDING);
  326. }
  327. nmi_exit();
  328. }
  329. static int __init machine_check_init(void)
  330. {
  331. ctl_set_bit(14, 25); /* enable external damage MCH */
  332. ctl_set_bit(14, 27); /* enable system recovery MCH */
  333. ctl_set_bit(14, 24); /* enable warning MCH */
  334. return 0;
  335. }
  336. early_initcall(machine_check_init);