sleep.S 4.7 KB

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  1. #include <linux/errno.h>
  2. #include <linux/linkage.h>
  3. #include <asm/asm-offsets.h>
  4. #include <asm/assembler.h>
  5. .text
  6. /*
  7. * Implementation of MPIDR_EL1 hash algorithm through shifting
  8. * and OR'ing.
  9. *
  10. * @dst: register containing hash result
  11. * @rs0: register containing affinity level 0 bit shift
  12. * @rs1: register containing affinity level 1 bit shift
  13. * @rs2: register containing affinity level 2 bit shift
  14. * @rs3: register containing affinity level 3 bit shift
  15. * @mpidr: register containing MPIDR_EL1 value
  16. * @mask: register containing MPIDR mask
  17. *
  18. * Pseudo C-code:
  19. *
  20. *u32 dst;
  21. *
  22. *compute_mpidr_hash(u32 rs0, u32 rs1, u32 rs2, u32 rs3, u64 mpidr, u64 mask) {
  23. * u32 aff0, aff1, aff2, aff3;
  24. * u64 mpidr_masked = mpidr & mask;
  25. * aff0 = mpidr_masked & 0xff;
  26. * aff1 = mpidr_masked & 0xff00;
  27. * aff2 = mpidr_masked & 0xff0000;
  28. * aff2 = mpidr_masked & 0xff00000000;
  29. * dst = (aff0 >> rs0 | aff1 >> rs1 | aff2 >> rs2 | aff3 >> rs3);
  30. *}
  31. * Input registers: rs0, rs1, rs2, rs3, mpidr, mask
  32. * Output register: dst
  33. * Note: input and output registers must be disjoint register sets
  34. (eg: a macro instance with mpidr = x1 and dst = x1 is invalid)
  35. */
  36. .macro compute_mpidr_hash dst, rs0, rs1, rs2, rs3, mpidr, mask
  37. and \mpidr, \mpidr, \mask // mask out MPIDR bits
  38. and \dst, \mpidr, #0xff // mask=aff0
  39. lsr \dst ,\dst, \rs0 // dst=aff0>>rs0
  40. and \mask, \mpidr, #0xff00 // mask = aff1
  41. lsr \mask ,\mask, \rs1
  42. orr \dst, \dst, \mask // dst|=(aff1>>rs1)
  43. and \mask, \mpidr, #0xff0000 // mask = aff2
  44. lsr \mask ,\mask, \rs2
  45. orr \dst, \dst, \mask // dst|=(aff2>>rs2)
  46. and \mask, \mpidr, #0xff00000000 // mask = aff3
  47. lsr \mask ,\mask, \rs3
  48. orr \dst, \dst, \mask // dst|=(aff3>>rs3)
  49. .endm
  50. /*
  51. * Save CPU state in the provided sleep_stack_data area, and publish its
  52. * location for cpu_resume()'s use in sleep_save_stash.
  53. *
  54. * cpu_resume() will restore this saved state, and return. Because the
  55. * link-register is saved and restored, it will appear to return from this
  56. * function. So that the caller can tell the suspend/resume paths apart,
  57. * __cpu_suspend_enter() will always return a non-zero value, whereas the
  58. * path through cpu_resume() will return 0.
  59. *
  60. * x0 = struct sleep_stack_data area
  61. */
  62. ENTRY(__cpu_suspend_enter)
  63. stp x29, lr, [x0, #SLEEP_STACK_DATA_CALLEE_REGS]
  64. stp x19, x20, [x0,#SLEEP_STACK_DATA_CALLEE_REGS+16]
  65. stp x21, x22, [x0,#SLEEP_STACK_DATA_CALLEE_REGS+32]
  66. stp x23, x24, [x0,#SLEEP_STACK_DATA_CALLEE_REGS+48]
  67. stp x25, x26, [x0,#SLEEP_STACK_DATA_CALLEE_REGS+64]
  68. stp x27, x28, [x0,#SLEEP_STACK_DATA_CALLEE_REGS+80]
  69. /* save the sp in cpu_suspend_ctx */
  70. mov x2, sp
  71. str x2, [x0, #SLEEP_STACK_DATA_SYSTEM_REGS + CPU_CTX_SP]
  72. /* find the mpidr_hash */
  73. ldr x1, =sleep_save_stash
  74. ldr x1, [x1]
  75. mrs x7, mpidr_el1
  76. ldr x9, =mpidr_hash
  77. ldr x10, [x9, #MPIDR_HASH_MASK]
  78. /*
  79. * Following code relies on the struct mpidr_hash
  80. * members size.
  81. */
  82. ldp w3, w4, [x9, #MPIDR_HASH_SHIFTS]
  83. ldp w5, w6, [x9, #(MPIDR_HASH_SHIFTS + 8)]
  84. compute_mpidr_hash x8, x3, x4, x5, x6, x7, x10
  85. add x1, x1, x8, lsl #3
  86. str x0, [x1]
  87. add x0, x0, #SLEEP_STACK_DATA_SYSTEM_REGS
  88. stp x29, lr, [sp, #-16]!
  89. bl cpu_do_suspend
  90. ldp x29, lr, [sp], #16
  91. mov x0, #1
  92. ret
  93. ENDPROC(__cpu_suspend_enter)
  94. .ltorg
  95. ENTRY(cpu_resume)
  96. bl el2_setup // if in EL2 drop to EL1 cleanly
  97. /* enable the MMU early - so we can access sleep_save_stash by va */
  98. adr_l lr, __enable_mmu /* __cpu_setup will return here */
  99. adr_l x27, _resume_switched /* __enable_mmu will branch here */
  100. adrp x25, idmap_pg_dir
  101. adrp x26, swapper_pg_dir
  102. b __cpu_setup
  103. ENDPROC(cpu_resume)
  104. .pushsection ".idmap.text", "ax"
  105. _resume_switched:
  106. ldr x8, =_cpu_resume
  107. br x8
  108. ENDPROC(_resume_switched)
  109. .ltorg
  110. .popsection
  111. ENTRY(_cpu_resume)
  112. mrs x1, mpidr_el1
  113. adrp x8, mpidr_hash
  114. add x8, x8, #:lo12:mpidr_hash // x8 = struct mpidr_hash phys address
  115. /* retrieve mpidr_hash members to compute the hash */
  116. ldr x2, [x8, #MPIDR_HASH_MASK]
  117. ldp w3, w4, [x8, #MPIDR_HASH_SHIFTS]
  118. ldp w5, w6, [x8, #(MPIDR_HASH_SHIFTS + 8)]
  119. compute_mpidr_hash x7, x3, x4, x5, x6, x1, x2
  120. /* x7 contains hash index, let's use it to grab context pointer */
  121. ldr_l x0, sleep_save_stash
  122. ldr x0, [x0, x7, lsl #3]
  123. add x29, x0, #SLEEP_STACK_DATA_CALLEE_REGS
  124. add x0, x0, #SLEEP_STACK_DATA_SYSTEM_REGS
  125. /* load sp from context */
  126. ldr x2, [x0, #CPU_CTX_SP]
  127. mov sp, x2
  128. /* save thread_info */
  129. and x2, x2, #~(THREAD_SIZE - 1)
  130. msr sp_el0, x2
  131. /*
  132. * cpu_do_resume expects x0 to contain context address pointer
  133. */
  134. bl cpu_do_resume
  135. #ifdef CONFIG_KASAN
  136. mov x0, sp
  137. bl kasan_unpoison_remaining_stack
  138. #endif
  139. ldp x19, x20, [x29, #16]
  140. ldp x21, x22, [x29, #32]
  141. ldp x23, x24, [x29, #48]
  142. ldp x25, x26, [x29, #64]
  143. ldp x27, x28, [x29, #80]
  144. ldp x29, lr, [x29]
  145. mov x0, #0
  146. ret
  147. ENDPROC(_cpu_resume)