ptrace.c 34 KB

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  1. /*
  2. * Based on arch/arm/kernel/ptrace.c
  3. *
  4. * By Ross Biro 1/23/92
  5. * edited by Linus Torvalds
  6. * ARM modifications Copyright (C) 2000 Russell King
  7. * Copyright (C) 2012 ARM Ltd.
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. *
  13. * This program is distributed in the hope that it will be useful,
  14. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  15. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  16. * GNU General Public License for more details.
  17. *
  18. * You should have received a copy of the GNU General Public License
  19. * along with this program. If not, see <http://www.gnu.org/licenses/>.
  20. */
  21. #include <linux/audit.h>
  22. #include <linux/compat.h>
  23. #include <linux/kernel.h>
  24. #include <linux/sched.h>
  25. #include <linux/mm.h>
  26. #include <linux/smp.h>
  27. #include <linux/ptrace.h>
  28. #include <linux/user.h>
  29. #include <linux/seccomp.h>
  30. #include <linux/security.h>
  31. #include <linux/init.h>
  32. #include <linux/signal.h>
  33. #include <linux/uaccess.h>
  34. #include <linux/perf_event.h>
  35. #include <linux/hw_breakpoint.h>
  36. #include <linux/regset.h>
  37. #include <linux/tracehook.h>
  38. #include <linux/elf.h>
  39. #include <asm/compat.h>
  40. #include <asm/debug-monitors.h>
  41. #include <asm/pgtable.h>
  42. #include <asm/syscall.h>
  43. #include <asm/traps.h>
  44. #include <asm/system_misc.h>
  45. #define CREATE_TRACE_POINTS
  46. #include <trace/events/syscalls.h>
  47. struct pt_regs_offset {
  48. const char *name;
  49. int offset;
  50. };
  51. #define REG_OFFSET_NAME(r) {.name = #r, .offset = offsetof(struct pt_regs, r)}
  52. #define REG_OFFSET_END {.name = NULL, .offset = 0}
  53. #define GPR_OFFSET_NAME(r) \
  54. {.name = "x" #r, .offset = offsetof(struct pt_regs, regs[r])}
  55. static const struct pt_regs_offset regoffset_table[] = {
  56. GPR_OFFSET_NAME(0),
  57. GPR_OFFSET_NAME(1),
  58. GPR_OFFSET_NAME(2),
  59. GPR_OFFSET_NAME(3),
  60. GPR_OFFSET_NAME(4),
  61. GPR_OFFSET_NAME(5),
  62. GPR_OFFSET_NAME(6),
  63. GPR_OFFSET_NAME(7),
  64. GPR_OFFSET_NAME(8),
  65. GPR_OFFSET_NAME(9),
  66. GPR_OFFSET_NAME(10),
  67. GPR_OFFSET_NAME(11),
  68. GPR_OFFSET_NAME(12),
  69. GPR_OFFSET_NAME(13),
  70. GPR_OFFSET_NAME(14),
  71. GPR_OFFSET_NAME(15),
  72. GPR_OFFSET_NAME(16),
  73. GPR_OFFSET_NAME(17),
  74. GPR_OFFSET_NAME(18),
  75. GPR_OFFSET_NAME(19),
  76. GPR_OFFSET_NAME(20),
  77. GPR_OFFSET_NAME(21),
  78. GPR_OFFSET_NAME(22),
  79. GPR_OFFSET_NAME(23),
  80. GPR_OFFSET_NAME(24),
  81. GPR_OFFSET_NAME(25),
  82. GPR_OFFSET_NAME(26),
  83. GPR_OFFSET_NAME(27),
  84. GPR_OFFSET_NAME(28),
  85. GPR_OFFSET_NAME(29),
  86. GPR_OFFSET_NAME(30),
  87. {.name = "lr", .offset = offsetof(struct pt_regs, regs[30])},
  88. REG_OFFSET_NAME(sp),
  89. REG_OFFSET_NAME(pc),
  90. REG_OFFSET_NAME(pstate),
  91. REG_OFFSET_END,
  92. };
  93. /**
  94. * regs_query_register_offset() - query register offset from its name
  95. * @name: the name of a register
  96. *
  97. * regs_query_register_offset() returns the offset of a register in struct
  98. * pt_regs from its name. If the name is invalid, this returns -EINVAL;
  99. */
  100. int regs_query_register_offset(const char *name)
  101. {
  102. const struct pt_regs_offset *roff;
  103. for (roff = regoffset_table; roff->name != NULL; roff++)
  104. if (!strcmp(roff->name, name))
  105. return roff->offset;
  106. return -EINVAL;
  107. }
  108. /**
  109. * regs_within_kernel_stack() - check the address in the stack
  110. * @regs: pt_regs which contains kernel stack pointer.
  111. * @addr: address which is checked.
  112. *
  113. * regs_within_kernel_stack() checks @addr is within the kernel stack page(s).
  114. * If @addr is within the kernel stack, it returns true. If not, returns false.
  115. */
  116. static bool regs_within_kernel_stack(struct pt_regs *regs, unsigned long addr)
  117. {
  118. return ((addr & ~(THREAD_SIZE - 1)) ==
  119. (kernel_stack_pointer(regs) & ~(THREAD_SIZE - 1))) ||
  120. on_irq_stack(addr, raw_smp_processor_id());
  121. }
  122. /**
  123. * regs_get_kernel_stack_nth() - get Nth entry of the stack
  124. * @regs: pt_regs which contains kernel stack pointer.
  125. * @n: stack entry number.
  126. *
  127. * regs_get_kernel_stack_nth() returns @n th entry of the kernel stack which
  128. * is specified by @regs. If the @n th entry is NOT in the kernel stack,
  129. * this returns 0.
  130. */
  131. unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, unsigned int n)
  132. {
  133. unsigned long *addr = (unsigned long *)kernel_stack_pointer(regs);
  134. addr += n;
  135. if (regs_within_kernel_stack(regs, (unsigned long)addr))
  136. return *addr;
  137. else
  138. return 0;
  139. }
  140. /*
  141. * TODO: does not yet catch signals sent when the child dies.
  142. * in exit.c or in signal.c.
  143. */
  144. /*
  145. * Called by kernel/ptrace.c when detaching..
  146. */
  147. void ptrace_disable(struct task_struct *child)
  148. {
  149. /*
  150. * This would be better off in core code, but PTRACE_DETACH has
  151. * grown its fair share of arch-specific worts and changing it
  152. * is likely to cause regressions on obscure architectures.
  153. */
  154. user_disable_single_step(child);
  155. }
  156. #ifdef CONFIG_HAVE_HW_BREAKPOINT
  157. /*
  158. * Handle hitting a HW-breakpoint.
  159. */
  160. static void ptrace_hbptriggered(struct perf_event *bp,
  161. struct perf_sample_data *data,
  162. struct pt_regs *regs)
  163. {
  164. struct arch_hw_breakpoint *bkpt = counter_arch_bp(bp);
  165. siginfo_t info = {
  166. .si_signo = SIGTRAP,
  167. .si_errno = 0,
  168. .si_code = TRAP_HWBKPT,
  169. .si_addr = (void __user *)(bkpt->trigger),
  170. };
  171. #ifdef CONFIG_COMPAT
  172. int i;
  173. if (!is_compat_task())
  174. goto send_sig;
  175. for (i = 0; i < ARM_MAX_BRP; ++i) {
  176. if (current->thread.debug.hbp_break[i] == bp) {
  177. info.si_errno = (i << 1) + 1;
  178. break;
  179. }
  180. }
  181. for (i = 0; i < ARM_MAX_WRP; ++i) {
  182. if (current->thread.debug.hbp_watch[i] == bp) {
  183. info.si_errno = -((i << 1) + 1);
  184. break;
  185. }
  186. }
  187. send_sig:
  188. #endif
  189. force_sig_info(SIGTRAP, &info, current);
  190. }
  191. /*
  192. * Unregister breakpoints from this task and reset the pointers in
  193. * the thread_struct.
  194. */
  195. void flush_ptrace_hw_breakpoint(struct task_struct *tsk)
  196. {
  197. int i;
  198. struct thread_struct *t = &tsk->thread;
  199. for (i = 0; i < ARM_MAX_BRP; i++) {
  200. if (t->debug.hbp_break[i]) {
  201. unregister_hw_breakpoint(t->debug.hbp_break[i]);
  202. t->debug.hbp_break[i] = NULL;
  203. }
  204. }
  205. for (i = 0; i < ARM_MAX_WRP; i++) {
  206. if (t->debug.hbp_watch[i]) {
  207. unregister_hw_breakpoint(t->debug.hbp_watch[i]);
  208. t->debug.hbp_watch[i] = NULL;
  209. }
  210. }
  211. }
  212. void ptrace_hw_copy_thread(struct task_struct *tsk)
  213. {
  214. memset(&tsk->thread.debug, 0, sizeof(struct debug_info));
  215. }
  216. static struct perf_event *ptrace_hbp_get_event(unsigned int note_type,
  217. struct task_struct *tsk,
  218. unsigned long idx)
  219. {
  220. struct perf_event *bp = ERR_PTR(-EINVAL);
  221. switch (note_type) {
  222. case NT_ARM_HW_BREAK:
  223. if (idx < ARM_MAX_BRP)
  224. bp = tsk->thread.debug.hbp_break[idx];
  225. break;
  226. case NT_ARM_HW_WATCH:
  227. if (idx < ARM_MAX_WRP)
  228. bp = tsk->thread.debug.hbp_watch[idx];
  229. break;
  230. }
  231. return bp;
  232. }
  233. static int ptrace_hbp_set_event(unsigned int note_type,
  234. struct task_struct *tsk,
  235. unsigned long idx,
  236. struct perf_event *bp)
  237. {
  238. int err = -EINVAL;
  239. switch (note_type) {
  240. case NT_ARM_HW_BREAK:
  241. if (idx < ARM_MAX_BRP) {
  242. tsk->thread.debug.hbp_break[idx] = bp;
  243. err = 0;
  244. }
  245. break;
  246. case NT_ARM_HW_WATCH:
  247. if (idx < ARM_MAX_WRP) {
  248. tsk->thread.debug.hbp_watch[idx] = bp;
  249. err = 0;
  250. }
  251. break;
  252. }
  253. return err;
  254. }
  255. static struct perf_event *ptrace_hbp_create(unsigned int note_type,
  256. struct task_struct *tsk,
  257. unsigned long idx)
  258. {
  259. struct perf_event *bp;
  260. struct perf_event_attr attr;
  261. int err, type;
  262. switch (note_type) {
  263. case NT_ARM_HW_BREAK:
  264. type = HW_BREAKPOINT_X;
  265. break;
  266. case NT_ARM_HW_WATCH:
  267. type = HW_BREAKPOINT_RW;
  268. break;
  269. default:
  270. return ERR_PTR(-EINVAL);
  271. }
  272. ptrace_breakpoint_init(&attr);
  273. /*
  274. * Initialise fields to sane defaults
  275. * (i.e. values that will pass validation).
  276. */
  277. attr.bp_addr = 0;
  278. attr.bp_len = HW_BREAKPOINT_LEN_4;
  279. attr.bp_type = type;
  280. attr.disabled = 1;
  281. bp = register_user_hw_breakpoint(&attr, ptrace_hbptriggered, NULL, tsk);
  282. if (IS_ERR(bp))
  283. return bp;
  284. err = ptrace_hbp_set_event(note_type, tsk, idx, bp);
  285. if (err)
  286. return ERR_PTR(err);
  287. return bp;
  288. }
  289. static int ptrace_hbp_fill_attr_ctrl(unsigned int note_type,
  290. struct arch_hw_breakpoint_ctrl ctrl,
  291. struct perf_event_attr *attr)
  292. {
  293. int err, len, type, disabled = !ctrl.enabled;
  294. attr->disabled = disabled;
  295. if (disabled)
  296. return 0;
  297. err = arch_bp_generic_fields(ctrl, &len, &type);
  298. if (err)
  299. return err;
  300. switch (note_type) {
  301. case NT_ARM_HW_BREAK:
  302. if ((type & HW_BREAKPOINT_X) != type)
  303. return -EINVAL;
  304. break;
  305. case NT_ARM_HW_WATCH:
  306. if ((type & HW_BREAKPOINT_RW) != type)
  307. return -EINVAL;
  308. break;
  309. default:
  310. return -EINVAL;
  311. }
  312. attr->bp_len = len;
  313. attr->bp_type = type;
  314. return 0;
  315. }
  316. static int ptrace_hbp_get_resource_info(unsigned int note_type, u32 *info)
  317. {
  318. u8 num;
  319. u32 reg = 0;
  320. switch (note_type) {
  321. case NT_ARM_HW_BREAK:
  322. num = hw_breakpoint_slots(TYPE_INST);
  323. break;
  324. case NT_ARM_HW_WATCH:
  325. num = hw_breakpoint_slots(TYPE_DATA);
  326. break;
  327. default:
  328. return -EINVAL;
  329. }
  330. reg |= debug_monitors_arch();
  331. reg <<= 8;
  332. reg |= num;
  333. *info = reg;
  334. return 0;
  335. }
  336. static int ptrace_hbp_get_ctrl(unsigned int note_type,
  337. struct task_struct *tsk,
  338. unsigned long idx,
  339. u32 *ctrl)
  340. {
  341. struct perf_event *bp = ptrace_hbp_get_event(note_type, tsk, idx);
  342. if (IS_ERR(bp))
  343. return PTR_ERR(bp);
  344. *ctrl = bp ? encode_ctrl_reg(counter_arch_bp(bp)->ctrl) : 0;
  345. return 0;
  346. }
  347. static int ptrace_hbp_get_addr(unsigned int note_type,
  348. struct task_struct *tsk,
  349. unsigned long idx,
  350. u64 *addr)
  351. {
  352. struct perf_event *bp = ptrace_hbp_get_event(note_type, tsk, idx);
  353. if (IS_ERR(bp))
  354. return PTR_ERR(bp);
  355. *addr = bp ? bp->attr.bp_addr : 0;
  356. return 0;
  357. }
  358. static struct perf_event *ptrace_hbp_get_initialised_bp(unsigned int note_type,
  359. struct task_struct *tsk,
  360. unsigned long idx)
  361. {
  362. struct perf_event *bp = ptrace_hbp_get_event(note_type, tsk, idx);
  363. if (!bp)
  364. bp = ptrace_hbp_create(note_type, tsk, idx);
  365. return bp;
  366. }
  367. static int ptrace_hbp_set_ctrl(unsigned int note_type,
  368. struct task_struct *tsk,
  369. unsigned long idx,
  370. u32 uctrl)
  371. {
  372. int err;
  373. struct perf_event *bp;
  374. struct perf_event_attr attr;
  375. struct arch_hw_breakpoint_ctrl ctrl;
  376. bp = ptrace_hbp_get_initialised_bp(note_type, tsk, idx);
  377. if (IS_ERR(bp)) {
  378. err = PTR_ERR(bp);
  379. return err;
  380. }
  381. attr = bp->attr;
  382. decode_ctrl_reg(uctrl, &ctrl);
  383. err = ptrace_hbp_fill_attr_ctrl(note_type, ctrl, &attr);
  384. if (err)
  385. return err;
  386. return modify_user_hw_breakpoint(bp, &attr);
  387. }
  388. static int ptrace_hbp_set_addr(unsigned int note_type,
  389. struct task_struct *tsk,
  390. unsigned long idx,
  391. u64 addr)
  392. {
  393. int err;
  394. struct perf_event *bp;
  395. struct perf_event_attr attr;
  396. bp = ptrace_hbp_get_initialised_bp(note_type, tsk, idx);
  397. if (IS_ERR(bp)) {
  398. err = PTR_ERR(bp);
  399. return err;
  400. }
  401. attr = bp->attr;
  402. attr.bp_addr = addr;
  403. err = modify_user_hw_breakpoint(bp, &attr);
  404. return err;
  405. }
  406. #define PTRACE_HBP_ADDR_SZ sizeof(u64)
  407. #define PTRACE_HBP_CTRL_SZ sizeof(u32)
  408. #define PTRACE_HBP_PAD_SZ sizeof(u32)
  409. static int hw_break_get(struct task_struct *target,
  410. const struct user_regset *regset,
  411. unsigned int pos, unsigned int count,
  412. void *kbuf, void __user *ubuf)
  413. {
  414. unsigned int note_type = regset->core_note_type;
  415. int ret, idx = 0, offset, limit;
  416. u32 info, ctrl;
  417. u64 addr;
  418. /* Resource info */
  419. ret = ptrace_hbp_get_resource_info(note_type, &info);
  420. if (ret)
  421. return ret;
  422. ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &info, 0,
  423. sizeof(info));
  424. if (ret)
  425. return ret;
  426. /* Pad */
  427. offset = offsetof(struct user_hwdebug_state, pad);
  428. ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf, offset,
  429. offset + PTRACE_HBP_PAD_SZ);
  430. if (ret)
  431. return ret;
  432. /* (address, ctrl) registers */
  433. offset = offsetof(struct user_hwdebug_state, dbg_regs);
  434. limit = regset->n * regset->size;
  435. while (count && offset < limit) {
  436. ret = ptrace_hbp_get_addr(note_type, target, idx, &addr);
  437. if (ret)
  438. return ret;
  439. ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &addr,
  440. offset, offset + PTRACE_HBP_ADDR_SZ);
  441. if (ret)
  442. return ret;
  443. offset += PTRACE_HBP_ADDR_SZ;
  444. ret = ptrace_hbp_get_ctrl(note_type, target, idx, &ctrl);
  445. if (ret)
  446. return ret;
  447. ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &ctrl,
  448. offset, offset + PTRACE_HBP_CTRL_SZ);
  449. if (ret)
  450. return ret;
  451. offset += PTRACE_HBP_CTRL_SZ;
  452. ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
  453. offset,
  454. offset + PTRACE_HBP_PAD_SZ);
  455. if (ret)
  456. return ret;
  457. offset += PTRACE_HBP_PAD_SZ;
  458. idx++;
  459. }
  460. return 0;
  461. }
  462. static int hw_break_set(struct task_struct *target,
  463. const struct user_regset *regset,
  464. unsigned int pos, unsigned int count,
  465. const void *kbuf, const void __user *ubuf)
  466. {
  467. unsigned int note_type = regset->core_note_type;
  468. int ret, idx = 0, offset, limit;
  469. u32 ctrl;
  470. u64 addr;
  471. /* Resource info and pad */
  472. offset = offsetof(struct user_hwdebug_state, dbg_regs);
  473. ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf, 0, offset);
  474. if (ret)
  475. return ret;
  476. /* (address, ctrl) registers */
  477. limit = regset->n * regset->size;
  478. while (count && offset < limit) {
  479. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &addr,
  480. offset, offset + PTRACE_HBP_ADDR_SZ);
  481. if (ret)
  482. return ret;
  483. ret = ptrace_hbp_set_addr(note_type, target, idx, addr);
  484. if (ret)
  485. return ret;
  486. offset += PTRACE_HBP_ADDR_SZ;
  487. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &ctrl,
  488. offset, offset + PTRACE_HBP_CTRL_SZ);
  489. if (ret)
  490. return ret;
  491. ret = ptrace_hbp_set_ctrl(note_type, target, idx, ctrl);
  492. if (ret)
  493. return ret;
  494. offset += PTRACE_HBP_CTRL_SZ;
  495. ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
  496. offset,
  497. offset + PTRACE_HBP_PAD_SZ);
  498. if (ret)
  499. return ret;
  500. offset += PTRACE_HBP_PAD_SZ;
  501. idx++;
  502. }
  503. return 0;
  504. }
  505. #endif /* CONFIG_HAVE_HW_BREAKPOINT */
  506. static int gpr_get(struct task_struct *target,
  507. const struct user_regset *regset,
  508. unsigned int pos, unsigned int count,
  509. void *kbuf, void __user *ubuf)
  510. {
  511. struct user_pt_regs *uregs = &task_pt_regs(target)->user_regs;
  512. return user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0, -1);
  513. }
  514. static int gpr_set(struct task_struct *target, const struct user_regset *regset,
  515. unsigned int pos, unsigned int count,
  516. const void *kbuf, const void __user *ubuf)
  517. {
  518. int ret;
  519. struct user_pt_regs newregs;
  520. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &newregs, 0, -1);
  521. if (ret)
  522. return ret;
  523. if (!valid_user_regs(&newregs, target))
  524. return -EINVAL;
  525. task_pt_regs(target)->user_regs = newregs;
  526. return 0;
  527. }
  528. /*
  529. * TODO: update fp accessors for lazy context switching (sync/flush hwstate)
  530. */
  531. static int fpr_get(struct task_struct *target, const struct user_regset *regset,
  532. unsigned int pos, unsigned int count,
  533. void *kbuf, void __user *ubuf)
  534. {
  535. struct user_fpsimd_state *uregs;
  536. uregs = &target->thread.fpsimd_state.user_fpsimd;
  537. return user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0, -1);
  538. }
  539. static int fpr_set(struct task_struct *target, const struct user_regset *regset,
  540. unsigned int pos, unsigned int count,
  541. const void *kbuf, const void __user *ubuf)
  542. {
  543. int ret;
  544. struct user_fpsimd_state newstate;
  545. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &newstate, 0, -1);
  546. if (ret)
  547. return ret;
  548. target->thread.fpsimd_state.user_fpsimd = newstate;
  549. fpsimd_flush_task_state(target);
  550. return ret;
  551. }
  552. static int tls_get(struct task_struct *target, const struct user_regset *regset,
  553. unsigned int pos, unsigned int count,
  554. void *kbuf, void __user *ubuf)
  555. {
  556. unsigned long *tls = &target->thread.tp_value;
  557. return user_regset_copyout(&pos, &count, &kbuf, &ubuf, tls, 0, -1);
  558. }
  559. static int tls_set(struct task_struct *target, const struct user_regset *regset,
  560. unsigned int pos, unsigned int count,
  561. const void *kbuf, const void __user *ubuf)
  562. {
  563. int ret;
  564. unsigned long tls;
  565. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &tls, 0, -1);
  566. if (ret)
  567. return ret;
  568. target->thread.tp_value = tls;
  569. return ret;
  570. }
  571. static int system_call_get(struct task_struct *target,
  572. const struct user_regset *regset,
  573. unsigned int pos, unsigned int count,
  574. void *kbuf, void __user *ubuf)
  575. {
  576. int syscallno = task_pt_regs(target)->syscallno;
  577. return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
  578. &syscallno, 0, -1);
  579. }
  580. static int system_call_set(struct task_struct *target,
  581. const struct user_regset *regset,
  582. unsigned int pos, unsigned int count,
  583. const void *kbuf, const void __user *ubuf)
  584. {
  585. int syscallno, ret;
  586. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &syscallno, 0, -1);
  587. if (ret)
  588. return ret;
  589. task_pt_regs(target)->syscallno = syscallno;
  590. return ret;
  591. }
  592. enum aarch64_regset {
  593. REGSET_GPR,
  594. REGSET_FPR,
  595. REGSET_TLS,
  596. #ifdef CONFIG_HAVE_HW_BREAKPOINT
  597. REGSET_HW_BREAK,
  598. REGSET_HW_WATCH,
  599. #endif
  600. REGSET_SYSTEM_CALL,
  601. };
  602. static const struct user_regset aarch64_regsets[] = {
  603. [REGSET_GPR] = {
  604. .core_note_type = NT_PRSTATUS,
  605. .n = sizeof(struct user_pt_regs) / sizeof(u64),
  606. .size = sizeof(u64),
  607. .align = sizeof(u64),
  608. .get = gpr_get,
  609. .set = gpr_set
  610. },
  611. [REGSET_FPR] = {
  612. .core_note_type = NT_PRFPREG,
  613. .n = sizeof(struct user_fpsimd_state) / sizeof(u32),
  614. /*
  615. * We pretend we have 32-bit registers because the fpsr and
  616. * fpcr are 32-bits wide.
  617. */
  618. .size = sizeof(u32),
  619. .align = sizeof(u32),
  620. .get = fpr_get,
  621. .set = fpr_set
  622. },
  623. [REGSET_TLS] = {
  624. .core_note_type = NT_ARM_TLS,
  625. .n = 1,
  626. .size = sizeof(void *),
  627. .align = sizeof(void *),
  628. .get = tls_get,
  629. .set = tls_set,
  630. },
  631. #ifdef CONFIG_HAVE_HW_BREAKPOINT
  632. [REGSET_HW_BREAK] = {
  633. .core_note_type = NT_ARM_HW_BREAK,
  634. .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
  635. .size = sizeof(u32),
  636. .align = sizeof(u32),
  637. .get = hw_break_get,
  638. .set = hw_break_set,
  639. },
  640. [REGSET_HW_WATCH] = {
  641. .core_note_type = NT_ARM_HW_WATCH,
  642. .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
  643. .size = sizeof(u32),
  644. .align = sizeof(u32),
  645. .get = hw_break_get,
  646. .set = hw_break_set,
  647. },
  648. #endif
  649. [REGSET_SYSTEM_CALL] = {
  650. .core_note_type = NT_ARM_SYSTEM_CALL,
  651. .n = 1,
  652. .size = sizeof(int),
  653. .align = sizeof(int),
  654. .get = system_call_get,
  655. .set = system_call_set,
  656. },
  657. };
  658. static const struct user_regset_view user_aarch64_view = {
  659. .name = "aarch64", .e_machine = EM_AARCH64,
  660. .regsets = aarch64_regsets, .n = ARRAY_SIZE(aarch64_regsets)
  661. };
  662. #ifdef CONFIG_COMPAT
  663. #include <linux/compat.h>
  664. enum compat_regset {
  665. REGSET_COMPAT_GPR,
  666. REGSET_COMPAT_VFP,
  667. };
  668. static int compat_gpr_get(struct task_struct *target,
  669. const struct user_regset *regset,
  670. unsigned int pos, unsigned int count,
  671. void *kbuf, void __user *ubuf)
  672. {
  673. int ret = 0;
  674. unsigned int i, start, num_regs;
  675. /* Calculate the number of AArch32 registers contained in count */
  676. num_regs = count / regset->size;
  677. /* Convert pos into an register number */
  678. start = pos / regset->size;
  679. if (start + num_regs > regset->n)
  680. return -EIO;
  681. for (i = 0; i < num_regs; ++i) {
  682. unsigned int idx = start + i;
  683. compat_ulong_t reg;
  684. switch (idx) {
  685. case 15:
  686. reg = task_pt_regs(target)->pc;
  687. break;
  688. case 16:
  689. reg = task_pt_regs(target)->pstate;
  690. break;
  691. case 17:
  692. reg = task_pt_regs(target)->orig_x0;
  693. break;
  694. default:
  695. reg = task_pt_regs(target)->regs[idx];
  696. }
  697. if (kbuf) {
  698. memcpy(kbuf, &reg, sizeof(reg));
  699. kbuf += sizeof(reg);
  700. } else {
  701. ret = copy_to_user(ubuf, &reg, sizeof(reg));
  702. if (ret) {
  703. ret = -EFAULT;
  704. break;
  705. }
  706. ubuf += sizeof(reg);
  707. }
  708. }
  709. return ret;
  710. }
  711. static int compat_gpr_set(struct task_struct *target,
  712. const struct user_regset *regset,
  713. unsigned int pos, unsigned int count,
  714. const void *kbuf, const void __user *ubuf)
  715. {
  716. struct pt_regs newregs;
  717. int ret = 0;
  718. unsigned int i, start, num_regs;
  719. /* Calculate the number of AArch32 registers contained in count */
  720. num_regs = count / regset->size;
  721. /* Convert pos into an register number */
  722. start = pos / regset->size;
  723. if (start + num_regs > regset->n)
  724. return -EIO;
  725. newregs = *task_pt_regs(target);
  726. for (i = 0; i < num_regs; ++i) {
  727. unsigned int idx = start + i;
  728. compat_ulong_t reg;
  729. if (kbuf) {
  730. memcpy(&reg, kbuf, sizeof(reg));
  731. kbuf += sizeof(reg);
  732. } else {
  733. ret = copy_from_user(&reg, ubuf, sizeof(reg));
  734. if (ret) {
  735. ret = -EFAULT;
  736. break;
  737. }
  738. ubuf += sizeof(reg);
  739. }
  740. switch (idx) {
  741. case 15:
  742. newregs.pc = reg;
  743. break;
  744. case 16:
  745. newregs.pstate = reg;
  746. break;
  747. case 17:
  748. newregs.orig_x0 = reg;
  749. break;
  750. default:
  751. newregs.regs[idx] = reg;
  752. }
  753. }
  754. if (valid_user_regs(&newregs.user_regs, target))
  755. *task_pt_regs(target) = newregs;
  756. else
  757. ret = -EINVAL;
  758. return ret;
  759. }
  760. static int compat_vfp_get(struct task_struct *target,
  761. const struct user_regset *regset,
  762. unsigned int pos, unsigned int count,
  763. void *kbuf, void __user *ubuf)
  764. {
  765. struct user_fpsimd_state *uregs;
  766. compat_ulong_t fpscr;
  767. int ret;
  768. uregs = &target->thread.fpsimd_state.user_fpsimd;
  769. /*
  770. * The VFP registers are packed into the fpsimd_state, so they all sit
  771. * nicely together for us. We just need to create the fpscr separately.
  772. */
  773. ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0,
  774. VFP_STATE_SIZE - sizeof(compat_ulong_t));
  775. if (count && !ret) {
  776. fpscr = (uregs->fpsr & VFP_FPSCR_STAT_MASK) |
  777. (uregs->fpcr & VFP_FPSCR_CTRL_MASK);
  778. ret = put_user(fpscr, (compat_ulong_t *)ubuf);
  779. }
  780. return ret;
  781. }
  782. static int compat_vfp_set(struct task_struct *target,
  783. const struct user_regset *regset,
  784. unsigned int pos, unsigned int count,
  785. const void *kbuf, const void __user *ubuf)
  786. {
  787. struct user_fpsimd_state *uregs;
  788. compat_ulong_t fpscr;
  789. int ret;
  790. if (pos + count > VFP_STATE_SIZE)
  791. return -EIO;
  792. uregs = &target->thread.fpsimd_state.user_fpsimd;
  793. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, uregs, 0,
  794. VFP_STATE_SIZE - sizeof(compat_ulong_t));
  795. if (count && !ret) {
  796. ret = get_user(fpscr, (compat_ulong_t *)ubuf);
  797. uregs->fpsr = fpscr & VFP_FPSCR_STAT_MASK;
  798. uregs->fpcr = fpscr & VFP_FPSCR_CTRL_MASK;
  799. }
  800. fpsimd_flush_task_state(target);
  801. return ret;
  802. }
  803. static int compat_tls_get(struct task_struct *target,
  804. const struct user_regset *regset, unsigned int pos,
  805. unsigned int count, void *kbuf, void __user *ubuf)
  806. {
  807. compat_ulong_t tls = (compat_ulong_t)target->thread.tp_value;
  808. return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &tls, 0, -1);
  809. }
  810. static int compat_tls_set(struct task_struct *target,
  811. const struct user_regset *regset, unsigned int pos,
  812. unsigned int count, const void *kbuf,
  813. const void __user *ubuf)
  814. {
  815. int ret;
  816. compat_ulong_t tls;
  817. ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &tls, 0, -1);
  818. if (ret)
  819. return ret;
  820. target->thread.tp_value = tls;
  821. return ret;
  822. }
  823. static const struct user_regset aarch32_regsets[] = {
  824. [REGSET_COMPAT_GPR] = {
  825. .core_note_type = NT_PRSTATUS,
  826. .n = COMPAT_ELF_NGREG,
  827. .size = sizeof(compat_elf_greg_t),
  828. .align = sizeof(compat_elf_greg_t),
  829. .get = compat_gpr_get,
  830. .set = compat_gpr_set
  831. },
  832. [REGSET_COMPAT_VFP] = {
  833. .core_note_type = NT_ARM_VFP,
  834. .n = VFP_STATE_SIZE / sizeof(compat_ulong_t),
  835. .size = sizeof(compat_ulong_t),
  836. .align = sizeof(compat_ulong_t),
  837. .get = compat_vfp_get,
  838. .set = compat_vfp_set
  839. },
  840. };
  841. static const struct user_regset_view user_aarch32_view = {
  842. .name = "aarch32", .e_machine = EM_ARM,
  843. .regsets = aarch32_regsets, .n = ARRAY_SIZE(aarch32_regsets)
  844. };
  845. static const struct user_regset aarch32_ptrace_regsets[] = {
  846. [REGSET_GPR] = {
  847. .core_note_type = NT_PRSTATUS,
  848. .n = COMPAT_ELF_NGREG,
  849. .size = sizeof(compat_elf_greg_t),
  850. .align = sizeof(compat_elf_greg_t),
  851. .get = compat_gpr_get,
  852. .set = compat_gpr_set
  853. },
  854. [REGSET_FPR] = {
  855. .core_note_type = NT_ARM_VFP,
  856. .n = VFP_STATE_SIZE / sizeof(compat_ulong_t),
  857. .size = sizeof(compat_ulong_t),
  858. .align = sizeof(compat_ulong_t),
  859. .get = compat_vfp_get,
  860. .set = compat_vfp_set
  861. },
  862. [REGSET_TLS] = {
  863. .core_note_type = NT_ARM_TLS,
  864. .n = 1,
  865. .size = sizeof(compat_ulong_t),
  866. .align = sizeof(compat_ulong_t),
  867. .get = compat_tls_get,
  868. .set = compat_tls_set,
  869. },
  870. #ifdef CONFIG_HAVE_HW_BREAKPOINT
  871. [REGSET_HW_BREAK] = {
  872. .core_note_type = NT_ARM_HW_BREAK,
  873. .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
  874. .size = sizeof(u32),
  875. .align = sizeof(u32),
  876. .get = hw_break_get,
  877. .set = hw_break_set,
  878. },
  879. [REGSET_HW_WATCH] = {
  880. .core_note_type = NT_ARM_HW_WATCH,
  881. .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
  882. .size = sizeof(u32),
  883. .align = sizeof(u32),
  884. .get = hw_break_get,
  885. .set = hw_break_set,
  886. },
  887. #endif
  888. [REGSET_SYSTEM_CALL] = {
  889. .core_note_type = NT_ARM_SYSTEM_CALL,
  890. .n = 1,
  891. .size = sizeof(int),
  892. .align = sizeof(int),
  893. .get = system_call_get,
  894. .set = system_call_set,
  895. },
  896. };
  897. static const struct user_regset_view user_aarch32_ptrace_view = {
  898. .name = "aarch32", .e_machine = EM_ARM,
  899. .regsets = aarch32_ptrace_regsets, .n = ARRAY_SIZE(aarch32_ptrace_regsets)
  900. };
  901. static int compat_ptrace_read_user(struct task_struct *tsk, compat_ulong_t off,
  902. compat_ulong_t __user *ret)
  903. {
  904. compat_ulong_t tmp;
  905. if (off & 3)
  906. return -EIO;
  907. if (off == COMPAT_PT_TEXT_ADDR)
  908. tmp = tsk->mm->start_code;
  909. else if (off == COMPAT_PT_DATA_ADDR)
  910. tmp = tsk->mm->start_data;
  911. else if (off == COMPAT_PT_TEXT_END_ADDR)
  912. tmp = tsk->mm->end_code;
  913. else if (off < sizeof(compat_elf_gregset_t))
  914. return copy_regset_to_user(tsk, &user_aarch32_view,
  915. REGSET_COMPAT_GPR, off,
  916. sizeof(compat_ulong_t), ret);
  917. else if (off >= COMPAT_USER_SZ)
  918. return -EIO;
  919. else
  920. tmp = 0;
  921. return put_user(tmp, ret);
  922. }
  923. static int compat_ptrace_write_user(struct task_struct *tsk, compat_ulong_t off,
  924. compat_ulong_t val)
  925. {
  926. int ret;
  927. mm_segment_t old_fs = get_fs();
  928. if (off & 3 || off >= COMPAT_USER_SZ)
  929. return -EIO;
  930. if (off >= sizeof(compat_elf_gregset_t))
  931. return 0;
  932. set_fs(KERNEL_DS);
  933. ret = copy_regset_from_user(tsk, &user_aarch32_view,
  934. REGSET_COMPAT_GPR, off,
  935. sizeof(compat_ulong_t),
  936. &val);
  937. set_fs(old_fs);
  938. return ret;
  939. }
  940. #ifdef CONFIG_HAVE_HW_BREAKPOINT
  941. /*
  942. * Convert a virtual register number into an index for a thread_info
  943. * breakpoint array. Breakpoints are identified using positive numbers
  944. * whilst watchpoints are negative. The registers are laid out as pairs
  945. * of (address, control), each pair mapping to a unique hw_breakpoint struct.
  946. * Register 0 is reserved for describing resource information.
  947. */
  948. static int compat_ptrace_hbp_num_to_idx(compat_long_t num)
  949. {
  950. return (abs(num) - 1) >> 1;
  951. }
  952. static int compat_ptrace_hbp_get_resource_info(u32 *kdata)
  953. {
  954. u8 num_brps, num_wrps, debug_arch, wp_len;
  955. u32 reg = 0;
  956. num_brps = hw_breakpoint_slots(TYPE_INST);
  957. num_wrps = hw_breakpoint_slots(TYPE_DATA);
  958. debug_arch = debug_monitors_arch();
  959. wp_len = 8;
  960. reg |= debug_arch;
  961. reg <<= 8;
  962. reg |= wp_len;
  963. reg <<= 8;
  964. reg |= num_wrps;
  965. reg <<= 8;
  966. reg |= num_brps;
  967. *kdata = reg;
  968. return 0;
  969. }
  970. static int compat_ptrace_hbp_get(unsigned int note_type,
  971. struct task_struct *tsk,
  972. compat_long_t num,
  973. u32 *kdata)
  974. {
  975. u64 addr = 0;
  976. u32 ctrl = 0;
  977. int err, idx = compat_ptrace_hbp_num_to_idx(num);;
  978. if (num & 1) {
  979. err = ptrace_hbp_get_addr(note_type, tsk, idx, &addr);
  980. *kdata = (u32)addr;
  981. } else {
  982. err = ptrace_hbp_get_ctrl(note_type, tsk, idx, &ctrl);
  983. *kdata = ctrl;
  984. }
  985. return err;
  986. }
  987. static int compat_ptrace_hbp_set(unsigned int note_type,
  988. struct task_struct *tsk,
  989. compat_long_t num,
  990. u32 *kdata)
  991. {
  992. u64 addr;
  993. u32 ctrl;
  994. int err, idx = compat_ptrace_hbp_num_to_idx(num);
  995. if (num & 1) {
  996. addr = *kdata;
  997. err = ptrace_hbp_set_addr(note_type, tsk, idx, addr);
  998. } else {
  999. ctrl = *kdata;
  1000. err = ptrace_hbp_set_ctrl(note_type, tsk, idx, ctrl);
  1001. }
  1002. return err;
  1003. }
  1004. static int compat_ptrace_gethbpregs(struct task_struct *tsk, compat_long_t num,
  1005. compat_ulong_t __user *data)
  1006. {
  1007. int ret;
  1008. u32 kdata;
  1009. mm_segment_t old_fs = get_fs();
  1010. set_fs(KERNEL_DS);
  1011. /* Watchpoint */
  1012. if (num < 0) {
  1013. ret = compat_ptrace_hbp_get(NT_ARM_HW_WATCH, tsk, num, &kdata);
  1014. /* Resource info */
  1015. } else if (num == 0) {
  1016. ret = compat_ptrace_hbp_get_resource_info(&kdata);
  1017. /* Breakpoint */
  1018. } else {
  1019. ret = compat_ptrace_hbp_get(NT_ARM_HW_BREAK, tsk, num, &kdata);
  1020. }
  1021. set_fs(old_fs);
  1022. if (!ret)
  1023. ret = put_user(kdata, data);
  1024. return ret;
  1025. }
  1026. static int compat_ptrace_sethbpregs(struct task_struct *tsk, compat_long_t num,
  1027. compat_ulong_t __user *data)
  1028. {
  1029. int ret;
  1030. u32 kdata = 0;
  1031. mm_segment_t old_fs = get_fs();
  1032. if (num == 0)
  1033. return 0;
  1034. ret = get_user(kdata, data);
  1035. if (ret)
  1036. return ret;
  1037. set_fs(KERNEL_DS);
  1038. if (num < 0)
  1039. ret = compat_ptrace_hbp_set(NT_ARM_HW_WATCH, tsk, num, &kdata);
  1040. else
  1041. ret = compat_ptrace_hbp_set(NT_ARM_HW_BREAK, tsk, num, &kdata);
  1042. set_fs(old_fs);
  1043. return ret;
  1044. }
  1045. #endif /* CONFIG_HAVE_HW_BREAKPOINT */
  1046. long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
  1047. compat_ulong_t caddr, compat_ulong_t cdata)
  1048. {
  1049. unsigned long addr = caddr;
  1050. unsigned long data = cdata;
  1051. void __user *datap = compat_ptr(data);
  1052. int ret;
  1053. switch (request) {
  1054. case PTRACE_PEEKUSR:
  1055. ret = compat_ptrace_read_user(child, addr, datap);
  1056. break;
  1057. case PTRACE_POKEUSR:
  1058. ret = compat_ptrace_write_user(child, addr, data);
  1059. break;
  1060. case COMPAT_PTRACE_GETREGS:
  1061. ret = copy_regset_to_user(child,
  1062. &user_aarch32_view,
  1063. REGSET_COMPAT_GPR,
  1064. 0, sizeof(compat_elf_gregset_t),
  1065. datap);
  1066. break;
  1067. case COMPAT_PTRACE_SETREGS:
  1068. ret = copy_regset_from_user(child,
  1069. &user_aarch32_view,
  1070. REGSET_COMPAT_GPR,
  1071. 0, sizeof(compat_elf_gregset_t),
  1072. datap);
  1073. break;
  1074. case COMPAT_PTRACE_GET_THREAD_AREA:
  1075. ret = put_user((compat_ulong_t)child->thread.tp_value,
  1076. (compat_ulong_t __user *)datap);
  1077. break;
  1078. case COMPAT_PTRACE_SET_SYSCALL:
  1079. task_pt_regs(child)->syscallno = data;
  1080. ret = 0;
  1081. break;
  1082. case COMPAT_PTRACE_GETVFPREGS:
  1083. ret = copy_regset_to_user(child,
  1084. &user_aarch32_view,
  1085. REGSET_COMPAT_VFP,
  1086. 0, VFP_STATE_SIZE,
  1087. datap);
  1088. break;
  1089. case COMPAT_PTRACE_SETVFPREGS:
  1090. ret = copy_regset_from_user(child,
  1091. &user_aarch32_view,
  1092. REGSET_COMPAT_VFP,
  1093. 0, VFP_STATE_SIZE,
  1094. datap);
  1095. break;
  1096. #ifdef CONFIG_HAVE_HW_BREAKPOINT
  1097. case COMPAT_PTRACE_GETHBPREGS:
  1098. ret = compat_ptrace_gethbpregs(child, addr, datap);
  1099. break;
  1100. case COMPAT_PTRACE_SETHBPREGS:
  1101. ret = compat_ptrace_sethbpregs(child, addr, datap);
  1102. break;
  1103. #endif
  1104. default:
  1105. ret = compat_ptrace_request(child, request, addr,
  1106. data);
  1107. break;
  1108. }
  1109. return ret;
  1110. }
  1111. #endif /* CONFIG_COMPAT */
  1112. const struct user_regset_view *task_user_regset_view(struct task_struct *task)
  1113. {
  1114. #ifdef CONFIG_COMPAT
  1115. /*
  1116. * Core dumping of 32-bit tasks or compat ptrace requests must use the
  1117. * user_aarch32_view compatible with arm32. Native ptrace requests on
  1118. * 32-bit children use an extended user_aarch32_ptrace_view to allow
  1119. * access to the TLS register.
  1120. */
  1121. if (is_compat_task())
  1122. return &user_aarch32_view;
  1123. else if (is_compat_thread(task_thread_info(task)))
  1124. return &user_aarch32_ptrace_view;
  1125. #endif
  1126. return &user_aarch64_view;
  1127. }
  1128. long arch_ptrace(struct task_struct *child, long request,
  1129. unsigned long addr, unsigned long data)
  1130. {
  1131. return ptrace_request(child, request, addr, data);
  1132. }
  1133. enum ptrace_syscall_dir {
  1134. PTRACE_SYSCALL_ENTER = 0,
  1135. PTRACE_SYSCALL_EXIT,
  1136. };
  1137. static void tracehook_report_syscall(struct pt_regs *regs,
  1138. enum ptrace_syscall_dir dir)
  1139. {
  1140. int regno;
  1141. unsigned long saved_reg;
  1142. /*
  1143. * A scratch register (ip(r12) on AArch32, x7 on AArch64) is
  1144. * used to denote syscall entry/exit:
  1145. */
  1146. regno = (is_compat_task() ? 12 : 7);
  1147. saved_reg = regs->regs[regno];
  1148. regs->regs[regno] = dir;
  1149. if (dir == PTRACE_SYSCALL_EXIT)
  1150. tracehook_report_syscall_exit(regs, 0);
  1151. else if (tracehook_report_syscall_entry(regs))
  1152. regs->syscallno = ~0UL;
  1153. regs->regs[regno] = saved_reg;
  1154. }
  1155. asmlinkage int syscall_trace_enter(struct pt_regs *regs)
  1156. {
  1157. if (test_thread_flag(TIF_SYSCALL_TRACE))
  1158. tracehook_report_syscall(regs, PTRACE_SYSCALL_ENTER);
  1159. /* Do the secure computing after ptrace; failures should be fast. */
  1160. if (secure_computing(NULL) == -1)
  1161. return -1;
  1162. if (test_thread_flag(TIF_SYSCALL_TRACEPOINT))
  1163. trace_sys_enter(regs, regs->syscallno);
  1164. audit_syscall_entry(regs->syscallno, regs->orig_x0, regs->regs[1],
  1165. regs->regs[2], regs->regs[3]);
  1166. return regs->syscallno;
  1167. }
  1168. asmlinkage void syscall_trace_exit(struct pt_regs *regs)
  1169. {
  1170. audit_syscall_exit(regs);
  1171. if (test_thread_flag(TIF_SYSCALL_TRACEPOINT))
  1172. trace_sys_exit(regs, regs_return_value(regs));
  1173. if (test_thread_flag(TIF_SYSCALL_TRACE))
  1174. tracehook_report_syscall(regs, PTRACE_SYSCALL_EXIT);
  1175. }
  1176. /*
  1177. * Bits which are always architecturally RES0 per ARM DDI 0487A.h
  1178. * Userspace cannot use these until they have an architectural meaning.
  1179. * We also reserve IL for the kernel; SS is handled dynamically.
  1180. */
  1181. #define SPSR_EL1_AARCH64_RES0_BITS \
  1182. (GENMASK_ULL(63,32) | GENMASK_ULL(27, 22) | GENMASK_ULL(20, 10) | \
  1183. GENMASK_ULL(5, 5))
  1184. #define SPSR_EL1_AARCH32_RES0_BITS \
  1185. (GENMASK_ULL(63,32) | GENMASK_ULL(24, 22) | GENMASK_ULL(20,20))
  1186. static int valid_compat_regs(struct user_pt_regs *regs)
  1187. {
  1188. regs->pstate &= ~SPSR_EL1_AARCH32_RES0_BITS;
  1189. if (!system_supports_mixed_endian_el0()) {
  1190. if (IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
  1191. regs->pstate |= COMPAT_PSR_E_BIT;
  1192. else
  1193. regs->pstate &= ~COMPAT_PSR_E_BIT;
  1194. }
  1195. if (user_mode(regs) && (regs->pstate & PSR_MODE32_BIT) &&
  1196. (regs->pstate & COMPAT_PSR_A_BIT) == 0 &&
  1197. (regs->pstate & COMPAT_PSR_I_BIT) == 0 &&
  1198. (regs->pstate & COMPAT_PSR_F_BIT) == 0) {
  1199. return 1;
  1200. }
  1201. /*
  1202. * Force PSR to a valid 32-bit EL0t, preserving the same bits as
  1203. * arch/arm.
  1204. */
  1205. regs->pstate &= COMPAT_PSR_N_BIT | COMPAT_PSR_Z_BIT |
  1206. COMPAT_PSR_C_BIT | COMPAT_PSR_V_BIT |
  1207. COMPAT_PSR_Q_BIT | COMPAT_PSR_IT_MASK |
  1208. COMPAT_PSR_GE_MASK | COMPAT_PSR_E_BIT |
  1209. COMPAT_PSR_T_BIT;
  1210. regs->pstate |= PSR_MODE32_BIT;
  1211. return 0;
  1212. }
  1213. static int valid_native_regs(struct user_pt_regs *regs)
  1214. {
  1215. regs->pstate &= ~SPSR_EL1_AARCH64_RES0_BITS;
  1216. if (user_mode(regs) && !(regs->pstate & PSR_MODE32_BIT) &&
  1217. (regs->pstate & PSR_D_BIT) == 0 &&
  1218. (regs->pstate & PSR_A_BIT) == 0 &&
  1219. (regs->pstate & PSR_I_BIT) == 0 &&
  1220. (regs->pstate & PSR_F_BIT) == 0) {
  1221. return 1;
  1222. }
  1223. /* Force PSR to a valid 64-bit EL0t */
  1224. regs->pstate &= PSR_N_BIT | PSR_Z_BIT | PSR_C_BIT | PSR_V_BIT;
  1225. return 0;
  1226. }
  1227. /*
  1228. * Are the current registers suitable for user mode? (used to maintain
  1229. * security in signal handlers)
  1230. */
  1231. int valid_user_regs(struct user_pt_regs *regs, struct task_struct *task)
  1232. {
  1233. if (!test_tsk_thread_flag(task, TIF_SINGLESTEP))
  1234. regs->pstate &= ~DBG_SPSR_SS;
  1235. if (is_compat_thread(task_thread_info(task)))
  1236. return valid_compat_regs(regs);
  1237. else
  1238. return valid_native_regs(regs);
  1239. }