common.h 4.5 KB

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  1. /*
  2. * Copyright 2004-2014 Freescale Semiconductor, Inc. All Rights Reserved.
  3. */
  4. /*
  5. * This program is free software; you can redistribute it and/or modify
  6. * it under the terms of the GNU General Public License version 2 as
  7. * published by the Free Software Foundation.
  8. */
  9. #ifndef __ASM_ARCH_MXC_COMMON_H__
  10. #define __ASM_ARCH_MXC_COMMON_H__
  11. #include <linux/reboot.h>
  12. struct irq_data;
  13. struct platform_device;
  14. struct pt_regs;
  15. struct clk;
  16. struct device_node;
  17. enum mxc_cpu_pwr_mode;
  18. struct of_device_id;
  19. void mx1_map_io(void);
  20. void mx21_map_io(void);
  21. void mx27_map_io(void);
  22. void mx31_map_io(void);
  23. void mx35_map_io(void);
  24. void imx1_init_early(void);
  25. void imx21_init_early(void);
  26. void imx27_init_early(void);
  27. void imx31_init_early(void);
  28. void imx35_init_early(void);
  29. void mxc_init_irq(void __iomem *);
  30. void mx1_init_irq(void);
  31. void mx21_init_irq(void);
  32. void mx27_init_irq(void);
  33. void mx31_init_irq(void);
  34. void mx35_init_irq(void);
  35. void imx1_soc_init(void);
  36. void imx21_soc_init(void);
  37. void imx27_soc_init(void);
  38. void imx31_soc_init(void);
  39. void imx35_soc_init(void);
  40. void epit_timer_init(void __iomem *base, int irq);
  41. int mx1_clocks_init(unsigned long fref);
  42. int mx21_clocks_init(unsigned long lref, unsigned long fref);
  43. int mx27_clocks_init(unsigned long fref);
  44. int mx31_clocks_init(unsigned long fref);
  45. int mx35_clocks_init(void);
  46. int mx31_clocks_init_dt(void);
  47. struct platform_device *mxc_register_gpio(char *name, int id,
  48. resource_size_t iobase, resource_size_t iosize, int irq, int irq_high);
  49. void mxc_set_cpu_type(unsigned int type);
  50. void mxc_restart(enum reboot_mode, const char *);
  51. void mxc_arch_reset_init(void __iomem *);
  52. void imx1_reset_init(void __iomem *);
  53. void imx_set_aips(void __iomem *);
  54. void imx_aips_allow_unprivileged_access(const char *compat);
  55. int mxc_device_init(void);
  56. void imx_set_soc_revision(unsigned int rev);
  57. void imx_init_revision_from_anatop(void);
  58. struct device *imx_soc_device_init(void);
  59. void imx6_enable_rbc(bool enable);
  60. void imx_gpc_check_dt(void);
  61. void imx_gpc_set_arm_power_in_lpm(bool power_off);
  62. void imx_gpc_set_arm_power_up_timing(u32 sw2iso, u32 sw);
  63. void imx_gpc_set_arm_power_down_timing(u32 sw2iso, u32 sw);
  64. void imx25_pm_init(void);
  65. void imx27_pm_init(void);
  66. enum mxc_cpu_pwr_mode {
  67. WAIT_CLOCKED, /* wfi only */
  68. WAIT_UNCLOCKED, /* WAIT */
  69. WAIT_UNCLOCKED_POWER_OFF, /* WAIT + SRPG */
  70. STOP_POWER_ON, /* just STOP */
  71. STOP_POWER_OFF, /* STOP + SRPG */
  72. };
  73. enum mx3_cpu_pwr_mode {
  74. MX3_RUN,
  75. MX3_WAIT,
  76. MX3_DOZE,
  77. MX3_SLEEP,
  78. };
  79. void mx3_cpu_lp_set(enum mx3_cpu_pwr_mode mode);
  80. void imx_enable_cpu(int cpu, bool enable);
  81. void imx_set_cpu_jump(int cpu, void *jump_addr);
  82. u32 imx_get_cpu_arg(int cpu);
  83. void imx_set_cpu_arg(int cpu, u32 arg);
  84. #ifdef CONFIG_SMP
  85. void v7_secondary_startup(void);
  86. void imx_scu_map_io(void);
  87. void imx_smp_prepare(void);
  88. #else
  89. static inline void imx_scu_map_io(void) {}
  90. static inline void imx_smp_prepare(void) {}
  91. #endif
  92. void imx_src_init(void);
  93. void imx_gpc_pre_suspend(bool arm_power_off);
  94. void imx_gpc_post_resume(void);
  95. void imx_gpc_mask_all(void);
  96. void imx_gpc_restore_all(void);
  97. void imx_gpc_hwirq_mask(unsigned int hwirq);
  98. void imx_gpc_hwirq_unmask(unsigned int hwirq);
  99. void imx_anatop_init(void);
  100. void imx_anatop_pre_suspend(void);
  101. void imx_anatop_post_resume(void);
  102. int imx6_set_lpm(enum mxc_cpu_pwr_mode mode);
  103. void imx6q_set_int_mem_clk_lpm(bool enable);
  104. void imx6sl_set_wait_clk(bool enter);
  105. int imx_mmdc_get_ddr_type(void);
  106. void imx_cpu_die(unsigned int cpu);
  107. int imx_cpu_kill(unsigned int cpu);
  108. #ifdef CONFIG_SUSPEND
  109. void v7_cpu_resume(void);
  110. void imx53_suspend(void __iomem *ocram_vbase);
  111. extern const u32 imx53_suspend_sz;
  112. void imx6_suspend(void __iomem *ocram_vbase);
  113. #else
  114. static inline void v7_cpu_resume(void) {}
  115. static inline void imx53_suspend(void __iomem *ocram_vbase) {}
  116. static const u32 imx53_suspend_sz;
  117. static inline void imx6_suspend(void __iomem *ocram_vbase) {}
  118. #endif
  119. void imx6_pm_ccm_init(const char *ccm_compat);
  120. void imx6q_pm_init(void);
  121. void imx6dl_pm_init(void);
  122. void imx6sl_pm_init(void);
  123. void imx6sx_pm_init(void);
  124. void imx6ul_pm_init(void);
  125. #ifdef CONFIG_PM
  126. void imx51_pm_init(void);
  127. void imx53_pm_init(void);
  128. #else
  129. static inline void imx51_pm_init(void) {}
  130. static inline void imx53_pm_init(void) {}
  131. #endif
  132. #ifdef CONFIG_NEON
  133. int mx51_neon_fixup(void);
  134. #else
  135. static inline int mx51_neon_fixup(void) { return 0; }
  136. #endif
  137. #ifdef CONFIG_CACHE_L2X0
  138. void imx_init_l2cache(void);
  139. #else
  140. static inline void imx_init_l2cache(void) {}
  141. #endif
  142. extern const struct smp_operations imx_smp_ops;
  143. extern const struct smp_operations ls1021a_smp_ops;
  144. #endif