smp.c 8.5 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370
  1. /*
  2. * Copyright (C) 2004, 2007-2010, 2011-2012 Synopsys, Inc. (www.synopsys.com)
  3. *
  4. * This program is free software; you can redistribute it and/or modify
  5. * it under the terms of the GNU General Public License version 2 as
  6. * published by the Free Software Foundation.
  7. *
  8. * RajeshwarR: Dec 11, 2007
  9. * -- Added support for Inter Processor Interrupts
  10. *
  11. * Vineetg: Nov 1st, 2007
  12. * -- Initial Write (Borrowed heavily from ARM)
  13. */
  14. #include <linux/spinlock.h>
  15. #include <linux/sched.h>
  16. #include <linux/interrupt.h>
  17. #include <linux/profile.h>
  18. #include <linux/mm.h>
  19. #include <linux/cpu.h>
  20. #include <linux/irq.h>
  21. #include <linux/atomic.h>
  22. #include <linux/cpumask.h>
  23. #include <linux/reboot.h>
  24. #include <asm/processor.h>
  25. #include <asm/setup.h>
  26. #include <asm/mach_desc.h>
  27. #ifndef CONFIG_ARC_HAS_LLSC
  28. arch_spinlock_t smp_atomic_ops_lock = __ARCH_SPIN_LOCK_UNLOCKED;
  29. arch_spinlock_t smp_bitops_lock = __ARCH_SPIN_LOCK_UNLOCKED;
  30. #endif
  31. struct plat_smp_ops __weak plat_smp_ops;
  32. /* XXX: per cpu ? Only needed once in early seconday boot */
  33. struct task_struct *secondary_idle_tsk;
  34. /* Called from start_kernel */
  35. void __init smp_prepare_boot_cpu(void)
  36. {
  37. }
  38. /*
  39. * Called from setup_arch() before calling setup_processor()
  40. *
  41. * - Initialise the CPU possible map early - this describes the CPUs
  42. * which may be present or become present in the system.
  43. * - Call early smp init hook. This can initialize a specific multi-core
  44. * IP which is say common to several platforms (hence not part of
  45. * platform specific int_early() hook)
  46. */
  47. void __init smp_init_cpus(void)
  48. {
  49. unsigned int i;
  50. for (i = 0; i < NR_CPUS; i++)
  51. set_cpu_possible(i, true);
  52. if (plat_smp_ops.init_early_smp)
  53. plat_smp_ops.init_early_smp();
  54. }
  55. /* called from init ( ) => process 1 */
  56. void __init smp_prepare_cpus(unsigned int max_cpus)
  57. {
  58. int i;
  59. /*
  60. * Initialise the present map, which describes the set of CPUs
  61. * actually populated at the present time.
  62. */
  63. for (i = 0; i < max_cpus; i++)
  64. set_cpu_present(i, true);
  65. }
  66. void __init smp_cpus_done(unsigned int max_cpus)
  67. {
  68. }
  69. /*
  70. * Default smp boot helper for Run-on-reset case where all cores start off
  71. * together. Non-masters need to wait for Master to start running.
  72. * This is implemented using a flag in memory, which Non-masters spin-wait on.
  73. * Master sets it to cpu-id of core to "ungate" it.
  74. */
  75. static volatile int wake_flag;
  76. static void arc_default_smp_cpu_kick(int cpu, unsigned long pc)
  77. {
  78. BUG_ON(cpu == 0);
  79. wake_flag = cpu;
  80. }
  81. void arc_platform_smp_wait_to_boot(int cpu)
  82. {
  83. while (wake_flag != cpu)
  84. ;
  85. wake_flag = 0;
  86. __asm__ __volatile__("j @first_lines_of_secondary \n");
  87. }
  88. const char *arc_platform_smp_cpuinfo(void)
  89. {
  90. return plat_smp_ops.info ? : "";
  91. }
  92. /*
  93. * The very first "C" code executed by secondary
  94. * Called from asm stub in head.S
  95. * "current"/R25 already setup by low level boot code
  96. */
  97. void start_kernel_secondary(void)
  98. {
  99. struct mm_struct *mm = &init_mm;
  100. unsigned int cpu = smp_processor_id();
  101. /* MMU, Caches, Vector Table, Interrupts etc */
  102. setup_processor();
  103. atomic_inc(&mm->mm_users);
  104. atomic_inc(&mm->mm_count);
  105. current->active_mm = mm;
  106. cpumask_set_cpu(cpu, mm_cpumask(mm));
  107. /* Some SMP H/w setup - for each cpu */
  108. if (plat_smp_ops.init_per_cpu)
  109. plat_smp_ops.init_per_cpu(cpu);
  110. if (machine_desc->init_per_cpu)
  111. machine_desc->init_per_cpu(cpu);
  112. notify_cpu_starting(cpu);
  113. set_cpu_online(cpu, true);
  114. pr_info("## CPU%u LIVE ##: Executing Code...\n", cpu);
  115. local_irq_enable();
  116. preempt_disable();
  117. cpu_startup_entry(CPUHP_AP_ONLINE_IDLE);
  118. }
  119. /*
  120. * Called from kernel_init( ) -> smp_init( ) - for each CPU
  121. *
  122. * At this point, Secondary Processor is "HALT"ed:
  123. * -It booted, but was halted in head.S
  124. * -It was configured to halt-on-reset
  125. * So need to wake it up.
  126. *
  127. * Essential requirements being where to run from (PC) and stack (SP)
  128. */
  129. int __cpu_up(unsigned int cpu, struct task_struct *idle)
  130. {
  131. unsigned long wait_till;
  132. secondary_idle_tsk = idle;
  133. pr_info("Idle Task [%d] %p", cpu, idle);
  134. pr_info("Trying to bring up CPU%u ...\n", cpu);
  135. if (plat_smp_ops.cpu_kick)
  136. plat_smp_ops.cpu_kick(cpu,
  137. (unsigned long)first_lines_of_secondary);
  138. else
  139. arc_default_smp_cpu_kick(cpu, (unsigned long)NULL);
  140. /* wait for 1 sec after kicking the secondary */
  141. wait_till = jiffies + HZ;
  142. while (time_before(jiffies, wait_till)) {
  143. if (cpu_online(cpu))
  144. break;
  145. }
  146. if (!cpu_online(cpu)) {
  147. pr_info("Timeout: CPU%u FAILED to comeup !!!\n", cpu);
  148. return -1;
  149. }
  150. secondary_idle_tsk = NULL;
  151. return 0;
  152. }
  153. /*
  154. * not supported here
  155. */
  156. int setup_profiling_timer(unsigned int multiplier)
  157. {
  158. return -EINVAL;
  159. }
  160. /*****************************************************************************/
  161. /* Inter Processor Interrupt Handling */
  162. /*****************************************************************************/
  163. enum ipi_msg_type {
  164. IPI_EMPTY = 0,
  165. IPI_RESCHEDULE = 1,
  166. IPI_CALL_FUNC,
  167. IPI_CPU_STOP,
  168. };
  169. /*
  170. * In arches with IRQ for each msg type (above), receiver can use IRQ-id to
  171. * figure out what msg was sent. For those which don't (ARC has dedicated IPI
  172. * IRQ), the msg-type needs to be conveyed via per-cpu data
  173. */
  174. static DEFINE_PER_CPU(unsigned long, ipi_data);
  175. static void ipi_send_msg_one(int cpu, enum ipi_msg_type msg)
  176. {
  177. unsigned long __percpu *ipi_data_ptr = per_cpu_ptr(&ipi_data, cpu);
  178. unsigned long old, new;
  179. unsigned long flags;
  180. pr_debug("%d Sending msg [%d] to %d\n", smp_processor_id(), msg, cpu);
  181. local_irq_save(flags);
  182. /*
  183. * Atomically write new msg bit (in case others are writing too),
  184. * and read back old value
  185. */
  186. do {
  187. new = old = ACCESS_ONCE(*ipi_data_ptr);
  188. new |= 1U << msg;
  189. } while (cmpxchg(ipi_data_ptr, old, new) != old);
  190. /*
  191. * Call the platform specific IPI kick function, but avoid if possible:
  192. * Only do so if there's no pending msg from other concurrent sender(s).
  193. * Otherwise, recevier will see this msg as well when it takes the
  194. * IPI corresponding to that msg. This is true, even if it is already in
  195. * IPI handler, because !@old means it has not yet dequeued the msg(s)
  196. * so @new msg can be a free-loader
  197. */
  198. if (plat_smp_ops.ipi_send && !old)
  199. plat_smp_ops.ipi_send(cpu);
  200. local_irq_restore(flags);
  201. }
  202. static void ipi_send_msg(const struct cpumask *callmap, enum ipi_msg_type msg)
  203. {
  204. unsigned int cpu;
  205. for_each_cpu(cpu, callmap)
  206. ipi_send_msg_one(cpu, msg);
  207. }
  208. void smp_send_reschedule(int cpu)
  209. {
  210. ipi_send_msg_one(cpu, IPI_RESCHEDULE);
  211. }
  212. void smp_send_stop(void)
  213. {
  214. struct cpumask targets;
  215. cpumask_copy(&targets, cpu_online_mask);
  216. cpumask_clear_cpu(smp_processor_id(), &targets);
  217. ipi_send_msg(&targets, IPI_CPU_STOP);
  218. }
  219. void arch_send_call_function_single_ipi(int cpu)
  220. {
  221. ipi_send_msg_one(cpu, IPI_CALL_FUNC);
  222. }
  223. void arch_send_call_function_ipi_mask(const struct cpumask *mask)
  224. {
  225. ipi_send_msg(mask, IPI_CALL_FUNC);
  226. }
  227. /*
  228. * ipi_cpu_stop - handle IPI from smp_send_stop()
  229. */
  230. static void ipi_cpu_stop(void)
  231. {
  232. machine_halt();
  233. }
  234. static inline int __do_IPI(unsigned long msg)
  235. {
  236. int rc = 0;
  237. switch (msg) {
  238. case IPI_RESCHEDULE:
  239. scheduler_ipi();
  240. break;
  241. case IPI_CALL_FUNC:
  242. generic_smp_call_function_interrupt();
  243. break;
  244. case IPI_CPU_STOP:
  245. ipi_cpu_stop();
  246. break;
  247. default:
  248. rc = 1;
  249. }
  250. return rc;
  251. }
  252. /*
  253. * arch-common ISR to handle for inter-processor interrupts
  254. * Has hooks for platform specific IPI
  255. */
  256. irqreturn_t do_IPI(int irq, void *dev_id)
  257. {
  258. unsigned long pending;
  259. unsigned long __maybe_unused copy;
  260. pr_debug("IPI [%ld] received on cpu %d\n",
  261. *this_cpu_ptr(&ipi_data), smp_processor_id());
  262. if (plat_smp_ops.ipi_clear)
  263. plat_smp_ops.ipi_clear(irq);
  264. /*
  265. * "dequeue" the msg corresponding to this IPI (and possibly other
  266. * piggybacked msg from elided IPIs: see ipi_send_msg_one() above)
  267. */
  268. copy = pending = xchg(this_cpu_ptr(&ipi_data), 0);
  269. do {
  270. unsigned long msg = __ffs(pending);
  271. int rc;
  272. rc = __do_IPI(msg);
  273. if (rc)
  274. pr_info("IPI with bogus msg %ld in %ld\n", msg, copy);
  275. pending &= ~(1U << msg);
  276. } while (pending);
  277. return IRQ_HANDLED;
  278. }
  279. /*
  280. * API called by platform code to hookup arch-common ISR to their IPI IRQ
  281. *
  282. * Note: If IPI is provided by platform (vs. say ARC MCIP), their intc setup/map
  283. * function needs to call call irq_set_percpu_devid() for IPI IRQ, otherwise
  284. * request_percpu_irq() below will fail
  285. */
  286. static DEFINE_PER_CPU(int, ipi_dev);
  287. int smp_ipi_irq_setup(int cpu, int irq)
  288. {
  289. int *dev = per_cpu_ptr(&ipi_dev, cpu);
  290. /* Boot cpu calls request, all call enable */
  291. if (!cpu) {
  292. int rc;
  293. rc = request_percpu_irq(irq, do_IPI, "IPI Interrupt", dev);
  294. if (rc)
  295. panic("Percpu IRQ request failed for %d\n", irq);
  296. }
  297. enable_percpu_irq(irq, 0);
  298. return 0;
  299. }