edac_mc_sysfs.c 28 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129
  1. /*
  2. * edac_mc kernel module
  3. * (C) 2005-2007 Linux Networx (http://lnxi.com)
  4. *
  5. * This file may be distributed under the terms of the
  6. * GNU General Public License.
  7. *
  8. * Written Doug Thompson <norsk5@xmission.com> www.softwarebitmaker.com
  9. *
  10. * (c) 2012 - Mauro Carvalho Chehab <mchehab@redhat.com>
  11. * The entire API were re-written, and ported to use struct device
  12. *
  13. */
  14. #include <linux/ctype.h>
  15. #include <linux/slab.h>
  16. #include <linux/edac.h>
  17. #include <linux/bug.h>
  18. #include <linux/pm_runtime.h>
  19. #include <linux/uaccess.h>
  20. #include "edac_core.h"
  21. #include "edac_module.h"
  22. /* MC EDAC Controls, setable by module parameter, and sysfs */
  23. static int edac_mc_log_ue = 1;
  24. static int edac_mc_log_ce = 1;
  25. static int edac_mc_panic_on_ue;
  26. static int edac_mc_poll_msec = 1000;
  27. /* Getter functions for above */
  28. int edac_mc_get_log_ue(void)
  29. {
  30. return edac_mc_log_ue;
  31. }
  32. int edac_mc_get_log_ce(void)
  33. {
  34. return edac_mc_log_ce;
  35. }
  36. int edac_mc_get_panic_on_ue(void)
  37. {
  38. return edac_mc_panic_on_ue;
  39. }
  40. /* this is temporary */
  41. int edac_mc_get_poll_msec(void)
  42. {
  43. return edac_mc_poll_msec;
  44. }
  45. static int edac_set_poll_msec(const char *val, struct kernel_param *kp)
  46. {
  47. long l;
  48. int ret;
  49. if (!val)
  50. return -EINVAL;
  51. ret = strict_strtol(val, 0, &l);
  52. if (ret == -EINVAL || ((int)l != l))
  53. return -EINVAL;
  54. *((int *)kp->arg) = l;
  55. /* notify edac_mc engine to reset the poll period */
  56. edac_mc_reset_delay_period(l);
  57. return 0;
  58. }
  59. /* Parameter declarations for above */
  60. module_param(edac_mc_panic_on_ue, int, 0644);
  61. MODULE_PARM_DESC(edac_mc_panic_on_ue, "Panic on uncorrected error: 0=off 1=on");
  62. module_param(edac_mc_log_ue, int, 0644);
  63. MODULE_PARM_DESC(edac_mc_log_ue,
  64. "Log uncorrectable error to console: 0=off 1=on");
  65. module_param(edac_mc_log_ce, int, 0644);
  66. MODULE_PARM_DESC(edac_mc_log_ce,
  67. "Log correctable error to console: 0=off 1=on");
  68. module_param_call(edac_mc_poll_msec, edac_set_poll_msec, param_get_int,
  69. &edac_mc_poll_msec, 0644);
  70. MODULE_PARM_DESC(edac_mc_poll_msec, "Polling period in milliseconds");
  71. static struct device *mci_pdev;
  72. /*
  73. * various constants for Memory Controllers
  74. */
  75. static const char *mem_types[] = {
  76. [MEM_EMPTY] = "Empty",
  77. [MEM_RESERVED] = "Reserved",
  78. [MEM_UNKNOWN] = "Unknown",
  79. [MEM_FPM] = "FPM",
  80. [MEM_EDO] = "EDO",
  81. [MEM_BEDO] = "BEDO",
  82. [MEM_SDR] = "Unbuffered-SDR",
  83. [MEM_RDR] = "Registered-SDR",
  84. [MEM_DDR] = "Unbuffered-DDR",
  85. [MEM_RDDR] = "Registered-DDR",
  86. [MEM_RMBS] = "RMBS",
  87. [MEM_DDR2] = "Unbuffered-DDR2",
  88. [MEM_FB_DDR2] = "FullyBuffered-DDR2",
  89. [MEM_RDDR2] = "Registered-DDR2",
  90. [MEM_XDR] = "XDR",
  91. [MEM_DDR3] = "Unbuffered-DDR3",
  92. [MEM_RDDR3] = "Registered-DDR3"
  93. };
  94. static const char *dev_types[] = {
  95. [DEV_UNKNOWN] = "Unknown",
  96. [DEV_X1] = "x1",
  97. [DEV_X2] = "x2",
  98. [DEV_X4] = "x4",
  99. [DEV_X8] = "x8",
  100. [DEV_X16] = "x16",
  101. [DEV_X32] = "x32",
  102. [DEV_X64] = "x64"
  103. };
  104. static const char *edac_caps[] = {
  105. [EDAC_UNKNOWN] = "Unknown",
  106. [EDAC_NONE] = "None",
  107. [EDAC_RESERVED] = "Reserved",
  108. [EDAC_PARITY] = "PARITY",
  109. [EDAC_EC] = "EC",
  110. [EDAC_SECDED] = "SECDED",
  111. [EDAC_S2ECD2ED] = "S2ECD2ED",
  112. [EDAC_S4ECD4ED] = "S4ECD4ED",
  113. [EDAC_S8ECD8ED] = "S8ECD8ED",
  114. [EDAC_S16ECD16ED] = "S16ECD16ED"
  115. };
  116. #ifdef CONFIG_EDAC_LEGACY_SYSFS
  117. /*
  118. * EDAC sysfs CSROW data structures and methods
  119. */
  120. #define to_csrow(k) container_of(k, struct csrow_info, dev)
  121. /*
  122. * We need it to avoid namespace conflicts between the legacy API
  123. * and the per-dimm/per-rank one
  124. */
  125. #define DEVICE_ATTR_LEGACY(_name, _mode, _show, _store) \
  126. struct device_attribute dev_attr_legacy_##_name = __ATTR(_name, _mode, _show, _store)
  127. struct dev_ch_attribute {
  128. struct device_attribute attr;
  129. int channel;
  130. };
  131. #define DEVICE_CHANNEL(_name, _mode, _show, _store, _var) \
  132. struct dev_ch_attribute dev_attr_legacy_##_name = \
  133. { __ATTR(_name, _mode, _show, _store), (_var) }
  134. #define to_channel(k) (container_of(k, struct dev_ch_attribute, attr)->channel)
  135. /* Set of more default csrow<id> attribute show/store functions */
  136. static ssize_t csrow_ue_count_show(struct device *dev,
  137. struct device_attribute *mattr, char *data)
  138. {
  139. struct csrow_info *csrow = to_csrow(dev);
  140. return sprintf(data, "%u\n", csrow->ue_count);
  141. }
  142. static ssize_t csrow_ce_count_show(struct device *dev,
  143. struct device_attribute *mattr, char *data)
  144. {
  145. struct csrow_info *csrow = to_csrow(dev);
  146. return sprintf(data, "%u\n", csrow->ce_count);
  147. }
  148. static ssize_t csrow_size_show(struct device *dev,
  149. struct device_attribute *mattr, char *data)
  150. {
  151. struct csrow_info *csrow = to_csrow(dev);
  152. int i;
  153. u32 nr_pages = 0;
  154. for (i = 0; i < csrow->nr_channels; i++)
  155. nr_pages += csrow->channels[i]->dimm->nr_pages;
  156. return sprintf(data, "%u\n", PAGES_TO_MiB(nr_pages));
  157. }
  158. static ssize_t csrow_mem_type_show(struct device *dev,
  159. struct device_attribute *mattr, char *data)
  160. {
  161. struct csrow_info *csrow = to_csrow(dev);
  162. return sprintf(data, "%s\n", mem_types[csrow->channels[0]->dimm->mtype]);
  163. }
  164. static ssize_t csrow_dev_type_show(struct device *dev,
  165. struct device_attribute *mattr, char *data)
  166. {
  167. struct csrow_info *csrow = to_csrow(dev);
  168. return sprintf(data, "%s\n", dev_types[csrow->channels[0]->dimm->dtype]);
  169. }
  170. static ssize_t csrow_edac_mode_show(struct device *dev,
  171. struct device_attribute *mattr,
  172. char *data)
  173. {
  174. struct csrow_info *csrow = to_csrow(dev);
  175. return sprintf(data, "%s\n", edac_caps[csrow->channels[0]->dimm->edac_mode]);
  176. }
  177. /* show/store functions for DIMM Label attributes */
  178. static ssize_t channel_dimm_label_show(struct device *dev,
  179. struct device_attribute *mattr,
  180. char *data)
  181. {
  182. struct csrow_info *csrow = to_csrow(dev);
  183. unsigned chan = to_channel(mattr);
  184. struct rank_info *rank = csrow->channels[chan];
  185. /* if field has not been initialized, there is nothing to send */
  186. if (!rank->dimm->label[0])
  187. return 0;
  188. return snprintf(data, EDAC_MC_LABEL_LEN, "%s\n",
  189. rank->dimm->label);
  190. }
  191. static ssize_t channel_dimm_label_store(struct device *dev,
  192. struct device_attribute *mattr,
  193. const char *data, size_t count)
  194. {
  195. struct csrow_info *csrow = to_csrow(dev);
  196. unsigned chan = to_channel(mattr);
  197. struct rank_info *rank = csrow->channels[chan];
  198. ssize_t max_size = 0;
  199. max_size = min((ssize_t) count, (ssize_t) EDAC_MC_LABEL_LEN - 1);
  200. strncpy(rank->dimm->label, data, max_size);
  201. rank->dimm->label[max_size] = '\0';
  202. return max_size;
  203. }
  204. /* show function for dynamic chX_ce_count attribute */
  205. static ssize_t channel_ce_count_show(struct device *dev,
  206. struct device_attribute *mattr, char *data)
  207. {
  208. struct csrow_info *csrow = to_csrow(dev);
  209. unsigned chan = to_channel(mattr);
  210. struct rank_info *rank = csrow->channels[chan];
  211. return sprintf(data, "%u\n", rank->ce_count);
  212. }
  213. /* cwrow<id>/attribute files */
  214. DEVICE_ATTR_LEGACY(size_mb, S_IRUGO, csrow_size_show, NULL);
  215. DEVICE_ATTR_LEGACY(dev_type, S_IRUGO, csrow_dev_type_show, NULL);
  216. DEVICE_ATTR_LEGACY(mem_type, S_IRUGO, csrow_mem_type_show, NULL);
  217. DEVICE_ATTR_LEGACY(edac_mode, S_IRUGO, csrow_edac_mode_show, NULL);
  218. DEVICE_ATTR_LEGACY(ue_count, S_IRUGO, csrow_ue_count_show, NULL);
  219. DEVICE_ATTR_LEGACY(ce_count, S_IRUGO, csrow_ce_count_show, NULL);
  220. /* default attributes of the CSROW<id> object */
  221. static struct attribute *csrow_attrs[] = {
  222. &dev_attr_legacy_dev_type.attr,
  223. &dev_attr_legacy_mem_type.attr,
  224. &dev_attr_legacy_edac_mode.attr,
  225. &dev_attr_legacy_size_mb.attr,
  226. &dev_attr_legacy_ue_count.attr,
  227. &dev_attr_legacy_ce_count.attr,
  228. NULL,
  229. };
  230. static struct attribute_group csrow_attr_grp = {
  231. .attrs = csrow_attrs,
  232. };
  233. static const struct attribute_group *csrow_attr_groups[] = {
  234. &csrow_attr_grp,
  235. NULL
  236. };
  237. static void csrow_attr_release(struct device *dev)
  238. {
  239. struct csrow_info *csrow = container_of(dev, struct csrow_info, dev);
  240. debugf1("Releasing csrow device %s\n", dev_name(dev));
  241. kfree(csrow);
  242. }
  243. static struct device_type csrow_attr_type = {
  244. .groups = csrow_attr_groups,
  245. .release = csrow_attr_release,
  246. };
  247. /*
  248. * possible dynamic channel DIMM Label attribute files
  249. *
  250. */
  251. #define EDAC_NR_CHANNELS 6
  252. DEVICE_CHANNEL(ch0_dimm_label, S_IRUGO | S_IWUSR,
  253. channel_dimm_label_show, channel_dimm_label_store, 0);
  254. DEVICE_CHANNEL(ch1_dimm_label, S_IRUGO | S_IWUSR,
  255. channel_dimm_label_show, channel_dimm_label_store, 1);
  256. DEVICE_CHANNEL(ch2_dimm_label, S_IRUGO | S_IWUSR,
  257. channel_dimm_label_show, channel_dimm_label_store, 2);
  258. DEVICE_CHANNEL(ch3_dimm_label, S_IRUGO | S_IWUSR,
  259. channel_dimm_label_show, channel_dimm_label_store, 3);
  260. DEVICE_CHANNEL(ch4_dimm_label, S_IRUGO | S_IWUSR,
  261. channel_dimm_label_show, channel_dimm_label_store, 4);
  262. DEVICE_CHANNEL(ch5_dimm_label, S_IRUGO | S_IWUSR,
  263. channel_dimm_label_show, channel_dimm_label_store, 5);
  264. /* Total possible dynamic DIMM Label attribute file table */
  265. static struct device_attribute *dynamic_csrow_dimm_attr[] = {
  266. &dev_attr_legacy_ch0_dimm_label.attr,
  267. &dev_attr_legacy_ch1_dimm_label.attr,
  268. &dev_attr_legacy_ch2_dimm_label.attr,
  269. &dev_attr_legacy_ch3_dimm_label.attr,
  270. &dev_attr_legacy_ch4_dimm_label.attr,
  271. &dev_attr_legacy_ch5_dimm_label.attr
  272. };
  273. /* possible dynamic channel ce_count attribute files */
  274. DEVICE_CHANNEL(ch0_ce_count, S_IRUGO | S_IWUSR,
  275. channel_ce_count_show, NULL, 0);
  276. DEVICE_CHANNEL(ch1_ce_count, S_IRUGO | S_IWUSR,
  277. channel_ce_count_show, NULL, 1);
  278. DEVICE_CHANNEL(ch2_ce_count, S_IRUGO | S_IWUSR,
  279. channel_ce_count_show, NULL, 2);
  280. DEVICE_CHANNEL(ch3_ce_count, S_IRUGO | S_IWUSR,
  281. channel_ce_count_show, NULL, 3);
  282. DEVICE_CHANNEL(ch4_ce_count, S_IRUGO | S_IWUSR,
  283. channel_ce_count_show, NULL, 4);
  284. DEVICE_CHANNEL(ch5_ce_count, S_IRUGO | S_IWUSR,
  285. channel_ce_count_show, NULL, 5);
  286. /* Total possible dynamic ce_count attribute file table */
  287. static struct device_attribute *dynamic_csrow_ce_count_attr[] = {
  288. &dev_attr_legacy_ch0_ce_count.attr,
  289. &dev_attr_legacy_ch1_ce_count.attr,
  290. &dev_attr_legacy_ch2_ce_count.attr,
  291. &dev_attr_legacy_ch3_ce_count.attr,
  292. &dev_attr_legacy_ch4_ce_count.attr,
  293. &dev_attr_legacy_ch5_ce_count.attr
  294. };
  295. static inline int nr_pages_per_csrow(struct csrow_info *csrow)
  296. {
  297. int chan, nr_pages = 0;
  298. for (chan = 0; chan < csrow->nr_channels; chan++)
  299. nr_pages += csrow->channels[chan]->dimm->nr_pages;
  300. return nr_pages;
  301. }
  302. /* Create a CSROW object under specifed edac_mc_device */
  303. static int edac_create_csrow_object(struct mem_ctl_info *mci,
  304. struct csrow_info *csrow, int index)
  305. {
  306. int err, chan;
  307. if (csrow->nr_channels >= EDAC_NR_CHANNELS)
  308. return -ENODEV;
  309. csrow->dev.type = &csrow_attr_type;
  310. csrow->dev.bus = &mci->bus;
  311. device_initialize(&csrow->dev);
  312. csrow->dev.parent = &mci->dev;
  313. dev_set_name(&csrow->dev, "csrow%d", index);
  314. dev_set_drvdata(&csrow->dev, csrow);
  315. debugf0("creating (virtual) csrow node %s\n", dev_name(&csrow->dev));
  316. err = device_add(&csrow->dev);
  317. if (err < 0)
  318. return err;
  319. for (chan = 0; chan < csrow->nr_channels; chan++) {
  320. /* Only expose populated DIMMs */
  321. if (!csrow->channels[chan]->dimm->nr_pages)
  322. continue;
  323. err = device_create_file(&csrow->dev,
  324. dynamic_csrow_dimm_attr[chan]);
  325. if (err < 0)
  326. goto error;
  327. err = device_create_file(&csrow->dev,
  328. dynamic_csrow_ce_count_attr[chan]);
  329. if (err < 0) {
  330. device_remove_file(&csrow->dev,
  331. dynamic_csrow_dimm_attr[chan]);
  332. goto error;
  333. }
  334. }
  335. return 0;
  336. error:
  337. for (--chan; chan >= 0; chan--) {
  338. device_remove_file(&csrow->dev,
  339. dynamic_csrow_dimm_attr[chan]);
  340. device_remove_file(&csrow->dev,
  341. dynamic_csrow_ce_count_attr[chan]);
  342. }
  343. put_device(&csrow->dev);
  344. return err;
  345. }
  346. /* Create a CSROW object under specifed edac_mc_device */
  347. static int edac_create_csrow_objects(struct mem_ctl_info *mci)
  348. {
  349. int err, i, chan;
  350. struct csrow_info *csrow;
  351. for (i = 0; i < mci->nr_csrows; i++) {
  352. csrow = mci->csrows[i];
  353. if (!nr_pages_per_csrow(csrow))
  354. continue;
  355. err = edac_create_csrow_object(mci, mci->csrows[i], i);
  356. if (err < 0)
  357. goto error;
  358. }
  359. return 0;
  360. error:
  361. for (--i; i >= 0; i--) {
  362. csrow = mci->csrows[i];
  363. if (!nr_pages_per_csrow(csrow))
  364. continue;
  365. for (chan = csrow->nr_channels - 1; chan >= 0; chan--) {
  366. if (!csrow->channels[chan]->dimm->nr_pages)
  367. continue;
  368. device_remove_file(&csrow->dev,
  369. dynamic_csrow_dimm_attr[chan]);
  370. device_remove_file(&csrow->dev,
  371. dynamic_csrow_ce_count_attr[chan]);
  372. }
  373. put_device(&mci->csrows[i]->dev);
  374. }
  375. return err;
  376. }
  377. static void edac_delete_csrow_objects(struct mem_ctl_info *mci)
  378. {
  379. int i, chan;
  380. struct csrow_info *csrow;
  381. for (i = mci->nr_csrows - 1; i >= 0; i--) {
  382. csrow = mci->csrows[i];
  383. if (!nr_pages_per_csrow(csrow))
  384. continue;
  385. for (chan = csrow->nr_channels - 1; chan >= 0; chan--) {
  386. if (!csrow->channels[chan]->dimm->nr_pages)
  387. continue;
  388. debugf1("Removing csrow %d channel %d sysfs nodes\n",
  389. i, chan);
  390. device_remove_file(&csrow->dev,
  391. dynamic_csrow_dimm_attr[chan]);
  392. device_remove_file(&csrow->dev,
  393. dynamic_csrow_ce_count_attr[chan]);
  394. }
  395. put_device(&mci->csrows[i]->dev);
  396. device_del(&mci->csrows[i]->dev);
  397. }
  398. }
  399. #endif
  400. /*
  401. * Per-dimm (or per-rank) devices
  402. */
  403. #define to_dimm(k) container_of(k, struct dimm_info, dev)
  404. /* show/store functions for DIMM Label attributes */
  405. static ssize_t dimmdev_location_show(struct device *dev,
  406. struct device_attribute *mattr, char *data)
  407. {
  408. struct dimm_info *dimm = to_dimm(dev);
  409. struct mem_ctl_info *mci = dimm->mci;
  410. int i;
  411. char *p = data;
  412. for (i = 0; i < mci->n_layers; i++) {
  413. p += sprintf(p, "%s %d ",
  414. edac_layer_name[mci->layers[i].type],
  415. dimm->location[i]);
  416. }
  417. return p - data;
  418. }
  419. static ssize_t dimmdev_label_show(struct device *dev,
  420. struct device_attribute *mattr, char *data)
  421. {
  422. struct dimm_info *dimm = to_dimm(dev);
  423. /* if field has not been initialized, there is nothing to send */
  424. if (!dimm->label[0])
  425. return 0;
  426. return snprintf(data, EDAC_MC_LABEL_LEN, "%s\n", dimm->label);
  427. }
  428. static ssize_t dimmdev_label_store(struct device *dev,
  429. struct device_attribute *mattr,
  430. const char *data,
  431. size_t count)
  432. {
  433. struct dimm_info *dimm = to_dimm(dev);
  434. ssize_t max_size = 0;
  435. max_size = min((ssize_t) count, (ssize_t) EDAC_MC_LABEL_LEN - 1);
  436. strncpy(dimm->label, data, max_size);
  437. dimm->label[max_size] = '\0';
  438. return max_size;
  439. }
  440. static ssize_t dimmdev_size_show(struct device *dev,
  441. struct device_attribute *mattr, char *data)
  442. {
  443. struct dimm_info *dimm = to_dimm(dev);
  444. return sprintf(data, "%u\n", PAGES_TO_MiB(dimm->nr_pages));
  445. }
  446. static ssize_t dimmdev_mem_type_show(struct device *dev,
  447. struct device_attribute *mattr, char *data)
  448. {
  449. struct dimm_info *dimm = to_dimm(dev);
  450. return sprintf(data, "%s\n", mem_types[dimm->mtype]);
  451. }
  452. static ssize_t dimmdev_dev_type_show(struct device *dev,
  453. struct device_attribute *mattr, char *data)
  454. {
  455. struct dimm_info *dimm = to_dimm(dev);
  456. return sprintf(data, "%s\n", dev_types[dimm->dtype]);
  457. }
  458. static ssize_t dimmdev_edac_mode_show(struct device *dev,
  459. struct device_attribute *mattr,
  460. char *data)
  461. {
  462. struct dimm_info *dimm = to_dimm(dev);
  463. return sprintf(data, "%s\n", edac_caps[dimm->edac_mode]);
  464. }
  465. /* dimm/rank attribute files */
  466. static DEVICE_ATTR(dimm_label, S_IRUGO | S_IWUSR,
  467. dimmdev_label_show, dimmdev_label_store);
  468. static DEVICE_ATTR(dimm_location, S_IRUGO, dimmdev_location_show, NULL);
  469. static DEVICE_ATTR(size, S_IRUGO, dimmdev_size_show, NULL);
  470. static DEVICE_ATTR(dimm_mem_type, S_IRUGO, dimmdev_mem_type_show, NULL);
  471. static DEVICE_ATTR(dimm_dev_type, S_IRUGO, dimmdev_dev_type_show, NULL);
  472. static DEVICE_ATTR(dimm_edac_mode, S_IRUGO, dimmdev_edac_mode_show, NULL);
  473. /* attributes of the dimm<id>/rank<id> object */
  474. static struct attribute *dimm_attrs[] = {
  475. &dev_attr_dimm_label.attr,
  476. &dev_attr_dimm_location.attr,
  477. &dev_attr_size.attr,
  478. &dev_attr_dimm_mem_type.attr,
  479. &dev_attr_dimm_dev_type.attr,
  480. &dev_attr_dimm_edac_mode.attr,
  481. NULL,
  482. };
  483. static struct attribute_group dimm_attr_grp = {
  484. .attrs = dimm_attrs,
  485. };
  486. static const struct attribute_group *dimm_attr_groups[] = {
  487. &dimm_attr_grp,
  488. NULL
  489. };
  490. static void dimm_attr_release(struct device *dev)
  491. {
  492. struct dimm_info *dimm = container_of(dev, struct dimm_info, dev);
  493. debugf1("Releasing dimm device %s\n", dev_name(dev));
  494. kfree(dimm);
  495. }
  496. static struct device_type dimm_attr_type = {
  497. .groups = dimm_attr_groups,
  498. .release = dimm_attr_release,
  499. };
  500. /* Create a DIMM object under specifed memory controller device */
  501. static int edac_create_dimm_object(struct mem_ctl_info *mci,
  502. struct dimm_info *dimm,
  503. int index)
  504. {
  505. int err;
  506. dimm->mci = mci;
  507. dimm->dev.type = &dimm_attr_type;
  508. dimm->dev.bus = &mci->bus;
  509. device_initialize(&dimm->dev);
  510. dimm->dev.parent = &mci->dev;
  511. if (mci->mem_is_per_rank)
  512. dev_set_name(&dimm->dev, "rank%d", index);
  513. else
  514. dev_set_name(&dimm->dev, "dimm%d", index);
  515. dev_set_drvdata(&dimm->dev, dimm);
  516. pm_runtime_forbid(&mci->dev);
  517. err = device_add(&dimm->dev);
  518. debugf0("creating rank/dimm device %s\n", dev_name(&dimm->dev));
  519. return err;
  520. }
  521. /*
  522. * Memory controller device
  523. */
  524. #define to_mci(k) container_of(k, struct mem_ctl_info, dev)
  525. static ssize_t mci_reset_counters_store(struct device *dev,
  526. struct device_attribute *mattr,
  527. const char *data, size_t count)
  528. {
  529. struct mem_ctl_info *mci = to_mci(dev);
  530. int cnt, row, chan, i;
  531. mci->ue_mc = 0;
  532. mci->ce_mc = 0;
  533. mci->ue_noinfo_count = 0;
  534. mci->ce_noinfo_count = 0;
  535. for (row = 0; row < mci->nr_csrows; row++) {
  536. struct csrow_info *ri = mci->csrows[row];
  537. ri->ue_count = 0;
  538. ri->ce_count = 0;
  539. for (chan = 0; chan < ri->nr_channels; chan++)
  540. ri->channels[chan]->ce_count = 0;
  541. }
  542. cnt = 1;
  543. for (i = 0; i < mci->n_layers; i++) {
  544. cnt *= mci->layers[i].size;
  545. memset(mci->ce_per_layer[i], 0, cnt * sizeof(u32));
  546. memset(mci->ue_per_layer[i], 0, cnt * sizeof(u32));
  547. }
  548. mci->start_time = jiffies;
  549. return count;
  550. }
  551. /* Memory scrubbing interface:
  552. *
  553. * A MC driver can limit the scrubbing bandwidth based on the CPU type.
  554. * Therefore, ->set_sdram_scrub_rate should be made to return the actual
  555. * bandwidth that is accepted or 0 when scrubbing is to be disabled.
  556. *
  557. * Negative value still means that an error has occurred while setting
  558. * the scrub rate.
  559. */
  560. static ssize_t mci_sdram_scrub_rate_store(struct device *dev,
  561. struct device_attribute *mattr,
  562. const char *data, size_t count)
  563. {
  564. struct mem_ctl_info *mci = to_mci(dev);
  565. unsigned long bandwidth = 0;
  566. int new_bw = 0;
  567. if (!mci->set_sdram_scrub_rate)
  568. return -ENODEV;
  569. if (strict_strtoul(data, 10, &bandwidth) < 0)
  570. return -EINVAL;
  571. new_bw = mci->set_sdram_scrub_rate(mci, bandwidth);
  572. if (new_bw < 0) {
  573. edac_printk(KERN_WARNING, EDAC_MC,
  574. "Error setting scrub rate to: %lu\n", bandwidth);
  575. return -EINVAL;
  576. }
  577. return count;
  578. }
  579. /*
  580. * ->get_sdram_scrub_rate() return value semantics same as above.
  581. */
  582. static ssize_t mci_sdram_scrub_rate_show(struct device *dev,
  583. struct device_attribute *mattr,
  584. char *data)
  585. {
  586. struct mem_ctl_info *mci = to_mci(dev);
  587. int bandwidth = 0;
  588. if (!mci->get_sdram_scrub_rate)
  589. return -ENODEV;
  590. bandwidth = mci->get_sdram_scrub_rate(mci);
  591. if (bandwidth < 0) {
  592. edac_printk(KERN_DEBUG, EDAC_MC, "Error reading scrub rate\n");
  593. return bandwidth;
  594. }
  595. return sprintf(data, "%d\n", bandwidth);
  596. }
  597. /* default attribute files for the MCI object */
  598. static ssize_t mci_ue_count_show(struct device *dev,
  599. struct device_attribute *mattr,
  600. char *data)
  601. {
  602. struct mem_ctl_info *mci = to_mci(dev);
  603. return sprintf(data, "%d\n", mci->ue_mc);
  604. }
  605. static ssize_t mci_ce_count_show(struct device *dev,
  606. struct device_attribute *mattr,
  607. char *data)
  608. {
  609. struct mem_ctl_info *mci = to_mci(dev);
  610. return sprintf(data, "%d\n", mci->ce_mc);
  611. }
  612. static ssize_t mci_ce_noinfo_show(struct device *dev,
  613. struct device_attribute *mattr,
  614. char *data)
  615. {
  616. struct mem_ctl_info *mci = to_mci(dev);
  617. return sprintf(data, "%d\n", mci->ce_noinfo_count);
  618. }
  619. static ssize_t mci_ue_noinfo_show(struct device *dev,
  620. struct device_attribute *mattr,
  621. char *data)
  622. {
  623. struct mem_ctl_info *mci = to_mci(dev);
  624. return sprintf(data, "%d\n", mci->ue_noinfo_count);
  625. }
  626. static ssize_t mci_seconds_show(struct device *dev,
  627. struct device_attribute *mattr,
  628. char *data)
  629. {
  630. struct mem_ctl_info *mci = to_mci(dev);
  631. return sprintf(data, "%ld\n", (jiffies - mci->start_time) / HZ);
  632. }
  633. static ssize_t mci_ctl_name_show(struct device *dev,
  634. struct device_attribute *mattr,
  635. char *data)
  636. {
  637. struct mem_ctl_info *mci = to_mci(dev);
  638. return sprintf(data, "%s\n", mci->ctl_name);
  639. }
  640. static ssize_t mci_size_mb_show(struct device *dev,
  641. struct device_attribute *mattr,
  642. char *data)
  643. {
  644. struct mem_ctl_info *mci = to_mci(dev);
  645. int total_pages = 0, csrow_idx, j;
  646. for (csrow_idx = 0; csrow_idx < mci->nr_csrows; csrow_idx++) {
  647. struct csrow_info *csrow = mci->csrows[csrow_idx];
  648. for (j = 0; j < csrow->nr_channels; j++) {
  649. struct dimm_info *dimm = csrow->channels[j]->dimm;
  650. total_pages += dimm->nr_pages;
  651. }
  652. }
  653. return sprintf(data, "%u\n", PAGES_TO_MiB(total_pages));
  654. }
  655. static ssize_t mci_max_location_show(struct device *dev,
  656. struct device_attribute *mattr,
  657. char *data)
  658. {
  659. struct mem_ctl_info *mci = to_mci(dev);
  660. int i;
  661. char *p = data;
  662. for (i = 0; i < mci->n_layers; i++) {
  663. p += sprintf(p, "%s %d ",
  664. edac_layer_name[mci->layers[i].type],
  665. mci->layers[i].size - 1);
  666. }
  667. return p - data;
  668. }
  669. #ifdef CONFIG_EDAC_DEBUG
  670. static ssize_t edac_fake_inject_write(struct file *file,
  671. const char __user *data,
  672. size_t count, loff_t *ppos)
  673. {
  674. struct device *dev = file->private_data;
  675. struct mem_ctl_info *mci = to_mci(dev);
  676. static enum hw_event_mc_err_type type;
  677. type = mci->fake_inject_ue ? HW_EVENT_ERR_UNCORRECTED
  678. : HW_EVENT_ERR_CORRECTED;
  679. printk(KERN_DEBUG
  680. "Generating a %s fake error to %d.%d.%d to test core handling. NOTE: this won't test the driver-specific decoding logic.\n",
  681. (type == HW_EVENT_ERR_UNCORRECTED) ? "UE" : "CE",
  682. mci->fake_inject_layer[0],
  683. mci->fake_inject_layer[1],
  684. mci->fake_inject_layer[2]
  685. );
  686. edac_mc_handle_error(type, mci, 0, 0, 0,
  687. mci->fake_inject_layer[0],
  688. mci->fake_inject_layer[1],
  689. mci->fake_inject_layer[2],
  690. "FAKE ERROR", "for EDAC testing only", NULL);
  691. return count;
  692. }
  693. static int debugfs_open(struct inode *inode, struct file *file)
  694. {
  695. file->private_data = inode->i_private;
  696. return 0;
  697. }
  698. static const struct file_operations debug_fake_inject_fops = {
  699. .open = debugfs_open,
  700. .write = edac_fake_inject_write,
  701. .llseek = generic_file_llseek,
  702. };
  703. #endif
  704. /* default Control file */
  705. DEVICE_ATTR(reset_counters, S_IWUSR, NULL, mci_reset_counters_store);
  706. /* default Attribute files */
  707. DEVICE_ATTR(mc_name, S_IRUGO, mci_ctl_name_show, NULL);
  708. DEVICE_ATTR(size_mb, S_IRUGO, mci_size_mb_show, NULL);
  709. DEVICE_ATTR(seconds_since_reset, S_IRUGO, mci_seconds_show, NULL);
  710. DEVICE_ATTR(ue_noinfo_count, S_IRUGO, mci_ue_noinfo_show, NULL);
  711. DEVICE_ATTR(ce_noinfo_count, S_IRUGO, mci_ce_noinfo_show, NULL);
  712. DEVICE_ATTR(ue_count, S_IRUGO, mci_ue_count_show, NULL);
  713. DEVICE_ATTR(ce_count, S_IRUGO, mci_ce_count_show, NULL);
  714. DEVICE_ATTR(max_location, S_IRUGO, mci_max_location_show, NULL);
  715. /* memory scrubber attribute file */
  716. DEVICE_ATTR(sdram_scrub_rate, S_IRUGO | S_IWUSR, mci_sdram_scrub_rate_show,
  717. mci_sdram_scrub_rate_store);
  718. static struct attribute *mci_attrs[] = {
  719. &dev_attr_reset_counters.attr,
  720. &dev_attr_mc_name.attr,
  721. &dev_attr_size_mb.attr,
  722. &dev_attr_seconds_since_reset.attr,
  723. &dev_attr_ue_noinfo_count.attr,
  724. &dev_attr_ce_noinfo_count.attr,
  725. &dev_attr_ue_count.attr,
  726. &dev_attr_ce_count.attr,
  727. &dev_attr_sdram_scrub_rate.attr,
  728. &dev_attr_max_location.attr,
  729. NULL
  730. };
  731. static struct attribute_group mci_attr_grp = {
  732. .attrs = mci_attrs,
  733. };
  734. static const struct attribute_group *mci_attr_groups[] = {
  735. &mci_attr_grp,
  736. NULL
  737. };
  738. static void mci_attr_release(struct device *dev)
  739. {
  740. struct mem_ctl_info *mci = container_of(dev, struct mem_ctl_info, dev);
  741. debugf1("Releasing csrow device %s\n", dev_name(dev));
  742. kfree(mci);
  743. }
  744. static struct device_type mci_attr_type = {
  745. .groups = mci_attr_groups,
  746. .release = mci_attr_release,
  747. };
  748. #ifdef CONFIG_EDAC_DEBUG
  749. int edac_create_debug_nodes(struct mem_ctl_info *mci)
  750. {
  751. struct dentry *d, *parent;
  752. char name[80];
  753. int i;
  754. d = debugfs_create_dir(mci->dev.kobj.name, mci->debugfs);
  755. if (!d)
  756. return -ENOMEM;
  757. parent = d;
  758. for (i = 0; i < mci->n_layers; i++) {
  759. sprintf(name, "fake_inject_%s",
  760. edac_layer_name[mci->layers[i].type]);
  761. d = debugfs_create_u8(name, S_IRUGO | S_IWUSR, parent,
  762. &mci->fake_inject_layer[i]);
  763. if (!d)
  764. goto nomem;
  765. }
  766. d = debugfs_create_bool("fake_inject_ue", S_IRUGO | S_IWUSR, parent,
  767. &mci->fake_inject_ue);
  768. if (!d)
  769. goto nomem;
  770. d = debugfs_create_file("fake_inject", S_IWUSR, parent,
  771. &mci->dev,
  772. &debug_fake_inject_fops);
  773. if (!d)
  774. goto nomem;
  775. return 0;
  776. nomem:
  777. debugfs_remove(mci->debugfs);
  778. return -ENOMEM;
  779. }
  780. #endif
  781. /*
  782. * Create a new Memory Controller kobject instance,
  783. * mc<id> under the 'mc' directory
  784. *
  785. * Return:
  786. * 0 Success
  787. * !0 Failure
  788. */
  789. int edac_create_sysfs_mci_device(struct mem_ctl_info *mci)
  790. {
  791. int i, err;
  792. /*
  793. * The memory controller needs its own bus, in order to avoid
  794. * namespace conflicts at /sys/bus/edac.
  795. */
  796. mci->bus.name = kasprintf(GFP_KERNEL, "mc%d", mci->mc_idx);
  797. if (!mci->bus.name)
  798. return -ENOMEM;
  799. debugf0("creating bus %s\n",mci->bus.name);
  800. err = bus_register(&mci->bus);
  801. if (err < 0)
  802. return err;
  803. /* get the /sys/devices/system/edac subsys reference */
  804. mci->dev.type = &mci_attr_type;
  805. device_initialize(&mci->dev);
  806. mci->dev.parent = mci_pdev;
  807. mci->dev.bus = &mci->bus;
  808. dev_set_name(&mci->dev, "mc%d", mci->mc_idx);
  809. dev_set_drvdata(&mci->dev, mci);
  810. pm_runtime_forbid(&mci->dev);
  811. debugf0("creating device %s\n", dev_name(&mci->dev));
  812. err = device_add(&mci->dev);
  813. if (err < 0) {
  814. bus_unregister(&mci->bus);
  815. kfree(mci->bus.name);
  816. return err;
  817. }
  818. /*
  819. * Create the dimm/rank devices
  820. */
  821. for (i = 0; i < mci->tot_dimms; i++) {
  822. struct dimm_info *dimm = mci->dimms[i];
  823. /* Only expose populated DIMMs */
  824. if (dimm->nr_pages == 0)
  825. continue;
  826. #ifdef CONFIG_EDAC_DEBUG
  827. debugf1("creating dimm%d, located at ",
  828. i);
  829. if (edac_debug_level >= 1) {
  830. int lay;
  831. for (lay = 0; lay < mci->n_layers; lay++)
  832. printk(KERN_CONT "%s %d ",
  833. edac_layer_name[mci->layers[lay].type],
  834. dimm->location[lay]);
  835. printk(KERN_CONT "\n");
  836. }
  837. #endif
  838. err = edac_create_dimm_object(mci, dimm, i);
  839. if (err) {
  840. debugf1("failure: create dimm %d obj\n",
  841. i);
  842. goto fail;
  843. }
  844. }
  845. #ifdef CONFIG_EDAC_LEGACY_SYSFS
  846. err = edac_create_csrow_objects(mci);
  847. if (err < 0)
  848. goto fail;
  849. #endif
  850. #ifdef CONFIG_EDAC_DEBUG
  851. edac_create_debug_nodes(mci);
  852. #endif
  853. return 0;
  854. fail:
  855. for (i--; i >= 0; i--) {
  856. struct dimm_info *dimm = mci->dimms[i];
  857. if (dimm->nr_pages == 0)
  858. continue;
  859. put_device(&dimm->dev);
  860. device_del(&dimm->dev);
  861. }
  862. put_device(&mci->dev);
  863. device_del(&mci->dev);
  864. bus_unregister(&mci->bus);
  865. kfree(mci->bus.name);
  866. return err;
  867. }
  868. /*
  869. * remove a Memory Controller instance
  870. */
  871. void edac_remove_sysfs_mci_device(struct mem_ctl_info *mci)
  872. {
  873. int i;
  874. debugf0("\n");
  875. #ifdef CONFIG_EDAC_DEBUG
  876. debugfs_remove(mci->debugfs);
  877. #endif
  878. #ifdef CONFIG_EDAC_LEGACY_SYSFS
  879. edac_delete_csrow_objects(mci);
  880. #endif
  881. for (i = 0; i < mci->tot_dimms; i++) {
  882. struct dimm_info *dimm = mci->dimms[i];
  883. if (dimm->nr_pages == 0)
  884. continue;
  885. debugf0("removing device %s\n", dev_name(&dimm->dev));
  886. put_device(&dimm->dev);
  887. device_del(&dimm->dev);
  888. }
  889. }
  890. void edac_unregister_sysfs(struct mem_ctl_info *mci)
  891. {
  892. debugf1("Unregistering device %s\n", dev_name(&mci->dev));
  893. put_device(&mci->dev);
  894. device_del(&mci->dev);
  895. bus_unregister(&mci->bus);
  896. kfree(mci->bus.name);
  897. }
  898. static void mc_attr_release(struct device *dev)
  899. {
  900. /*
  901. * There's no container structure here, as this is just the mci
  902. * parent device, used to create the /sys/devices/mc sysfs node.
  903. * So, there are no attributes on it.
  904. */
  905. debugf1("Releasing device %s\n", dev_name(dev));
  906. kfree(dev);
  907. }
  908. static struct device_type mc_attr_type = {
  909. .release = mc_attr_release,
  910. };
  911. /*
  912. * Init/exit code for the module. Basically, creates/removes /sys/class/rc
  913. */
  914. int __init edac_mc_sysfs_init(void)
  915. {
  916. struct bus_type *edac_subsys;
  917. int err;
  918. /* get the /sys/devices/system/edac subsys reference */
  919. edac_subsys = edac_get_sysfs_subsys();
  920. if (edac_subsys == NULL) {
  921. debugf1("no edac_subsys\n");
  922. return -EINVAL;
  923. }
  924. mci_pdev = kzalloc(sizeof(*mci_pdev), GFP_KERNEL);
  925. mci_pdev->bus = edac_subsys;
  926. mci_pdev->type = &mc_attr_type;
  927. device_initialize(mci_pdev);
  928. dev_set_name(mci_pdev, "mc");
  929. err = device_add(mci_pdev);
  930. if (err < 0)
  931. return err;
  932. debugf0("device %s created\n", dev_name(mci_pdev));
  933. return 0;
  934. }
  935. void __exit edac_mc_sysfs_exit(void)
  936. {
  937. put_device(mci_pdev);
  938. device_del(mci_pdev);
  939. edac_put_sysfs_subsys();
  940. }