rockchip_lvds.c 16 KB

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  1. /*
  2. * Copyright (C) Fuzhou Rockchip Electronics Co.Ltd
  3. * Author:
  4. * Mark Yao <mark.yao@rock-chips.com>
  5. * Sandy Huang <hjc@rock-chips.com>
  6. *
  7. * This software is licensed under the terms of the GNU General Public
  8. * License version 2, as published by the Free Software Foundation, and
  9. * may be copied, distributed, and modified under those terms.
  10. *
  11. * This program is distributed in the hope that it will be useful,
  12. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  13. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  14. * GNU General Public License for more details.
  15. */
  16. #include <drm/drmP.h>
  17. #include <drm/drm_atomic_helper.h>
  18. #include <drm/drm_crtc_helper.h>
  19. #include <drm/drm_dp_helper.h>
  20. #include <drm/drm_panel.h>
  21. #include <drm/drm_of.h>
  22. #include <linux/component.h>
  23. #include <linux/clk.h>
  24. #include <linux/mfd/syscon.h>
  25. #include <linux/of_graph.h>
  26. #include <linux/pm_runtime.h>
  27. #include <linux/regmap.h>
  28. #include <linux/reset.h>
  29. #include "rockchip_drm_drv.h"
  30. #include "rockchip_drm_vop.h"
  31. #include "rockchip_lvds.h"
  32. #define DISPLAY_OUTPUT_RGB 0
  33. #define DISPLAY_OUTPUT_LVDS 1
  34. #define DISPLAY_OUTPUT_DUAL_LVDS 2
  35. #define connector_to_lvds(c) \
  36. container_of(c, struct rockchip_lvds, connector)
  37. #define encoder_to_lvds(c) \
  38. container_of(c, struct rockchip_lvds, encoder)
  39. /**
  40. * rockchip_lvds_soc_data - rockchip lvds Soc private data
  41. * @ch1_offset: lvds channel 1 registe offset
  42. * grf_soc_con6: general registe offset for LVDS contrl
  43. * grf_soc_con7: general registe offset for LVDS contrl
  44. * has_vop_sel: to indicate whether need to choose from different VOP.
  45. */
  46. struct rockchip_lvds_soc_data {
  47. u32 ch1_offset;
  48. int grf_soc_con6;
  49. int grf_soc_con7;
  50. bool has_vop_sel;
  51. };
  52. struct rockchip_lvds {
  53. struct device *dev;
  54. void __iomem *regs;
  55. struct regmap *grf;
  56. struct clk *pclk;
  57. const struct rockchip_lvds_soc_data *soc_data;
  58. int output; /* rgb lvds or dual lvds output */
  59. int format; /* vesa or jeida format */
  60. struct drm_device *drm_dev;
  61. struct drm_panel *panel;
  62. struct drm_bridge *bridge;
  63. struct drm_connector connector;
  64. struct drm_encoder encoder;
  65. struct dev_pin_info *pins;
  66. };
  67. static inline void lvds_writel(struct rockchip_lvds *lvds, u32 offset, u32 val)
  68. {
  69. writel_relaxed(val, lvds->regs + offset);
  70. if (lvds->output == DISPLAY_OUTPUT_LVDS)
  71. return;
  72. writel_relaxed(val, lvds->regs + offset + lvds->soc_data->ch1_offset);
  73. }
  74. static inline int lvds_name_to_format(const char *s)
  75. {
  76. if (strncmp(s, "jeida-18", 8) == 0)
  77. return LVDS_JEIDA_18;
  78. else if (strncmp(s, "jeida-24", 8) == 0)
  79. return LVDS_JEIDA_24;
  80. else if (strncmp(s, "vesa-24", 7) == 0)
  81. return LVDS_VESA_24;
  82. return -EINVAL;
  83. }
  84. static inline int lvds_name_to_output(const char *s)
  85. {
  86. if (strncmp(s, "rgb", 3) == 0)
  87. return DISPLAY_OUTPUT_RGB;
  88. else if (strncmp(s, "lvds", 4) == 0)
  89. return DISPLAY_OUTPUT_LVDS;
  90. else if (strncmp(s, "duallvds", 8) == 0)
  91. return DISPLAY_OUTPUT_DUAL_LVDS;
  92. return -EINVAL;
  93. }
  94. static int rockchip_lvds_poweron(struct rockchip_lvds *lvds)
  95. {
  96. int ret;
  97. u32 val;
  98. ret = clk_enable(lvds->pclk);
  99. if (ret < 0) {
  100. DRM_DEV_ERROR(lvds->dev, "failed to enable lvds pclk %d\n", ret);
  101. return ret;
  102. }
  103. ret = pm_runtime_get_sync(lvds->dev);
  104. if (ret < 0) {
  105. DRM_DEV_ERROR(lvds->dev, "failed to get pm runtime: %d\n", ret);
  106. clk_disable(lvds->pclk);
  107. return ret;
  108. }
  109. val = RK3288_LVDS_CH0_REG0_LANE4_EN | RK3288_LVDS_CH0_REG0_LANE3_EN |
  110. RK3288_LVDS_CH0_REG0_LANE2_EN | RK3288_LVDS_CH0_REG0_LANE1_EN |
  111. RK3288_LVDS_CH0_REG0_LANE0_EN;
  112. if (lvds->output == DISPLAY_OUTPUT_RGB) {
  113. val |= RK3288_LVDS_CH0_REG0_TTL_EN |
  114. RK3288_LVDS_CH0_REG0_LANECK_EN;
  115. lvds_writel(lvds, RK3288_LVDS_CH0_REG0, val);
  116. lvds_writel(lvds, RK3288_LVDS_CH0_REG2,
  117. RK3288_LVDS_PLL_FBDIV_REG2(0x46));
  118. lvds_writel(lvds, RK3288_LVDS_CH0_REG4,
  119. RK3288_LVDS_CH0_REG4_LANECK_TTL_MODE |
  120. RK3288_LVDS_CH0_REG4_LANE4_TTL_MODE |
  121. RK3288_LVDS_CH0_REG4_LANE3_TTL_MODE |
  122. RK3288_LVDS_CH0_REG4_LANE2_TTL_MODE |
  123. RK3288_LVDS_CH0_REG4_LANE1_TTL_MODE |
  124. RK3288_LVDS_CH0_REG4_LANE0_TTL_MODE);
  125. lvds_writel(lvds, RK3288_LVDS_CH0_REG5,
  126. RK3288_LVDS_CH0_REG5_LANECK_TTL_DATA |
  127. RK3288_LVDS_CH0_REG5_LANE4_TTL_DATA |
  128. RK3288_LVDS_CH0_REG5_LANE3_TTL_DATA |
  129. RK3288_LVDS_CH0_REG5_LANE2_TTL_DATA |
  130. RK3288_LVDS_CH0_REG5_LANE1_TTL_DATA |
  131. RK3288_LVDS_CH0_REG5_LANE0_TTL_DATA);
  132. } else {
  133. val |= RK3288_LVDS_CH0_REG0_LVDS_EN |
  134. RK3288_LVDS_CH0_REG0_LANECK_EN;
  135. lvds_writel(lvds, RK3288_LVDS_CH0_REG0, val);
  136. lvds_writel(lvds, RK3288_LVDS_CH0_REG1,
  137. RK3288_LVDS_CH0_REG1_LANECK_BIAS |
  138. RK3288_LVDS_CH0_REG1_LANE4_BIAS |
  139. RK3288_LVDS_CH0_REG1_LANE3_BIAS |
  140. RK3288_LVDS_CH0_REG1_LANE2_BIAS |
  141. RK3288_LVDS_CH0_REG1_LANE1_BIAS |
  142. RK3288_LVDS_CH0_REG1_LANE0_BIAS);
  143. lvds_writel(lvds, RK3288_LVDS_CH0_REG2,
  144. RK3288_LVDS_CH0_REG2_RESERVE_ON |
  145. RK3288_LVDS_CH0_REG2_LANECK_LVDS_MODE |
  146. RK3288_LVDS_CH0_REG2_LANE4_LVDS_MODE |
  147. RK3288_LVDS_CH0_REG2_LANE3_LVDS_MODE |
  148. RK3288_LVDS_CH0_REG2_LANE2_LVDS_MODE |
  149. RK3288_LVDS_CH0_REG2_LANE1_LVDS_MODE |
  150. RK3288_LVDS_CH0_REG2_LANE0_LVDS_MODE |
  151. RK3288_LVDS_PLL_FBDIV_REG2(0x46));
  152. lvds_writel(lvds, RK3288_LVDS_CH0_REG4, 0x00);
  153. lvds_writel(lvds, RK3288_LVDS_CH0_REG5, 0x00);
  154. }
  155. lvds_writel(lvds, RK3288_LVDS_CH0_REG3, RK3288_LVDS_PLL_FBDIV_REG3(0x46));
  156. lvds_writel(lvds, RK3288_LVDS_CH0_REGD, RK3288_LVDS_PLL_PREDIV_REGD(0x0a));
  157. lvds_writel(lvds, RK3288_LVDS_CH0_REG20, RK3288_LVDS_CH0_REG20_LSB);
  158. lvds_writel(lvds, RK3288_LVDS_CFG_REGC, RK3288_LVDS_CFG_REGC_PLL_ENABLE);
  159. lvds_writel(lvds, RK3288_LVDS_CFG_REG21, RK3288_LVDS_CFG_REG21_TX_ENABLE);
  160. return 0;
  161. }
  162. static void rockchip_lvds_poweroff(struct rockchip_lvds *lvds)
  163. {
  164. int ret;
  165. u32 val;
  166. lvds_writel(lvds, RK3288_LVDS_CFG_REG21, RK3288_LVDS_CFG_REG21_TX_ENABLE);
  167. lvds_writel(lvds, RK3288_LVDS_CFG_REGC, RK3288_LVDS_CFG_REGC_PLL_ENABLE);
  168. val = LVDS_DUAL | LVDS_TTL_EN | LVDS_CH0_EN | LVDS_CH1_EN | LVDS_PWRDN;
  169. val |= val << 16;
  170. ret = regmap_write(lvds->grf, lvds->soc_data->grf_soc_con7, val);
  171. if (ret != 0)
  172. DRM_DEV_ERROR(lvds->dev, "Could not write to GRF: %d\n", ret);
  173. pm_runtime_put(lvds->dev);
  174. clk_disable(lvds->pclk);
  175. }
  176. static const struct drm_connector_funcs rockchip_lvds_connector_funcs = {
  177. .fill_modes = drm_helper_probe_single_connector_modes,
  178. .destroy = drm_connector_cleanup,
  179. .reset = drm_atomic_helper_connector_reset,
  180. .atomic_duplicate_state = drm_atomic_helper_connector_duplicate_state,
  181. .atomic_destroy_state = drm_atomic_helper_connector_destroy_state,
  182. };
  183. static int rockchip_lvds_connector_get_modes(struct drm_connector *connector)
  184. {
  185. struct rockchip_lvds *lvds = connector_to_lvds(connector);
  186. struct drm_panel *panel = lvds->panel;
  187. return drm_panel_get_modes(panel);
  188. }
  189. static const
  190. struct drm_connector_helper_funcs rockchip_lvds_connector_helper_funcs = {
  191. .get_modes = rockchip_lvds_connector_get_modes,
  192. };
  193. static void rockchip_lvds_grf_config(struct drm_encoder *encoder,
  194. struct drm_display_mode *mode)
  195. {
  196. struct rockchip_lvds *lvds = encoder_to_lvds(encoder);
  197. u8 pin_hsync = (mode->flags & DRM_MODE_FLAG_PHSYNC) ? 1 : 0;
  198. u8 pin_dclk = (mode->flags & DRM_MODE_FLAG_PCSYNC) ? 1 : 0;
  199. u32 val;
  200. int ret;
  201. /* iomux to LCD data/sync mode */
  202. if (lvds->output == DISPLAY_OUTPUT_RGB)
  203. if (lvds->pins && !IS_ERR(lvds->pins->default_state))
  204. pinctrl_select_state(lvds->pins->p,
  205. lvds->pins->default_state);
  206. val = lvds->format | LVDS_CH0_EN;
  207. if (lvds->output == DISPLAY_OUTPUT_RGB)
  208. val |= LVDS_TTL_EN | LVDS_CH1_EN;
  209. else if (lvds->output == DISPLAY_OUTPUT_DUAL_LVDS)
  210. val |= LVDS_DUAL | LVDS_CH1_EN;
  211. if ((mode->htotal - mode->hsync_start) & 0x01)
  212. val |= LVDS_START_PHASE_RST_1;
  213. val |= (pin_dclk << 8) | (pin_hsync << 9);
  214. val |= (0xffff << 16);
  215. ret = regmap_write(lvds->grf, lvds->soc_data->grf_soc_con7, val);
  216. if (ret != 0) {
  217. DRM_DEV_ERROR(lvds->dev, "Could not write to GRF: %d\n", ret);
  218. return;
  219. }
  220. }
  221. static int rockchip_lvds_set_vop_source(struct rockchip_lvds *lvds,
  222. struct drm_encoder *encoder)
  223. {
  224. u32 val;
  225. int ret;
  226. if (!lvds->soc_data->has_vop_sel)
  227. return 0;
  228. ret = drm_of_encoder_active_endpoint_id(lvds->dev->of_node, encoder);
  229. if (ret < 0)
  230. return ret;
  231. val = RK3288_LVDS_SOC_CON6_SEL_VOP_LIT << 16;
  232. if (ret)
  233. val |= RK3288_LVDS_SOC_CON6_SEL_VOP_LIT;
  234. ret = regmap_write(lvds->grf, lvds->soc_data->grf_soc_con6, val);
  235. if (ret < 0)
  236. return ret;
  237. return 0;
  238. }
  239. static int
  240. rockchip_lvds_encoder_atomic_check(struct drm_encoder *encoder,
  241. struct drm_crtc_state *crtc_state,
  242. struct drm_connector_state *conn_state)
  243. {
  244. struct rockchip_crtc_state *s = to_rockchip_crtc_state(crtc_state);
  245. s->output_mode = ROCKCHIP_OUT_MODE_P888;
  246. s->output_type = DRM_MODE_CONNECTOR_LVDS;
  247. return 0;
  248. }
  249. static void rockchip_lvds_encoder_enable(struct drm_encoder *encoder)
  250. {
  251. struct rockchip_lvds *lvds = encoder_to_lvds(encoder);
  252. struct drm_display_mode *mode = &encoder->crtc->state->adjusted_mode;
  253. int ret;
  254. drm_panel_prepare(lvds->panel);
  255. ret = rockchip_lvds_poweron(lvds);
  256. if (ret < 0) {
  257. DRM_DEV_ERROR(lvds->dev, "failed to power on lvds: %d\n", ret);
  258. drm_panel_unprepare(lvds->panel);
  259. }
  260. rockchip_lvds_grf_config(encoder, mode);
  261. rockchip_lvds_set_vop_source(lvds, encoder);
  262. drm_panel_enable(lvds->panel);
  263. }
  264. static void rockchip_lvds_encoder_disable(struct drm_encoder *encoder)
  265. {
  266. struct rockchip_lvds *lvds = encoder_to_lvds(encoder);
  267. drm_panel_disable(lvds->panel);
  268. rockchip_lvds_poweroff(lvds);
  269. drm_panel_unprepare(lvds->panel);
  270. }
  271. static const
  272. struct drm_encoder_helper_funcs rockchip_lvds_encoder_helper_funcs = {
  273. .enable = rockchip_lvds_encoder_enable,
  274. .disable = rockchip_lvds_encoder_disable,
  275. .atomic_check = rockchip_lvds_encoder_atomic_check,
  276. };
  277. static const struct drm_encoder_funcs rockchip_lvds_encoder_funcs = {
  278. .destroy = drm_encoder_cleanup,
  279. };
  280. static const struct rockchip_lvds_soc_data rk3288_lvds_data = {
  281. .ch1_offset = 0x100,
  282. .grf_soc_con6 = 0x025c,
  283. .grf_soc_con7 = 0x0260,
  284. .has_vop_sel = true,
  285. };
  286. static const struct of_device_id rockchip_lvds_dt_ids[] = {
  287. {
  288. .compatible = "rockchip,rk3288-lvds",
  289. .data = &rk3288_lvds_data
  290. },
  291. {}
  292. };
  293. MODULE_DEVICE_TABLE(of, rockchip_lvds_dt_ids);
  294. static int rockchip_lvds_bind(struct device *dev, struct device *master,
  295. void *data)
  296. {
  297. struct rockchip_lvds *lvds = dev_get_drvdata(dev);
  298. struct drm_device *drm_dev = data;
  299. struct drm_encoder *encoder;
  300. struct drm_connector *connector;
  301. struct device_node *remote = NULL;
  302. struct device_node *port, *endpoint;
  303. int ret = 0, child_count = 0;
  304. const char *name;
  305. u32 endpoint_id;
  306. lvds->drm_dev = drm_dev;
  307. port = of_graph_get_port_by_id(dev->of_node, 1);
  308. if (!port) {
  309. DRM_DEV_ERROR(dev,
  310. "can't found port point, please init lvds panel port!\n");
  311. return -EINVAL;
  312. }
  313. for_each_child_of_node(port, endpoint) {
  314. child_count++;
  315. of_property_read_u32(endpoint, "reg", &endpoint_id);
  316. ret = drm_of_find_panel_or_bridge(dev->of_node, 1, endpoint_id,
  317. &lvds->panel, &lvds->bridge);
  318. if (!ret)
  319. break;
  320. }
  321. if (!child_count) {
  322. DRM_DEV_ERROR(dev, "lvds port does not have any children\n");
  323. ret = -EINVAL;
  324. goto err_put_port;
  325. } else if (ret) {
  326. DRM_DEV_ERROR(dev, "failed to find panel and bridge node\n");
  327. ret = -EPROBE_DEFER;
  328. goto err_put_port;
  329. }
  330. if (lvds->panel)
  331. remote = lvds->panel->dev->of_node;
  332. else
  333. remote = lvds->bridge->of_node;
  334. if (of_property_read_string(dev->of_node, "rockchip,output", &name))
  335. /* default set it as output rgb */
  336. lvds->output = DISPLAY_OUTPUT_RGB;
  337. else
  338. lvds->output = lvds_name_to_output(name);
  339. if (lvds->output < 0) {
  340. DRM_DEV_ERROR(dev, "invalid output type [%s]\n", name);
  341. ret = lvds->output;
  342. goto err_put_remote;
  343. }
  344. if (of_property_read_string(remote, "data-mapping", &name))
  345. /* default set it as format vesa 18 */
  346. lvds->format = LVDS_VESA_18;
  347. else
  348. lvds->format = lvds_name_to_format(name);
  349. if (lvds->format < 0) {
  350. DRM_DEV_ERROR(dev, "invalid data-mapping format [%s]\n", name);
  351. ret = lvds->format;
  352. goto err_put_remote;
  353. }
  354. encoder = &lvds->encoder;
  355. encoder->possible_crtcs = drm_of_find_possible_crtcs(drm_dev,
  356. dev->of_node);
  357. ret = drm_encoder_init(drm_dev, encoder, &rockchip_lvds_encoder_funcs,
  358. DRM_MODE_ENCODER_LVDS, NULL);
  359. if (ret < 0) {
  360. DRM_DEV_ERROR(drm_dev->dev,
  361. "failed to initialize encoder: %d\n", ret);
  362. goto err_put_remote;
  363. }
  364. drm_encoder_helper_add(encoder, &rockchip_lvds_encoder_helper_funcs);
  365. if (lvds->panel) {
  366. connector = &lvds->connector;
  367. connector->dpms = DRM_MODE_DPMS_OFF;
  368. ret = drm_connector_init(drm_dev, connector,
  369. &rockchip_lvds_connector_funcs,
  370. DRM_MODE_CONNECTOR_LVDS);
  371. if (ret < 0) {
  372. DRM_DEV_ERROR(drm_dev->dev,
  373. "failed to initialize connector: %d\n", ret);
  374. goto err_free_encoder;
  375. }
  376. drm_connector_helper_add(connector,
  377. &rockchip_lvds_connector_helper_funcs);
  378. ret = drm_mode_connector_attach_encoder(connector, encoder);
  379. if (ret < 0) {
  380. DRM_DEV_ERROR(drm_dev->dev,
  381. "failed to attach encoder: %d\n", ret);
  382. goto err_free_connector;
  383. }
  384. ret = drm_panel_attach(lvds->panel, connector);
  385. if (ret < 0) {
  386. DRM_DEV_ERROR(drm_dev->dev,
  387. "failed to attach panel: %d\n", ret);
  388. goto err_free_connector;
  389. }
  390. } else {
  391. lvds->bridge->encoder = encoder;
  392. ret = drm_bridge_attach(encoder, lvds->bridge, NULL);
  393. if (ret) {
  394. DRM_DEV_ERROR(drm_dev->dev,
  395. "failed to attach bridge: %d\n", ret);
  396. goto err_free_encoder;
  397. }
  398. encoder->bridge = lvds->bridge;
  399. }
  400. pm_runtime_enable(dev);
  401. of_node_put(remote);
  402. of_node_put(port);
  403. return 0;
  404. err_free_connector:
  405. drm_connector_cleanup(connector);
  406. err_free_encoder:
  407. drm_encoder_cleanup(encoder);
  408. err_put_remote:
  409. of_node_put(remote);
  410. err_put_port:
  411. of_node_put(port);
  412. return ret;
  413. }
  414. static void rockchip_lvds_unbind(struct device *dev, struct device *master,
  415. void *data)
  416. {
  417. struct rockchip_lvds *lvds = dev_get_drvdata(dev);
  418. rockchip_lvds_encoder_disable(&lvds->encoder);
  419. if (lvds->panel)
  420. drm_panel_detach(lvds->panel);
  421. pm_runtime_disable(dev);
  422. drm_connector_cleanup(&lvds->connector);
  423. drm_encoder_cleanup(&lvds->encoder);
  424. }
  425. static const struct component_ops rockchip_lvds_component_ops = {
  426. .bind = rockchip_lvds_bind,
  427. .unbind = rockchip_lvds_unbind,
  428. };
  429. static int rockchip_lvds_probe(struct platform_device *pdev)
  430. {
  431. struct device *dev = &pdev->dev;
  432. struct rockchip_lvds *lvds;
  433. const struct of_device_id *match;
  434. struct resource *res;
  435. int ret;
  436. if (!dev->of_node)
  437. return -ENODEV;
  438. lvds = devm_kzalloc(&pdev->dev, sizeof(*lvds), GFP_KERNEL);
  439. if (!lvds)
  440. return -ENOMEM;
  441. lvds->dev = dev;
  442. match = of_match_node(rockchip_lvds_dt_ids, dev->of_node);
  443. if (!match)
  444. return -ENODEV;
  445. lvds->soc_data = match->data;
  446. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  447. lvds->regs = devm_ioremap_resource(&pdev->dev, res);
  448. if (IS_ERR(lvds->regs))
  449. return PTR_ERR(lvds->regs);
  450. lvds->pclk = devm_clk_get(&pdev->dev, "pclk_lvds");
  451. if (IS_ERR(lvds->pclk)) {
  452. DRM_DEV_ERROR(dev, "could not get pclk_lvds\n");
  453. return PTR_ERR(lvds->pclk);
  454. }
  455. lvds->pins = devm_kzalloc(lvds->dev, sizeof(*lvds->pins),
  456. GFP_KERNEL);
  457. if (!lvds->pins)
  458. return -ENOMEM;
  459. lvds->pins->p = devm_pinctrl_get(lvds->dev);
  460. if (IS_ERR(lvds->pins->p)) {
  461. DRM_DEV_ERROR(dev, "no pinctrl handle\n");
  462. devm_kfree(lvds->dev, lvds->pins);
  463. lvds->pins = NULL;
  464. } else {
  465. lvds->pins->default_state =
  466. pinctrl_lookup_state(lvds->pins->p, "lcdc");
  467. if (IS_ERR(lvds->pins->default_state)) {
  468. DRM_DEV_ERROR(dev, "no default pinctrl state\n");
  469. devm_kfree(lvds->dev, lvds->pins);
  470. lvds->pins = NULL;
  471. }
  472. }
  473. lvds->grf = syscon_regmap_lookup_by_phandle(dev->of_node,
  474. "rockchip,grf");
  475. if (IS_ERR(lvds->grf)) {
  476. DRM_DEV_ERROR(dev, "missing rockchip,grf property\n");
  477. return PTR_ERR(lvds->grf);
  478. }
  479. dev_set_drvdata(dev, lvds);
  480. ret = clk_prepare(lvds->pclk);
  481. if (ret < 0) {
  482. DRM_DEV_ERROR(dev, "failed to prepare pclk_lvds\n");
  483. return ret;
  484. }
  485. ret = component_add(&pdev->dev, &rockchip_lvds_component_ops);
  486. if (ret < 0) {
  487. DRM_DEV_ERROR(dev, "failed to add component\n");
  488. clk_unprepare(lvds->pclk);
  489. }
  490. return ret;
  491. }
  492. static int rockchip_lvds_remove(struct platform_device *pdev)
  493. {
  494. struct rockchip_lvds *lvds = dev_get_drvdata(&pdev->dev);
  495. component_del(&pdev->dev, &rockchip_lvds_component_ops);
  496. clk_unprepare(lvds->pclk);
  497. return 0;
  498. }
  499. struct platform_driver rockchip_lvds_driver = {
  500. .probe = rockchip_lvds_probe,
  501. .remove = rockchip_lvds_remove,
  502. .driver = {
  503. .name = "rockchip-lvds",
  504. .of_match_table = of_match_ptr(rockchip_lvds_dt_ids),
  505. },
  506. };