hdmi4.c 17 KB

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  1. /*
  2. * HDMI interface DSS driver for TI's OMAP4 family of SoCs.
  3. *
  4. * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com/
  5. * Authors: Yong Zhi
  6. * Mythri pk <mythripk@ti.com>
  7. *
  8. * This program is free software; you can redistribute it and/or modify it
  9. * under the terms of the GNU General Public License version 2 as published by
  10. * the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but WITHOUT
  13. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  14. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  15. * more details.
  16. *
  17. * You should have received a copy of the GNU General Public License along with
  18. * this program. If not, see <http://www.gnu.org/licenses/>.
  19. */
  20. #define DSS_SUBSYS_NAME "HDMI"
  21. #include <linux/kernel.h>
  22. #include <linux/module.h>
  23. #include <linux/err.h>
  24. #include <linux/io.h>
  25. #include <linux/interrupt.h>
  26. #include <linux/mutex.h>
  27. #include <linux/delay.h>
  28. #include <linux/string.h>
  29. #include <linux/platform_device.h>
  30. #include <linux/pm_runtime.h>
  31. #include <linux/clk.h>
  32. #include <linux/gpio.h>
  33. #include <linux/regulator/consumer.h>
  34. #include <linux/component.h>
  35. #include <linux/of.h>
  36. #include <linux/of_graph.h>
  37. #include <sound/omap-hdmi-audio.h>
  38. #include <media/cec.h>
  39. #include "omapdss.h"
  40. #include "hdmi4_core.h"
  41. #include "hdmi4_cec.h"
  42. #include "dss.h"
  43. #include "hdmi.h"
  44. static struct omap_hdmi hdmi;
  45. static int hdmi_runtime_get(void)
  46. {
  47. int r;
  48. DSSDBG("hdmi_runtime_get\n");
  49. r = pm_runtime_get_sync(&hdmi.pdev->dev);
  50. WARN_ON(r < 0);
  51. if (r < 0)
  52. return r;
  53. return 0;
  54. }
  55. static void hdmi_runtime_put(void)
  56. {
  57. int r;
  58. DSSDBG("hdmi_runtime_put\n");
  59. r = pm_runtime_put_sync(&hdmi.pdev->dev);
  60. WARN_ON(r < 0 && r != -ENOSYS);
  61. }
  62. static irqreturn_t hdmi_irq_handler(int irq, void *data)
  63. {
  64. struct omap_hdmi *hdmi = data;
  65. struct hdmi_wp_data *wp = &hdmi->wp;
  66. u32 irqstatus;
  67. irqstatus = hdmi_wp_get_irqstatus(wp);
  68. hdmi_wp_set_irqstatus(wp, irqstatus);
  69. if ((irqstatus & HDMI_IRQ_LINK_CONNECT) &&
  70. irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
  71. /*
  72. * If we get both connect and disconnect interrupts at the same
  73. * time, turn off the PHY, clear interrupts, and restart, which
  74. * raises connect interrupt if a cable is connected, or nothing
  75. * if cable is not connected.
  76. */
  77. hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF);
  78. hdmi_wp_set_irqstatus(wp, HDMI_IRQ_LINK_CONNECT |
  79. HDMI_IRQ_LINK_DISCONNECT);
  80. hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
  81. } else if (irqstatus & HDMI_IRQ_LINK_CONNECT) {
  82. hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON);
  83. } else if (irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
  84. hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
  85. }
  86. if (irqstatus & HDMI_IRQ_CORE) {
  87. u32 intr4 = hdmi_read_reg(hdmi->core.base, HDMI_CORE_SYS_INTR4);
  88. hdmi_write_reg(hdmi->core.base, HDMI_CORE_SYS_INTR4, intr4);
  89. if (intr4 & 8)
  90. hdmi4_cec_irq(&hdmi->core);
  91. }
  92. return IRQ_HANDLED;
  93. }
  94. static int hdmi_init_regulator(void)
  95. {
  96. struct regulator *reg;
  97. if (hdmi.vdda_reg != NULL)
  98. return 0;
  99. reg = devm_regulator_get(&hdmi.pdev->dev, "vdda");
  100. if (IS_ERR(reg)) {
  101. if (PTR_ERR(reg) != -EPROBE_DEFER)
  102. DSSERR("can't get VDDA regulator\n");
  103. return PTR_ERR(reg);
  104. }
  105. hdmi.vdda_reg = reg;
  106. return 0;
  107. }
  108. static int hdmi_power_on_core(struct omap_dss_device *dssdev)
  109. {
  110. int r;
  111. if (hdmi.core.core_pwr_cnt++)
  112. return 0;
  113. r = regulator_enable(hdmi.vdda_reg);
  114. if (r)
  115. goto err_reg_enable;
  116. r = hdmi_runtime_get();
  117. if (r)
  118. goto err_runtime_get;
  119. hdmi4_core_powerdown_disable(&hdmi.core);
  120. /* Make selection of HDMI in DSS */
  121. dss_select_hdmi_venc_clk_source(DSS_HDMI_M_PCLK);
  122. hdmi.core_enabled = true;
  123. return 0;
  124. err_runtime_get:
  125. regulator_disable(hdmi.vdda_reg);
  126. err_reg_enable:
  127. hdmi.core.core_pwr_cnt--;
  128. return r;
  129. }
  130. static void hdmi_power_off_core(struct omap_dss_device *dssdev)
  131. {
  132. if (--hdmi.core.core_pwr_cnt)
  133. return;
  134. hdmi.core_enabled = false;
  135. hdmi_runtime_put();
  136. regulator_disable(hdmi.vdda_reg);
  137. }
  138. static int hdmi_power_on_full(struct omap_dss_device *dssdev)
  139. {
  140. int r;
  141. struct videomode *vm;
  142. enum omap_channel channel = dssdev->dispc_channel;
  143. struct hdmi_wp_data *wp = &hdmi.wp;
  144. struct dss_pll_clock_info hdmi_cinfo = { 0 };
  145. unsigned pc;
  146. r = hdmi_power_on_core(dssdev);
  147. if (r)
  148. return r;
  149. /* disable and clear irqs */
  150. hdmi_wp_clear_irqenable(wp, ~HDMI_IRQ_CORE);
  151. hdmi_wp_set_irqstatus(wp, ~HDMI_IRQ_CORE);
  152. vm = &hdmi.cfg.vm;
  153. DSSDBG("hdmi_power_on hactive= %d vactive = %d\n", vm->hactive,
  154. vm->vactive);
  155. pc = vm->pixelclock;
  156. if (vm->flags & DISPLAY_FLAGS_DOUBLECLK)
  157. pc *= 2;
  158. /* DSS_HDMI_TCLK is bitclk / 10 */
  159. pc *= 10;
  160. dss_pll_calc_b(&hdmi.pll.pll, clk_get_rate(hdmi.pll.pll.clkin),
  161. pc, &hdmi_cinfo);
  162. r = dss_pll_enable(&hdmi.pll.pll);
  163. if (r) {
  164. DSSERR("Failed to enable PLL\n");
  165. goto err_pll_enable;
  166. }
  167. r = dss_pll_set_config(&hdmi.pll.pll, &hdmi_cinfo);
  168. if (r) {
  169. DSSERR("Failed to configure PLL\n");
  170. goto err_pll_cfg;
  171. }
  172. r = hdmi_phy_configure(&hdmi.phy, hdmi_cinfo.clkdco,
  173. hdmi_cinfo.clkout[0]);
  174. if (r) {
  175. DSSDBG("Failed to configure PHY\n");
  176. goto err_phy_cfg;
  177. }
  178. r = hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
  179. if (r)
  180. goto err_phy_pwr;
  181. hdmi4_configure(&hdmi.core, &hdmi.wp, &hdmi.cfg);
  182. /* tv size */
  183. dss_mgr_set_timings(channel, vm);
  184. r = dss_mgr_enable(channel);
  185. if (r)
  186. goto err_mgr_enable;
  187. r = hdmi_wp_video_start(&hdmi.wp);
  188. if (r)
  189. goto err_vid_enable;
  190. hdmi_wp_set_irqenable(wp,
  191. HDMI_IRQ_LINK_CONNECT | HDMI_IRQ_LINK_DISCONNECT);
  192. return 0;
  193. err_vid_enable:
  194. dss_mgr_disable(channel);
  195. err_mgr_enable:
  196. hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
  197. err_phy_pwr:
  198. err_phy_cfg:
  199. err_pll_cfg:
  200. dss_pll_disable(&hdmi.pll.pll);
  201. err_pll_enable:
  202. hdmi_power_off_core(dssdev);
  203. return -EIO;
  204. }
  205. static void hdmi_power_off_full(struct omap_dss_device *dssdev)
  206. {
  207. enum omap_channel channel = dssdev->dispc_channel;
  208. hdmi_wp_clear_irqenable(&hdmi.wp, ~HDMI_IRQ_CORE);
  209. hdmi_wp_video_stop(&hdmi.wp);
  210. dss_mgr_disable(channel);
  211. hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
  212. dss_pll_disable(&hdmi.pll.pll);
  213. hdmi_power_off_core(dssdev);
  214. }
  215. static int hdmi_display_check_timing(struct omap_dss_device *dssdev,
  216. struct videomode *vm)
  217. {
  218. if (!dispc_mgr_timings_ok(dssdev->dispc_channel, vm))
  219. return -EINVAL;
  220. return 0;
  221. }
  222. static void hdmi_display_set_timing(struct omap_dss_device *dssdev,
  223. struct videomode *vm)
  224. {
  225. mutex_lock(&hdmi.lock);
  226. hdmi.cfg.vm = *vm;
  227. dispc_set_tv_pclk(vm->pixelclock);
  228. mutex_unlock(&hdmi.lock);
  229. }
  230. static void hdmi_display_get_timings(struct omap_dss_device *dssdev,
  231. struct videomode *vm)
  232. {
  233. *vm = hdmi.cfg.vm;
  234. }
  235. static void hdmi_dump_regs(struct seq_file *s)
  236. {
  237. mutex_lock(&hdmi.lock);
  238. if (hdmi_runtime_get()) {
  239. mutex_unlock(&hdmi.lock);
  240. return;
  241. }
  242. hdmi_wp_dump(&hdmi.wp, s);
  243. hdmi_pll_dump(&hdmi.pll, s);
  244. hdmi_phy_dump(&hdmi.phy, s);
  245. hdmi4_core_dump(&hdmi.core, s);
  246. hdmi_runtime_put();
  247. mutex_unlock(&hdmi.lock);
  248. }
  249. static int read_edid(u8 *buf, int len)
  250. {
  251. int r;
  252. mutex_lock(&hdmi.lock);
  253. r = hdmi_runtime_get();
  254. BUG_ON(r);
  255. r = hdmi4_read_edid(&hdmi.core, buf, len);
  256. hdmi_runtime_put();
  257. mutex_unlock(&hdmi.lock);
  258. return r;
  259. }
  260. static void hdmi_start_audio_stream(struct omap_hdmi *hd)
  261. {
  262. hdmi_wp_audio_enable(&hd->wp, true);
  263. hdmi4_audio_start(&hd->core, &hd->wp);
  264. }
  265. static void hdmi_stop_audio_stream(struct omap_hdmi *hd)
  266. {
  267. hdmi4_audio_stop(&hd->core, &hd->wp);
  268. hdmi_wp_audio_enable(&hd->wp, false);
  269. }
  270. static int hdmi_display_enable(struct omap_dss_device *dssdev)
  271. {
  272. struct omap_dss_device *out = &hdmi.output;
  273. unsigned long flags;
  274. int r = 0;
  275. DSSDBG("ENTER hdmi_display_enable\n");
  276. mutex_lock(&hdmi.lock);
  277. if (!out->dispc_channel_connected) {
  278. DSSERR("failed to enable display: no output/manager\n");
  279. r = -ENODEV;
  280. goto err0;
  281. }
  282. r = hdmi_power_on_full(dssdev);
  283. if (r) {
  284. DSSERR("failed to power on device\n");
  285. goto err0;
  286. }
  287. if (hdmi.audio_configured) {
  288. r = hdmi4_audio_config(&hdmi.core, &hdmi.wp, &hdmi.audio_config,
  289. hdmi.cfg.vm.pixelclock);
  290. if (r) {
  291. DSSERR("Error restoring audio configuration: %d", r);
  292. hdmi.audio_abort_cb(&hdmi.pdev->dev);
  293. hdmi.audio_configured = false;
  294. }
  295. }
  296. spin_lock_irqsave(&hdmi.audio_playing_lock, flags);
  297. if (hdmi.audio_configured && hdmi.audio_playing)
  298. hdmi_start_audio_stream(&hdmi);
  299. hdmi.display_enabled = true;
  300. spin_unlock_irqrestore(&hdmi.audio_playing_lock, flags);
  301. mutex_unlock(&hdmi.lock);
  302. return 0;
  303. err0:
  304. mutex_unlock(&hdmi.lock);
  305. return r;
  306. }
  307. static void hdmi_display_disable(struct omap_dss_device *dssdev)
  308. {
  309. unsigned long flags;
  310. DSSDBG("Enter hdmi_display_disable\n");
  311. mutex_lock(&hdmi.lock);
  312. spin_lock_irqsave(&hdmi.audio_playing_lock, flags);
  313. hdmi_stop_audio_stream(&hdmi);
  314. hdmi.display_enabled = false;
  315. spin_unlock_irqrestore(&hdmi.audio_playing_lock, flags);
  316. hdmi_power_off_full(dssdev);
  317. mutex_unlock(&hdmi.lock);
  318. }
  319. int hdmi4_core_enable(struct omap_dss_device *dssdev)
  320. {
  321. int r = 0;
  322. DSSDBG("ENTER omapdss_hdmi4_core_enable\n");
  323. mutex_lock(&hdmi.lock);
  324. r = hdmi_power_on_core(dssdev);
  325. if (r) {
  326. DSSERR("failed to power on device\n");
  327. goto err0;
  328. }
  329. mutex_unlock(&hdmi.lock);
  330. return 0;
  331. err0:
  332. mutex_unlock(&hdmi.lock);
  333. return r;
  334. }
  335. void hdmi4_core_disable(struct omap_dss_device *dssdev)
  336. {
  337. DSSDBG("Enter omapdss_hdmi4_core_disable\n");
  338. mutex_lock(&hdmi.lock);
  339. hdmi_power_off_core(dssdev);
  340. mutex_unlock(&hdmi.lock);
  341. }
  342. static int hdmi_connect(struct omap_dss_device *dssdev,
  343. struct omap_dss_device *dst)
  344. {
  345. enum omap_channel channel = dssdev->dispc_channel;
  346. int r;
  347. r = hdmi_init_regulator();
  348. if (r)
  349. return r;
  350. r = dss_mgr_connect(channel, dssdev);
  351. if (r)
  352. return r;
  353. r = omapdss_output_set_device(dssdev, dst);
  354. if (r) {
  355. DSSERR("failed to connect output to new device: %s\n",
  356. dst->name);
  357. dss_mgr_disconnect(channel, dssdev);
  358. return r;
  359. }
  360. return 0;
  361. }
  362. static void hdmi_disconnect(struct omap_dss_device *dssdev,
  363. struct omap_dss_device *dst)
  364. {
  365. enum omap_channel channel = dssdev->dispc_channel;
  366. WARN_ON(dst != dssdev->dst);
  367. if (dst != dssdev->dst)
  368. return;
  369. omapdss_output_unset_device(dssdev);
  370. dss_mgr_disconnect(channel, dssdev);
  371. }
  372. static int hdmi_read_edid(struct omap_dss_device *dssdev,
  373. u8 *edid, int len)
  374. {
  375. bool need_enable;
  376. int r;
  377. need_enable = hdmi.core_enabled == false;
  378. if (need_enable) {
  379. r = hdmi4_core_enable(dssdev);
  380. if (r)
  381. return r;
  382. }
  383. r = read_edid(edid, len);
  384. if (r >= 256)
  385. hdmi4_cec_set_phys_addr(&hdmi.core,
  386. cec_get_edid_phys_addr(edid, r, NULL));
  387. else
  388. hdmi4_cec_set_phys_addr(&hdmi.core, CEC_PHYS_ADDR_INVALID);
  389. if (need_enable)
  390. hdmi4_core_disable(dssdev);
  391. return r;
  392. }
  393. static void hdmi_lost_hotplug(struct omap_dss_device *dssdev)
  394. {
  395. hdmi4_cec_set_phys_addr(&hdmi.core, CEC_PHYS_ADDR_INVALID);
  396. }
  397. static int hdmi_set_infoframe(struct omap_dss_device *dssdev,
  398. const struct hdmi_avi_infoframe *avi)
  399. {
  400. hdmi.cfg.infoframe = *avi;
  401. return 0;
  402. }
  403. static int hdmi_set_hdmi_mode(struct omap_dss_device *dssdev,
  404. bool hdmi_mode)
  405. {
  406. hdmi.cfg.hdmi_dvi_mode = hdmi_mode ? HDMI_HDMI : HDMI_DVI;
  407. return 0;
  408. }
  409. static const struct omapdss_hdmi_ops hdmi_ops = {
  410. .connect = hdmi_connect,
  411. .disconnect = hdmi_disconnect,
  412. .enable = hdmi_display_enable,
  413. .disable = hdmi_display_disable,
  414. .check_timings = hdmi_display_check_timing,
  415. .set_timings = hdmi_display_set_timing,
  416. .get_timings = hdmi_display_get_timings,
  417. .read_edid = hdmi_read_edid,
  418. .lost_hotplug = hdmi_lost_hotplug,
  419. .set_infoframe = hdmi_set_infoframe,
  420. .set_hdmi_mode = hdmi_set_hdmi_mode,
  421. };
  422. static void hdmi_init_output(struct platform_device *pdev)
  423. {
  424. struct omap_dss_device *out = &hdmi.output;
  425. out->dev = &pdev->dev;
  426. out->id = OMAP_DSS_OUTPUT_HDMI;
  427. out->output_type = OMAP_DISPLAY_TYPE_HDMI;
  428. out->name = "hdmi.0";
  429. out->dispc_channel = OMAP_DSS_CHANNEL_DIGIT;
  430. out->ops.hdmi = &hdmi_ops;
  431. out->owner = THIS_MODULE;
  432. omapdss_register_output(out);
  433. }
  434. static void hdmi_uninit_output(struct platform_device *pdev)
  435. {
  436. struct omap_dss_device *out = &hdmi.output;
  437. omapdss_unregister_output(out);
  438. }
  439. static int hdmi_probe_of(struct platform_device *pdev)
  440. {
  441. struct device_node *node = pdev->dev.of_node;
  442. struct device_node *ep;
  443. int r;
  444. ep = of_graph_get_endpoint_by_regs(node, 0, 0);
  445. if (!ep)
  446. return 0;
  447. r = hdmi_parse_lanes_of(pdev, ep, &hdmi.phy);
  448. if (r)
  449. goto err;
  450. of_node_put(ep);
  451. return 0;
  452. err:
  453. of_node_put(ep);
  454. return r;
  455. }
  456. /* Audio callbacks */
  457. static int hdmi_audio_startup(struct device *dev,
  458. void (*abort_cb)(struct device *dev))
  459. {
  460. struct omap_hdmi *hd = dev_get_drvdata(dev);
  461. int ret = 0;
  462. mutex_lock(&hd->lock);
  463. if (!hdmi_mode_has_audio(&hd->cfg) || !hd->display_enabled) {
  464. ret = -EPERM;
  465. goto out;
  466. }
  467. hd->audio_abort_cb = abort_cb;
  468. out:
  469. mutex_unlock(&hd->lock);
  470. return ret;
  471. }
  472. static int hdmi_audio_shutdown(struct device *dev)
  473. {
  474. struct omap_hdmi *hd = dev_get_drvdata(dev);
  475. mutex_lock(&hd->lock);
  476. hd->audio_abort_cb = NULL;
  477. hd->audio_configured = false;
  478. hd->audio_playing = false;
  479. mutex_unlock(&hd->lock);
  480. return 0;
  481. }
  482. static int hdmi_audio_start(struct device *dev)
  483. {
  484. struct omap_hdmi *hd = dev_get_drvdata(dev);
  485. unsigned long flags;
  486. WARN_ON(!hdmi_mode_has_audio(&hd->cfg));
  487. spin_lock_irqsave(&hd->audio_playing_lock, flags);
  488. if (hd->display_enabled)
  489. hdmi_start_audio_stream(hd);
  490. hd->audio_playing = true;
  491. spin_unlock_irqrestore(&hd->audio_playing_lock, flags);
  492. return 0;
  493. }
  494. static void hdmi_audio_stop(struct device *dev)
  495. {
  496. struct omap_hdmi *hd = dev_get_drvdata(dev);
  497. unsigned long flags;
  498. WARN_ON(!hdmi_mode_has_audio(&hd->cfg));
  499. spin_lock_irqsave(&hd->audio_playing_lock, flags);
  500. if (hd->display_enabled)
  501. hdmi_stop_audio_stream(hd);
  502. hd->audio_playing = false;
  503. spin_unlock_irqrestore(&hd->audio_playing_lock, flags);
  504. }
  505. static int hdmi_audio_config(struct device *dev,
  506. struct omap_dss_audio *dss_audio)
  507. {
  508. struct omap_hdmi *hd = dev_get_drvdata(dev);
  509. int ret;
  510. mutex_lock(&hd->lock);
  511. if (!hdmi_mode_has_audio(&hd->cfg) || !hd->display_enabled) {
  512. ret = -EPERM;
  513. goto out;
  514. }
  515. ret = hdmi4_audio_config(&hd->core, &hd->wp, dss_audio,
  516. hd->cfg.vm.pixelclock);
  517. if (!ret) {
  518. hd->audio_configured = true;
  519. hd->audio_config = *dss_audio;
  520. }
  521. out:
  522. mutex_unlock(&hd->lock);
  523. return ret;
  524. }
  525. static const struct omap_hdmi_audio_ops hdmi_audio_ops = {
  526. .audio_startup = hdmi_audio_startup,
  527. .audio_shutdown = hdmi_audio_shutdown,
  528. .audio_start = hdmi_audio_start,
  529. .audio_stop = hdmi_audio_stop,
  530. .audio_config = hdmi_audio_config,
  531. };
  532. static int hdmi_audio_register(struct device *dev)
  533. {
  534. struct omap_hdmi_audio_pdata pdata = {
  535. .dev = dev,
  536. .version = 4,
  537. .audio_dma_addr = hdmi_wp_get_audio_dma_addr(&hdmi.wp),
  538. .ops = &hdmi_audio_ops,
  539. };
  540. hdmi.audio_pdev = platform_device_register_data(
  541. dev, "omap-hdmi-audio", PLATFORM_DEVID_AUTO,
  542. &pdata, sizeof(pdata));
  543. if (IS_ERR(hdmi.audio_pdev))
  544. return PTR_ERR(hdmi.audio_pdev);
  545. return 0;
  546. }
  547. /* HDMI HW IP initialisation */
  548. static int hdmi4_bind(struct device *dev, struct device *master, void *data)
  549. {
  550. struct platform_device *pdev = to_platform_device(dev);
  551. int r;
  552. int irq;
  553. hdmi.pdev = pdev;
  554. dev_set_drvdata(&pdev->dev, &hdmi);
  555. mutex_init(&hdmi.lock);
  556. spin_lock_init(&hdmi.audio_playing_lock);
  557. r = hdmi_probe_of(pdev);
  558. if (r)
  559. return r;
  560. r = hdmi_wp_init(pdev, &hdmi.wp, 4);
  561. if (r)
  562. return r;
  563. r = hdmi_pll_init(pdev, &hdmi.pll, &hdmi.wp);
  564. if (r)
  565. return r;
  566. r = hdmi_phy_init(pdev, &hdmi.phy, 4);
  567. if (r)
  568. goto err;
  569. r = hdmi4_core_init(pdev, &hdmi.core);
  570. if (r)
  571. goto err;
  572. r = hdmi4_cec_init(pdev, &hdmi.core, &hdmi.wp);
  573. if (r)
  574. goto err;
  575. irq = platform_get_irq(pdev, 0);
  576. if (irq < 0) {
  577. DSSERR("platform_get_irq failed\n");
  578. r = -ENODEV;
  579. goto err;
  580. }
  581. r = devm_request_threaded_irq(&pdev->dev, irq,
  582. NULL, hdmi_irq_handler,
  583. IRQF_ONESHOT, "OMAP HDMI", &hdmi);
  584. if (r) {
  585. DSSERR("HDMI IRQ request failed\n");
  586. goto err;
  587. }
  588. pm_runtime_enable(&pdev->dev);
  589. hdmi_init_output(pdev);
  590. r = hdmi_audio_register(&pdev->dev);
  591. if (r) {
  592. DSSERR("Registering HDMI audio failed\n");
  593. hdmi_uninit_output(pdev);
  594. pm_runtime_disable(&pdev->dev);
  595. return r;
  596. }
  597. dss_debugfs_create_file("hdmi", hdmi_dump_regs);
  598. return 0;
  599. err:
  600. hdmi_pll_uninit(&hdmi.pll);
  601. return r;
  602. }
  603. static void hdmi4_unbind(struct device *dev, struct device *master, void *data)
  604. {
  605. struct platform_device *pdev = to_platform_device(dev);
  606. if (hdmi.audio_pdev)
  607. platform_device_unregister(hdmi.audio_pdev);
  608. hdmi_uninit_output(pdev);
  609. hdmi4_cec_uninit(&hdmi.core);
  610. hdmi_pll_uninit(&hdmi.pll);
  611. pm_runtime_disable(&pdev->dev);
  612. }
  613. static const struct component_ops hdmi4_component_ops = {
  614. .bind = hdmi4_bind,
  615. .unbind = hdmi4_unbind,
  616. };
  617. static int hdmi4_probe(struct platform_device *pdev)
  618. {
  619. return component_add(&pdev->dev, &hdmi4_component_ops);
  620. }
  621. static int hdmi4_remove(struct platform_device *pdev)
  622. {
  623. component_del(&pdev->dev, &hdmi4_component_ops);
  624. return 0;
  625. }
  626. static int hdmi_runtime_suspend(struct device *dev)
  627. {
  628. dispc_runtime_put();
  629. return 0;
  630. }
  631. static int hdmi_runtime_resume(struct device *dev)
  632. {
  633. int r;
  634. r = dispc_runtime_get();
  635. if (r < 0)
  636. return r;
  637. return 0;
  638. }
  639. static const struct dev_pm_ops hdmi_pm_ops = {
  640. .runtime_suspend = hdmi_runtime_suspend,
  641. .runtime_resume = hdmi_runtime_resume,
  642. };
  643. static const struct of_device_id hdmi_of_match[] = {
  644. { .compatible = "ti,omap4-hdmi", },
  645. {},
  646. };
  647. struct platform_driver omapdss_hdmi4hw_driver = {
  648. .probe = hdmi4_probe,
  649. .remove = hdmi4_remove,
  650. .driver = {
  651. .name = "omapdss_hdmi",
  652. .pm = &hdmi_pm_ops,
  653. .of_match_table = hdmi_of_match,
  654. .suppress_bind_attrs = true,
  655. },
  656. };