msm_drv.h 12 KB

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  1. /*
  2. * Copyright (C) 2013 Red Hat
  3. * Author: Rob Clark <robdclark@gmail.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License version 2 as published by
  7. * the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program. If not, see <http://www.gnu.org/licenses/>.
  16. */
  17. #ifndef __MSM_DRV_H__
  18. #define __MSM_DRV_H__
  19. #include <linux/kernel.h>
  20. #include <linux/clk.h>
  21. #include <linux/cpufreq.h>
  22. #include <linux/module.h>
  23. #include <linux/component.h>
  24. #include <linux/platform_device.h>
  25. #include <linux/pm.h>
  26. #include <linux/pm_runtime.h>
  27. #include <linux/slab.h>
  28. #include <linux/list.h>
  29. #include <linux/iommu.h>
  30. #include <linux/types.h>
  31. #include <linux/of_graph.h>
  32. #include <linux/of_device.h>
  33. #include <asm/sizes.h>
  34. #include <drm/drmP.h>
  35. #include <drm/drm_atomic.h>
  36. #include <drm/drm_atomic_helper.h>
  37. #include <drm/drm_crtc_helper.h>
  38. #include <drm/drm_plane_helper.h>
  39. #include <drm/drm_fb_helper.h>
  40. #include <drm/msm_drm.h>
  41. #include <drm/drm_gem.h>
  42. struct msm_kms;
  43. struct msm_gpu;
  44. struct msm_mmu;
  45. struct msm_mdss;
  46. struct msm_rd_state;
  47. struct msm_perf_state;
  48. struct msm_gem_submit;
  49. struct msm_fence_context;
  50. struct msm_fence_cb;
  51. struct msm_gem_address_space;
  52. struct msm_gem_vma;
  53. struct msm_file_private {
  54. rwlock_t queuelock;
  55. struct list_head submitqueues;
  56. int queueid;
  57. };
  58. enum msm_mdp_plane_property {
  59. PLANE_PROP_ZPOS,
  60. PLANE_PROP_ALPHA,
  61. PLANE_PROP_PREMULTIPLIED,
  62. PLANE_PROP_MAX_NUM
  63. };
  64. struct msm_vblank_ctrl {
  65. struct work_struct work;
  66. struct list_head event_list;
  67. spinlock_t lock;
  68. };
  69. #define MSM_GPU_MAX_RINGS 4
  70. struct msm_drm_private {
  71. struct drm_device *dev;
  72. struct msm_kms *kms;
  73. /* subordinate devices, if present: */
  74. struct platform_device *gpu_pdev;
  75. /* top level MDSS wrapper device (for MDP5 only) */
  76. struct msm_mdss *mdss;
  77. /* possibly this should be in the kms component, but it is
  78. * shared by both mdp4 and mdp5..
  79. */
  80. struct hdmi *hdmi;
  81. /* eDP is for mdp5 only, but kms has not been created
  82. * when edp_bind() and edp_init() are called. Here is the only
  83. * place to keep the edp instance.
  84. */
  85. struct msm_edp *edp;
  86. /* DSI is shared by mdp4 and mdp5 */
  87. struct msm_dsi *dsi[2];
  88. /* when we have more than one 'msm_gpu' these need to be an array: */
  89. struct msm_gpu *gpu;
  90. struct msm_file_private *lastctx;
  91. struct drm_fb_helper *fbdev;
  92. struct msm_rd_state *rd; /* debugfs to dump all submits */
  93. struct msm_rd_state *hangrd; /* debugfs to dump hanging submits */
  94. struct msm_perf_state *perf;
  95. /* list of GEM objects: */
  96. struct list_head inactive_list;
  97. struct workqueue_struct *wq;
  98. struct workqueue_struct *atomic_wq;
  99. /* crtcs pending async atomic updates: */
  100. uint32_t pending_crtcs;
  101. wait_queue_head_t pending_crtcs_event;
  102. unsigned int num_planes;
  103. struct drm_plane *planes[16];
  104. unsigned int num_crtcs;
  105. struct drm_crtc *crtcs[8];
  106. unsigned int num_encoders;
  107. struct drm_encoder *encoders[8];
  108. unsigned int num_bridges;
  109. struct drm_bridge *bridges[8];
  110. unsigned int num_connectors;
  111. struct drm_connector *connectors[8];
  112. /* Properties */
  113. struct drm_property *plane_property[PLANE_PROP_MAX_NUM];
  114. /* VRAM carveout, used when no IOMMU: */
  115. struct {
  116. unsigned long size;
  117. dma_addr_t paddr;
  118. /* NOTE: mm managed at the page level, size is in # of pages
  119. * and position mm_node->start is in # of pages:
  120. */
  121. struct drm_mm mm;
  122. spinlock_t lock; /* Protects drm_mm node allocation/removal */
  123. } vram;
  124. struct notifier_block vmap_notifier;
  125. struct shrinker shrinker;
  126. struct msm_vblank_ctrl vblank_ctrl;
  127. };
  128. struct msm_format {
  129. uint32_t pixel_format;
  130. };
  131. int msm_atomic_commit(struct drm_device *dev,
  132. struct drm_atomic_state *state, bool nonblock);
  133. struct drm_atomic_state *msm_atomic_state_alloc(struct drm_device *dev);
  134. void msm_atomic_state_clear(struct drm_atomic_state *state);
  135. void msm_atomic_state_free(struct drm_atomic_state *state);
  136. void msm_gem_unmap_vma(struct msm_gem_address_space *aspace,
  137. struct msm_gem_vma *vma, struct sg_table *sgt);
  138. int msm_gem_map_vma(struct msm_gem_address_space *aspace,
  139. struct msm_gem_vma *vma, struct sg_table *sgt, int npages);
  140. void msm_gem_address_space_put(struct msm_gem_address_space *aspace);
  141. struct msm_gem_address_space *
  142. msm_gem_address_space_create(struct device *dev, struct iommu_domain *domain,
  143. const char *name);
  144. void msm_gem_submit_free(struct msm_gem_submit *submit);
  145. int msm_ioctl_gem_submit(struct drm_device *dev, void *data,
  146. struct drm_file *file);
  147. void msm_gem_shrinker_init(struct drm_device *dev);
  148. void msm_gem_shrinker_cleanup(struct drm_device *dev);
  149. int msm_gem_mmap_obj(struct drm_gem_object *obj,
  150. struct vm_area_struct *vma);
  151. int msm_gem_mmap(struct file *filp, struct vm_area_struct *vma);
  152. int msm_gem_fault(struct vm_fault *vmf);
  153. uint64_t msm_gem_mmap_offset(struct drm_gem_object *obj);
  154. int msm_gem_get_iova(struct drm_gem_object *obj,
  155. struct msm_gem_address_space *aspace, uint64_t *iova);
  156. uint64_t msm_gem_iova(struct drm_gem_object *obj,
  157. struct msm_gem_address_space *aspace);
  158. struct page **msm_gem_get_pages(struct drm_gem_object *obj);
  159. void msm_gem_put_pages(struct drm_gem_object *obj);
  160. void msm_gem_put_iova(struct drm_gem_object *obj,
  161. struct msm_gem_address_space *aspace);
  162. int msm_gem_dumb_create(struct drm_file *file, struct drm_device *dev,
  163. struct drm_mode_create_dumb *args);
  164. int msm_gem_dumb_map_offset(struct drm_file *file, struct drm_device *dev,
  165. uint32_t handle, uint64_t *offset);
  166. struct sg_table *msm_gem_prime_get_sg_table(struct drm_gem_object *obj);
  167. void *msm_gem_prime_vmap(struct drm_gem_object *obj);
  168. void msm_gem_prime_vunmap(struct drm_gem_object *obj, void *vaddr);
  169. int msm_gem_prime_mmap(struct drm_gem_object *obj, struct vm_area_struct *vma);
  170. struct reservation_object *msm_gem_prime_res_obj(struct drm_gem_object *obj);
  171. struct drm_gem_object *msm_gem_prime_import_sg_table(struct drm_device *dev,
  172. struct dma_buf_attachment *attach, struct sg_table *sg);
  173. int msm_gem_prime_pin(struct drm_gem_object *obj);
  174. void msm_gem_prime_unpin(struct drm_gem_object *obj);
  175. void *msm_gem_get_vaddr(struct drm_gem_object *obj);
  176. void *msm_gem_get_vaddr_active(struct drm_gem_object *obj);
  177. void msm_gem_put_vaddr(struct drm_gem_object *obj);
  178. int msm_gem_madvise(struct drm_gem_object *obj, unsigned madv);
  179. int msm_gem_sync_object(struct drm_gem_object *obj,
  180. struct msm_fence_context *fctx, bool exclusive);
  181. void msm_gem_move_to_active(struct drm_gem_object *obj,
  182. struct msm_gpu *gpu, bool exclusive, struct dma_fence *fence);
  183. void msm_gem_move_to_inactive(struct drm_gem_object *obj);
  184. int msm_gem_cpu_prep(struct drm_gem_object *obj, uint32_t op, ktime_t *timeout);
  185. int msm_gem_cpu_fini(struct drm_gem_object *obj);
  186. void msm_gem_free_object(struct drm_gem_object *obj);
  187. int msm_gem_new_handle(struct drm_device *dev, struct drm_file *file,
  188. uint32_t size, uint32_t flags, uint32_t *handle);
  189. struct drm_gem_object *msm_gem_new(struct drm_device *dev,
  190. uint32_t size, uint32_t flags);
  191. struct drm_gem_object *msm_gem_new_locked(struct drm_device *dev,
  192. uint32_t size, uint32_t flags);
  193. void *msm_gem_kernel_new(struct drm_device *dev, uint32_t size,
  194. uint32_t flags, struct msm_gem_address_space *aspace,
  195. struct drm_gem_object **bo, uint64_t *iova);
  196. void *msm_gem_kernel_new_locked(struct drm_device *dev, uint32_t size,
  197. uint32_t flags, struct msm_gem_address_space *aspace,
  198. struct drm_gem_object **bo, uint64_t *iova);
  199. struct drm_gem_object *msm_gem_import(struct drm_device *dev,
  200. struct dma_buf *dmabuf, struct sg_table *sgt);
  201. int msm_framebuffer_prepare(struct drm_framebuffer *fb,
  202. struct msm_gem_address_space *aspace);
  203. void msm_framebuffer_cleanup(struct drm_framebuffer *fb,
  204. struct msm_gem_address_space *aspace);
  205. uint32_t msm_framebuffer_iova(struct drm_framebuffer *fb,
  206. struct msm_gem_address_space *aspace, int plane);
  207. struct drm_gem_object *msm_framebuffer_bo(struct drm_framebuffer *fb, int plane);
  208. const struct msm_format *msm_framebuffer_format(struct drm_framebuffer *fb);
  209. struct drm_framebuffer *msm_framebuffer_create(struct drm_device *dev,
  210. struct drm_file *file, const struct drm_mode_fb_cmd2 *mode_cmd);
  211. struct drm_framebuffer * msm_alloc_stolen_fb(struct drm_device *dev,
  212. int w, int h, int p, uint32_t format);
  213. struct drm_fb_helper *msm_fbdev_init(struct drm_device *dev);
  214. void msm_fbdev_free(struct drm_device *dev);
  215. struct hdmi;
  216. int msm_hdmi_modeset_init(struct hdmi *hdmi, struct drm_device *dev,
  217. struct drm_encoder *encoder);
  218. void __init msm_hdmi_register(void);
  219. void __exit msm_hdmi_unregister(void);
  220. struct msm_edp;
  221. void __init msm_edp_register(void);
  222. void __exit msm_edp_unregister(void);
  223. int msm_edp_modeset_init(struct msm_edp *edp, struct drm_device *dev,
  224. struct drm_encoder *encoder);
  225. struct msm_dsi;
  226. #ifdef CONFIG_DRM_MSM_DSI
  227. void __init msm_dsi_register(void);
  228. void __exit msm_dsi_unregister(void);
  229. int msm_dsi_modeset_init(struct msm_dsi *msm_dsi, struct drm_device *dev,
  230. struct drm_encoder *encoder);
  231. #else
  232. static inline void __init msm_dsi_register(void)
  233. {
  234. }
  235. static inline void __exit msm_dsi_unregister(void)
  236. {
  237. }
  238. static inline int msm_dsi_modeset_init(struct msm_dsi *msm_dsi,
  239. struct drm_device *dev,
  240. struct drm_encoder *encoder)
  241. {
  242. return -EINVAL;
  243. }
  244. #endif
  245. void __init msm_mdp_register(void);
  246. void __exit msm_mdp_unregister(void);
  247. #ifdef CONFIG_DEBUG_FS
  248. void msm_gem_describe(struct drm_gem_object *obj, struct seq_file *m);
  249. void msm_gem_describe_objects(struct list_head *list, struct seq_file *m);
  250. void msm_framebuffer_describe(struct drm_framebuffer *fb, struct seq_file *m);
  251. int msm_debugfs_late_init(struct drm_device *dev);
  252. int msm_rd_debugfs_init(struct drm_minor *minor);
  253. void msm_rd_debugfs_cleanup(struct msm_drm_private *priv);
  254. void msm_rd_dump_submit(struct msm_rd_state *rd, struct msm_gem_submit *submit,
  255. const char *fmt, ...);
  256. int msm_perf_debugfs_init(struct drm_minor *minor);
  257. void msm_perf_debugfs_cleanup(struct msm_drm_private *priv);
  258. #else
  259. static inline int msm_debugfs_late_init(struct drm_device *dev) { return 0; }
  260. static inline void msm_rd_dump_submit(struct msm_rd_state *rd, struct msm_gem_submit *submit,
  261. const char *fmt, ...) {}
  262. static inline void msm_rd_debugfs_cleanup(struct msm_drm_private *priv) {}
  263. static inline void msm_perf_debugfs_cleanup(struct msm_drm_private *priv) {}
  264. #endif
  265. struct clk *msm_clk_get(struct platform_device *pdev, const char *name);
  266. void __iomem *msm_ioremap(struct platform_device *pdev, const char *name,
  267. const char *dbgname);
  268. void msm_writel(u32 data, void __iomem *addr);
  269. u32 msm_readl(const void __iomem *addr);
  270. struct msm_gpu_submitqueue;
  271. int msm_submitqueue_init(struct drm_device *drm, struct msm_file_private *ctx);
  272. struct msm_gpu_submitqueue *msm_submitqueue_get(struct msm_file_private *ctx,
  273. u32 id);
  274. int msm_submitqueue_create(struct drm_device *drm, struct msm_file_private *ctx,
  275. u32 prio, u32 flags, u32 *id);
  276. int msm_submitqueue_remove(struct msm_file_private *ctx, u32 id);
  277. void msm_submitqueue_close(struct msm_file_private *ctx);
  278. void msm_submitqueue_destroy(struct kref *kref);
  279. #define DBG(fmt, ...) DRM_DEBUG_DRIVER(fmt"\n", ##__VA_ARGS__)
  280. #define VERB(fmt, ...) if (0) DRM_DEBUG_DRIVER(fmt"\n", ##__VA_ARGS__)
  281. static inline int align_pitch(int width, int bpp)
  282. {
  283. int bytespp = (bpp + 7) / 8;
  284. /* adreno needs pitch aligned to 32 pixels: */
  285. return bytespp * ALIGN(width, 32);
  286. }
  287. /* for the generated headers: */
  288. #define INVALID_IDX(idx) ({BUG(); 0;})
  289. #define fui(x) ({BUG(); 0;})
  290. #define util_float_to_half(x) ({BUG(); 0;})
  291. #define FIELD(val, name) (((val) & name ## __MASK) >> name ## __SHIFT)
  292. /* for conditionally setting boolean flag(s): */
  293. #define COND(bool, val) ((bool) ? (val) : 0)
  294. static inline unsigned long timeout_to_jiffies(const ktime_t *timeout)
  295. {
  296. ktime_t now = ktime_get();
  297. unsigned long remaining_jiffies;
  298. if (ktime_compare(*timeout, now) < 0) {
  299. remaining_jiffies = 0;
  300. } else {
  301. ktime_t rem = ktime_sub(*timeout, now);
  302. struct timespec ts = ktime_to_timespec(rem);
  303. remaining_jiffies = timespec_to_jiffies(&ts);
  304. }
  305. return remaining_jiffies;
  306. }
  307. #endif /* __MSM_DRV_H__ */