gpio_service.c 12 KB

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  1. /*
  2. * Copyright 2012-15 Advanced Micro Devices, Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. * Authors: AMD
  23. *
  24. */
  25. /*
  26. * Pre-requisites: headers required by header of this unit
  27. */
  28. #include "dm_services.h"
  29. #include "include/gpio_interface.h"
  30. #include "include/gpio_service_interface.h"
  31. #include "hw_translate.h"
  32. #include "hw_factory.h"
  33. /*
  34. * Header of this unit
  35. */
  36. #include "gpio_service.h"
  37. /*
  38. * Post-requisites: headers required by this unit
  39. */
  40. #include "hw_gpio.h"
  41. /*
  42. * @brief
  43. * Public API.
  44. */
  45. struct gpio_service *dal_gpio_service_create(
  46. enum dce_version dce_version_major,
  47. enum dce_version dce_version_minor,
  48. struct dc_context *ctx)
  49. {
  50. struct gpio_service *service;
  51. uint32_t index_of_id;
  52. service = kzalloc(sizeof(struct gpio_service), GFP_KERNEL);
  53. if (!service) {
  54. BREAK_TO_DEBUGGER();
  55. return NULL;
  56. }
  57. if (!dal_hw_translate_init(&service->translate, dce_version_major,
  58. dce_version_minor)) {
  59. BREAK_TO_DEBUGGER();
  60. goto failure_1;
  61. }
  62. if (!dal_hw_factory_init(&service->factory, dce_version_major,
  63. dce_version_minor)) {
  64. BREAK_TO_DEBUGGER();
  65. goto failure_1;
  66. }
  67. /* allocate and initialize business storage */
  68. {
  69. const uint32_t bits_per_uint = sizeof(uint32_t) << 3;
  70. index_of_id = 0;
  71. service->ctx = ctx;
  72. do {
  73. uint32_t number_of_bits =
  74. service->factory.number_of_pins[index_of_id];
  75. uint32_t number_of_uints =
  76. (number_of_bits + bits_per_uint - 1) /
  77. bits_per_uint;
  78. uint32_t *slot;
  79. if (number_of_bits) {
  80. uint32_t index_of_uint = 0;
  81. slot = kzalloc(number_of_uints * sizeof(uint32_t),
  82. GFP_KERNEL);
  83. if (!slot) {
  84. BREAK_TO_DEBUGGER();
  85. goto failure_2;
  86. }
  87. do {
  88. slot[index_of_uint] = 0;
  89. ++index_of_uint;
  90. } while (index_of_uint < number_of_uints);
  91. } else
  92. slot = NULL;
  93. service->busyness[index_of_id] = slot;
  94. ++index_of_id;
  95. } while (index_of_id < GPIO_ID_COUNT);
  96. }
  97. return service;
  98. failure_2:
  99. while (index_of_id) {
  100. uint32_t *slot;
  101. --index_of_id;
  102. slot = service->busyness[index_of_id];
  103. kfree(slot);
  104. }
  105. failure_1:
  106. kfree(service);
  107. return NULL;
  108. }
  109. struct gpio *dal_gpio_service_create_irq(
  110. struct gpio_service *service,
  111. uint32_t offset,
  112. uint32_t mask)
  113. {
  114. enum gpio_id id;
  115. uint32_t en;
  116. if (!service->translate.funcs->offset_to_id(offset, mask, &id, &en)) {
  117. ASSERT_CRITICAL(false);
  118. return NULL;
  119. }
  120. return dal_gpio_create_irq(service, id, en);
  121. }
  122. void dal_gpio_service_destroy(
  123. struct gpio_service **ptr)
  124. {
  125. if (!ptr || !*ptr) {
  126. BREAK_TO_DEBUGGER();
  127. return;
  128. }
  129. /* free business storage */
  130. {
  131. uint32_t index_of_id = 0;
  132. do {
  133. uint32_t *slot = (*ptr)->busyness[index_of_id];
  134. kfree(slot);
  135. ++index_of_id;
  136. } while (index_of_id < GPIO_ID_COUNT);
  137. }
  138. kfree(*ptr);
  139. *ptr = NULL;
  140. }
  141. /*
  142. * @brief
  143. * Private API.
  144. */
  145. static bool is_pin_busy(
  146. const struct gpio_service *service,
  147. enum gpio_id id,
  148. uint32_t en)
  149. {
  150. const uint32_t bits_per_uint = sizeof(uint32_t) << 3;
  151. const uint32_t *slot = service->busyness[id] + (en / bits_per_uint);
  152. return 0 != (*slot & (1 << (en % bits_per_uint)));
  153. }
  154. static void set_pin_busy(
  155. struct gpio_service *service,
  156. enum gpio_id id,
  157. uint32_t en)
  158. {
  159. const uint32_t bits_per_uint = sizeof(uint32_t) << 3;
  160. service->busyness[id][en / bits_per_uint] |=
  161. (1 << (en % bits_per_uint));
  162. }
  163. static void set_pin_free(
  164. struct gpio_service *service,
  165. enum gpio_id id,
  166. uint32_t en)
  167. {
  168. const uint32_t bits_per_uint = sizeof(uint32_t) << 3;
  169. service->busyness[id][en / bits_per_uint] &=
  170. ~(1 << (en % bits_per_uint));
  171. }
  172. enum gpio_result dal_gpio_service_open(
  173. struct gpio_service *service,
  174. enum gpio_id id,
  175. uint32_t en,
  176. enum gpio_mode mode,
  177. struct hw_gpio_pin **ptr)
  178. {
  179. struct hw_gpio_pin *pin;
  180. if (!service->busyness[id]) {
  181. ASSERT_CRITICAL(false);
  182. return GPIO_RESULT_OPEN_FAILED;
  183. }
  184. if (is_pin_busy(service, id, en)) {
  185. ASSERT_CRITICAL(false);
  186. return GPIO_RESULT_DEVICE_BUSY;
  187. }
  188. switch (id) {
  189. case GPIO_ID_DDC_DATA:
  190. pin = service->factory.funcs->create_ddc_data(
  191. service->ctx, id, en);
  192. service->factory.funcs->define_ddc_registers(pin, en);
  193. break;
  194. case GPIO_ID_DDC_CLOCK:
  195. pin = service->factory.funcs->create_ddc_clock(
  196. service->ctx, id, en);
  197. service->factory.funcs->define_ddc_registers(pin, en);
  198. break;
  199. case GPIO_ID_GENERIC:
  200. pin = service->factory.funcs->create_generic(
  201. service->ctx, id, en);
  202. break;
  203. case GPIO_ID_HPD:
  204. pin = service->factory.funcs->create_hpd(
  205. service->ctx, id, en);
  206. service->factory.funcs->define_hpd_registers(pin, en);
  207. break;
  208. case GPIO_ID_SYNC:
  209. pin = service->factory.funcs->create_sync(
  210. service->ctx, id, en);
  211. break;
  212. case GPIO_ID_GSL:
  213. pin = service->factory.funcs->create_gsl(
  214. service->ctx, id, en);
  215. break;
  216. default:
  217. ASSERT_CRITICAL(false);
  218. return GPIO_RESULT_NON_SPECIFIC_ERROR;
  219. }
  220. if (!pin) {
  221. ASSERT_CRITICAL(false);
  222. return GPIO_RESULT_NON_SPECIFIC_ERROR;
  223. }
  224. if (!pin->funcs->open(pin, mode)) {
  225. ASSERT_CRITICAL(false);
  226. dal_gpio_service_close(service, &pin);
  227. return GPIO_RESULT_OPEN_FAILED;
  228. }
  229. set_pin_busy(service, id, en);
  230. *ptr = pin;
  231. return GPIO_RESULT_OK;
  232. }
  233. void dal_gpio_service_close(
  234. struct gpio_service *service,
  235. struct hw_gpio_pin **ptr)
  236. {
  237. struct hw_gpio_pin *pin;
  238. if (!ptr) {
  239. ASSERT_CRITICAL(false);
  240. return;
  241. }
  242. pin = *ptr;
  243. if (pin) {
  244. set_pin_free(service, pin->id, pin->en);
  245. pin->funcs->close(pin);
  246. pin->funcs->destroy(ptr);
  247. }
  248. }
  249. enum dc_irq_source dal_irq_get_source(
  250. const struct gpio *irq)
  251. {
  252. enum gpio_id id = dal_gpio_get_id(irq);
  253. switch (id) {
  254. case GPIO_ID_HPD:
  255. return (enum dc_irq_source)(DC_IRQ_SOURCE_HPD1 +
  256. dal_gpio_get_enum(irq));
  257. case GPIO_ID_GPIO_PAD:
  258. return (enum dc_irq_source)(DC_IRQ_SOURCE_GPIOPAD0 +
  259. dal_gpio_get_enum(irq));
  260. default:
  261. return DC_IRQ_SOURCE_INVALID;
  262. }
  263. }
  264. enum dc_irq_source dal_irq_get_rx_source(
  265. const struct gpio *irq)
  266. {
  267. enum gpio_id id = dal_gpio_get_id(irq);
  268. switch (id) {
  269. case GPIO_ID_HPD:
  270. return (enum dc_irq_source)(DC_IRQ_SOURCE_HPD1RX +
  271. dal_gpio_get_enum(irq));
  272. default:
  273. return DC_IRQ_SOURCE_INVALID;
  274. }
  275. }
  276. enum gpio_result dal_irq_setup_hpd_filter(
  277. struct gpio *irq,
  278. struct gpio_hpd_config *config)
  279. {
  280. struct gpio_config_data config_data;
  281. if (!config)
  282. return GPIO_RESULT_INVALID_DATA;
  283. config_data.type = GPIO_CONFIG_TYPE_HPD;
  284. config_data.config.hpd = *config;
  285. return dal_gpio_set_config(irq, &config_data);
  286. }
  287. /*
  288. * @brief
  289. * Creation and destruction
  290. */
  291. struct gpio *dal_gpio_create_irq(
  292. struct gpio_service *service,
  293. enum gpio_id id,
  294. uint32_t en)
  295. {
  296. struct gpio *irq;
  297. switch (id) {
  298. case GPIO_ID_HPD:
  299. case GPIO_ID_GPIO_PAD:
  300. break;
  301. default:
  302. ASSERT_CRITICAL(false);
  303. return NULL;
  304. }
  305. irq = dal_gpio_create(
  306. service, id, en, GPIO_PIN_OUTPUT_STATE_DEFAULT);
  307. if (irq)
  308. return irq;
  309. ASSERT_CRITICAL(false);
  310. return NULL;
  311. }
  312. void dal_gpio_destroy_irq(
  313. struct gpio **irq)
  314. {
  315. if (!irq || !*irq) {
  316. ASSERT_CRITICAL(false);
  317. return;
  318. }
  319. dal_gpio_close(*irq);
  320. dal_gpio_destroy(irq);
  321. kfree(*irq);
  322. *irq = NULL;
  323. }
  324. struct ddc *dal_gpio_create_ddc(
  325. struct gpio_service *service,
  326. uint32_t offset,
  327. uint32_t mask,
  328. struct gpio_ddc_hw_info *info)
  329. {
  330. enum gpio_id id;
  331. uint32_t en;
  332. struct ddc *ddc;
  333. if (!service->translate.funcs->offset_to_id(offset, mask, &id, &en))
  334. return NULL;
  335. ddc = kzalloc(sizeof(struct ddc), GFP_KERNEL);
  336. if (!ddc) {
  337. BREAK_TO_DEBUGGER();
  338. return NULL;
  339. }
  340. ddc->pin_data = dal_gpio_create(
  341. service, GPIO_ID_DDC_DATA, en, GPIO_PIN_OUTPUT_STATE_DEFAULT);
  342. if (!ddc->pin_data) {
  343. BREAK_TO_DEBUGGER();
  344. goto failure_1;
  345. }
  346. ddc->pin_clock = dal_gpio_create(
  347. service, GPIO_ID_DDC_CLOCK, en, GPIO_PIN_OUTPUT_STATE_DEFAULT);
  348. if (!ddc->pin_clock) {
  349. BREAK_TO_DEBUGGER();
  350. goto failure_2;
  351. }
  352. ddc->hw_info = *info;
  353. ddc->ctx = service->ctx;
  354. return ddc;
  355. failure_2:
  356. dal_gpio_destroy(&ddc->pin_data);
  357. failure_1:
  358. kfree(ddc);
  359. return NULL;
  360. }
  361. void dal_gpio_destroy_ddc(
  362. struct ddc **ddc)
  363. {
  364. if (!ddc || !*ddc) {
  365. BREAK_TO_DEBUGGER();
  366. return;
  367. }
  368. dal_ddc_close(*ddc);
  369. dal_gpio_destroy(&(*ddc)->pin_data);
  370. dal_gpio_destroy(&(*ddc)->pin_clock);
  371. kfree(*ddc);
  372. *ddc = NULL;
  373. }
  374. enum gpio_result dal_ddc_open(
  375. struct ddc *ddc,
  376. enum gpio_mode mode,
  377. enum gpio_ddc_config_type config_type)
  378. {
  379. enum gpio_result result;
  380. struct gpio_config_data config_data;
  381. struct hw_gpio *hw_data;
  382. struct hw_gpio *hw_clock;
  383. result = dal_gpio_open_ex(ddc->pin_data, mode);
  384. if (result != GPIO_RESULT_OK) {
  385. BREAK_TO_DEBUGGER();
  386. return result;
  387. }
  388. result = dal_gpio_open_ex(ddc->pin_clock, mode);
  389. if (result != GPIO_RESULT_OK) {
  390. BREAK_TO_DEBUGGER();
  391. goto failure;
  392. }
  393. /* DDC clock and data pins should belong
  394. * to the same DDC block id,
  395. * we use the data pin to set the pad mode. */
  396. if (mode == GPIO_MODE_INPUT)
  397. /* this is from detect_sink_type,
  398. * we need extra delay there */
  399. config_data.type = GPIO_CONFIG_TYPE_I2C_AUX_DUAL_MODE;
  400. else
  401. config_data.type = GPIO_CONFIG_TYPE_DDC;
  402. config_data.config.ddc.type = config_type;
  403. hw_data = FROM_HW_GPIO_PIN(ddc->pin_data->pin);
  404. hw_clock = FROM_HW_GPIO_PIN(ddc->pin_clock->pin);
  405. config_data.config.ddc.data_en_bit_present = hw_data->store.en != 0;
  406. config_data.config.ddc.clock_en_bit_present = hw_clock->store.en != 0;
  407. result = dal_gpio_set_config(ddc->pin_data, &config_data);
  408. if (result == GPIO_RESULT_OK)
  409. return result;
  410. BREAK_TO_DEBUGGER();
  411. dal_gpio_close(ddc->pin_clock);
  412. failure:
  413. dal_gpio_close(ddc->pin_data);
  414. return result;
  415. }
  416. enum gpio_result dal_ddc_change_mode(
  417. struct ddc *ddc,
  418. enum gpio_mode mode)
  419. {
  420. enum gpio_result result;
  421. enum gpio_mode original_mode =
  422. dal_gpio_get_mode(ddc->pin_data);
  423. result = dal_gpio_change_mode(ddc->pin_data, mode);
  424. /* [anaumov] DAL2 code returns GPIO_RESULT_NON_SPECIFIC_ERROR
  425. * in case of failures;
  426. * set_mode() is so that, in case of failure,
  427. * we must explicitly set original mode */
  428. if (result != GPIO_RESULT_OK)
  429. goto failure;
  430. result = dal_gpio_change_mode(ddc->pin_clock, mode);
  431. if (result == GPIO_RESULT_OK)
  432. return result;
  433. dal_gpio_change_mode(ddc->pin_clock, original_mode);
  434. failure:
  435. dal_gpio_change_mode(ddc->pin_data, original_mode);
  436. return result;
  437. }
  438. enum gpio_ddc_line dal_ddc_get_line(
  439. const struct ddc *ddc)
  440. {
  441. return (enum gpio_ddc_line)dal_gpio_get_enum(ddc->pin_data);
  442. }
  443. enum gpio_result dal_ddc_set_config(
  444. struct ddc *ddc,
  445. enum gpio_ddc_config_type config_type)
  446. {
  447. struct gpio_config_data config_data;
  448. config_data.type = GPIO_CONFIG_TYPE_DDC;
  449. config_data.config.ddc.type = config_type;
  450. config_data.config.ddc.data_en_bit_present = false;
  451. config_data.config.ddc.clock_en_bit_present = false;
  452. return dal_gpio_set_config(ddc->pin_data, &config_data);
  453. }
  454. void dal_ddc_close(
  455. struct ddc *ddc)
  456. {
  457. dal_gpio_close(ddc->pin_clock);
  458. dal_gpio_close(ddc->pin_data);
  459. }