phy.h 32 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014
  1. /*
  2. * Framework and drivers for configuring and reading different PHYs
  3. * Based on code in sungem_phy.c and gianfar_phy.c
  4. *
  5. * Author: Andy Fleming
  6. *
  7. * Copyright (c) 2004 Freescale Semiconductor, Inc.
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License as published by the
  11. * Free Software Foundation; either version 2 of the License, or (at your
  12. * option) any later version.
  13. *
  14. */
  15. #ifndef __PHY_H
  16. #define __PHY_H
  17. #include <linux/compiler.h>
  18. #include <linux/spinlock.h>
  19. #include <linux/ethtool.h>
  20. #include <linux/mdio.h>
  21. #include <linux/mii.h>
  22. #include <linux/module.h>
  23. #include <linux/timer.h>
  24. #include <linux/workqueue.h>
  25. #include <linux/mod_devicetable.h>
  26. #include <linux/atomic.h>
  27. #define PHY_DEFAULT_FEATURES (SUPPORTED_Autoneg | \
  28. SUPPORTED_TP | \
  29. SUPPORTED_MII)
  30. #define PHY_10BT_FEATURES (SUPPORTED_10baseT_Half | \
  31. SUPPORTED_10baseT_Full)
  32. #define PHY_100BT_FEATURES (SUPPORTED_100baseT_Half | \
  33. SUPPORTED_100baseT_Full)
  34. #define PHY_1000BT_FEATURES (SUPPORTED_1000baseT_Half | \
  35. SUPPORTED_1000baseT_Full)
  36. #define PHY_BASIC_FEATURES (PHY_10BT_FEATURES | \
  37. PHY_100BT_FEATURES | \
  38. PHY_DEFAULT_FEATURES)
  39. #define PHY_GBIT_FEATURES (PHY_BASIC_FEATURES | \
  40. PHY_1000BT_FEATURES)
  41. /*
  42. * Set phydev->irq to PHY_POLL if interrupts are not supported,
  43. * or not desired for this PHY. Set to PHY_IGNORE_INTERRUPT if
  44. * the attached driver handles the interrupt
  45. */
  46. #define PHY_POLL -1
  47. #define PHY_IGNORE_INTERRUPT -2
  48. #define PHY_HAS_INTERRUPT 0x00000001
  49. #define PHY_IS_INTERNAL 0x00000002
  50. #define PHY_RST_AFTER_CLK_EN 0x00000004
  51. #define MDIO_DEVICE_IS_PHY 0x80000000
  52. /* Interface Mode definitions */
  53. typedef enum {
  54. PHY_INTERFACE_MODE_NA,
  55. PHY_INTERFACE_MODE_INTERNAL,
  56. PHY_INTERFACE_MODE_MII,
  57. PHY_INTERFACE_MODE_GMII,
  58. PHY_INTERFACE_MODE_SGMII,
  59. PHY_INTERFACE_MODE_TBI,
  60. PHY_INTERFACE_MODE_REVMII,
  61. PHY_INTERFACE_MODE_RMII,
  62. PHY_INTERFACE_MODE_RGMII,
  63. PHY_INTERFACE_MODE_RGMII_ID,
  64. PHY_INTERFACE_MODE_RGMII_RXID,
  65. PHY_INTERFACE_MODE_RGMII_TXID,
  66. PHY_INTERFACE_MODE_RTBI,
  67. PHY_INTERFACE_MODE_SMII,
  68. PHY_INTERFACE_MODE_XGMII,
  69. PHY_INTERFACE_MODE_MOCA,
  70. PHY_INTERFACE_MODE_QSGMII,
  71. PHY_INTERFACE_MODE_TRGMII,
  72. PHY_INTERFACE_MODE_1000BASEX,
  73. PHY_INTERFACE_MODE_2500BASEX,
  74. PHY_INTERFACE_MODE_RXAUI,
  75. PHY_INTERFACE_MODE_XAUI,
  76. /* 10GBASE-KR, XFI, SFI - single lane 10G Serdes */
  77. PHY_INTERFACE_MODE_10GKR,
  78. PHY_INTERFACE_MODE_MAX,
  79. } phy_interface_t;
  80. /**
  81. * phy_supported_speeds - return all speeds currently supported by a phy device
  82. * @phy: The phy device to return supported speeds of.
  83. * @speeds: buffer to store supported speeds in.
  84. * @size: size of speeds buffer.
  85. *
  86. * Description: Returns the number of supported speeds, and
  87. * fills the speeds * buffer with the supported speeds. If speeds buffer is
  88. * too small to contain * all currently supported speeds, will return as
  89. * many speeds as can fit.
  90. */
  91. unsigned int phy_supported_speeds(struct phy_device *phy,
  92. unsigned int *speeds,
  93. unsigned int size);
  94. /**
  95. * It maps 'enum phy_interface_t' found in include/linux/phy.h
  96. * into the device tree binding of 'phy-mode', so that Ethernet
  97. * device driver can get phy interface from device tree.
  98. */
  99. static inline const char *phy_modes(phy_interface_t interface)
  100. {
  101. switch (interface) {
  102. case PHY_INTERFACE_MODE_NA:
  103. return "";
  104. case PHY_INTERFACE_MODE_INTERNAL:
  105. return "internal";
  106. case PHY_INTERFACE_MODE_MII:
  107. return "mii";
  108. case PHY_INTERFACE_MODE_GMII:
  109. return "gmii";
  110. case PHY_INTERFACE_MODE_SGMII:
  111. return "sgmii";
  112. case PHY_INTERFACE_MODE_TBI:
  113. return "tbi";
  114. case PHY_INTERFACE_MODE_REVMII:
  115. return "rev-mii";
  116. case PHY_INTERFACE_MODE_RMII:
  117. return "rmii";
  118. case PHY_INTERFACE_MODE_RGMII:
  119. return "rgmii";
  120. case PHY_INTERFACE_MODE_RGMII_ID:
  121. return "rgmii-id";
  122. case PHY_INTERFACE_MODE_RGMII_RXID:
  123. return "rgmii-rxid";
  124. case PHY_INTERFACE_MODE_RGMII_TXID:
  125. return "rgmii-txid";
  126. case PHY_INTERFACE_MODE_RTBI:
  127. return "rtbi";
  128. case PHY_INTERFACE_MODE_SMII:
  129. return "smii";
  130. case PHY_INTERFACE_MODE_XGMII:
  131. return "xgmii";
  132. case PHY_INTERFACE_MODE_MOCA:
  133. return "moca";
  134. case PHY_INTERFACE_MODE_QSGMII:
  135. return "qsgmii";
  136. case PHY_INTERFACE_MODE_TRGMII:
  137. return "trgmii";
  138. case PHY_INTERFACE_MODE_1000BASEX:
  139. return "1000base-x";
  140. case PHY_INTERFACE_MODE_2500BASEX:
  141. return "2500base-x";
  142. case PHY_INTERFACE_MODE_RXAUI:
  143. return "rxaui";
  144. case PHY_INTERFACE_MODE_XAUI:
  145. return "xaui";
  146. case PHY_INTERFACE_MODE_10GKR:
  147. return "10gbase-kr";
  148. default:
  149. return "unknown";
  150. }
  151. }
  152. #define PHY_INIT_TIMEOUT 100000
  153. #define PHY_STATE_TIME 1
  154. #define PHY_FORCE_TIMEOUT 10
  155. #define PHY_AN_TIMEOUT 10
  156. #define PHY_MAX_ADDR 32
  157. /* Used when trying to connect to a specific phy (mii bus id:phy device id) */
  158. #define PHY_ID_FMT "%s:%02x"
  159. #define MII_BUS_ID_SIZE 61
  160. /* Or MII_ADDR_C45 into regnum for read/write on mii_bus to enable the 21 bit
  161. IEEE 802.3ae clause 45 addressing mode used by 10GIGE phy chips. */
  162. #define MII_ADDR_C45 (1<<30)
  163. struct device;
  164. struct phylink;
  165. struct sk_buff;
  166. /*
  167. * The Bus class for PHYs. Devices which provide access to
  168. * PHYs should register using this structure
  169. */
  170. struct mii_bus {
  171. struct module *owner;
  172. const char *name;
  173. char id[MII_BUS_ID_SIZE];
  174. void *priv;
  175. int (*read)(struct mii_bus *bus, int addr, int regnum);
  176. int (*write)(struct mii_bus *bus, int addr, int regnum, u16 val);
  177. int (*reset)(struct mii_bus *bus);
  178. /*
  179. * A lock to ensure that only one thing can read/write
  180. * the MDIO bus at a time
  181. */
  182. struct mutex mdio_lock;
  183. struct device *parent;
  184. enum {
  185. MDIOBUS_ALLOCATED = 1,
  186. MDIOBUS_REGISTERED,
  187. MDIOBUS_UNREGISTERED,
  188. MDIOBUS_RELEASED,
  189. } state;
  190. struct device dev;
  191. /* list of all PHYs on bus */
  192. struct mdio_device *mdio_map[PHY_MAX_ADDR];
  193. /* PHY addresses to be ignored when probing */
  194. u32 phy_mask;
  195. /* PHY addresses to ignore the TA/read failure */
  196. u32 phy_ignore_ta_mask;
  197. /*
  198. * An array of interrupts, each PHY's interrupt at the index
  199. * matching its address
  200. */
  201. int irq[PHY_MAX_ADDR];
  202. /* GPIO reset pulse width in microseconds */
  203. int reset_delay_us;
  204. /* RESET GPIO descriptor pointer */
  205. struct gpio_desc *reset_gpiod;
  206. };
  207. #define to_mii_bus(d) container_of(d, struct mii_bus, dev)
  208. struct mii_bus *mdiobus_alloc_size(size_t);
  209. static inline struct mii_bus *mdiobus_alloc(void)
  210. {
  211. return mdiobus_alloc_size(0);
  212. }
  213. int __mdiobus_register(struct mii_bus *bus, struct module *owner);
  214. #define mdiobus_register(bus) __mdiobus_register(bus, THIS_MODULE)
  215. void mdiobus_unregister(struct mii_bus *bus);
  216. void mdiobus_free(struct mii_bus *bus);
  217. struct mii_bus *devm_mdiobus_alloc_size(struct device *dev, int sizeof_priv);
  218. static inline struct mii_bus *devm_mdiobus_alloc(struct device *dev)
  219. {
  220. return devm_mdiobus_alloc_size(dev, 0);
  221. }
  222. void devm_mdiobus_free(struct device *dev, struct mii_bus *bus);
  223. struct phy_device *mdiobus_scan(struct mii_bus *bus, int addr);
  224. #define PHY_INTERRUPT_DISABLED 0x0
  225. #define PHY_INTERRUPT_ENABLED 0x80000000
  226. /* PHY state machine states:
  227. *
  228. * DOWN: PHY device and driver are not ready for anything. probe
  229. * should be called if and only if the PHY is in this state,
  230. * given that the PHY device exists.
  231. * - PHY driver probe function will, depending on the PHY, set
  232. * the state to STARTING or READY
  233. *
  234. * STARTING: PHY device is coming up, and the ethernet driver is
  235. * not ready. PHY drivers may set this in the probe function.
  236. * If they do, they are responsible for making sure the state is
  237. * eventually set to indicate whether the PHY is UP or READY,
  238. * depending on the state when the PHY is done starting up.
  239. * - PHY driver will set the state to READY
  240. * - start will set the state to PENDING
  241. *
  242. * READY: PHY is ready to send and receive packets, but the
  243. * controller is not. By default, PHYs which do not implement
  244. * probe will be set to this state by phy_probe(). If the PHY
  245. * driver knows the PHY is ready, and the PHY state is STARTING,
  246. * then it sets this STATE.
  247. * - start will set the state to UP
  248. *
  249. * PENDING: PHY device is coming up, but the ethernet driver is
  250. * ready. phy_start will set this state if the PHY state is
  251. * STARTING.
  252. * - PHY driver will set the state to UP when the PHY is ready
  253. *
  254. * UP: The PHY and attached device are ready to do work.
  255. * Interrupts should be started here.
  256. * - timer moves to AN
  257. *
  258. * AN: The PHY is currently negotiating the link state. Link is
  259. * therefore down for now. phy_timer will set this state when it
  260. * detects the state is UP. config_aneg will set this state
  261. * whenever called with phydev->autoneg set to AUTONEG_ENABLE.
  262. * - If autonegotiation finishes, but there's no link, it sets
  263. * the state to NOLINK.
  264. * - If aneg finishes with link, it sets the state to RUNNING,
  265. * and calls adjust_link
  266. * - If autonegotiation did not finish after an arbitrary amount
  267. * of time, autonegotiation should be tried again if the PHY
  268. * supports "magic" autonegotiation (back to AN)
  269. * - If it didn't finish, and no magic_aneg, move to FORCING.
  270. *
  271. * NOLINK: PHY is up, but not currently plugged in.
  272. * - If the timer notes that the link comes back, we move to RUNNING
  273. * - config_aneg moves to AN
  274. * - phy_stop moves to HALTED
  275. *
  276. * FORCING: PHY is being configured with forced settings
  277. * - if link is up, move to RUNNING
  278. * - If link is down, we drop to the next highest setting, and
  279. * retry (FORCING) after a timeout
  280. * - phy_stop moves to HALTED
  281. *
  282. * RUNNING: PHY is currently up, running, and possibly sending
  283. * and/or receiving packets
  284. * - timer will set CHANGELINK if we're polling (this ensures the
  285. * link state is polled every other cycle of this state machine,
  286. * which makes it every other second)
  287. * - irq will set CHANGELINK
  288. * - config_aneg will set AN
  289. * - phy_stop moves to HALTED
  290. *
  291. * CHANGELINK: PHY experienced a change in link state
  292. * - timer moves to RUNNING if link
  293. * - timer moves to NOLINK if the link is down
  294. * - phy_stop moves to HALTED
  295. *
  296. * HALTED: PHY is up, but no polling or interrupts are done. Or
  297. * PHY is in an error state.
  298. *
  299. * - phy_start moves to RESUMING
  300. *
  301. * RESUMING: PHY was halted, but now wants to run again.
  302. * - If we are forcing, or aneg is done, timer moves to RUNNING
  303. * - If aneg is not done, timer moves to AN
  304. * - phy_stop moves to HALTED
  305. */
  306. enum phy_state {
  307. PHY_DOWN = 0,
  308. PHY_STARTING,
  309. PHY_READY,
  310. PHY_PENDING,
  311. PHY_UP,
  312. PHY_AN,
  313. PHY_RUNNING,
  314. PHY_NOLINK,
  315. PHY_FORCING,
  316. PHY_CHANGELINK,
  317. PHY_HALTED,
  318. PHY_RESUMING
  319. };
  320. /**
  321. * struct phy_c45_device_ids - 802.3-c45 Device Identifiers
  322. * @devices_in_package: Bit vector of devices present.
  323. * @device_ids: The device identifer for each present device.
  324. */
  325. struct phy_c45_device_ids {
  326. u32 devices_in_package;
  327. u32 device_ids[8];
  328. };
  329. /* phy_device: An instance of a PHY
  330. *
  331. * drv: Pointer to the driver for this PHY instance
  332. * phy_id: UID for this device found during discovery
  333. * c45_ids: 802.3-c45 Device Identifers if is_c45.
  334. * is_c45: Set to true if this phy uses clause 45 addressing.
  335. * is_internal: Set to true if this phy is internal to a MAC.
  336. * is_pseudo_fixed_link: Set to true if this phy is an Ethernet switch, etc.
  337. * has_fixups: Set to true if this phy has fixups/quirks.
  338. * suspended: Set to true if this phy has been suspended successfully.
  339. * sysfs_links: Internal boolean tracking sysfs symbolic links setup/removal.
  340. * loopback_enabled: Set true if this phy has been loopbacked successfully.
  341. * state: state of the PHY for management purposes
  342. * dev_flags: Device-specific flags used by the PHY driver.
  343. * link_timeout: The number of timer firings to wait before the
  344. * giving up on the current attempt at acquiring a link
  345. * irq: IRQ number of the PHY's interrupt (-1 if none)
  346. * phy_timer: The timer for handling the state machine
  347. * phy_queue: A work_queue for the phy_mac_interrupt
  348. * attached_dev: The attached enet driver's device instance ptr
  349. * adjust_link: Callback for the enet controller to respond to
  350. * changes in the link state.
  351. *
  352. * speed, duplex, pause, supported, advertising, lp_advertising,
  353. * and autoneg are used like in mii_if_info
  354. *
  355. * interrupts currently only supports enabled or disabled,
  356. * but could be changed in the future to support enabling
  357. * and disabling specific interrupts
  358. *
  359. * Contains some infrastructure for polling and interrupt
  360. * handling, as well as handling shifts in PHY hardware state
  361. */
  362. struct phy_device {
  363. struct mdio_device mdio;
  364. /* Information about the PHY type */
  365. /* And management functions */
  366. struct phy_driver *drv;
  367. u32 phy_id;
  368. struct phy_c45_device_ids c45_ids;
  369. bool is_c45;
  370. bool is_internal;
  371. bool is_pseudo_fixed_link;
  372. bool has_fixups;
  373. bool suspended;
  374. bool sysfs_links;
  375. bool loopback_enabled;
  376. enum phy_state state;
  377. u32 dev_flags;
  378. phy_interface_t interface;
  379. /*
  380. * forced speed & duplex (no autoneg)
  381. * partner speed & duplex & pause (autoneg)
  382. */
  383. int speed;
  384. int duplex;
  385. int pause;
  386. int asym_pause;
  387. /* The most recently read link state */
  388. int link;
  389. /* Enabled Interrupts */
  390. u32 interrupts;
  391. /* Union of PHY and Attached devices' supported modes */
  392. /* See mii.h for more info */
  393. u32 supported;
  394. u32 advertising;
  395. u32 lp_advertising;
  396. /* Energy efficient ethernet modes which should be prohibited */
  397. u32 eee_broken_modes;
  398. int autoneg;
  399. int link_timeout;
  400. #ifdef CONFIG_LED_TRIGGER_PHY
  401. struct phy_led_trigger *phy_led_triggers;
  402. unsigned int phy_num_led_triggers;
  403. struct phy_led_trigger *last_triggered;
  404. struct phy_led_trigger *led_link_trigger;
  405. #endif
  406. /*
  407. * Interrupt number for this PHY
  408. * -1 means no interrupt
  409. */
  410. int irq;
  411. /* private data pointer */
  412. /* For use by PHYs to maintain extra state */
  413. void *priv;
  414. /* Interrupt and Polling infrastructure */
  415. struct work_struct phy_queue;
  416. struct delayed_work state_queue;
  417. struct mutex lock;
  418. struct phylink *phylink;
  419. struct net_device *attached_dev;
  420. u8 mdix;
  421. u8 mdix_ctrl;
  422. void (*phy_link_change)(struct phy_device *, bool up, bool do_carrier);
  423. void (*adjust_link)(struct net_device *dev);
  424. };
  425. #define to_phy_device(d) container_of(to_mdio_device(d), \
  426. struct phy_device, mdio)
  427. /* struct phy_driver: Driver structure for a particular PHY type
  428. *
  429. * driver_data: static driver data
  430. * phy_id: The result of reading the UID registers of this PHY
  431. * type, and ANDing them with the phy_id_mask. This driver
  432. * only works for PHYs with IDs which match this field
  433. * name: The friendly name of this PHY type
  434. * phy_id_mask: Defines the important bits of the phy_id
  435. * features: A list of features (speed, duplex, etc) supported
  436. * by this PHY
  437. * flags: A bitfield defining certain other features this PHY
  438. * supports (like interrupts)
  439. *
  440. * All functions are optional. If config_aneg or read_status
  441. * are not implemented, the phy core uses the genphy versions.
  442. * Note that none of these functions should be called from
  443. * interrupt time. The goal is for the bus read/write functions
  444. * to be able to block when the bus transaction is happening,
  445. * and be freed up by an interrupt (The MPC85xx has this ability,
  446. * though it is not currently supported in the driver).
  447. */
  448. struct phy_driver {
  449. struct mdio_driver_common mdiodrv;
  450. u32 phy_id;
  451. char *name;
  452. u32 phy_id_mask;
  453. u32 features;
  454. u32 flags;
  455. const void *driver_data;
  456. /*
  457. * Called to issue a PHY software reset
  458. */
  459. int (*soft_reset)(struct phy_device *phydev);
  460. /*
  461. * Called to initialize the PHY,
  462. * including after a reset
  463. */
  464. int (*config_init)(struct phy_device *phydev);
  465. /*
  466. * Called during discovery. Used to set
  467. * up device-specific structures, if any
  468. */
  469. int (*probe)(struct phy_device *phydev);
  470. /* PHY Power Management */
  471. int (*suspend)(struct phy_device *phydev);
  472. int (*resume)(struct phy_device *phydev);
  473. /*
  474. * Configures the advertisement and resets
  475. * autonegotiation if phydev->autoneg is on,
  476. * forces the speed to the current settings in phydev
  477. * if phydev->autoneg is off
  478. */
  479. int (*config_aneg)(struct phy_device *phydev);
  480. /* Determines the auto negotiation result */
  481. int (*aneg_done)(struct phy_device *phydev);
  482. /* Determines the negotiated speed and duplex */
  483. int (*read_status)(struct phy_device *phydev);
  484. /* Clears any pending interrupts */
  485. int (*ack_interrupt)(struct phy_device *phydev);
  486. /* Enables or disables interrupts */
  487. int (*config_intr)(struct phy_device *phydev);
  488. /*
  489. * Checks if the PHY generated an interrupt.
  490. * For multi-PHY devices with shared PHY interrupt pin
  491. */
  492. int (*did_interrupt)(struct phy_device *phydev);
  493. /* Clears up any memory if needed */
  494. void (*remove)(struct phy_device *phydev);
  495. /* Returns true if this is a suitable driver for the given
  496. * phydev. If NULL, matching is based on phy_id and
  497. * phy_id_mask.
  498. */
  499. int (*match_phy_device)(struct phy_device *phydev);
  500. /* Handles ethtool queries for hardware time stamping. */
  501. int (*ts_info)(struct phy_device *phydev, struct ethtool_ts_info *ti);
  502. /* Handles SIOCSHWTSTAMP ioctl for hardware time stamping. */
  503. int (*hwtstamp)(struct phy_device *phydev, struct ifreq *ifr);
  504. /*
  505. * Requests a Rx timestamp for 'skb'. If the skb is accepted,
  506. * the phy driver promises to deliver it using netif_rx() as
  507. * soon as a timestamp becomes available. One of the
  508. * PTP_CLASS_ values is passed in 'type'. The function must
  509. * return true if the skb is accepted for delivery.
  510. */
  511. bool (*rxtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);
  512. /*
  513. * Requests a Tx timestamp for 'skb'. The phy driver promises
  514. * to deliver it using skb_complete_tx_timestamp() as soon as a
  515. * timestamp becomes available. One of the PTP_CLASS_ values
  516. * is passed in 'type'.
  517. */
  518. void (*txtstamp)(struct phy_device *dev, struct sk_buff *skb, int type);
  519. /* Some devices (e.g. qnap TS-119P II) require PHY register changes to
  520. * enable Wake on LAN, so set_wol is provided to be called in the
  521. * ethernet driver's set_wol function. */
  522. int (*set_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
  523. /* See set_wol, but for checking whether Wake on LAN is enabled. */
  524. void (*get_wol)(struct phy_device *dev, struct ethtool_wolinfo *wol);
  525. /*
  526. * Called to inform a PHY device driver when the core is about to
  527. * change the link state. This callback is supposed to be used as
  528. * fixup hook for drivers that need to take action when the link
  529. * state changes. Drivers are by no means allowed to mess with the
  530. * PHY device structure in their implementations.
  531. */
  532. void (*link_change_notify)(struct phy_device *dev);
  533. /*
  534. * Phy specific driver override for reading a MMD register.
  535. * This function is optional for PHY specific drivers. When
  536. * not provided, the default MMD read function will be used
  537. * by phy_read_mmd(), which will use either a direct read for
  538. * Clause 45 PHYs or an indirect read for Clause 22 PHYs.
  539. * devnum is the MMD device number within the PHY device,
  540. * regnum is the register within the selected MMD device.
  541. */
  542. int (*read_mmd)(struct phy_device *dev, int devnum, u16 regnum);
  543. /*
  544. * Phy specific driver override for writing a MMD register.
  545. * This function is optional for PHY specific drivers. When
  546. * not provided, the default MMD write function will be used
  547. * by phy_write_mmd(), which will use either a direct write for
  548. * Clause 45 PHYs, or an indirect write for Clause 22 PHYs.
  549. * devnum is the MMD device number within the PHY device,
  550. * regnum is the register within the selected MMD device.
  551. * val is the value to be written.
  552. */
  553. int (*write_mmd)(struct phy_device *dev, int devnum, u16 regnum,
  554. u16 val);
  555. /* Get the size and type of the eeprom contained within a plug-in
  556. * module */
  557. int (*module_info)(struct phy_device *dev,
  558. struct ethtool_modinfo *modinfo);
  559. /* Get the eeprom information from the plug-in module */
  560. int (*module_eeprom)(struct phy_device *dev,
  561. struct ethtool_eeprom *ee, u8 *data);
  562. /* Get statistics from the phy using ethtool */
  563. int (*get_sset_count)(struct phy_device *dev);
  564. void (*get_strings)(struct phy_device *dev, u8 *data);
  565. void (*get_stats)(struct phy_device *dev,
  566. struct ethtool_stats *stats, u64 *data);
  567. /* Get and Set PHY tunables */
  568. int (*get_tunable)(struct phy_device *dev,
  569. struct ethtool_tunable *tuna, void *data);
  570. int (*set_tunable)(struct phy_device *dev,
  571. struct ethtool_tunable *tuna,
  572. const void *data);
  573. int (*set_loopback)(struct phy_device *dev, bool enable);
  574. };
  575. #define to_phy_driver(d) container_of(to_mdio_common_driver(d), \
  576. struct phy_driver, mdiodrv)
  577. #define PHY_ANY_ID "MATCH ANY PHY"
  578. #define PHY_ANY_UID 0xffffffff
  579. /* A Structure for boards to register fixups with the PHY Lib */
  580. struct phy_fixup {
  581. struct list_head list;
  582. char bus_id[MII_BUS_ID_SIZE + 3];
  583. u32 phy_uid;
  584. u32 phy_uid_mask;
  585. int (*run)(struct phy_device *phydev);
  586. };
  587. const char *phy_speed_to_str(int speed);
  588. const char *phy_duplex_to_str(unsigned int duplex);
  589. /* A structure for mapping a particular speed and duplex
  590. * combination to a particular SUPPORTED and ADVERTISED value
  591. */
  592. struct phy_setting {
  593. u32 speed;
  594. u8 duplex;
  595. u8 bit;
  596. };
  597. const struct phy_setting *
  598. phy_lookup_setting(int speed, int duplex, const unsigned long *mask,
  599. size_t maxbit, bool exact);
  600. size_t phy_speeds(unsigned int *speeds, size_t size,
  601. unsigned long *mask, size_t maxbit);
  602. void phy_resolve_aneg_linkmode(struct phy_device *phydev);
  603. /**
  604. * phy_read_mmd - Convenience function for reading a register
  605. * from an MMD on a given PHY.
  606. * @phydev: The phy_device struct
  607. * @devad: The MMD to read from
  608. * @regnum: The register on the MMD to read
  609. *
  610. * Same rules as for phy_read();
  611. */
  612. int phy_read_mmd(struct phy_device *phydev, int devad, u32 regnum);
  613. /**
  614. * phy_read - Convenience function for reading a given PHY register
  615. * @phydev: the phy_device struct
  616. * @regnum: register number to read
  617. *
  618. * NOTE: MUST NOT be called from interrupt context,
  619. * because the bus read/write functions may wait for an interrupt
  620. * to conclude the operation.
  621. */
  622. static inline int phy_read(struct phy_device *phydev, u32 regnum)
  623. {
  624. return mdiobus_read(phydev->mdio.bus, phydev->mdio.addr, regnum);
  625. }
  626. /**
  627. * phy_write - Convenience function for writing a given PHY register
  628. * @phydev: the phy_device struct
  629. * @regnum: register number to write
  630. * @val: value to write to @regnum
  631. *
  632. * NOTE: MUST NOT be called from interrupt context,
  633. * because the bus read/write functions may wait for an interrupt
  634. * to conclude the operation.
  635. */
  636. static inline int phy_write(struct phy_device *phydev, u32 regnum, u16 val)
  637. {
  638. return mdiobus_write(phydev->mdio.bus, phydev->mdio.addr, regnum, val);
  639. }
  640. /**
  641. * phy_interrupt_is_valid - Convenience function for testing a given PHY irq
  642. * @phydev: the phy_device struct
  643. *
  644. * NOTE: must be kept in sync with addition/removal of PHY_POLL and
  645. * PHY_IGNORE_INTERRUPT
  646. */
  647. static inline bool phy_interrupt_is_valid(struct phy_device *phydev)
  648. {
  649. return phydev->irq != PHY_POLL && phydev->irq != PHY_IGNORE_INTERRUPT;
  650. }
  651. /**
  652. * phy_is_internal - Convenience function for testing if a PHY is internal
  653. * @phydev: the phy_device struct
  654. */
  655. static inline bool phy_is_internal(struct phy_device *phydev)
  656. {
  657. return phydev->is_internal;
  658. }
  659. /**
  660. * phy_interface_mode_is_rgmii - Convenience function for testing if a
  661. * PHY interface mode is RGMII (all variants)
  662. * @mode: the phy_interface_t enum
  663. */
  664. static inline bool phy_interface_mode_is_rgmii(phy_interface_t mode)
  665. {
  666. return mode >= PHY_INTERFACE_MODE_RGMII &&
  667. mode <= PHY_INTERFACE_MODE_RGMII_TXID;
  668. };
  669. /**
  670. * phy_interface_mode_is_8023z() - does the phy interface mode use 802.3z
  671. * negotiation
  672. * @mode: one of &enum phy_interface_t
  673. *
  674. * Returns true if the phy interface mode uses the 16-bit negotiation
  675. * word as defined in 802.3z. (See 802.3-2015 37.2.1 Config_Reg encoding)
  676. */
  677. static inline bool phy_interface_mode_is_8023z(phy_interface_t mode)
  678. {
  679. return mode == PHY_INTERFACE_MODE_1000BASEX ||
  680. mode == PHY_INTERFACE_MODE_2500BASEX;
  681. }
  682. /**
  683. * phy_interface_is_rgmii - Convenience function for testing if a PHY interface
  684. * is RGMII (all variants)
  685. * @phydev: the phy_device struct
  686. */
  687. static inline bool phy_interface_is_rgmii(struct phy_device *phydev)
  688. {
  689. return phy_interface_mode_is_rgmii(phydev->interface);
  690. };
  691. /*
  692. * phy_is_pseudo_fixed_link - Convenience function for testing if this
  693. * PHY is the CPU port facing side of an Ethernet switch, or similar.
  694. * @phydev: the phy_device struct
  695. */
  696. static inline bool phy_is_pseudo_fixed_link(struct phy_device *phydev)
  697. {
  698. return phydev->is_pseudo_fixed_link;
  699. }
  700. /**
  701. * phy_write_mmd - Convenience function for writing a register
  702. * on an MMD on a given PHY.
  703. * @phydev: The phy_device struct
  704. * @devad: The MMD to read from
  705. * @regnum: The register on the MMD to read
  706. * @val: value to write to @regnum
  707. *
  708. * Same rules as for phy_write();
  709. */
  710. int phy_write_mmd(struct phy_device *phydev, int devad, u32 regnum, u16 val);
  711. struct phy_device *phy_device_create(struct mii_bus *bus, int addr, int phy_id,
  712. bool is_c45,
  713. struct phy_c45_device_ids *c45_ids);
  714. #if IS_ENABLED(CONFIG_PHYLIB)
  715. struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45);
  716. int phy_device_register(struct phy_device *phy);
  717. void phy_device_free(struct phy_device *phydev);
  718. #else
  719. static inline
  720. struct phy_device *get_phy_device(struct mii_bus *bus, int addr, bool is_c45)
  721. {
  722. return NULL;
  723. }
  724. static inline int phy_device_register(struct phy_device *phy)
  725. {
  726. return 0;
  727. }
  728. static inline void phy_device_free(struct phy_device *phydev) { }
  729. #endif /* CONFIG_PHYLIB */
  730. void phy_device_remove(struct phy_device *phydev);
  731. int phy_init_hw(struct phy_device *phydev);
  732. int phy_suspend(struct phy_device *phydev);
  733. int phy_resume(struct phy_device *phydev);
  734. int phy_loopback(struct phy_device *phydev, bool enable);
  735. struct phy_device *phy_attach(struct net_device *dev, const char *bus_id,
  736. phy_interface_t interface);
  737. struct phy_device *phy_find_first(struct mii_bus *bus);
  738. int phy_attach_direct(struct net_device *dev, struct phy_device *phydev,
  739. u32 flags, phy_interface_t interface);
  740. int phy_connect_direct(struct net_device *dev, struct phy_device *phydev,
  741. void (*handler)(struct net_device *),
  742. phy_interface_t interface);
  743. struct phy_device *phy_connect(struct net_device *dev, const char *bus_id,
  744. void (*handler)(struct net_device *),
  745. phy_interface_t interface);
  746. void phy_disconnect(struct phy_device *phydev);
  747. void phy_detach(struct phy_device *phydev);
  748. void phy_start(struct phy_device *phydev);
  749. void phy_stop(struct phy_device *phydev);
  750. int phy_start_aneg(struct phy_device *phydev);
  751. int phy_aneg_done(struct phy_device *phydev);
  752. int phy_stop_interrupts(struct phy_device *phydev);
  753. int phy_restart_aneg(struct phy_device *phydev);
  754. int phy_reset_after_clk_enable(struct phy_device *phydev);
  755. static inline void phy_device_reset(struct phy_device *phydev, int value)
  756. {
  757. mdio_device_reset(&phydev->mdio, value);
  758. }
  759. #define phydev_err(_phydev, format, args...) \
  760. dev_err(&_phydev->mdio.dev, format, ##args)
  761. #define phydev_dbg(_phydev, format, args...) \
  762. dev_dbg(&_phydev->mdio.dev, format, ##args)
  763. static inline const char *phydev_name(const struct phy_device *phydev)
  764. {
  765. return dev_name(&phydev->mdio.dev);
  766. }
  767. void phy_attached_print(struct phy_device *phydev, const char *fmt, ...)
  768. __printf(2, 3);
  769. void phy_attached_info(struct phy_device *phydev);
  770. /* Clause 22 PHY */
  771. int genphy_config_init(struct phy_device *phydev);
  772. int genphy_setup_forced(struct phy_device *phydev);
  773. int genphy_restart_aneg(struct phy_device *phydev);
  774. int genphy_config_aneg(struct phy_device *phydev);
  775. int genphy_aneg_done(struct phy_device *phydev);
  776. int genphy_update_link(struct phy_device *phydev);
  777. int genphy_read_status(struct phy_device *phydev);
  778. int genphy_suspend(struct phy_device *phydev);
  779. int genphy_resume(struct phy_device *phydev);
  780. int genphy_loopback(struct phy_device *phydev, bool enable);
  781. int genphy_soft_reset(struct phy_device *phydev);
  782. static inline int genphy_no_soft_reset(struct phy_device *phydev)
  783. {
  784. return 0;
  785. }
  786. /* Clause 45 PHY */
  787. int genphy_c45_restart_aneg(struct phy_device *phydev);
  788. int genphy_c45_aneg_done(struct phy_device *phydev);
  789. int genphy_c45_read_link(struct phy_device *phydev, u32 mmd_mask);
  790. int genphy_c45_read_lpa(struct phy_device *phydev);
  791. int genphy_c45_read_pma(struct phy_device *phydev);
  792. int genphy_c45_pma_setup_forced(struct phy_device *phydev);
  793. int genphy_c45_an_disable_aneg(struct phy_device *phydev);
  794. int genphy_c45_read_mdix(struct phy_device *phydev);
  795. static inline int phy_read_status(struct phy_device *phydev)
  796. {
  797. if (!phydev->drv)
  798. return -EIO;
  799. if (phydev->drv->read_status)
  800. return phydev->drv->read_status(phydev);
  801. else
  802. return genphy_read_status(phydev);
  803. }
  804. void phy_driver_unregister(struct phy_driver *drv);
  805. void phy_drivers_unregister(struct phy_driver *drv, int n);
  806. int phy_driver_register(struct phy_driver *new_driver, struct module *owner);
  807. int phy_drivers_register(struct phy_driver *new_driver, int n,
  808. struct module *owner);
  809. void phy_state_machine(struct work_struct *work);
  810. void phy_change(struct phy_device *phydev);
  811. void phy_change_work(struct work_struct *work);
  812. void phy_mac_interrupt(struct phy_device *phydev, int new_link);
  813. void phy_start_machine(struct phy_device *phydev);
  814. void phy_stop_machine(struct phy_device *phydev);
  815. void phy_trigger_machine(struct phy_device *phydev, bool sync);
  816. int phy_ethtool_sset(struct phy_device *phydev, struct ethtool_cmd *cmd);
  817. void phy_ethtool_ksettings_get(struct phy_device *phydev,
  818. struct ethtool_link_ksettings *cmd);
  819. int phy_ethtool_ksettings_set(struct phy_device *phydev,
  820. const struct ethtool_link_ksettings *cmd);
  821. int phy_mii_ioctl(struct phy_device *phydev, struct ifreq *ifr, int cmd);
  822. int phy_start_interrupts(struct phy_device *phydev);
  823. void phy_print_status(struct phy_device *phydev);
  824. int phy_set_max_speed(struct phy_device *phydev, u32 max_speed);
  825. int phy_register_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask,
  826. int (*run)(struct phy_device *));
  827. int phy_register_fixup_for_id(const char *bus_id,
  828. int (*run)(struct phy_device *));
  829. int phy_register_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask,
  830. int (*run)(struct phy_device *));
  831. int phy_unregister_fixup(const char *bus_id, u32 phy_uid, u32 phy_uid_mask);
  832. int phy_unregister_fixup_for_id(const char *bus_id);
  833. int phy_unregister_fixup_for_uid(u32 phy_uid, u32 phy_uid_mask);
  834. int phy_init_eee(struct phy_device *phydev, bool clk_stop_enable);
  835. int phy_get_eee_err(struct phy_device *phydev);
  836. int phy_ethtool_set_eee(struct phy_device *phydev, struct ethtool_eee *data);
  837. int phy_ethtool_get_eee(struct phy_device *phydev, struct ethtool_eee *data);
  838. int phy_ethtool_set_wol(struct phy_device *phydev, struct ethtool_wolinfo *wol);
  839. void phy_ethtool_get_wol(struct phy_device *phydev,
  840. struct ethtool_wolinfo *wol);
  841. int phy_ethtool_get_link_ksettings(struct net_device *ndev,
  842. struct ethtool_link_ksettings *cmd);
  843. int phy_ethtool_set_link_ksettings(struct net_device *ndev,
  844. const struct ethtool_link_ksettings *cmd);
  845. int phy_ethtool_nway_reset(struct net_device *ndev);
  846. #if IS_ENABLED(CONFIG_PHYLIB)
  847. int __init mdio_bus_init(void);
  848. void mdio_bus_exit(void);
  849. #endif
  850. extern struct bus_type mdio_bus_type;
  851. struct mdio_board_info {
  852. const char *bus_id;
  853. char modalias[MDIO_NAME_SIZE];
  854. int mdio_addr;
  855. const void *platform_data;
  856. };
  857. #if IS_ENABLED(CONFIG_MDIO_DEVICE)
  858. int mdiobus_register_board_info(const struct mdio_board_info *info,
  859. unsigned int n);
  860. #else
  861. static inline int mdiobus_register_board_info(const struct mdio_board_info *i,
  862. unsigned int n)
  863. {
  864. return 0;
  865. }
  866. #endif
  867. /**
  868. * module_phy_driver() - Helper macro for registering PHY drivers
  869. * @__phy_drivers: array of PHY drivers to register
  870. *
  871. * Helper macro for PHY drivers which do not do anything special in module
  872. * init/exit. Each module may only use this macro once, and calling it
  873. * replaces module_init() and module_exit().
  874. */
  875. #define phy_module_driver(__phy_drivers, __count) \
  876. static int __init phy_module_init(void) \
  877. { \
  878. return phy_drivers_register(__phy_drivers, __count, THIS_MODULE); \
  879. } \
  880. module_init(phy_module_init); \
  881. static void __exit phy_module_exit(void) \
  882. { \
  883. phy_drivers_unregister(__phy_drivers, __count); \
  884. } \
  885. module_exit(phy_module_exit)
  886. #define module_phy_driver(__phy_drivers) \
  887. phy_module_driver(__phy_drivers, ARRAY_SIZE(__phy_drivers))
  888. #endif /* __PHY_H */