hdmi4.c 15 KB

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  1. /*
  2. * HDMI interface DSS driver for TI's OMAP4 family of SoCs.
  3. * Copyright (C) 2010-2011 Texas Instruments Incorporated - http://www.ti.com/
  4. * Authors: Yong Zhi
  5. * Mythri pk <mythripk@ti.com>
  6. *
  7. * This program is free software; you can redistribute it and/or modify it
  8. * under the terms of the GNU General Public License version 2 as published by
  9. * the Free Software Foundation.
  10. *
  11. * This program is distributed in the hope that it will be useful, but WITHOUT
  12. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  13. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  14. * more details.
  15. *
  16. * You should have received a copy of the GNU General Public License along with
  17. * this program. If not, see <http://www.gnu.org/licenses/>.
  18. */
  19. #define DSS_SUBSYS_NAME "HDMI"
  20. #include <linux/kernel.h>
  21. #include <linux/module.h>
  22. #include <linux/err.h>
  23. #include <linux/io.h>
  24. #include <linux/interrupt.h>
  25. #include <linux/mutex.h>
  26. #include <linux/delay.h>
  27. #include <linux/string.h>
  28. #include <linux/platform_device.h>
  29. #include <linux/pm_runtime.h>
  30. #include <linux/clk.h>
  31. #include <linux/gpio.h>
  32. #include <linux/regulator/consumer.h>
  33. #include <video/omapdss.h>
  34. #include <sound/omap-hdmi-audio.h>
  35. #include "hdmi4_core.h"
  36. #include "dss.h"
  37. #include "dss_features.h"
  38. #include "hdmi.h"
  39. static struct omap_hdmi hdmi;
  40. static int hdmi_runtime_get(void)
  41. {
  42. int r;
  43. DSSDBG("hdmi_runtime_get\n");
  44. r = pm_runtime_get_sync(&hdmi.pdev->dev);
  45. WARN_ON(r < 0);
  46. if (r < 0)
  47. return r;
  48. return 0;
  49. }
  50. static void hdmi_runtime_put(void)
  51. {
  52. int r;
  53. DSSDBG("hdmi_runtime_put\n");
  54. r = pm_runtime_put_sync(&hdmi.pdev->dev);
  55. WARN_ON(r < 0 && r != -ENOSYS);
  56. }
  57. static irqreturn_t hdmi_irq_handler(int irq, void *data)
  58. {
  59. struct hdmi_wp_data *wp = data;
  60. u32 irqstatus;
  61. irqstatus = hdmi_wp_get_irqstatus(wp);
  62. hdmi_wp_set_irqstatus(wp, irqstatus);
  63. if ((irqstatus & HDMI_IRQ_LINK_CONNECT) &&
  64. irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
  65. /*
  66. * If we get both connect and disconnect interrupts at the same
  67. * time, turn off the PHY, clear interrupts, and restart, which
  68. * raises connect interrupt if a cable is connected, or nothing
  69. * if cable is not connected.
  70. */
  71. hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_OFF);
  72. hdmi_wp_set_irqstatus(wp, HDMI_IRQ_LINK_CONNECT |
  73. HDMI_IRQ_LINK_DISCONNECT);
  74. hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
  75. } else if (irqstatus & HDMI_IRQ_LINK_CONNECT) {
  76. hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_TXON);
  77. } else if (irqstatus & HDMI_IRQ_LINK_DISCONNECT) {
  78. hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
  79. }
  80. return IRQ_HANDLED;
  81. }
  82. static int hdmi_init_regulator(void)
  83. {
  84. int r;
  85. struct regulator *reg;
  86. if (hdmi.vdda_reg != NULL)
  87. return 0;
  88. reg = devm_regulator_get(&hdmi.pdev->dev, "vdda");
  89. if (IS_ERR(reg)) {
  90. if (PTR_ERR(reg) != -EPROBE_DEFER)
  91. DSSERR("can't get VDDA regulator\n");
  92. return PTR_ERR(reg);
  93. }
  94. if (regulator_can_change_voltage(reg)) {
  95. r = regulator_set_voltage(reg, 1800000, 1800000);
  96. if (r) {
  97. devm_regulator_put(reg);
  98. DSSWARN("can't set the regulator voltage\n");
  99. return r;
  100. }
  101. }
  102. hdmi.vdda_reg = reg;
  103. return 0;
  104. }
  105. static int hdmi_power_on_core(struct omap_dss_device *dssdev)
  106. {
  107. int r;
  108. r = regulator_enable(hdmi.vdda_reg);
  109. if (r)
  110. return r;
  111. r = hdmi_runtime_get();
  112. if (r)
  113. goto err_runtime_get;
  114. /* Make selection of HDMI in DSS */
  115. dss_select_hdmi_venc_clk_source(DSS_HDMI_M_PCLK);
  116. hdmi.core_enabled = true;
  117. return 0;
  118. err_runtime_get:
  119. regulator_disable(hdmi.vdda_reg);
  120. return r;
  121. }
  122. static void hdmi_power_off_core(struct omap_dss_device *dssdev)
  123. {
  124. hdmi.core_enabled = false;
  125. hdmi_runtime_put();
  126. regulator_disable(hdmi.vdda_reg);
  127. }
  128. static int hdmi_power_on_full(struct omap_dss_device *dssdev)
  129. {
  130. int r;
  131. struct omap_video_timings *p;
  132. struct omap_overlay_manager *mgr = hdmi.output.manager;
  133. struct hdmi_wp_data *wp = &hdmi.wp;
  134. struct dss_pll_clock_info hdmi_cinfo = { 0 };
  135. r = hdmi_power_on_core(dssdev);
  136. if (r)
  137. return r;
  138. /* disable and clear irqs */
  139. hdmi_wp_clear_irqenable(wp, 0xffffffff);
  140. hdmi_wp_set_irqstatus(wp, 0xffffffff);
  141. p = &hdmi.cfg.timings;
  142. DSSDBG("hdmi_power_on x_res= %d y_res = %d\n", p->x_res, p->y_res);
  143. hdmi_pll_compute(&hdmi.pll, p->pixelclock, &hdmi_cinfo);
  144. r = dss_pll_enable(&hdmi.pll.pll);
  145. if (r) {
  146. DSSERR("Failed to enable PLL\n");
  147. goto err_pll_enable;
  148. }
  149. r = dss_pll_set_config(&hdmi.pll.pll, &hdmi_cinfo);
  150. if (r) {
  151. DSSERR("Failed to configure PLL\n");
  152. goto err_pll_cfg;
  153. }
  154. r = hdmi_phy_configure(&hdmi.phy, hdmi_cinfo.clkdco,
  155. hdmi_cinfo.clkout[0]);
  156. if (r) {
  157. DSSDBG("Failed to configure PHY\n");
  158. goto err_phy_cfg;
  159. }
  160. r = hdmi_wp_set_phy_pwr(wp, HDMI_PHYPWRCMD_LDOON);
  161. if (r)
  162. goto err_phy_pwr;
  163. hdmi4_configure(&hdmi.core, &hdmi.wp, &hdmi.cfg);
  164. /* bypass TV gamma table */
  165. dispc_enable_gamma_table(0);
  166. /* tv size */
  167. dss_mgr_set_timings(mgr, p);
  168. r = hdmi_wp_video_start(&hdmi.wp);
  169. if (r)
  170. goto err_vid_enable;
  171. r = dss_mgr_enable(mgr);
  172. if (r)
  173. goto err_mgr_enable;
  174. hdmi_wp_set_irqenable(wp,
  175. HDMI_IRQ_LINK_CONNECT | HDMI_IRQ_LINK_DISCONNECT);
  176. return 0;
  177. err_mgr_enable:
  178. hdmi_wp_video_stop(&hdmi.wp);
  179. err_vid_enable:
  180. err_phy_cfg:
  181. hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
  182. err_phy_pwr:
  183. err_pll_cfg:
  184. dss_pll_disable(&hdmi.pll.pll);
  185. err_pll_enable:
  186. hdmi_power_off_core(dssdev);
  187. return -EIO;
  188. }
  189. static void hdmi_power_off_full(struct omap_dss_device *dssdev)
  190. {
  191. struct omap_overlay_manager *mgr = hdmi.output.manager;
  192. hdmi_wp_clear_irqenable(&hdmi.wp, 0xffffffff);
  193. dss_mgr_disable(mgr);
  194. hdmi_wp_video_stop(&hdmi.wp);
  195. hdmi_wp_set_phy_pwr(&hdmi.wp, HDMI_PHYPWRCMD_OFF);
  196. dss_pll_disable(&hdmi.pll.pll);
  197. hdmi_power_off_core(dssdev);
  198. }
  199. static int hdmi_display_check_timing(struct omap_dss_device *dssdev,
  200. struct omap_video_timings *timings)
  201. {
  202. struct omap_dss_device *out = &hdmi.output;
  203. if (!dispc_mgr_timings_ok(out->dispc_channel, timings))
  204. return -EINVAL;
  205. return 0;
  206. }
  207. static void hdmi_display_set_timing(struct omap_dss_device *dssdev,
  208. struct omap_video_timings *timings)
  209. {
  210. mutex_lock(&hdmi.lock);
  211. hdmi.cfg.timings = *timings;
  212. dispc_set_tv_pclk(timings->pixelclock);
  213. mutex_unlock(&hdmi.lock);
  214. }
  215. static void hdmi_display_get_timings(struct omap_dss_device *dssdev,
  216. struct omap_video_timings *timings)
  217. {
  218. *timings = hdmi.cfg.timings;
  219. }
  220. static void hdmi_dump_regs(struct seq_file *s)
  221. {
  222. mutex_lock(&hdmi.lock);
  223. if (hdmi_runtime_get()) {
  224. mutex_unlock(&hdmi.lock);
  225. return;
  226. }
  227. hdmi_wp_dump(&hdmi.wp, s);
  228. hdmi_pll_dump(&hdmi.pll, s);
  229. hdmi_phy_dump(&hdmi.phy, s);
  230. hdmi4_core_dump(&hdmi.core, s);
  231. hdmi_runtime_put();
  232. mutex_unlock(&hdmi.lock);
  233. }
  234. static int read_edid(u8 *buf, int len)
  235. {
  236. int r;
  237. mutex_lock(&hdmi.lock);
  238. r = hdmi_runtime_get();
  239. BUG_ON(r);
  240. r = hdmi4_read_edid(&hdmi.core, buf, len);
  241. hdmi_runtime_put();
  242. mutex_unlock(&hdmi.lock);
  243. return r;
  244. }
  245. static int hdmi_display_enable(struct omap_dss_device *dssdev)
  246. {
  247. struct omap_dss_device *out = &hdmi.output;
  248. int r = 0;
  249. DSSDBG("ENTER hdmi_display_enable\n");
  250. mutex_lock(&hdmi.lock);
  251. if (out == NULL || out->manager == NULL) {
  252. DSSERR("failed to enable display: no output/manager\n");
  253. r = -ENODEV;
  254. goto err0;
  255. }
  256. r = hdmi_power_on_full(dssdev);
  257. if (r) {
  258. DSSERR("failed to power on device\n");
  259. goto err0;
  260. }
  261. hdmi.display_enabled = true;
  262. mutex_unlock(&hdmi.lock);
  263. return 0;
  264. err0:
  265. mutex_unlock(&hdmi.lock);
  266. return r;
  267. }
  268. static void hdmi_display_disable(struct omap_dss_device *dssdev)
  269. {
  270. DSSDBG("Enter hdmi_display_disable\n");
  271. mutex_lock(&hdmi.lock);
  272. if (hdmi.audio_pdev && hdmi.audio_abort_cb)
  273. hdmi.audio_abort_cb(&hdmi.audio_pdev->dev);
  274. hdmi_power_off_full(dssdev);
  275. hdmi.display_enabled = false;
  276. mutex_unlock(&hdmi.lock);
  277. }
  278. static int hdmi_core_enable(struct omap_dss_device *dssdev)
  279. {
  280. int r = 0;
  281. DSSDBG("ENTER omapdss_hdmi_core_enable\n");
  282. mutex_lock(&hdmi.lock);
  283. r = hdmi_power_on_core(dssdev);
  284. if (r) {
  285. DSSERR("failed to power on device\n");
  286. goto err0;
  287. }
  288. mutex_unlock(&hdmi.lock);
  289. return 0;
  290. err0:
  291. mutex_unlock(&hdmi.lock);
  292. return r;
  293. }
  294. static void hdmi_core_disable(struct omap_dss_device *dssdev)
  295. {
  296. DSSDBG("Enter omapdss_hdmi_core_disable\n");
  297. mutex_lock(&hdmi.lock);
  298. hdmi_power_off_core(dssdev);
  299. mutex_unlock(&hdmi.lock);
  300. }
  301. static int hdmi_connect(struct omap_dss_device *dssdev,
  302. struct omap_dss_device *dst)
  303. {
  304. struct omap_overlay_manager *mgr;
  305. int r;
  306. r = hdmi_init_regulator();
  307. if (r)
  308. return r;
  309. mgr = omap_dss_get_overlay_manager(dssdev->dispc_channel);
  310. if (!mgr)
  311. return -ENODEV;
  312. r = dss_mgr_connect(mgr, dssdev);
  313. if (r)
  314. return r;
  315. r = omapdss_output_set_device(dssdev, dst);
  316. if (r) {
  317. DSSERR("failed to connect output to new device: %s\n",
  318. dst->name);
  319. dss_mgr_disconnect(mgr, dssdev);
  320. return r;
  321. }
  322. return 0;
  323. }
  324. static void hdmi_disconnect(struct omap_dss_device *dssdev,
  325. struct omap_dss_device *dst)
  326. {
  327. WARN_ON(dst != dssdev->dst);
  328. if (dst != dssdev->dst)
  329. return;
  330. omapdss_output_unset_device(dssdev);
  331. if (dssdev->manager)
  332. dss_mgr_disconnect(dssdev->manager, dssdev);
  333. }
  334. static int hdmi_read_edid(struct omap_dss_device *dssdev,
  335. u8 *edid, int len)
  336. {
  337. bool need_enable;
  338. int r;
  339. need_enable = hdmi.core_enabled == false;
  340. if (need_enable) {
  341. r = hdmi_core_enable(dssdev);
  342. if (r)
  343. return r;
  344. }
  345. r = read_edid(edid, len);
  346. if (need_enable)
  347. hdmi_core_disable(dssdev);
  348. return r;
  349. }
  350. static int hdmi_set_infoframe(struct omap_dss_device *dssdev,
  351. const struct hdmi_avi_infoframe *avi)
  352. {
  353. hdmi.cfg.infoframe = *avi;
  354. return 0;
  355. }
  356. static int hdmi_set_hdmi_mode(struct omap_dss_device *dssdev,
  357. bool hdmi_mode)
  358. {
  359. hdmi.cfg.hdmi_dvi_mode = hdmi_mode ? HDMI_HDMI : HDMI_DVI;
  360. return 0;
  361. }
  362. static const struct omapdss_hdmi_ops hdmi_ops = {
  363. .connect = hdmi_connect,
  364. .disconnect = hdmi_disconnect,
  365. .enable = hdmi_display_enable,
  366. .disable = hdmi_display_disable,
  367. .check_timings = hdmi_display_check_timing,
  368. .set_timings = hdmi_display_set_timing,
  369. .get_timings = hdmi_display_get_timings,
  370. .read_edid = hdmi_read_edid,
  371. .set_infoframe = hdmi_set_infoframe,
  372. .set_hdmi_mode = hdmi_set_hdmi_mode,
  373. };
  374. static void hdmi_init_output(struct platform_device *pdev)
  375. {
  376. struct omap_dss_device *out = &hdmi.output;
  377. out->dev = &pdev->dev;
  378. out->id = OMAP_DSS_OUTPUT_HDMI;
  379. out->output_type = OMAP_DISPLAY_TYPE_HDMI;
  380. out->name = "hdmi.0";
  381. out->dispc_channel = OMAP_DSS_CHANNEL_DIGIT;
  382. out->ops.hdmi = &hdmi_ops;
  383. out->owner = THIS_MODULE;
  384. omapdss_register_output(out);
  385. }
  386. static void hdmi_uninit_output(struct platform_device *pdev)
  387. {
  388. struct omap_dss_device *out = &hdmi.output;
  389. omapdss_unregister_output(out);
  390. }
  391. static int hdmi_probe_of(struct platform_device *pdev)
  392. {
  393. struct device_node *node = pdev->dev.of_node;
  394. struct device_node *ep;
  395. int r;
  396. ep = omapdss_of_get_first_endpoint(node);
  397. if (!ep)
  398. return 0;
  399. r = hdmi_parse_lanes_of(pdev, ep, &hdmi.phy);
  400. if (r)
  401. goto err;
  402. of_node_put(ep);
  403. return 0;
  404. err:
  405. of_node_put(ep);
  406. return r;
  407. }
  408. /* Audio callbacks */
  409. static int hdmi_audio_startup(struct device *dev,
  410. void (*abort_cb)(struct device *dev))
  411. {
  412. struct omap_hdmi *hd = dev_get_drvdata(dev);
  413. int ret = 0;
  414. mutex_lock(&hd->lock);
  415. if (!hdmi_mode_has_audio(&hd->cfg) || !hd->display_enabled) {
  416. ret = -EPERM;
  417. goto out;
  418. }
  419. hd->audio_abort_cb = abort_cb;
  420. out:
  421. mutex_unlock(&hd->lock);
  422. return ret;
  423. }
  424. static int hdmi_audio_shutdown(struct device *dev)
  425. {
  426. struct omap_hdmi *hd = dev_get_drvdata(dev);
  427. mutex_lock(&hd->lock);
  428. hd->audio_abort_cb = NULL;
  429. mutex_unlock(&hd->lock);
  430. return 0;
  431. }
  432. static int hdmi_audio_start(struct device *dev)
  433. {
  434. struct omap_hdmi *hd = dev_get_drvdata(dev);
  435. WARN_ON(!hdmi_mode_has_audio(&hd->cfg));
  436. WARN_ON(!hd->display_enabled);
  437. hdmi_wp_audio_enable(&hd->wp, true);
  438. hdmi4_audio_start(&hd->core, &hd->wp);
  439. return 0;
  440. }
  441. static void hdmi_audio_stop(struct device *dev)
  442. {
  443. struct omap_hdmi *hd = dev_get_drvdata(dev);
  444. WARN_ON(!hdmi_mode_has_audio(&hd->cfg));
  445. WARN_ON(!hd->display_enabled);
  446. hdmi4_audio_stop(&hd->core, &hd->wp);
  447. hdmi_wp_audio_enable(&hd->wp, false);
  448. }
  449. static int hdmi_audio_config(struct device *dev,
  450. struct omap_dss_audio *dss_audio)
  451. {
  452. struct omap_hdmi *hd = dev_get_drvdata(dev);
  453. int ret;
  454. mutex_lock(&hd->lock);
  455. if (!hdmi_mode_has_audio(&hd->cfg) || !hd->display_enabled) {
  456. ret = -EPERM;
  457. goto out;
  458. }
  459. ret = hdmi4_audio_config(&hd->core, &hd->wp, dss_audio,
  460. hd->cfg.timings.pixelclock);
  461. out:
  462. mutex_unlock(&hd->lock);
  463. return ret;
  464. }
  465. static const struct omap_hdmi_audio_ops hdmi_audio_ops = {
  466. .audio_startup = hdmi_audio_startup,
  467. .audio_shutdown = hdmi_audio_shutdown,
  468. .audio_start = hdmi_audio_start,
  469. .audio_stop = hdmi_audio_stop,
  470. .audio_config = hdmi_audio_config,
  471. };
  472. static int hdmi_audio_register(struct device *dev)
  473. {
  474. struct omap_hdmi_audio_pdata pdata = {
  475. .dev = dev,
  476. .dss_version = omapdss_get_version(),
  477. .audio_dma_addr = hdmi_wp_get_audio_dma_addr(&hdmi.wp),
  478. .ops = &hdmi_audio_ops,
  479. };
  480. hdmi.audio_pdev = platform_device_register_data(
  481. dev, "omap-hdmi-audio", PLATFORM_DEVID_AUTO,
  482. &pdata, sizeof(pdata));
  483. if (IS_ERR(hdmi.audio_pdev))
  484. return PTR_ERR(hdmi.audio_pdev);
  485. return 0;
  486. }
  487. /* HDMI HW IP initialisation */
  488. static int omapdss_hdmihw_probe(struct platform_device *pdev)
  489. {
  490. int r;
  491. int irq;
  492. hdmi.pdev = pdev;
  493. dev_set_drvdata(&pdev->dev, &hdmi);
  494. mutex_init(&hdmi.lock);
  495. if (pdev->dev.of_node) {
  496. r = hdmi_probe_of(pdev);
  497. if (r)
  498. return r;
  499. }
  500. r = hdmi_wp_init(pdev, &hdmi.wp);
  501. if (r)
  502. return r;
  503. r = hdmi_pll_init(pdev, &hdmi.pll, &hdmi.wp);
  504. if (r)
  505. return r;
  506. r = hdmi_phy_init(pdev, &hdmi.phy);
  507. if (r)
  508. goto err;
  509. r = hdmi4_core_init(pdev, &hdmi.core);
  510. if (r)
  511. goto err;
  512. irq = platform_get_irq(pdev, 0);
  513. if (irq < 0) {
  514. DSSERR("platform_get_irq failed\n");
  515. r = -ENODEV;
  516. goto err;
  517. }
  518. r = devm_request_threaded_irq(&pdev->dev, irq,
  519. NULL, hdmi_irq_handler,
  520. IRQF_ONESHOT, "OMAP HDMI", &hdmi.wp);
  521. if (r) {
  522. DSSERR("HDMI IRQ request failed\n");
  523. goto err;
  524. }
  525. pm_runtime_enable(&pdev->dev);
  526. hdmi_init_output(pdev);
  527. r = hdmi_audio_register(&pdev->dev);
  528. if (r) {
  529. DSSERR("Registering HDMI audio failed\n");
  530. hdmi_uninit_output(pdev);
  531. pm_runtime_disable(&pdev->dev);
  532. return r;
  533. }
  534. dss_debugfs_create_file("hdmi", hdmi_dump_regs);
  535. return 0;
  536. err:
  537. hdmi_pll_uninit(&hdmi.pll);
  538. return r;
  539. }
  540. static int __exit omapdss_hdmihw_remove(struct platform_device *pdev)
  541. {
  542. if (hdmi.audio_pdev)
  543. platform_device_unregister(hdmi.audio_pdev);
  544. hdmi_uninit_output(pdev);
  545. hdmi_pll_uninit(&hdmi.pll);
  546. pm_runtime_disable(&pdev->dev);
  547. return 0;
  548. }
  549. static int hdmi_runtime_suspend(struct device *dev)
  550. {
  551. dispc_runtime_put();
  552. return 0;
  553. }
  554. static int hdmi_runtime_resume(struct device *dev)
  555. {
  556. int r;
  557. r = dispc_runtime_get();
  558. if (r < 0)
  559. return r;
  560. return 0;
  561. }
  562. static const struct dev_pm_ops hdmi_pm_ops = {
  563. .runtime_suspend = hdmi_runtime_suspend,
  564. .runtime_resume = hdmi_runtime_resume,
  565. };
  566. static const struct of_device_id hdmi_of_match[] = {
  567. { .compatible = "ti,omap4-hdmi", },
  568. {},
  569. };
  570. static struct platform_driver omapdss_hdmihw_driver = {
  571. .probe = omapdss_hdmihw_probe,
  572. .remove = __exit_p(omapdss_hdmihw_remove),
  573. .driver = {
  574. .name = "omapdss_hdmi",
  575. .pm = &hdmi_pm_ops,
  576. .of_match_table = hdmi_of_match,
  577. .suppress_bind_attrs = true,
  578. },
  579. };
  580. int __init hdmi4_init_platform_driver(void)
  581. {
  582. return platform_driver_register(&omapdss_hdmihw_driver);
  583. }
  584. void __exit hdmi4_uninit_platform_driver(void)
  585. {
  586. platform_driver_unregister(&omapdss_hdmihw_driver);
  587. }