net2280.c 99 KB

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  1. /*
  2. * Driver for the PLX NET2280 USB device controller.
  3. * Specs and errata are available from <http://www.plxtech.com>.
  4. *
  5. * PLX Technology Inc. (formerly NetChip Technology) supported the
  6. * development of this driver.
  7. *
  8. *
  9. * CODE STATUS HIGHLIGHTS
  10. *
  11. * This driver should work well with most "gadget" drivers, including
  12. * the Mass Storage, Serial, and Ethernet/RNDIS gadget drivers
  13. * as well as Gadget Zero and Gadgetfs.
  14. *
  15. * DMA is enabled by default. Drivers using transfer queues might use
  16. * DMA chaining to remove IRQ latencies between transfers. (Except when
  17. * short OUT transfers happen.) Drivers can use the req->no_interrupt
  18. * hint to completely eliminate some IRQs, if a later IRQ is guaranteed
  19. * and DMA chaining is enabled.
  20. *
  21. * MSI is enabled by default. The legacy IRQ is used if MSI couldn't
  22. * be enabled.
  23. *
  24. * Note that almost all the errata workarounds here are only needed for
  25. * rev1 chips. Rev1a silicon (0110) fixes almost all of them.
  26. */
  27. /*
  28. * Copyright (C) 2003 David Brownell
  29. * Copyright (C) 2003-2005 PLX Technology, Inc.
  30. * Copyright (C) 2014 Ricardo Ribalda - Qtechnology/AS
  31. *
  32. * Modified Seth Levy 2005 PLX Technology, Inc. to provide compatibility
  33. * with 2282 chip
  34. *
  35. * Modified Ricardo Ribalda Qtechnology AS to provide compatibility
  36. * with usb 338x chip. Based on PLX driver
  37. *
  38. * This program is free software; you can redistribute it and/or modify
  39. * it under the terms of the GNU General Public License as published by
  40. * the Free Software Foundation; either version 2 of the License, or
  41. * (at your option) any later version.
  42. */
  43. #include <linux/module.h>
  44. #include <linux/pci.h>
  45. #include <linux/dma-mapping.h>
  46. #include <linux/kernel.h>
  47. #include <linux/delay.h>
  48. #include <linux/ioport.h>
  49. #include <linux/slab.h>
  50. #include <linux/errno.h>
  51. #include <linux/init.h>
  52. #include <linux/timer.h>
  53. #include <linux/list.h>
  54. #include <linux/interrupt.h>
  55. #include <linux/moduleparam.h>
  56. #include <linux/device.h>
  57. #include <linux/usb/ch9.h>
  58. #include <linux/usb/gadget.h>
  59. #include <linux/prefetch.h>
  60. #include <linux/io.h>
  61. #include <asm/byteorder.h>
  62. #include <asm/irq.h>
  63. #include <asm/unaligned.h>
  64. #define DRIVER_DESC "PLX NET228x/USB338x USB Peripheral Controller"
  65. #define DRIVER_VERSION "2005 Sept 27/v3.0"
  66. #define EP_DONTUSE 13 /* nonzero */
  67. #define USE_RDK_LEDS /* GPIO pins control three LEDs */
  68. static const char driver_name[] = "net2280";
  69. static const char driver_desc[] = DRIVER_DESC;
  70. static const u32 ep_bit[9] = { 0, 17, 2, 19, 4, 1, 18, 3, 20 };
  71. static const char ep0name[] = "ep0";
  72. static const char *const ep_name[] = {
  73. ep0name,
  74. "ep-a", "ep-b", "ep-c", "ep-d",
  75. "ep-e", "ep-f", "ep-g", "ep-h",
  76. };
  77. /* use_dma -- general goodness, fewer interrupts, less cpu load (vs PIO)
  78. * use_dma_chaining -- dma descriptor queueing gives even more irq reduction
  79. *
  80. * The net2280 DMA engines are not tightly integrated with their FIFOs;
  81. * not all cases are (yet) handled well in this driver or the silicon.
  82. * Some gadget drivers work better with the dma support here than others.
  83. * These two parameters let you use PIO or more aggressive DMA.
  84. */
  85. static bool use_dma = true;
  86. static bool use_dma_chaining;
  87. static bool use_msi = true;
  88. /* "modprobe net2280 use_dma=n" etc */
  89. module_param(use_dma, bool, 0444);
  90. module_param(use_dma_chaining, bool, 0444);
  91. module_param(use_msi, bool, 0444);
  92. /* mode 0 == ep-{a,b,c,d} 1K fifo each
  93. * mode 1 == ep-{a,b} 2K fifo each, ep-{c,d} unavailable
  94. * mode 2 == ep-a 2K fifo, ep-{b,c} 1K each, ep-d unavailable
  95. */
  96. static ushort fifo_mode;
  97. /* "modprobe net2280 fifo_mode=1" etc */
  98. module_param(fifo_mode, ushort, 0644);
  99. /* enable_suspend -- When enabled, the driver will respond to
  100. * USB suspend requests by powering down the NET2280. Otherwise,
  101. * USB suspend requests will be ignored. This is acceptable for
  102. * self-powered devices
  103. */
  104. static bool enable_suspend;
  105. /* "modprobe net2280 enable_suspend=1" etc */
  106. module_param(enable_suspend, bool, 0444);
  107. /* force full-speed operation */
  108. static bool full_speed;
  109. module_param(full_speed, bool, 0444);
  110. MODULE_PARM_DESC(full_speed, "force full-speed mode -- for testing only!");
  111. #define DIR_STRING(bAddress) (((bAddress) & USB_DIR_IN) ? "in" : "out")
  112. static char *type_string(u8 bmAttributes)
  113. {
  114. switch ((bmAttributes) & USB_ENDPOINT_XFERTYPE_MASK) {
  115. case USB_ENDPOINT_XFER_BULK: return "bulk";
  116. case USB_ENDPOINT_XFER_ISOC: return "iso";
  117. case USB_ENDPOINT_XFER_INT: return "intr";
  118. }
  119. return "control";
  120. }
  121. #include "net2280.h"
  122. #define valid_bit cpu_to_le32(BIT(VALID_BIT))
  123. #define dma_done_ie cpu_to_le32(BIT(DMA_DONE_INTERRUPT_ENABLE))
  124. /*-------------------------------------------------------------------------*/
  125. static inline void enable_pciirqenb(struct net2280_ep *ep)
  126. {
  127. u32 tmp = readl(&ep->dev->regs->pciirqenb0);
  128. if (ep->dev->quirks & PLX_LEGACY)
  129. tmp |= BIT(ep->num);
  130. else
  131. tmp |= BIT(ep_bit[ep->num]);
  132. writel(tmp, &ep->dev->regs->pciirqenb0);
  133. return;
  134. }
  135. static int
  136. net2280_enable(struct usb_ep *_ep, const struct usb_endpoint_descriptor *desc)
  137. {
  138. struct net2280 *dev;
  139. struct net2280_ep *ep;
  140. u32 max, tmp;
  141. unsigned long flags;
  142. static const u32 ep_key[9] = { 1, 0, 1, 0, 1, 1, 0, 1, 0 };
  143. ep = container_of(_ep, struct net2280_ep, ep);
  144. if (!_ep || !desc || ep->desc || _ep->name == ep0name ||
  145. desc->bDescriptorType != USB_DT_ENDPOINT)
  146. return -EINVAL;
  147. dev = ep->dev;
  148. if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)
  149. return -ESHUTDOWN;
  150. /* erratum 0119 workaround ties up an endpoint number */
  151. if ((desc->bEndpointAddress & 0x0f) == EP_DONTUSE)
  152. return -EDOM;
  153. if (dev->quirks & PLX_SUPERSPEED) {
  154. if ((desc->bEndpointAddress & 0x0f) >= 0x0c)
  155. return -EDOM;
  156. ep->is_in = !!usb_endpoint_dir_in(desc);
  157. if (dev->enhanced_mode && ep->is_in && ep_key[ep->num])
  158. return -EINVAL;
  159. }
  160. /* sanity check ep-e/ep-f since their fifos are small */
  161. max = usb_endpoint_maxp(desc) & 0x1fff;
  162. if (ep->num > 4 && max > 64 && (dev->quirks & PLX_LEGACY))
  163. return -ERANGE;
  164. spin_lock_irqsave(&dev->lock, flags);
  165. _ep->maxpacket = max & 0x7ff;
  166. ep->desc = desc;
  167. /* ep_reset() has already been called */
  168. ep->stopped = 0;
  169. ep->wedged = 0;
  170. ep->out_overflow = 0;
  171. /* set speed-dependent max packet; may kick in high bandwidth */
  172. set_max_speed(ep, max);
  173. /* FIFO lines can't go to different packets. PIO is ok, so
  174. * use it instead of troublesome (non-bulk) multi-packet DMA.
  175. */
  176. if (ep->dma && (max % 4) != 0 && use_dma_chaining) {
  177. ep_dbg(ep->dev, "%s, no dma for maxpacket %d\n",
  178. ep->ep.name, ep->ep.maxpacket);
  179. ep->dma = NULL;
  180. }
  181. /* set type, direction, address; reset fifo counters */
  182. writel(BIT(FIFO_FLUSH), &ep->regs->ep_stat);
  183. tmp = (desc->bmAttributes & USB_ENDPOINT_XFERTYPE_MASK);
  184. if (tmp == USB_ENDPOINT_XFER_INT) {
  185. /* erratum 0105 workaround prevents hs NYET */
  186. if (dev->chiprev == 0100 &&
  187. dev->gadget.speed == USB_SPEED_HIGH &&
  188. !(desc->bEndpointAddress & USB_DIR_IN))
  189. writel(BIT(CLEAR_NAK_OUT_PACKETS_MODE),
  190. &ep->regs->ep_rsp);
  191. } else if (tmp == USB_ENDPOINT_XFER_BULK) {
  192. /* catch some particularly blatant driver bugs */
  193. if ((dev->gadget.speed == USB_SPEED_SUPER && max != 1024) ||
  194. (dev->gadget.speed == USB_SPEED_HIGH && max != 512) ||
  195. (dev->gadget.speed == USB_SPEED_FULL && max > 64)) {
  196. spin_unlock_irqrestore(&dev->lock, flags);
  197. return -ERANGE;
  198. }
  199. }
  200. ep->is_iso = (tmp == USB_ENDPOINT_XFER_ISOC);
  201. /* Enable this endpoint */
  202. if (dev->quirks & PLX_LEGACY) {
  203. tmp <<= ENDPOINT_TYPE;
  204. tmp |= desc->bEndpointAddress;
  205. /* default full fifo lines */
  206. tmp |= (4 << ENDPOINT_BYTE_COUNT);
  207. tmp |= BIT(ENDPOINT_ENABLE);
  208. ep->is_in = (tmp & USB_DIR_IN) != 0;
  209. } else {
  210. /* In Legacy mode, only OUT endpoints are used */
  211. if (dev->enhanced_mode && ep->is_in) {
  212. tmp <<= IN_ENDPOINT_TYPE;
  213. tmp |= BIT(IN_ENDPOINT_ENABLE);
  214. /* Not applicable to Legacy */
  215. tmp |= BIT(ENDPOINT_DIRECTION);
  216. } else {
  217. tmp <<= OUT_ENDPOINT_TYPE;
  218. tmp |= BIT(OUT_ENDPOINT_ENABLE);
  219. tmp |= (ep->is_in << ENDPOINT_DIRECTION);
  220. }
  221. tmp |= usb_endpoint_num(desc);
  222. tmp |= (ep->ep.maxburst << MAX_BURST_SIZE);
  223. }
  224. /* Make sure all the registers are written before ep_rsp*/
  225. wmb();
  226. /* for OUT transfers, block the rx fifo until a read is posted */
  227. if (!ep->is_in)
  228. writel(BIT(SET_NAK_OUT_PACKETS), &ep->regs->ep_rsp);
  229. else if (!(dev->quirks & PLX_2280)) {
  230. /* Added for 2282, Don't use nak packets on an in endpoint,
  231. * this was ignored on 2280
  232. */
  233. writel(BIT(CLEAR_NAK_OUT_PACKETS) |
  234. BIT(CLEAR_NAK_OUT_PACKETS_MODE), &ep->regs->ep_rsp);
  235. }
  236. writel(tmp, &ep->cfg->ep_cfg);
  237. /* enable irqs */
  238. if (!ep->dma) { /* pio, per-packet */
  239. enable_pciirqenb(ep);
  240. tmp = BIT(DATA_PACKET_RECEIVED_INTERRUPT_ENABLE) |
  241. BIT(DATA_PACKET_TRANSMITTED_INTERRUPT_ENABLE);
  242. if (dev->quirks & PLX_2280)
  243. tmp |= readl(&ep->regs->ep_irqenb);
  244. writel(tmp, &ep->regs->ep_irqenb);
  245. } else { /* dma, per-request */
  246. tmp = BIT((8 + ep->num)); /* completion */
  247. tmp |= readl(&dev->regs->pciirqenb1);
  248. writel(tmp, &dev->regs->pciirqenb1);
  249. /* for short OUT transfers, dma completions can't
  250. * advance the queue; do it pio-style, by hand.
  251. * NOTE erratum 0112 workaround #2
  252. */
  253. if ((desc->bEndpointAddress & USB_DIR_IN) == 0) {
  254. tmp = BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT_ENABLE);
  255. writel(tmp, &ep->regs->ep_irqenb);
  256. enable_pciirqenb(ep);
  257. }
  258. }
  259. tmp = desc->bEndpointAddress;
  260. ep_dbg(dev, "enabled %s (ep%d%s-%s) %s max %04x\n",
  261. _ep->name, tmp & 0x0f, DIR_STRING(tmp),
  262. type_string(desc->bmAttributes),
  263. ep->dma ? "dma" : "pio", max);
  264. /* pci writes may still be posted */
  265. spin_unlock_irqrestore(&dev->lock, flags);
  266. return 0;
  267. }
  268. static int handshake(u32 __iomem *ptr, u32 mask, u32 done, int usec)
  269. {
  270. u32 result;
  271. do {
  272. result = readl(ptr);
  273. if (result == ~(u32)0) /* "device unplugged" */
  274. return -ENODEV;
  275. result &= mask;
  276. if (result == done)
  277. return 0;
  278. udelay(1);
  279. usec--;
  280. } while (usec > 0);
  281. return -ETIMEDOUT;
  282. }
  283. static const struct usb_ep_ops net2280_ep_ops;
  284. static void ep_reset_228x(struct net2280_regs __iomem *regs,
  285. struct net2280_ep *ep)
  286. {
  287. u32 tmp;
  288. ep->desc = NULL;
  289. INIT_LIST_HEAD(&ep->queue);
  290. usb_ep_set_maxpacket_limit(&ep->ep, ~0);
  291. ep->ep.ops = &net2280_ep_ops;
  292. /* disable the dma, irqs, endpoint... */
  293. if (ep->dma) {
  294. writel(0, &ep->dma->dmactl);
  295. writel(BIT(DMA_SCATTER_GATHER_DONE_INTERRUPT) |
  296. BIT(DMA_TRANSACTION_DONE_INTERRUPT) |
  297. BIT(DMA_ABORT),
  298. &ep->dma->dmastat);
  299. tmp = readl(&regs->pciirqenb0);
  300. tmp &= ~BIT(ep->num);
  301. writel(tmp, &regs->pciirqenb0);
  302. } else {
  303. tmp = readl(&regs->pciirqenb1);
  304. tmp &= ~BIT((8 + ep->num)); /* completion */
  305. writel(tmp, &regs->pciirqenb1);
  306. }
  307. writel(0, &ep->regs->ep_irqenb);
  308. /* init to our chosen defaults, notably so that we NAK OUT
  309. * packets until the driver queues a read (+note erratum 0112)
  310. */
  311. if (!ep->is_in || (ep->dev->quirks & PLX_2280)) {
  312. tmp = BIT(SET_NAK_OUT_PACKETS_MODE) |
  313. BIT(SET_NAK_OUT_PACKETS) |
  314. BIT(CLEAR_EP_HIDE_STATUS_PHASE) |
  315. BIT(CLEAR_INTERRUPT_MODE);
  316. } else {
  317. /* added for 2282 */
  318. tmp = BIT(CLEAR_NAK_OUT_PACKETS_MODE) |
  319. BIT(CLEAR_NAK_OUT_PACKETS) |
  320. BIT(CLEAR_EP_HIDE_STATUS_PHASE) |
  321. BIT(CLEAR_INTERRUPT_MODE);
  322. }
  323. if (ep->num != 0) {
  324. tmp |= BIT(CLEAR_ENDPOINT_TOGGLE) |
  325. BIT(CLEAR_ENDPOINT_HALT);
  326. }
  327. writel(tmp, &ep->regs->ep_rsp);
  328. /* scrub most status bits, and flush any fifo state */
  329. if (ep->dev->quirks & PLX_2280)
  330. tmp = BIT(FIFO_OVERFLOW) |
  331. BIT(FIFO_UNDERFLOW);
  332. else
  333. tmp = 0;
  334. writel(tmp | BIT(TIMEOUT) |
  335. BIT(USB_STALL_SENT) |
  336. BIT(USB_IN_NAK_SENT) |
  337. BIT(USB_IN_ACK_RCVD) |
  338. BIT(USB_OUT_PING_NAK_SENT) |
  339. BIT(USB_OUT_ACK_SENT) |
  340. BIT(FIFO_FLUSH) |
  341. BIT(SHORT_PACKET_OUT_DONE_INTERRUPT) |
  342. BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT) |
  343. BIT(DATA_PACKET_RECEIVED_INTERRUPT) |
  344. BIT(DATA_PACKET_TRANSMITTED_INTERRUPT) |
  345. BIT(DATA_OUT_PING_TOKEN_INTERRUPT) |
  346. BIT(DATA_IN_TOKEN_INTERRUPT),
  347. &ep->regs->ep_stat);
  348. /* fifo size is handled separately */
  349. }
  350. static void ep_reset_338x(struct net2280_regs __iomem *regs,
  351. struct net2280_ep *ep)
  352. {
  353. u32 tmp, dmastat;
  354. ep->desc = NULL;
  355. INIT_LIST_HEAD(&ep->queue);
  356. usb_ep_set_maxpacket_limit(&ep->ep, ~0);
  357. ep->ep.ops = &net2280_ep_ops;
  358. /* disable the dma, irqs, endpoint... */
  359. if (ep->dma) {
  360. writel(0, &ep->dma->dmactl);
  361. writel(BIT(DMA_ABORT_DONE_INTERRUPT) |
  362. BIT(DMA_PAUSE_DONE_INTERRUPT) |
  363. BIT(DMA_SCATTER_GATHER_DONE_INTERRUPT) |
  364. BIT(DMA_TRANSACTION_DONE_INTERRUPT),
  365. /* | BIT(DMA_ABORT), */
  366. &ep->dma->dmastat);
  367. dmastat = readl(&ep->dma->dmastat);
  368. if (dmastat == 0x5002) {
  369. ep_warn(ep->dev, "The dmastat return = %x!!\n",
  370. dmastat);
  371. writel(0x5a, &ep->dma->dmastat);
  372. }
  373. tmp = readl(&regs->pciirqenb0);
  374. tmp &= ~BIT(ep_bit[ep->num]);
  375. writel(tmp, &regs->pciirqenb0);
  376. } else {
  377. if (ep->num < 5) {
  378. tmp = readl(&regs->pciirqenb1);
  379. tmp &= ~BIT((8 + ep->num)); /* completion */
  380. writel(tmp, &regs->pciirqenb1);
  381. }
  382. }
  383. writel(0, &ep->regs->ep_irqenb);
  384. writel(BIT(SHORT_PACKET_OUT_DONE_INTERRUPT) |
  385. BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT) |
  386. BIT(FIFO_OVERFLOW) |
  387. BIT(DATA_PACKET_RECEIVED_INTERRUPT) |
  388. BIT(DATA_PACKET_TRANSMITTED_INTERRUPT) |
  389. BIT(DATA_OUT_PING_TOKEN_INTERRUPT) |
  390. BIT(DATA_IN_TOKEN_INTERRUPT), &ep->regs->ep_stat);
  391. }
  392. static void nuke(struct net2280_ep *);
  393. static int net2280_disable(struct usb_ep *_ep)
  394. {
  395. struct net2280_ep *ep;
  396. unsigned long flags;
  397. ep = container_of(_ep, struct net2280_ep, ep);
  398. if (!_ep || !ep->desc || _ep->name == ep0name)
  399. return -EINVAL;
  400. spin_lock_irqsave(&ep->dev->lock, flags);
  401. nuke(ep);
  402. if (ep->dev->quirks & PLX_SUPERSPEED)
  403. ep_reset_338x(ep->dev->regs, ep);
  404. else
  405. ep_reset_228x(ep->dev->regs, ep);
  406. ep_vdbg(ep->dev, "disabled %s %s\n",
  407. ep->dma ? "dma" : "pio", _ep->name);
  408. /* synch memory views with the device */
  409. (void)readl(&ep->cfg->ep_cfg);
  410. if (use_dma && !ep->dma && ep->num >= 1 && ep->num <= 4)
  411. ep->dma = &ep->dev->dma[ep->num - 1];
  412. spin_unlock_irqrestore(&ep->dev->lock, flags);
  413. return 0;
  414. }
  415. /*-------------------------------------------------------------------------*/
  416. static struct usb_request
  417. *net2280_alloc_request(struct usb_ep *_ep, gfp_t gfp_flags)
  418. {
  419. struct net2280_ep *ep;
  420. struct net2280_request *req;
  421. if (!_ep)
  422. return NULL;
  423. ep = container_of(_ep, struct net2280_ep, ep);
  424. req = kzalloc(sizeof(*req), gfp_flags);
  425. if (!req)
  426. return NULL;
  427. INIT_LIST_HEAD(&req->queue);
  428. /* this dma descriptor may be swapped with the previous dummy */
  429. if (ep->dma) {
  430. struct net2280_dma *td;
  431. td = pci_pool_alloc(ep->dev->requests, gfp_flags,
  432. &req->td_dma);
  433. if (!td) {
  434. kfree(req);
  435. return NULL;
  436. }
  437. td->dmacount = 0; /* not VALID */
  438. td->dmadesc = td->dmaaddr;
  439. req->td = td;
  440. }
  441. return &req->req;
  442. }
  443. static void net2280_free_request(struct usb_ep *_ep, struct usb_request *_req)
  444. {
  445. struct net2280_ep *ep;
  446. struct net2280_request *req;
  447. ep = container_of(_ep, struct net2280_ep, ep);
  448. if (!_ep || !_req)
  449. return;
  450. req = container_of(_req, struct net2280_request, req);
  451. WARN_ON(!list_empty(&req->queue));
  452. if (req->td)
  453. pci_pool_free(ep->dev->requests, req->td, req->td_dma);
  454. kfree(req);
  455. }
  456. /*-------------------------------------------------------------------------*/
  457. /* load a packet into the fifo we use for usb IN transfers.
  458. * works for all endpoints.
  459. *
  460. * NOTE: pio with ep-a..ep-d could stuff multiple packets into the fifo
  461. * at a time, but this code is simpler because it knows it only writes
  462. * one packet. ep-a..ep-d should use dma instead.
  463. */
  464. static void write_fifo(struct net2280_ep *ep, struct usb_request *req)
  465. {
  466. struct net2280_ep_regs __iomem *regs = ep->regs;
  467. u8 *buf;
  468. u32 tmp;
  469. unsigned count, total;
  470. /* INVARIANT: fifo is currently empty. (testable) */
  471. if (req) {
  472. buf = req->buf + req->actual;
  473. prefetch(buf);
  474. total = req->length - req->actual;
  475. } else {
  476. total = 0;
  477. buf = NULL;
  478. }
  479. /* write just one packet at a time */
  480. count = ep->ep.maxpacket;
  481. if (count > total) /* min() cannot be used on a bitfield */
  482. count = total;
  483. ep_vdbg(ep->dev, "write %s fifo (IN) %d bytes%s req %p\n",
  484. ep->ep.name, count,
  485. (count != ep->ep.maxpacket) ? " (short)" : "",
  486. req);
  487. while (count >= 4) {
  488. /* NOTE be careful if you try to align these. fifo lines
  489. * should normally be full (4 bytes) and successive partial
  490. * lines are ok only in certain cases.
  491. */
  492. tmp = get_unaligned((u32 *)buf);
  493. cpu_to_le32s(&tmp);
  494. writel(tmp, &regs->ep_data);
  495. buf += 4;
  496. count -= 4;
  497. }
  498. /* last fifo entry is "short" unless we wrote a full packet.
  499. * also explicitly validate last word in (periodic) transfers
  500. * when maxpacket is not a multiple of 4 bytes.
  501. */
  502. if (count || total < ep->ep.maxpacket) {
  503. tmp = count ? get_unaligned((u32 *)buf) : count;
  504. cpu_to_le32s(&tmp);
  505. set_fifo_bytecount(ep, count & 0x03);
  506. writel(tmp, &regs->ep_data);
  507. }
  508. /* pci writes may still be posted */
  509. }
  510. /* work around erratum 0106: PCI and USB race over the OUT fifo.
  511. * caller guarantees chiprev 0100, out endpoint is NAKing, and
  512. * there's no real data in the fifo.
  513. *
  514. * NOTE: also used in cases where that erratum doesn't apply:
  515. * where the host wrote "too much" data to us.
  516. */
  517. static void out_flush(struct net2280_ep *ep)
  518. {
  519. u32 __iomem *statp;
  520. u32 tmp;
  521. ASSERT_OUT_NAKING(ep);
  522. statp = &ep->regs->ep_stat;
  523. writel(BIT(DATA_OUT_PING_TOKEN_INTERRUPT) |
  524. BIT(DATA_PACKET_RECEIVED_INTERRUPT),
  525. statp);
  526. writel(BIT(FIFO_FLUSH), statp);
  527. /* Make sure that stap is written */
  528. mb();
  529. tmp = readl(statp);
  530. if (tmp & BIT(DATA_OUT_PING_TOKEN_INTERRUPT) &&
  531. /* high speed did bulk NYET; fifo isn't filling */
  532. ep->dev->gadget.speed == USB_SPEED_FULL) {
  533. unsigned usec;
  534. usec = 50; /* 64 byte bulk/interrupt */
  535. handshake(statp, BIT(USB_OUT_PING_NAK_SENT),
  536. BIT(USB_OUT_PING_NAK_SENT), usec);
  537. /* NAK done; now CLEAR_NAK_OUT_PACKETS is safe */
  538. }
  539. }
  540. /* unload packet(s) from the fifo we use for usb OUT transfers.
  541. * returns true iff the request completed, because of short packet
  542. * or the request buffer having filled with full packets.
  543. *
  544. * for ep-a..ep-d this will read multiple packets out when they
  545. * have been accepted.
  546. */
  547. static int read_fifo(struct net2280_ep *ep, struct net2280_request *req)
  548. {
  549. struct net2280_ep_regs __iomem *regs = ep->regs;
  550. u8 *buf = req->req.buf + req->req.actual;
  551. unsigned count, tmp, is_short;
  552. unsigned cleanup = 0, prevent = 0;
  553. /* erratum 0106 ... packets coming in during fifo reads might
  554. * be incompletely rejected. not all cases have workarounds.
  555. */
  556. if (ep->dev->chiprev == 0x0100 &&
  557. ep->dev->gadget.speed == USB_SPEED_FULL) {
  558. udelay(1);
  559. tmp = readl(&ep->regs->ep_stat);
  560. if ((tmp & BIT(NAK_OUT_PACKETS)))
  561. cleanup = 1;
  562. else if ((tmp & BIT(FIFO_FULL))) {
  563. start_out_naking(ep);
  564. prevent = 1;
  565. }
  566. /* else: hope we don't see the problem */
  567. }
  568. /* never overflow the rx buffer. the fifo reads packets until
  569. * it sees a short one; we might not be ready for them all.
  570. */
  571. prefetchw(buf);
  572. count = readl(&regs->ep_avail);
  573. if (unlikely(count == 0)) {
  574. udelay(1);
  575. tmp = readl(&ep->regs->ep_stat);
  576. count = readl(&regs->ep_avail);
  577. /* handled that data already? */
  578. if (count == 0 && (tmp & BIT(NAK_OUT_PACKETS)) == 0)
  579. return 0;
  580. }
  581. tmp = req->req.length - req->req.actual;
  582. if (count > tmp) {
  583. /* as with DMA, data overflow gets flushed */
  584. if ((tmp % ep->ep.maxpacket) != 0) {
  585. ep_err(ep->dev,
  586. "%s out fifo %d bytes, expected %d\n",
  587. ep->ep.name, count, tmp);
  588. req->req.status = -EOVERFLOW;
  589. cleanup = 1;
  590. /* NAK_OUT_PACKETS will be set, so flushing is safe;
  591. * the next read will start with the next packet
  592. */
  593. } /* else it's a ZLP, no worries */
  594. count = tmp;
  595. }
  596. req->req.actual += count;
  597. is_short = (count == 0) || ((count % ep->ep.maxpacket) != 0);
  598. ep_vdbg(ep->dev, "read %s fifo (OUT) %d bytes%s%s%s req %p %d/%d\n",
  599. ep->ep.name, count, is_short ? " (short)" : "",
  600. cleanup ? " flush" : "", prevent ? " nak" : "",
  601. req, req->req.actual, req->req.length);
  602. while (count >= 4) {
  603. tmp = readl(&regs->ep_data);
  604. cpu_to_le32s(&tmp);
  605. put_unaligned(tmp, (u32 *)buf);
  606. buf += 4;
  607. count -= 4;
  608. }
  609. if (count) {
  610. tmp = readl(&regs->ep_data);
  611. /* LE conversion is implicit here: */
  612. do {
  613. *buf++ = (u8) tmp;
  614. tmp >>= 8;
  615. } while (--count);
  616. }
  617. if (cleanup)
  618. out_flush(ep);
  619. if (prevent) {
  620. writel(BIT(CLEAR_NAK_OUT_PACKETS), &ep->regs->ep_rsp);
  621. (void) readl(&ep->regs->ep_rsp);
  622. }
  623. return is_short || ((req->req.actual == req->req.length) &&
  624. !req->req.zero);
  625. }
  626. /* fill out dma descriptor to match a given request */
  627. static void fill_dma_desc(struct net2280_ep *ep,
  628. struct net2280_request *req, int valid)
  629. {
  630. struct net2280_dma *td = req->td;
  631. u32 dmacount = req->req.length;
  632. /* don't let DMA continue after a short OUT packet,
  633. * so overruns can't affect the next transfer.
  634. * in case of overruns on max-size packets, we can't
  635. * stop the fifo from filling but we can flush it.
  636. */
  637. if (ep->is_in)
  638. dmacount |= BIT(DMA_DIRECTION);
  639. if ((!ep->is_in && (dmacount % ep->ep.maxpacket) != 0) ||
  640. !(ep->dev->quirks & PLX_2280))
  641. dmacount |= BIT(END_OF_CHAIN);
  642. req->valid = valid;
  643. if (valid)
  644. dmacount |= BIT(VALID_BIT);
  645. if (likely(!req->req.no_interrupt || !use_dma_chaining))
  646. dmacount |= BIT(DMA_DONE_INTERRUPT_ENABLE);
  647. /* td->dmadesc = previously set by caller */
  648. td->dmaaddr = cpu_to_le32 (req->req.dma);
  649. /* 2280 may be polling VALID_BIT through ep->dma->dmadesc */
  650. wmb();
  651. td->dmacount = cpu_to_le32(dmacount);
  652. }
  653. static const u32 dmactl_default =
  654. BIT(DMA_SCATTER_GATHER_DONE_INTERRUPT) |
  655. BIT(DMA_CLEAR_COUNT_ENABLE) |
  656. /* erratum 0116 workaround part 1 (use POLLING) */
  657. (POLL_100_USEC << DESCRIPTOR_POLLING_RATE) |
  658. BIT(DMA_VALID_BIT_POLLING_ENABLE) |
  659. BIT(DMA_VALID_BIT_ENABLE) |
  660. BIT(DMA_SCATTER_GATHER_ENABLE) |
  661. /* erratum 0116 workaround part 2 (no AUTOSTART) */
  662. BIT(DMA_ENABLE);
  663. static inline void spin_stop_dma(struct net2280_dma_regs __iomem *dma)
  664. {
  665. handshake(&dma->dmactl, BIT(DMA_ENABLE), 0, 50);
  666. }
  667. static inline void stop_dma(struct net2280_dma_regs __iomem *dma)
  668. {
  669. writel(readl(&dma->dmactl) & ~BIT(DMA_ENABLE), &dma->dmactl);
  670. spin_stop_dma(dma);
  671. }
  672. static void start_queue(struct net2280_ep *ep, u32 dmactl, u32 td_dma)
  673. {
  674. struct net2280_dma_regs __iomem *dma = ep->dma;
  675. unsigned int tmp = BIT(VALID_BIT) | (ep->is_in << DMA_DIRECTION);
  676. if (!(ep->dev->quirks & PLX_2280))
  677. tmp |= BIT(END_OF_CHAIN);
  678. writel(tmp, &dma->dmacount);
  679. writel(readl(&dma->dmastat), &dma->dmastat);
  680. writel(td_dma, &dma->dmadesc);
  681. if (ep->dev->quirks & PLX_SUPERSPEED)
  682. dmactl |= BIT(DMA_REQUEST_OUTSTANDING);
  683. writel(dmactl, &dma->dmactl);
  684. /* erratum 0116 workaround part 3: pci arbiter away from net2280 */
  685. (void) readl(&ep->dev->pci->pcimstctl);
  686. writel(BIT(DMA_START), &dma->dmastat);
  687. if (!ep->is_in)
  688. stop_out_naking(ep);
  689. }
  690. static void start_dma(struct net2280_ep *ep, struct net2280_request *req)
  691. {
  692. u32 tmp;
  693. struct net2280_dma_regs __iomem *dma = ep->dma;
  694. /* FIXME can't use DMA for ZLPs */
  695. /* on this path we "know" there's no dma active (yet) */
  696. WARN_ON(readl(&dma->dmactl) & BIT(DMA_ENABLE));
  697. writel(0, &ep->dma->dmactl);
  698. /* previous OUT packet might have been short */
  699. if (!ep->is_in && (readl(&ep->regs->ep_stat) &
  700. BIT(NAK_OUT_PACKETS))) {
  701. writel(BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT),
  702. &ep->regs->ep_stat);
  703. tmp = readl(&ep->regs->ep_avail);
  704. if (tmp) {
  705. writel(readl(&dma->dmastat), &dma->dmastat);
  706. /* transfer all/some fifo data */
  707. writel(req->req.dma, &dma->dmaaddr);
  708. tmp = min(tmp, req->req.length);
  709. /* dma irq, faking scatterlist status */
  710. req->td->dmacount = cpu_to_le32(req->req.length - tmp);
  711. writel(BIT(DMA_DONE_INTERRUPT_ENABLE) | tmp,
  712. &dma->dmacount);
  713. req->td->dmadesc = 0;
  714. req->valid = 1;
  715. writel(BIT(DMA_ENABLE), &dma->dmactl);
  716. writel(BIT(DMA_START), &dma->dmastat);
  717. return;
  718. }
  719. }
  720. tmp = dmactl_default;
  721. /* force packet boundaries between dma requests, but prevent the
  722. * controller from automagically writing a last "short" packet
  723. * (zero length) unless the driver explicitly said to do that.
  724. */
  725. if (ep->is_in) {
  726. if (likely((req->req.length % ep->ep.maxpacket) ||
  727. req->req.zero)){
  728. tmp |= BIT(DMA_FIFO_VALIDATE);
  729. ep->in_fifo_validate = 1;
  730. } else
  731. ep->in_fifo_validate = 0;
  732. }
  733. /* init req->td, pointing to the current dummy */
  734. req->td->dmadesc = cpu_to_le32 (ep->td_dma);
  735. fill_dma_desc(ep, req, 1);
  736. if (!use_dma_chaining)
  737. req->td->dmacount |= cpu_to_le32(BIT(END_OF_CHAIN));
  738. start_queue(ep, tmp, req->td_dma);
  739. }
  740. static inline void resume_dma(struct net2280_ep *ep)
  741. {
  742. writel(readl(&ep->dma->dmactl) | BIT(DMA_ENABLE), &ep->dma->dmactl);
  743. ep->dma_started = true;
  744. }
  745. static inline void ep_stop_dma(struct net2280_ep *ep)
  746. {
  747. writel(readl(&ep->dma->dmactl) & ~BIT(DMA_ENABLE), &ep->dma->dmactl);
  748. spin_stop_dma(ep->dma);
  749. ep->dma_started = false;
  750. }
  751. static inline void
  752. queue_dma(struct net2280_ep *ep, struct net2280_request *req, int valid)
  753. {
  754. struct net2280_dma *end;
  755. dma_addr_t tmp;
  756. /* swap new dummy for old, link; fill and maybe activate */
  757. end = ep->dummy;
  758. ep->dummy = req->td;
  759. req->td = end;
  760. tmp = ep->td_dma;
  761. ep->td_dma = req->td_dma;
  762. req->td_dma = tmp;
  763. end->dmadesc = cpu_to_le32 (ep->td_dma);
  764. fill_dma_desc(ep, req, valid);
  765. }
  766. static void
  767. done(struct net2280_ep *ep, struct net2280_request *req, int status)
  768. {
  769. struct net2280 *dev;
  770. unsigned stopped = ep->stopped;
  771. list_del_init(&req->queue);
  772. if (req->req.status == -EINPROGRESS)
  773. req->req.status = status;
  774. else
  775. status = req->req.status;
  776. dev = ep->dev;
  777. if (ep->dma)
  778. usb_gadget_unmap_request(&dev->gadget, &req->req, ep->is_in);
  779. if (status && status != -ESHUTDOWN)
  780. ep_vdbg(dev, "complete %s req %p stat %d len %u/%u\n",
  781. ep->ep.name, &req->req, status,
  782. req->req.actual, req->req.length);
  783. /* don't modify queue heads during completion callback */
  784. ep->stopped = 1;
  785. spin_unlock(&dev->lock);
  786. usb_gadget_giveback_request(&ep->ep, &req->req);
  787. spin_lock(&dev->lock);
  788. ep->stopped = stopped;
  789. }
  790. /*-------------------------------------------------------------------------*/
  791. static int
  792. net2280_queue(struct usb_ep *_ep, struct usb_request *_req, gfp_t gfp_flags)
  793. {
  794. struct net2280_request *req;
  795. struct net2280_ep *ep;
  796. struct net2280 *dev;
  797. unsigned long flags;
  798. /* we always require a cpu-view buffer, so that we can
  799. * always use pio (as fallback or whatever).
  800. */
  801. req = container_of(_req, struct net2280_request, req);
  802. if (!_req || !_req->complete || !_req->buf ||
  803. !list_empty(&req->queue))
  804. return -EINVAL;
  805. if (_req->length > (~0 & DMA_BYTE_COUNT_MASK))
  806. return -EDOM;
  807. ep = container_of(_ep, struct net2280_ep, ep);
  808. if (!_ep || (!ep->desc && ep->num != 0))
  809. return -EINVAL;
  810. dev = ep->dev;
  811. if (!dev->driver || dev->gadget.speed == USB_SPEED_UNKNOWN)
  812. return -ESHUTDOWN;
  813. /* FIXME implement PIO fallback for ZLPs with DMA */
  814. if (ep->dma && _req->length == 0)
  815. return -EOPNOTSUPP;
  816. /* set up dma mapping in case the caller didn't */
  817. if (ep->dma) {
  818. int ret;
  819. ret = usb_gadget_map_request(&dev->gadget, _req,
  820. ep->is_in);
  821. if (ret)
  822. return ret;
  823. }
  824. #if 0
  825. ep_vdbg(dev, "%s queue req %p, len %d buf %p\n",
  826. _ep->name, _req, _req->length, _req->buf);
  827. #endif
  828. spin_lock_irqsave(&dev->lock, flags);
  829. _req->status = -EINPROGRESS;
  830. _req->actual = 0;
  831. /* kickstart this i/o queue? */
  832. if (list_empty(&ep->queue) && !ep->stopped) {
  833. /* DMA request while EP halted */
  834. if (ep->dma &&
  835. (readl(&ep->regs->ep_rsp) & BIT(CLEAR_ENDPOINT_HALT)) &&
  836. (dev->quirks & PLX_SUPERSPEED)) {
  837. int valid = 1;
  838. if (ep->is_in) {
  839. int expect;
  840. expect = likely(req->req.zero ||
  841. ((req->req.length %
  842. ep->ep.maxpacket) != 0));
  843. if (expect != ep->in_fifo_validate)
  844. valid = 0;
  845. }
  846. queue_dma(ep, req, valid);
  847. }
  848. /* use DMA if the endpoint supports it, else pio */
  849. else if (ep->dma)
  850. start_dma(ep, req);
  851. else {
  852. /* maybe there's no control data, just status ack */
  853. if (ep->num == 0 && _req->length == 0) {
  854. allow_status(ep);
  855. done(ep, req, 0);
  856. ep_vdbg(dev, "%s status ack\n", ep->ep.name);
  857. goto done;
  858. }
  859. /* PIO ... stuff the fifo, or unblock it. */
  860. if (ep->is_in)
  861. write_fifo(ep, _req);
  862. else if (list_empty(&ep->queue)) {
  863. u32 s;
  864. /* OUT FIFO might have packet(s) buffered */
  865. s = readl(&ep->regs->ep_stat);
  866. if ((s & BIT(FIFO_EMPTY)) == 0) {
  867. /* note: _req->short_not_ok is
  868. * ignored here since PIO _always_
  869. * stops queue advance here, and
  870. * _req->status doesn't change for
  871. * short reads (only _req->actual)
  872. */
  873. if (read_fifo(ep, req) &&
  874. ep->num == 0) {
  875. done(ep, req, 0);
  876. allow_status(ep);
  877. /* don't queue it */
  878. req = NULL;
  879. } else if (read_fifo(ep, req) &&
  880. ep->num != 0) {
  881. done(ep, req, 0);
  882. req = NULL;
  883. } else
  884. s = readl(&ep->regs->ep_stat);
  885. }
  886. /* don't NAK, let the fifo fill */
  887. if (req && (s & BIT(NAK_OUT_PACKETS)))
  888. writel(BIT(CLEAR_NAK_OUT_PACKETS),
  889. &ep->regs->ep_rsp);
  890. }
  891. }
  892. } else if (ep->dma) {
  893. int valid = 1;
  894. if (ep->is_in) {
  895. int expect;
  896. /* preventing magic zlps is per-engine state, not
  897. * per-transfer; irq logic must recover hiccups.
  898. */
  899. expect = likely(req->req.zero ||
  900. (req->req.length % ep->ep.maxpacket));
  901. if (expect != ep->in_fifo_validate)
  902. valid = 0;
  903. }
  904. queue_dma(ep, req, valid);
  905. } /* else the irq handler advances the queue. */
  906. ep->responded = 1;
  907. if (req)
  908. list_add_tail(&req->queue, &ep->queue);
  909. done:
  910. spin_unlock_irqrestore(&dev->lock, flags);
  911. /* pci writes may still be posted */
  912. return 0;
  913. }
  914. static inline void
  915. dma_done(struct net2280_ep *ep, struct net2280_request *req, u32 dmacount,
  916. int status)
  917. {
  918. req->req.actual = req->req.length - (DMA_BYTE_COUNT_MASK & dmacount);
  919. done(ep, req, status);
  920. }
  921. static void restart_dma(struct net2280_ep *ep);
  922. static void scan_dma_completions(struct net2280_ep *ep)
  923. {
  924. /* only look at descriptors that were "naturally" retired,
  925. * so fifo and list head state won't matter
  926. */
  927. while (!list_empty(&ep->queue)) {
  928. struct net2280_request *req;
  929. u32 tmp;
  930. req = list_entry(ep->queue.next,
  931. struct net2280_request, queue);
  932. if (!req->valid)
  933. break;
  934. rmb();
  935. tmp = le32_to_cpup(&req->td->dmacount);
  936. if ((tmp & BIT(VALID_BIT)) != 0)
  937. break;
  938. /* SHORT_PACKET_TRANSFERRED_INTERRUPT handles "usb-short"
  939. * cases where DMA must be aborted; this code handles
  940. * all non-abort DMA completions.
  941. */
  942. if (unlikely(req->td->dmadesc == 0)) {
  943. /* paranoia */
  944. tmp = readl(&ep->dma->dmacount);
  945. if (tmp & DMA_BYTE_COUNT_MASK)
  946. break;
  947. /* single transfer mode */
  948. dma_done(ep, req, tmp, 0);
  949. break;
  950. } else if (!ep->is_in &&
  951. (req->req.length % ep->ep.maxpacket) != 0) {
  952. if (ep->dev->quirks & PLX_SUPERSPEED)
  953. return dma_done(ep, req, tmp, 0);
  954. tmp = readl(&ep->regs->ep_stat);
  955. /* AVOID TROUBLE HERE by not issuing short reads from
  956. * your gadget driver. That helps avoids errata 0121,
  957. * 0122, and 0124; not all cases trigger the warning.
  958. */
  959. if ((tmp & BIT(NAK_OUT_PACKETS)) == 0) {
  960. ep_warn(ep->dev, "%s lost packet sync!\n",
  961. ep->ep.name);
  962. req->req.status = -EOVERFLOW;
  963. } else {
  964. tmp = readl(&ep->regs->ep_avail);
  965. if (tmp) {
  966. /* fifo gets flushed later */
  967. ep->out_overflow = 1;
  968. ep_dbg(ep->dev,
  969. "%s dma, discard %d len %d\n",
  970. ep->ep.name, tmp,
  971. req->req.length);
  972. req->req.status = -EOVERFLOW;
  973. }
  974. }
  975. }
  976. dma_done(ep, req, tmp, 0);
  977. }
  978. }
  979. static void restart_dma(struct net2280_ep *ep)
  980. {
  981. struct net2280_request *req;
  982. u32 dmactl = dmactl_default;
  983. if (ep->stopped)
  984. return;
  985. req = list_entry(ep->queue.next, struct net2280_request, queue);
  986. if (!use_dma_chaining) {
  987. start_dma(ep, req);
  988. return;
  989. }
  990. /* the 2280 will be processing the queue unless queue hiccups after
  991. * the previous transfer:
  992. * IN: wanted automagic zlp, head doesn't (or vice versa)
  993. * DMA_FIFO_VALIDATE doesn't init from dma descriptors.
  994. * OUT: was "usb-short", we must restart.
  995. */
  996. if (ep->is_in && !req->valid) {
  997. struct net2280_request *entry, *prev = NULL;
  998. int reqmode, done = 0;
  999. ep_dbg(ep->dev, "%s dma hiccup td %p\n", ep->ep.name, req->td);
  1000. ep->in_fifo_validate = likely(req->req.zero ||
  1001. (req->req.length % ep->ep.maxpacket) != 0);
  1002. if (ep->in_fifo_validate)
  1003. dmactl |= BIT(DMA_FIFO_VALIDATE);
  1004. list_for_each_entry(entry, &ep->queue, queue) {
  1005. __le32 dmacount;
  1006. if (entry == req)
  1007. continue;
  1008. dmacount = entry->td->dmacount;
  1009. if (!done) {
  1010. reqmode = likely(entry->req.zero ||
  1011. (entry->req.length % ep->ep.maxpacket));
  1012. if (reqmode == ep->in_fifo_validate) {
  1013. entry->valid = 1;
  1014. dmacount |= valid_bit;
  1015. entry->td->dmacount = dmacount;
  1016. prev = entry;
  1017. continue;
  1018. } else {
  1019. /* force a hiccup */
  1020. prev->td->dmacount |= dma_done_ie;
  1021. done = 1;
  1022. }
  1023. }
  1024. /* walk the rest of the queue so unlinks behave */
  1025. entry->valid = 0;
  1026. dmacount &= ~valid_bit;
  1027. entry->td->dmacount = dmacount;
  1028. prev = entry;
  1029. }
  1030. }
  1031. writel(0, &ep->dma->dmactl);
  1032. start_queue(ep, dmactl, req->td_dma);
  1033. }
  1034. static void abort_dma_228x(struct net2280_ep *ep)
  1035. {
  1036. /* abort the current transfer */
  1037. if (likely(!list_empty(&ep->queue))) {
  1038. /* FIXME work around errata 0121, 0122, 0124 */
  1039. writel(BIT(DMA_ABORT), &ep->dma->dmastat);
  1040. spin_stop_dma(ep->dma);
  1041. } else
  1042. stop_dma(ep->dma);
  1043. scan_dma_completions(ep);
  1044. }
  1045. static void abort_dma_338x(struct net2280_ep *ep)
  1046. {
  1047. writel(BIT(DMA_ABORT), &ep->dma->dmastat);
  1048. spin_stop_dma(ep->dma);
  1049. }
  1050. static void abort_dma(struct net2280_ep *ep)
  1051. {
  1052. if (ep->dev->quirks & PLX_LEGACY)
  1053. return abort_dma_228x(ep);
  1054. return abort_dma_338x(ep);
  1055. }
  1056. /* dequeue ALL requests */
  1057. static void nuke(struct net2280_ep *ep)
  1058. {
  1059. struct net2280_request *req;
  1060. /* called with spinlock held */
  1061. ep->stopped = 1;
  1062. if (ep->dma)
  1063. abort_dma(ep);
  1064. while (!list_empty(&ep->queue)) {
  1065. req = list_entry(ep->queue.next,
  1066. struct net2280_request,
  1067. queue);
  1068. done(ep, req, -ESHUTDOWN);
  1069. }
  1070. }
  1071. /* dequeue JUST ONE request */
  1072. static int net2280_dequeue(struct usb_ep *_ep, struct usb_request *_req)
  1073. {
  1074. struct net2280_ep *ep;
  1075. struct net2280_request *req;
  1076. unsigned long flags;
  1077. u32 dmactl;
  1078. int stopped;
  1079. ep = container_of(_ep, struct net2280_ep, ep);
  1080. if (!_ep || (!ep->desc && ep->num != 0) || !_req)
  1081. return -EINVAL;
  1082. spin_lock_irqsave(&ep->dev->lock, flags);
  1083. stopped = ep->stopped;
  1084. /* quiesce dma while we patch the queue */
  1085. dmactl = 0;
  1086. ep->stopped = 1;
  1087. if (ep->dma) {
  1088. dmactl = readl(&ep->dma->dmactl);
  1089. /* WARNING erratum 0127 may kick in ... */
  1090. stop_dma(ep->dma);
  1091. scan_dma_completions(ep);
  1092. }
  1093. /* make sure it's still queued on this endpoint */
  1094. list_for_each_entry(req, &ep->queue, queue) {
  1095. if (&req->req == _req)
  1096. break;
  1097. }
  1098. if (&req->req != _req) {
  1099. spin_unlock_irqrestore(&ep->dev->lock, flags);
  1100. return -EINVAL;
  1101. }
  1102. /* queue head may be partially complete. */
  1103. if (ep->queue.next == &req->queue) {
  1104. if (ep->dma) {
  1105. ep_dbg(ep->dev, "unlink (%s) dma\n", _ep->name);
  1106. _req->status = -ECONNRESET;
  1107. abort_dma(ep);
  1108. if (likely(ep->queue.next == &req->queue)) {
  1109. /* NOTE: misreports single-transfer mode*/
  1110. req->td->dmacount = 0; /* invalidate */
  1111. dma_done(ep, req,
  1112. readl(&ep->dma->dmacount),
  1113. -ECONNRESET);
  1114. }
  1115. } else {
  1116. ep_dbg(ep->dev, "unlink (%s) pio\n", _ep->name);
  1117. done(ep, req, -ECONNRESET);
  1118. }
  1119. req = NULL;
  1120. /* patch up hardware chaining data */
  1121. } else if (ep->dma && use_dma_chaining) {
  1122. if (req->queue.prev == ep->queue.next) {
  1123. writel(le32_to_cpu(req->td->dmadesc),
  1124. &ep->dma->dmadesc);
  1125. if (req->td->dmacount & dma_done_ie)
  1126. writel(readl(&ep->dma->dmacount) |
  1127. le32_to_cpu(dma_done_ie),
  1128. &ep->dma->dmacount);
  1129. } else {
  1130. struct net2280_request *prev;
  1131. prev = list_entry(req->queue.prev,
  1132. struct net2280_request, queue);
  1133. prev->td->dmadesc = req->td->dmadesc;
  1134. if (req->td->dmacount & dma_done_ie)
  1135. prev->td->dmacount |= dma_done_ie;
  1136. }
  1137. }
  1138. if (req)
  1139. done(ep, req, -ECONNRESET);
  1140. ep->stopped = stopped;
  1141. if (ep->dma) {
  1142. /* turn off dma on inactive queues */
  1143. if (list_empty(&ep->queue))
  1144. stop_dma(ep->dma);
  1145. else if (!ep->stopped) {
  1146. /* resume current request, or start new one */
  1147. if (req)
  1148. writel(dmactl, &ep->dma->dmactl);
  1149. else
  1150. start_dma(ep, list_entry(ep->queue.next,
  1151. struct net2280_request, queue));
  1152. }
  1153. }
  1154. spin_unlock_irqrestore(&ep->dev->lock, flags);
  1155. return 0;
  1156. }
  1157. /*-------------------------------------------------------------------------*/
  1158. static int net2280_fifo_status(struct usb_ep *_ep);
  1159. static int
  1160. net2280_set_halt_and_wedge(struct usb_ep *_ep, int value, int wedged)
  1161. {
  1162. struct net2280_ep *ep;
  1163. unsigned long flags;
  1164. int retval = 0;
  1165. ep = container_of(_ep, struct net2280_ep, ep);
  1166. if (!_ep || (!ep->desc && ep->num != 0))
  1167. return -EINVAL;
  1168. if (!ep->dev->driver || ep->dev->gadget.speed == USB_SPEED_UNKNOWN)
  1169. return -ESHUTDOWN;
  1170. if (ep->desc /* not ep0 */ && (ep->desc->bmAttributes & 0x03)
  1171. == USB_ENDPOINT_XFER_ISOC)
  1172. return -EINVAL;
  1173. spin_lock_irqsave(&ep->dev->lock, flags);
  1174. if (!list_empty(&ep->queue))
  1175. retval = -EAGAIN;
  1176. else if (ep->is_in && value && net2280_fifo_status(_ep) != 0)
  1177. retval = -EAGAIN;
  1178. else {
  1179. ep_vdbg(ep->dev, "%s %s %s\n", _ep->name,
  1180. value ? "set" : "clear",
  1181. wedged ? "wedge" : "halt");
  1182. /* set/clear, then synch memory views with the device */
  1183. if (value) {
  1184. if (ep->num == 0)
  1185. ep->dev->protocol_stall = 1;
  1186. else
  1187. set_halt(ep);
  1188. if (wedged)
  1189. ep->wedged = 1;
  1190. } else {
  1191. clear_halt(ep);
  1192. if (ep->dev->quirks & PLX_SUPERSPEED &&
  1193. !list_empty(&ep->queue) && ep->td_dma)
  1194. restart_dma(ep);
  1195. ep->wedged = 0;
  1196. }
  1197. (void) readl(&ep->regs->ep_rsp);
  1198. }
  1199. spin_unlock_irqrestore(&ep->dev->lock, flags);
  1200. return retval;
  1201. }
  1202. static int net2280_set_halt(struct usb_ep *_ep, int value)
  1203. {
  1204. return net2280_set_halt_and_wedge(_ep, value, 0);
  1205. }
  1206. static int net2280_set_wedge(struct usb_ep *_ep)
  1207. {
  1208. if (!_ep || _ep->name == ep0name)
  1209. return -EINVAL;
  1210. return net2280_set_halt_and_wedge(_ep, 1, 1);
  1211. }
  1212. static int net2280_fifo_status(struct usb_ep *_ep)
  1213. {
  1214. struct net2280_ep *ep;
  1215. u32 avail;
  1216. ep = container_of(_ep, struct net2280_ep, ep);
  1217. if (!_ep || (!ep->desc && ep->num != 0))
  1218. return -ENODEV;
  1219. if (!ep->dev->driver || ep->dev->gadget.speed == USB_SPEED_UNKNOWN)
  1220. return -ESHUTDOWN;
  1221. avail = readl(&ep->regs->ep_avail) & (BIT(12) - 1);
  1222. if (avail > ep->fifo_size)
  1223. return -EOVERFLOW;
  1224. if (ep->is_in)
  1225. avail = ep->fifo_size - avail;
  1226. return avail;
  1227. }
  1228. static void net2280_fifo_flush(struct usb_ep *_ep)
  1229. {
  1230. struct net2280_ep *ep;
  1231. ep = container_of(_ep, struct net2280_ep, ep);
  1232. if (!_ep || (!ep->desc && ep->num != 0))
  1233. return;
  1234. if (!ep->dev->driver || ep->dev->gadget.speed == USB_SPEED_UNKNOWN)
  1235. return;
  1236. writel(BIT(FIFO_FLUSH), &ep->regs->ep_stat);
  1237. (void) readl(&ep->regs->ep_rsp);
  1238. }
  1239. static const struct usb_ep_ops net2280_ep_ops = {
  1240. .enable = net2280_enable,
  1241. .disable = net2280_disable,
  1242. .alloc_request = net2280_alloc_request,
  1243. .free_request = net2280_free_request,
  1244. .queue = net2280_queue,
  1245. .dequeue = net2280_dequeue,
  1246. .set_halt = net2280_set_halt,
  1247. .set_wedge = net2280_set_wedge,
  1248. .fifo_status = net2280_fifo_status,
  1249. .fifo_flush = net2280_fifo_flush,
  1250. };
  1251. /*-------------------------------------------------------------------------*/
  1252. static int net2280_get_frame(struct usb_gadget *_gadget)
  1253. {
  1254. struct net2280 *dev;
  1255. unsigned long flags;
  1256. u16 retval;
  1257. if (!_gadget)
  1258. return -ENODEV;
  1259. dev = container_of(_gadget, struct net2280, gadget);
  1260. spin_lock_irqsave(&dev->lock, flags);
  1261. retval = get_idx_reg(dev->regs, REG_FRAME) & 0x03ff;
  1262. spin_unlock_irqrestore(&dev->lock, flags);
  1263. return retval;
  1264. }
  1265. static int net2280_wakeup(struct usb_gadget *_gadget)
  1266. {
  1267. struct net2280 *dev;
  1268. u32 tmp;
  1269. unsigned long flags;
  1270. if (!_gadget)
  1271. return 0;
  1272. dev = container_of(_gadget, struct net2280, gadget);
  1273. spin_lock_irqsave(&dev->lock, flags);
  1274. tmp = readl(&dev->usb->usbctl);
  1275. if (tmp & BIT(DEVICE_REMOTE_WAKEUP_ENABLE))
  1276. writel(BIT(GENERATE_RESUME), &dev->usb->usbstat);
  1277. spin_unlock_irqrestore(&dev->lock, flags);
  1278. /* pci writes may still be posted */
  1279. return 0;
  1280. }
  1281. static int net2280_set_selfpowered(struct usb_gadget *_gadget, int value)
  1282. {
  1283. struct net2280 *dev;
  1284. u32 tmp;
  1285. unsigned long flags;
  1286. if (!_gadget)
  1287. return 0;
  1288. dev = container_of(_gadget, struct net2280, gadget);
  1289. spin_lock_irqsave(&dev->lock, flags);
  1290. tmp = readl(&dev->usb->usbctl);
  1291. if (value) {
  1292. tmp |= BIT(SELF_POWERED_STATUS);
  1293. dev->selfpowered = 1;
  1294. } else {
  1295. tmp &= ~BIT(SELF_POWERED_STATUS);
  1296. dev->selfpowered = 0;
  1297. }
  1298. writel(tmp, &dev->usb->usbctl);
  1299. spin_unlock_irqrestore(&dev->lock, flags);
  1300. return 0;
  1301. }
  1302. static int net2280_pullup(struct usb_gadget *_gadget, int is_on)
  1303. {
  1304. struct net2280 *dev;
  1305. u32 tmp;
  1306. unsigned long flags;
  1307. if (!_gadget)
  1308. return -ENODEV;
  1309. dev = container_of(_gadget, struct net2280, gadget);
  1310. spin_lock_irqsave(&dev->lock, flags);
  1311. tmp = readl(&dev->usb->usbctl);
  1312. dev->softconnect = (is_on != 0);
  1313. if (is_on)
  1314. tmp |= BIT(USB_DETECT_ENABLE);
  1315. else
  1316. tmp &= ~BIT(USB_DETECT_ENABLE);
  1317. writel(tmp, &dev->usb->usbctl);
  1318. spin_unlock_irqrestore(&dev->lock, flags);
  1319. return 0;
  1320. }
  1321. static int net2280_start(struct usb_gadget *_gadget,
  1322. struct usb_gadget_driver *driver);
  1323. static int net2280_stop(struct usb_gadget *_gadget);
  1324. static const struct usb_gadget_ops net2280_ops = {
  1325. .get_frame = net2280_get_frame,
  1326. .wakeup = net2280_wakeup,
  1327. .set_selfpowered = net2280_set_selfpowered,
  1328. .pullup = net2280_pullup,
  1329. .udc_start = net2280_start,
  1330. .udc_stop = net2280_stop,
  1331. };
  1332. /*-------------------------------------------------------------------------*/
  1333. #ifdef CONFIG_USB_GADGET_DEBUG_FILES
  1334. /* FIXME move these into procfs, and use seq_file.
  1335. * Sysfs _still_ doesn't behave for arbitrarily sized files,
  1336. * and also doesn't help products using this with 2.4 kernels.
  1337. */
  1338. /* "function" sysfs attribute */
  1339. static ssize_t function_show(struct device *_dev, struct device_attribute *attr,
  1340. char *buf)
  1341. {
  1342. struct net2280 *dev = dev_get_drvdata(_dev);
  1343. if (!dev->driver || !dev->driver->function ||
  1344. strlen(dev->driver->function) > PAGE_SIZE)
  1345. return 0;
  1346. return scnprintf(buf, PAGE_SIZE, "%s\n", dev->driver->function);
  1347. }
  1348. static DEVICE_ATTR_RO(function);
  1349. static ssize_t registers_show(struct device *_dev,
  1350. struct device_attribute *attr, char *buf)
  1351. {
  1352. struct net2280 *dev;
  1353. char *next;
  1354. unsigned size, t;
  1355. unsigned long flags;
  1356. int i;
  1357. u32 t1, t2;
  1358. const char *s;
  1359. dev = dev_get_drvdata(_dev);
  1360. next = buf;
  1361. size = PAGE_SIZE;
  1362. spin_lock_irqsave(&dev->lock, flags);
  1363. if (dev->driver)
  1364. s = dev->driver->driver.name;
  1365. else
  1366. s = "(none)";
  1367. /* Main Control Registers */
  1368. t = scnprintf(next, size, "%s version " DRIVER_VERSION
  1369. ", chiprev %04x, dma %s\n\n"
  1370. "devinit %03x fifoctl %08x gadget '%s'\n"
  1371. "pci irqenb0 %02x irqenb1 %08x "
  1372. "irqstat0 %04x irqstat1 %08x\n",
  1373. driver_name, dev->chiprev,
  1374. use_dma
  1375. ? (use_dma_chaining ? "chaining" : "enabled")
  1376. : "disabled",
  1377. readl(&dev->regs->devinit),
  1378. readl(&dev->regs->fifoctl),
  1379. s,
  1380. readl(&dev->regs->pciirqenb0),
  1381. readl(&dev->regs->pciirqenb1),
  1382. readl(&dev->regs->irqstat0),
  1383. readl(&dev->regs->irqstat1));
  1384. size -= t;
  1385. next += t;
  1386. /* USB Control Registers */
  1387. t1 = readl(&dev->usb->usbctl);
  1388. t2 = readl(&dev->usb->usbstat);
  1389. if (t1 & BIT(VBUS_PIN)) {
  1390. if (t2 & BIT(HIGH_SPEED))
  1391. s = "high speed";
  1392. else if (dev->gadget.speed == USB_SPEED_UNKNOWN)
  1393. s = "powered";
  1394. else
  1395. s = "full speed";
  1396. /* full speed bit (6) not working?? */
  1397. } else
  1398. s = "not attached";
  1399. t = scnprintf(next, size,
  1400. "stdrsp %08x usbctl %08x usbstat %08x "
  1401. "addr 0x%02x (%s)\n",
  1402. readl(&dev->usb->stdrsp), t1, t2,
  1403. readl(&dev->usb->ouraddr), s);
  1404. size -= t;
  1405. next += t;
  1406. /* PCI Master Control Registers */
  1407. /* DMA Control Registers */
  1408. /* Configurable EP Control Registers */
  1409. for (i = 0; i < dev->n_ep; i++) {
  1410. struct net2280_ep *ep;
  1411. ep = &dev->ep[i];
  1412. if (i && !ep->desc)
  1413. continue;
  1414. t1 = readl(&ep->cfg->ep_cfg);
  1415. t2 = readl(&ep->regs->ep_rsp) & 0xff;
  1416. t = scnprintf(next, size,
  1417. "\n%s\tcfg %05x rsp (%02x) %s%s%s%s%s%s%s%s"
  1418. "irqenb %02x\n",
  1419. ep->ep.name, t1, t2,
  1420. (t2 & BIT(CLEAR_NAK_OUT_PACKETS))
  1421. ? "NAK " : "",
  1422. (t2 & BIT(CLEAR_EP_HIDE_STATUS_PHASE))
  1423. ? "hide " : "",
  1424. (t2 & BIT(CLEAR_EP_FORCE_CRC_ERROR))
  1425. ? "CRC " : "",
  1426. (t2 & BIT(CLEAR_INTERRUPT_MODE))
  1427. ? "interrupt " : "",
  1428. (t2 & BIT(CLEAR_CONTROL_STATUS_PHASE_HANDSHAKE))
  1429. ? "status " : "",
  1430. (t2 & BIT(CLEAR_NAK_OUT_PACKETS_MODE))
  1431. ? "NAKmode " : "",
  1432. (t2 & BIT(CLEAR_ENDPOINT_TOGGLE))
  1433. ? "DATA1 " : "DATA0 ",
  1434. (t2 & BIT(CLEAR_ENDPOINT_HALT))
  1435. ? "HALT " : "",
  1436. readl(&ep->regs->ep_irqenb));
  1437. size -= t;
  1438. next += t;
  1439. t = scnprintf(next, size,
  1440. "\tstat %08x avail %04x "
  1441. "(ep%d%s-%s)%s\n",
  1442. readl(&ep->regs->ep_stat),
  1443. readl(&ep->regs->ep_avail),
  1444. t1 & 0x0f, DIR_STRING(t1),
  1445. type_string(t1 >> 8),
  1446. ep->stopped ? "*" : "");
  1447. size -= t;
  1448. next += t;
  1449. if (!ep->dma)
  1450. continue;
  1451. t = scnprintf(next, size,
  1452. " dma\tctl %08x stat %08x count %08x\n"
  1453. "\taddr %08x desc %08x\n",
  1454. readl(&ep->dma->dmactl),
  1455. readl(&ep->dma->dmastat),
  1456. readl(&ep->dma->dmacount),
  1457. readl(&ep->dma->dmaaddr),
  1458. readl(&ep->dma->dmadesc));
  1459. size -= t;
  1460. next += t;
  1461. }
  1462. /* Indexed Registers (none yet) */
  1463. /* Statistics */
  1464. t = scnprintf(next, size, "\nirqs: ");
  1465. size -= t;
  1466. next += t;
  1467. for (i = 0; i < dev->n_ep; i++) {
  1468. struct net2280_ep *ep;
  1469. ep = &dev->ep[i];
  1470. if (i && !ep->irqs)
  1471. continue;
  1472. t = scnprintf(next, size, " %s/%lu", ep->ep.name, ep->irqs);
  1473. size -= t;
  1474. next += t;
  1475. }
  1476. t = scnprintf(next, size, "\n");
  1477. size -= t;
  1478. next += t;
  1479. spin_unlock_irqrestore(&dev->lock, flags);
  1480. return PAGE_SIZE - size;
  1481. }
  1482. static DEVICE_ATTR_RO(registers);
  1483. static ssize_t queues_show(struct device *_dev, struct device_attribute *attr,
  1484. char *buf)
  1485. {
  1486. struct net2280 *dev;
  1487. char *next;
  1488. unsigned size;
  1489. unsigned long flags;
  1490. int i;
  1491. dev = dev_get_drvdata(_dev);
  1492. next = buf;
  1493. size = PAGE_SIZE;
  1494. spin_lock_irqsave(&dev->lock, flags);
  1495. for (i = 0; i < dev->n_ep; i++) {
  1496. struct net2280_ep *ep = &dev->ep[i];
  1497. struct net2280_request *req;
  1498. int t;
  1499. if (i != 0) {
  1500. const struct usb_endpoint_descriptor *d;
  1501. d = ep->desc;
  1502. if (!d)
  1503. continue;
  1504. t = d->bEndpointAddress;
  1505. t = scnprintf(next, size,
  1506. "\n%s (ep%d%s-%s) max %04x %s fifo %d\n",
  1507. ep->ep.name, t & USB_ENDPOINT_NUMBER_MASK,
  1508. (t & USB_DIR_IN) ? "in" : "out",
  1509. type_string(d->bmAttributes),
  1510. usb_endpoint_maxp(d) & 0x1fff,
  1511. ep->dma ? "dma" : "pio", ep->fifo_size
  1512. );
  1513. } else /* ep0 should only have one transfer queued */
  1514. t = scnprintf(next, size, "ep0 max 64 pio %s\n",
  1515. ep->is_in ? "in" : "out");
  1516. if (t <= 0 || t > size)
  1517. goto done;
  1518. size -= t;
  1519. next += t;
  1520. if (list_empty(&ep->queue)) {
  1521. t = scnprintf(next, size, "\t(nothing queued)\n");
  1522. if (t <= 0 || t > size)
  1523. goto done;
  1524. size -= t;
  1525. next += t;
  1526. continue;
  1527. }
  1528. list_for_each_entry(req, &ep->queue, queue) {
  1529. if (ep->dma && req->td_dma == readl(&ep->dma->dmadesc))
  1530. t = scnprintf(next, size,
  1531. "\treq %p len %d/%d "
  1532. "buf %p (dmacount %08x)\n",
  1533. &req->req, req->req.actual,
  1534. req->req.length, req->req.buf,
  1535. readl(&ep->dma->dmacount));
  1536. else
  1537. t = scnprintf(next, size,
  1538. "\treq %p len %d/%d buf %p\n",
  1539. &req->req, req->req.actual,
  1540. req->req.length, req->req.buf);
  1541. if (t <= 0 || t > size)
  1542. goto done;
  1543. size -= t;
  1544. next += t;
  1545. if (ep->dma) {
  1546. struct net2280_dma *td;
  1547. td = req->td;
  1548. t = scnprintf(next, size, "\t td %08x "
  1549. " count %08x buf %08x desc %08x\n",
  1550. (u32) req->td_dma,
  1551. le32_to_cpu(td->dmacount),
  1552. le32_to_cpu(td->dmaaddr),
  1553. le32_to_cpu(td->dmadesc));
  1554. if (t <= 0 || t > size)
  1555. goto done;
  1556. size -= t;
  1557. next += t;
  1558. }
  1559. }
  1560. }
  1561. done:
  1562. spin_unlock_irqrestore(&dev->lock, flags);
  1563. return PAGE_SIZE - size;
  1564. }
  1565. static DEVICE_ATTR_RO(queues);
  1566. #else
  1567. #define device_create_file(a, b) (0)
  1568. #define device_remove_file(a, b) do { } while (0)
  1569. #endif
  1570. /*-------------------------------------------------------------------------*/
  1571. /* another driver-specific mode might be a request type doing dma
  1572. * to/from another device fifo instead of to/from memory.
  1573. */
  1574. static void set_fifo_mode(struct net2280 *dev, int mode)
  1575. {
  1576. /* keeping high bits preserves BAR2 */
  1577. writel((0xffff << PCI_BASE2_RANGE) | mode, &dev->regs->fifoctl);
  1578. /* always ep-{a,b,e,f} ... maybe not ep-c or ep-d */
  1579. INIT_LIST_HEAD(&dev->gadget.ep_list);
  1580. list_add_tail(&dev->ep[1].ep.ep_list, &dev->gadget.ep_list);
  1581. list_add_tail(&dev->ep[2].ep.ep_list, &dev->gadget.ep_list);
  1582. switch (mode) {
  1583. case 0:
  1584. list_add_tail(&dev->ep[3].ep.ep_list, &dev->gadget.ep_list);
  1585. list_add_tail(&dev->ep[4].ep.ep_list, &dev->gadget.ep_list);
  1586. dev->ep[1].fifo_size = dev->ep[2].fifo_size = 1024;
  1587. break;
  1588. case 1:
  1589. dev->ep[1].fifo_size = dev->ep[2].fifo_size = 2048;
  1590. break;
  1591. case 2:
  1592. list_add_tail(&dev->ep[3].ep.ep_list, &dev->gadget.ep_list);
  1593. dev->ep[1].fifo_size = 2048;
  1594. dev->ep[2].fifo_size = 1024;
  1595. break;
  1596. }
  1597. /* fifo sizes for ep0, ep-c, ep-d, ep-e, and ep-f never change */
  1598. list_add_tail(&dev->ep[5].ep.ep_list, &dev->gadget.ep_list);
  1599. list_add_tail(&dev->ep[6].ep.ep_list, &dev->gadget.ep_list);
  1600. }
  1601. static void defect7374_disable_data_eps(struct net2280 *dev)
  1602. {
  1603. /*
  1604. * For Defect 7374, disable data EPs (and more):
  1605. * - This phase undoes the earlier phase of the Defect 7374 workaround,
  1606. * returing ep regs back to normal.
  1607. */
  1608. struct net2280_ep *ep;
  1609. int i;
  1610. unsigned char ep_sel;
  1611. u32 tmp_reg;
  1612. for (i = 1; i < 5; i++) {
  1613. ep = &dev->ep[i];
  1614. writel(0, &ep->cfg->ep_cfg);
  1615. }
  1616. /* CSROUT, CSRIN, PCIOUT, PCIIN, STATIN, RCIN */
  1617. for (i = 0; i < 6; i++)
  1618. writel(0, &dev->dep[i].dep_cfg);
  1619. for (ep_sel = 0; ep_sel <= 21; ep_sel++) {
  1620. /* Select an endpoint for subsequent operations: */
  1621. tmp_reg = readl(&dev->plregs->pl_ep_ctrl);
  1622. writel(((tmp_reg & ~0x1f) | ep_sel), &dev->plregs->pl_ep_ctrl);
  1623. if (ep_sel < 2 || (ep_sel > 9 && ep_sel < 14) ||
  1624. ep_sel == 18 || ep_sel == 20)
  1625. continue;
  1626. /* Change settings on some selected endpoints */
  1627. tmp_reg = readl(&dev->plregs->pl_ep_cfg_4);
  1628. tmp_reg &= ~BIT(NON_CTRL_IN_TOLERATE_BAD_DIR);
  1629. writel(tmp_reg, &dev->plregs->pl_ep_cfg_4);
  1630. tmp_reg = readl(&dev->plregs->pl_ep_ctrl);
  1631. tmp_reg |= BIT(EP_INITIALIZED);
  1632. writel(tmp_reg, &dev->plregs->pl_ep_ctrl);
  1633. }
  1634. }
  1635. static void defect7374_enable_data_eps_zero(struct net2280 *dev)
  1636. {
  1637. u32 tmp = 0, tmp_reg;
  1638. u32 fsmvalue, scratch;
  1639. int i;
  1640. unsigned char ep_sel;
  1641. scratch = get_idx_reg(dev->regs, SCRATCH);
  1642. fsmvalue = scratch & (0xf << DEFECT7374_FSM_FIELD);
  1643. scratch &= ~(0xf << DEFECT7374_FSM_FIELD);
  1644. /*See if firmware needs to set up for workaround*/
  1645. if (fsmvalue != DEFECT7374_FSM_SS_CONTROL_READ) {
  1646. ep_warn(dev, "Operate Defect 7374 workaround soft this time");
  1647. ep_warn(dev, "It will operate on cold-reboot and SS connect");
  1648. /*GPEPs:*/
  1649. tmp = ((0 << ENDPOINT_NUMBER) | BIT(ENDPOINT_DIRECTION) |
  1650. (2 << OUT_ENDPOINT_TYPE) | (2 << IN_ENDPOINT_TYPE) |
  1651. ((dev->enhanced_mode) ?
  1652. BIT(OUT_ENDPOINT_ENABLE) : BIT(ENDPOINT_ENABLE)) |
  1653. BIT(IN_ENDPOINT_ENABLE));
  1654. for (i = 1; i < 5; i++)
  1655. writel(tmp, &dev->ep[i].cfg->ep_cfg);
  1656. /* CSRIN, PCIIN, STATIN, RCIN*/
  1657. tmp = ((0 << ENDPOINT_NUMBER) | BIT(ENDPOINT_ENABLE));
  1658. writel(tmp, &dev->dep[1].dep_cfg);
  1659. writel(tmp, &dev->dep[3].dep_cfg);
  1660. writel(tmp, &dev->dep[4].dep_cfg);
  1661. writel(tmp, &dev->dep[5].dep_cfg);
  1662. /*Implemented for development and debug.
  1663. * Can be refined/tuned later.*/
  1664. for (ep_sel = 0; ep_sel <= 21; ep_sel++) {
  1665. /* Select an endpoint for subsequent operations: */
  1666. tmp_reg = readl(&dev->plregs->pl_ep_ctrl);
  1667. writel(((tmp_reg & ~0x1f) | ep_sel),
  1668. &dev->plregs->pl_ep_ctrl);
  1669. if (ep_sel == 1) {
  1670. tmp =
  1671. (readl(&dev->plregs->pl_ep_ctrl) |
  1672. BIT(CLEAR_ACK_ERROR_CODE) | 0);
  1673. writel(tmp, &dev->plregs->pl_ep_ctrl);
  1674. continue;
  1675. }
  1676. if (ep_sel == 0 || (ep_sel > 9 && ep_sel < 14) ||
  1677. ep_sel == 18 || ep_sel == 20)
  1678. continue;
  1679. tmp = (readl(&dev->plregs->pl_ep_cfg_4) |
  1680. BIT(NON_CTRL_IN_TOLERATE_BAD_DIR) | 0);
  1681. writel(tmp, &dev->plregs->pl_ep_cfg_4);
  1682. tmp = readl(&dev->plregs->pl_ep_ctrl) &
  1683. ~BIT(EP_INITIALIZED);
  1684. writel(tmp, &dev->plregs->pl_ep_ctrl);
  1685. }
  1686. /* Set FSM to focus on the first Control Read:
  1687. * - Tip: Connection speed is known upon the first
  1688. * setup request.*/
  1689. scratch |= DEFECT7374_FSM_WAITING_FOR_CONTROL_READ;
  1690. set_idx_reg(dev->regs, SCRATCH, scratch);
  1691. } else{
  1692. ep_warn(dev, "Defect 7374 workaround soft will NOT operate");
  1693. ep_warn(dev, "It will operate on cold-reboot and SS connect");
  1694. }
  1695. }
  1696. /* keeping it simple:
  1697. * - one bus driver, initted first;
  1698. * - one function driver, initted second
  1699. *
  1700. * most of the work to support multiple net2280 controllers would
  1701. * be to associate this gadget driver (yes?) with all of them, or
  1702. * perhaps to bind specific drivers to specific devices.
  1703. */
  1704. static void usb_reset_228x(struct net2280 *dev)
  1705. {
  1706. u32 tmp;
  1707. dev->gadget.speed = USB_SPEED_UNKNOWN;
  1708. (void) readl(&dev->usb->usbctl);
  1709. net2280_led_init(dev);
  1710. /* disable automatic responses, and irqs */
  1711. writel(0, &dev->usb->stdrsp);
  1712. writel(0, &dev->regs->pciirqenb0);
  1713. writel(0, &dev->regs->pciirqenb1);
  1714. /* clear old dma and irq state */
  1715. for (tmp = 0; tmp < 4; tmp++) {
  1716. struct net2280_ep *ep = &dev->ep[tmp + 1];
  1717. if (ep->dma)
  1718. abort_dma(ep);
  1719. }
  1720. writel(~0, &dev->regs->irqstat0),
  1721. writel(~(u32)BIT(SUSPEND_REQUEST_INTERRUPT), &dev->regs->irqstat1),
  1722. /* reset, and enable pci */
  1723. tmp = readl(&dev->regs->devinit) |
  1724. BIT(PCI_ENABLE) |
  1725. BIT(FIFO_SOFT_RESET) |
  1726. BIT(USB_SOFT_RESET) |
  1727. BIT(M8051_RESET);
  1728. writel(tmp, &dev->regs->devinit);
  1729. /* standard fifo and endpoint allocations */
  1730. set_fifo_mode(dev, (fifo_mode <= 2) ? fifo_mode : 0);
  1731. }
  1732. static void usb_reset_338x(struct net2280 *dev)
  1733. {
  1734. u32 tmp;
  1735. u32 fsmvalue;
  1736. dev->gadget.speed = USB_SPEED_UNKNOWN;
  1737. (void)readl(&dev->usb->usbctl);
  1738. net2280_led_init(dev);
  1739. fsmvalue = get_idx_reg(dev->regs, SCRATCH) &
  1740. (0xf << DEFECT7374_FSM_FIELD);
  1741. /* See if firmware needs to set up for workaround: */
  1742. if (fsmvalue != DEFECT7374_FSM_SS_CONTROL_READ) {
  1743. ep_info(dev, "%s: Defect 7374 FsmValue 0x%08x\n", __func__,
  1744. fsmvalue);
  1745. } else {
  1746. /* disable automatic responses, and irqs */
  1747. writel(0, &dev->usb->stdrsp);
  1748. writel(0, &dev->regs->pciirqenb0);
  1749. writel(0, &dev->regs->pciirqenb1);
  1750. }
  1751. /* clear old dma and irq state */
  1752. for (tmp = 0; tmp < 4; tmp++) {
  1753. struct net2280_ep *ep = &dev->ep[tmp + 1];
  1754. if (ep->dma)
  1755. abort_dma(ep);
  1756. }
  1757. writel(~0, &dev->regs->irqstat0), writel(~0, &dev->regs->irqstat1);
  1758. if (fsmvalue == DEFECT7374_FSM_SS_CONTROL_READ) {
  1759. /* reset, and enable pci */
  1760. tmp = readl(&dev->regs->devinit) |
  1761. BIT(PCI_ENABLE) |
  1762. BIT(FIFO_SOFT_RESET) |
  1763. BIT(USB_SOFT_RESET) |
  1764. BIT(M8051_RESET);
  1765. writel(tmp, &dev->regs->devinit);
  1766. }
  1767. /* always ep-{1,2,3,4} ... maybe not ep-3 or ep-4 */
  1768. INIT_LIST_HEAD(&dev->gadget.ep_list);
  1769. for (tmp = 1; tmp < dev->n_ep; tmp++)
  1770. list_add_tail(&dev->ep[tmp].ep.ep_list, &dev->gadget.ep_list);
  1771. }
  1772. static void usb_reset(struct net2280 *dev)
  1773. {
  1774. if (dev->quirks & PLX_LEGACY)
  1775. return usb_reset_228x(dev);
  1776. return usb_reset_338x(dev);
  1777. }
  1778. static void usb_reinit_228x(struct net2280 *dev)
  1779. {
  1780. u32 tmp;
  1781. int init_dma;
  1782. /* use_dma changes are ignored till next device re-init */
  1783. init_dma = use_dma;
  1784. /* basic endpoint init */
  1785. for (tmp = 0; tmp < 7; tmp++) {
  1786. struct net2280_ep *ep = &dev->ep[tmp];
  1787. ep->ep.name = ep_name[tmp];
  1788. ep->dev = dev;
  1789. ep->num = tmp;
  1790. if (tmp > 0 && tmp <= 4) {
  1791. ep->fifo_size = 1024;
  1792. if (init_dma)
  1793. ep->dma = &dev->dma[tmp - 1];
  1794. } else
  1795. ep->fifo_size = 64;
  1796. ep->regs = &dev->epregs[tmp];
  1797. ep->cfg = &dev->epregs[tmp];
  1798. ep_reset_228x(dev->regs, ep);
  1799. }
  1800. usb_ep_set_maxpacket_limit(&dev->ep[0].ep, 64);
  1801. usb_ep_set_maxpacket_limit(&dev->ep[5].ep, 64);
  1802. usb_ep_set_maxpacket_limit(&dev->ep[6].ep, 64);
  1803. dev->gadget.ep0 = &dev->ep[0].ep;
  1804. dev->ep[0].stopped = 0;
  1805. INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
  1806. /* we want to prevent lowlevel/insecure access from the USB host,
  1807. * but erratum 0119 means this enable bit is ignored
  1808. */
  1809. for (tmp = 0; tmp < 5; tmp++)
  1810. writel(EP_DONTUSE, &dev->dep[tmp].dep_cfg);
  1811. }
  1812. static void usb_reinit_338x(struct net2280 *dev)
  1813. {
  1814. int init_dma;
  1815. int i;
  1816. u32 tmp, val;
  1817. u32 fsmvalue;
  1818. static const u32 ne[9] = { 0, 1, 2, 3, 4, 1, 2, 3, 4 };
  1819. static const u32 ep_reg_addr[9] = { 0x00, 0xC0, 0x00, 0xC0, 0x00,
  1820. 0x00, 0xC0, 0x00, 0xC0 };
  1821. /* use_dma changes are ignored till next device re-init */
  1822. init_dma = use_dma;
  1823. /* basic endpoint init */
  1824. for (i = 0; i < dev->n_ep; i++) {
  1825. struct net2280_ep *ep = &dev->ep[i];
  1826. ep->ep.name = ep_name[i];
  1827. ep->dev = dev;
  1828. ep->num = i;
  1829. if (i > 0 && i <= 4 && init_dma)
  1830. ep->dma = &dev->dma[i - 1];
  1831. if (dev->enhanced_mode) {
  1832. ep->cfg = &dev->epregs[ne[i]];
  1833. ep->regs = (struct net2280_ep_regs __iomem *)
  1834. (((void __iomem *)&dev->epregs[ne[i]]) +
  1835. ep_reg_addr[i]);
  1836. ep->fiforegs = &dev->fiforegs[i];
  1837. } else {
  1838. ep->cfg = &dev->epregs[i];
  1839. ep->regs = &dev->epregs[i];
  1840. ep->fiforegs = &dev->fiforegs[i];
  1841. }
  1842. ep->fifo_size = (i != 0) ? 2048 : 512;
  1843. ep_reset_338x(dev->regs, ep);
  1844. }
  1845. usb_ep_set_maxpacket_limit(&dev->ep[0].ep, 512);
  1846. dev->gadget.ep0 = &dev->ep[0].ep;
  1847. dev->ep[0].stopped = 0;
  1848. /* Link layer set up */
  1849. fsmvalue = get_idx_reg(dev->regs, SCRATCH) &
  1850. (0xf << DEFECT7374_FSM_FIELD);
  1851. /* See if driver needs to set up for workaround: */
  1852. if (fsmvalue != DEFECT7374_FSM_SS_CONTROL_READ)
  1853. ep_info(dev, "%s: Defect 7374 FsmValue %08x\n",
  1854. __func__, fsmvalue);
  1855. else {
  1856. tmp = readl(&dev->usb_ext->usbctl2) &
  1857. ~(BIT(U1_ENABLE) | BIT(U2_ENABLE) | BIT(LTM_ENABLE));
  1858. writel(tmp, &dev->usb_ext->usbctl2);
  1859. }
  1860. /* Hardware Defect and Workaround */
  1861. val = readl(&dev->ll_lfps_regs->ll_lfps_5);
  1862. val &= ~(0xf << TIMER_LFPS_6US);
  1863. val |= 0x5 << TIMER_LFPS_6US;
  1864. writel(val, &dev->ll_lfps_regs->ll_lfps_5);
  1865. val = readl(&dev->ll_lfps_regs->ll_lfps_6);
  1866. val &= ~(0xffff << TIMER_LFPS_80US);
  1867. val |= 0x0100 << TIMER_LFPS_80US;
  1868. writel(val, &dev->ll_lfps_regs->ll_lfps_6);
  1869. /*
  1870. * AA_AB Errata. Issue 4. Workaround for SuperSpeed USB
  1871. * Hot Reset Exit Handshake may Fail in Specific Case using
  1872. * Default Register Settings. Workaround for Enumeration test.
  1873. */
  1874. val = readl(&dev->ll_tsn_regs->ll_tsn_counters_2);
  1875. val &= ~(0x1f << HOT_TX_NORESET_TS2);
  1876. val |= 0x10 << HOT_TX_NORESET_TS2;
  1877. writel(val, &dev->ll_tsn_regs->ll_tsn_counters_2);
  1878. val = readl(&dev->ll_tsn_regs->ll_tsn_counters_3);
  1879. val &= ~(0x1f << HOT_RX_RESET_TS2);
  1880. val |= 0x3 << HOT_RX_RESET_TS2;
  1881. writel(val, &dev->ll_tsn_regs->ll_tsn_counters_3);
  1882. /*
  1883. * Set Recovery Idle to Recover bit:
  1884. * - On SS connections, setting Recovery Idle to Recover Fmw improves
  1885. * link robustness with various hosts and hubs.
  1886. * - It is safe to set for all connection speeds; all chip revisions.
  1887. * - R-M-W to leave other bits undisturbed.
  1888. * - Reference PLX TT-7372
  1889. */
  1890. val = readl(&dev->ll_chicken_reg->ll_tsn_chicken_bit);
  1891. val |= BIT(RECOVERY_IDLE_TO_RECOVER_FMW);
  1892. writel(val, &dev->ll_chicken_reg->ll_tsn_chicken_bit);
  1893. INIT_LIST_HEAD(&dev->gadget.ep0->ep_list);
  1894. /* disable dedicated endpoints */
  1895. writel(0x0D, &dev->dep[0].dep_cfg);
  1896. writel(0x0D, &dev->dep[1].dep_cfg);
  1897. writel(0x0E, &dev->dep[2].dep_cfg);
  1898. writel(0x0E, &dev->dep[3].dep_cfg);
  1899. writel(0x0F, &dev->dep[4].dep_cfg);
  1900. writel(0x0C, &dev->dep[5].dep_cfg);
  1901. }
  1902. static void usb_reinit(struct net2280 *dev)
  1903. {
  1904. if (dev->quirks & PLX_LEGACY)
  1905. return usb_reinit_228x(dev);
  1906. return usb_reinit_338x(dev);
  1907. }
  1908. static void ep0_start_228x(struct net2280 *dev)
  1909. {
  1910. writel(BIT(CLEAR_EP_HIDE_STATUS_PHASE) |
  1911. BIT(CLEAR_NAK_OUT_PACKETS) |
  1912. BIT(CLEAR_CONTROL_STATUS_PHASE_HANDSHAKE),
  1913. &dev->epregs[0].ep_rsp);
  1914. /*
  1915. * hardware optionally handles a bunch of standard requests
  1916. * that the API hides from drivers anyway. have it do so.
  1917. * endpoint status/features are handled in software, to
  1918. * help pass tests for some dubious behavior.
  1919. */
  1920. writel(BIT(SET_TEST_MODE) |
  1921. BIT(SET_ADDRESS) |
  1922. BIT(DEVICE_SET_CLEAR_DEVICE_REMOTE_WAKEUP) |
  1923. BIT(GET_DEVICE_STATUS) |
  1924. BIT(GET_INTERFACE_STATUS),
  1925. &dev->usb->stdrsp);
  1926. writel(BIT(USB_ROOT_PORT_WAKEUP_ENABLE) |
  1927. BIT(SELF_POWERED_USB_DEVICE) |
  1928. BIT(REMOTE_WAKEUP_SUPPORT) |
  1929. (dev->softconnect << USB_DETECT_ENABLE) |
  1930. BIT(SELF_POWERED_STATUS),
  1931. &dev->usb->usbctl);
  1932. /* enable irqs so we can see ep0 and general operation */
  1933. writel(BIT(SETUP_PACKET_INTERRUPT_ENABLE) |
  1934. BIT(ENDPOINT_0_INTERRUPT_ENABLE),
  1935. &dev->regs->pciirqenb0);
  1936. writel(BIT(PCI_INTERRUPT_ENABLE) |
  1937. BIT(PCI_MASTER_ABORT_RECEIVED_INTERRUPT_ENABLE) |
  1938. BIT(PCI_TARGET_ABORT_RECEIVED_INTERRUPT_ENABLE) |
  1939. BIT(PCI_RETRY_ABORT_INTERRUPT_ENABLE) |
  1940. BIT(VBUS_INTERRUPT_ENABLE) |
  1941. BIT(ROOT_PORT_RESET_INTERRUPT_ENABLE) |
  1942. BIT(SUSPEND_REQUEST_CHANGE_INTERRUPT_ENABLE),
  1943. &dev->regs->pciirqenb1);
  1944. /* don't leave any writes posted */
  1945. (void) readl(&dev->usb->usbctl);
  1946. }
  1947. static void ep0_start_338x(struct net2280 *dev)
  1948. {
  1949. u32 fsmvalue;
  1950. fsmvalue = get_idx_reg(dev->regs, SCRATCH) &
  1951. (0xf << DEFECT7374_FSM_FIELD);
  1952. if (fsmvalue != DEFECT7374_FSM_SS_CONTROL_READ)
  1953. ep_info(dev, "%s: Defect 7374 FsmValue %08x\n", __func__,
  1954. fsmvalue);
  1955. else
  1956. writel(BIT(CLEAR_NAK_OUT_PACKETS_MODE) |
  1957. BIT(SET_EP_HIDE_STATUS_PHASE),
  1958. &dev->epregs[0].ep_rsp);
  1959. /*
  1960. * hardware optionally handles a bunch of standard requests
  1961. * that the API hides from drivers anyway. have it do so.
  1962. * endpoint status/features are handled in software, to
  1963. * help pass tests for some dubious behavior.
  1964. */
  1965. writel(BIT(SET_ISOCHRONOUS_DELAY) |
  1966. BIT(SET_SEL) |
  1967. BIT(SET_TEST_MODE) |
  1968. BIT(SET_ADDRESS) |
  1969. BIT(GET_INTERFACE_STATUS) |
  1970. BIT(GET_DEVICE_STATUS),
  1971. &dev->usb->stdrsp);
  1972. dev->wakeup_enable = 1;
  1973. writel(BIT(USB_ROOT_PORT_WAKEUP_ENABLE) |
  1974. (dev->softconnect << USB_DETECT_ENABLE) |
  1975. BIT(DEVICE_REMOTE_WAKEUP_ENABLE),
  1976. &dev->usb->usbctl);
  1977. /* enable irqs so we can see ep0 and general operation */
  1978. writel(BIT(SETUP_PACKET_INTERRUPT_ENABLE) |
  1979. BIT(ENDPOINT_0_INTERRUPT_ENABLE),
  1980. &dev->regs->pciirqenb0);
  1981. writel(BIT(PCI_INTERRUPT_ENABLE) |
  1982. BIT(ROOT_PORT_RESET_INTERRUPT_ENABLE) |
  1983. BIT(SUSPEND_REQUEST_CHANGE_INTERRUPT_ENABLE) |
  1984. BIT(VBUS_INTERRUPT_ENABLE),
  1985. &dev->regs->pciirqenb1);
  1986. /* don't leave any writes posted */
  1987. (void)readl(&dev->usb->usbctl);
  1988. }
  1989. static void ep0_start(struct net2280 *dev)
  1990. {
  1991. if (dev->quirks & PLX_LEGACY)
  1992. return ep0_start_228x(dev);
  1993. return ep0_start_338x(dev);
  1994. }
  1995. /* when a driver is successfully registered, it will receive
  1996. * control requests including set_configuration(), which enables
  1997. * non-control requests. then usb traffic follows until a
  1998. * disconnect is reported. then a host may connect again, or
  1999. * the driver might get unbound.
  2000. */
  2001. static int net2280_start(struct usb_gadget *_gadget,
  2002. struct usb_gadget_driver *driver)
  2003. {
  2004. struct net2280 *dev;
  2005. int retval;
  2006. unsigned i;
  2007. /* insist on high speed support from the driver, since
  2008. * (dev->usb->xcvrdiag & FORCE_FULL_SPEED_MODE)
  2009. * "must not be used in normal operation"
  2010. */
  2011. if (!driver || driver->max_speed < USB_SPEED_HIGH ||
  2012. !driver->setup)
  2013. return -EINVAL;
  2014. dev = container_of(_gadget, struct net2280, gadget);
  2015. for (i = 0; i < dev->n_ep; i++)
  2016. dev->ep[i].irqs = 0;
  2017. /* hook up the driver ... */
  2018. dev->softconnect = 1;
  2019. driver->driver.bus = NULL;
  2020. dev->driver = driver;
  2021. retval = device_create_file(&dev->pdev->dev, &dev_attr_function);
  2022. if (retval)
  2023. goto err_unbind;
  2024. retval = device_create_file(&dev->pdev->dev, &dev_attr_queues);
  2025. if (retval)
  2026. goto err_func;
  2027. /* Enable force-full-speed testing mode, if desired */
  2028. if (full_speed && (dev->quirks & PLX_LEGACY))
  2029. writel(BIT(FORCE_FULL_SPEED_MODE), &dev->usb->xcvrdiag);
  2030. /* ... then enable host detection and ep0; and we're ready
  2031. * for set_configuration as well as eventual disconnect.
  2032. */
  2033. net2280_led_active(dev, 1);
  2034. if (dev->quirks & PLX_SUPERSPEED)
  2035. defect7374_enable_data_eps_zero(dev);
  2036. ep0_start(dev);
  2037. /* pci writes may still be posted */
  2038. return 0;
  2039. err_func:
  2040. device_remove_file(&dev->pdev->dev, &dev_attr_function);
  2041. err_unbind:
  2042. dev->driver = NULL;
  2043. return retval;
  2044. }
  2045. static void stop_activity(struct net2280 *dev, struct usb_gadget_driver *driver)
  2046. {
  2047. int i;
  2048. /* don't disconnect if it's not connected */
  2049. if (dev->gadget.speed == USB_SPEED_UNKNOWN)
  2050. driver = NULL;
  2051. /* stop hardware; prevent new request submissions;
  2052. * and kill any outstanding requests.
  2053. */
  2054. usb_reset(dev);
  2055. for (i = 0; i < dev->n_ep; i++)
  2056. nuke(&dev->ep[i]);
  2057. /* report disconnect; the driver is already quiesced */
  2058. if (driver) {
  2059. spin_unlock(&dev->lock);
  2060. driver->disconnect(&dev->gadget);
  2061. spin_lock(&dev->lock);
  2062. }
  2063. usb_reinit(dev);
  2064. }
  2065. static int net2280_stop(struct usb_gadget *_gadget)
  2066. {
  2067. struct net2280 *dev;
  2068. unsigned long flags;
  2069. dev = container_of(_gadget, struct net2280, gadget);
  2070. spin_lock_irqsave(&dev->lock, flags);
  2071. stop_activity(dev, NULL);
  2072. spin_unlock_irqrestore(&dev->lock, flags);
  2073. net2280_led_active(dev, 0);
  2074. /* Disable full-speed test mode */
  2075. if (dev->quirks & PLX_LEGACY)
  2076. writel(0, &dev->usb->xcvrdiag);
  2077. device_remove_file(&dev->pdev->dev, &dev_attr_function);
  2078. device_remove_file(&dev->pdev->dev, &dev_attr_queues);
  2079. dev->driver = NULL;
  2080. return 0;
  2081. }
  2082. /*-------------------------------------------------------------------------*/
  2083. /* handle ep0, ep-e, ep-f with 64 byte packets: packet per irq.
  2084. * also works for dma-capable endpoints, in pio mode or just
  2085. * to manually advance the queue after short OUT transfers.
  2086. */
  2087. static void handle_ep_small(struct net2280_ep *ep)
  2088. {
  2089. struct net2280_request *req;
  2090. u32 t;
  2091. /* 0 error, 1 mid-data, 2 done */
  2092. int mode = 1;
  2093. if (!list_empty(&ep->queue))
  2094. req = list_entry(ep->queue.next,
  2095. struct net2280_request, queue);
  2096. else
  2097. req = NULL;
  2098. /* ack all, and handle what we care about */
  2099. t = readl(&ep->regs->ep_stat);
  2100. ep->irqs++;
  2101. #if 0
  2102. ep_vdbg(ep->dev, "%s ack ep_stat %08x, req %p\n",
  2103. ep->ep.name, t, req ? &req->req : 0);
  2104. #endif
  2105. if (!ep->is_in || (ep->dev->quirks & PLX_2280))
  2106. writel(t & ~BIT(NAK_OUT_PACKETS), &ep->regs->ep_stat);
  2107. else
  2108. /* Added for 2282 */
  2109. writel(t, &ep->regs->ep_stat);
  2110. /* for ep0, monitor token irqs to catch data stage length errors
  2111. * and to synchronize on status.
  2112. *
  2113. * also, to defer reporting of protocol stalls ... here's where
  2114. * data or status first appears, handling stalls here should never
  2115. * cause trouble on the host side..
  2116. *
  2117. * control requests could be slightly faster without token synch for
  2118. * status, but status can jam up that way.
  2119. */
  2120. if (unlikely(ep->num == 0)) {
  2121. if (ep->is_in) {
  2122. /* status; stop NAKing */
  2123. if (t & BIT(DATA_OUT_PING_TOKEN_INTERRUPT)) {
  2124. if (ep->dev->protocol_stall) {
  2125. ep->stopped = 1;
  2126. set_halt(ep);
  2127. }
  2128. if (!req)
  2129. allow_status(ep);
  2130. mode = 2;
  2131. /* reply to extra IN data tokens with a zlp */
  2132. } else if (t & BIT(DATA_IN_TOKEN_INTERRUPT)) {
  2133. if (ep->dev->protocol_stall) {
  2134. ep->stopped = 1;
  2135. set_halt(ep);
  2136. mode = 2;
  2137. } else if (ep->responded &&
  2138. !req && !ep->stopped)
  2139. write_fifo(ep, NULL);
  2140. }
  2141. } else {
  2142. /* status; stop NAKing */
  2143. if (t & BIT(DATA_IN_TOKEN_INTERRUPT)) {
  2144. if (ep->dev->protocol_stall) {
  2145. ep->stopped = 1;
  2146. set_halt(ep);
  2147. }
  2148. mode = 2;
  2149. /* an extra OUT token is an error */
  2150. } else if (((t & BIT(DATA_OUT_PING_TOKEN_INTERRUPT)) &&
  2151. req &&
  2152. req->req.actual == req->req.length) ||
  2153. (ep->responded && !req)) {
  2154. ep->dev->protocol_stall = 1;
  2155. set_halt(ep);
  2156. ep->stopped = 1;
  2157. if (req)
  2158. done(ep, req, -EOVERFLOW);
  2159. req = NULL;
  2160. }
  2161. }
  2162. }
  2163. if (unlikely(!req))
  2164. return;
  2165. /* manual DMA queue advance after short OUT */
  2166. if (likely(ep->dma)) {
  2167. if (t & BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT)) {
  2168. u32 count;
  2169. int stopped = ep->stopped;
  2170. /* TRANSFERRED works around OUT_DONE erratum 0112.
  2171. * we expect (N <= maxpacket) bytes; host wrote M.
  2172. * iff (M < N) we won't ever see a DMA interrupt.
  2173. */
  2174. ep->stopped = 1;
  2175. for (count = 0; ; t = readl(&ep->regs->ep_stat)) {
  2176. /* any preceding dma transfers must finish.
  2177. * dma handles (M >= N), may empty the queue
  2178. */
  2179. scan_dma_completions(ep);
  2180. if (unlikely(list_empty(&ep->queue) ||
  2181. ep->out_overflow)) {
  2182. req = NULL;
  2183. break;
  2184. }
  2185. req = list_entry(ep->queue.next,
  2186. struct net2280_request, queue);
  2187. /* here either (M < N), a "real" short rx;
  2188. * or (M == N) and the queue didn't empty
  2189. */
  2190. if (likely(t & BIT(FIFO_EMPTY))) {
  2191. count = readl(&ep->dma->dmacount);
  2192. count &= DMA_BYTE_COUNT_MASK;
  2193. if (readl(&ep->dma->dmadesc)
  2194. != req->td_dma)
  2195. req = NULL;
  2196. break;
  2197. }
  2198. udelay(1);
  2199. }
  2200. /* stop DMA, leave ep NAKing */
  2201. writel(BIT(DMA_ABORT), &ep->dma->dmastat);
  2202. spin_stop_dma(ep->dma);
  2203. if (likely(req)) {
  2204. req->td->dmacount = 0;
  2205. t = readl(&ep->regs->ep_avail);
  2206. dma_done(ep, req, count,
  2207. (ep->out_overflow || t)
  2208. ? -EOVERFLOW : 0);
  2209. }
  2210. /* also flush to prevent erratum 0106 trouble */
  2211. if (unlikely(ep->out_overflow ||
  2212. (ep->dev->chiprev == 0x0100 &&
  2213. ep->dev->gadget.speed
  2214. == USB_SPEED_FULL))) {
  2215. out_flush(ep);
  2216. ep->out_overflow = 0;
  2217. }
  2218. /* (re)start dma if needed, stop NAKing */
  2219. ep->stopped = stopped;
  2220. if (!list_empty(&ep->queue))
  2221. restart_dma(ep);
  2222. } else
  2223. ep_dbg(ep->dev, "%s dma ep_stat %08x ??\n",
  2224. ep->ep.name, t);
  2225. return;
  2226. /* data packet(s) received (in the fifo, OUT) */
  2227. } else if (t & BIT(DATA_PACKET_RECEIVED_INTERRUPT)) {
  2228. if (read_fifo(ep, req) && ep->num != 0)
  2229. mode = 2;
  2230. /* data packet(s) transmitted (IN) */
  2231. } else if (t & BIT(DATA_PACKET_TRANSMITTED_INTERRUPT)) {
  2232. unsigned len;
  2233. len = req->req.length - req->req.actual;
  2234. if (len > ep->ep.maxpacket)
  2235. len = ep->ep.maxpacket;
  2236. req->req.actual += len;
  2237. /* if we wrote it all, we're usually done */
  2238. /* send zlps until the status stage */
  2239. if ((req->req.actual == req->req.length) &&
  2240. (!req->req.zero || len != ep->ep.maxpacket) && ep->num)
  2241. mode = 2;
  2242. /* there was nothing to do ... */
  2243. } else if (mode == 1)
  2244. return;
  2245. /* done */
  2246. if (mode == 2) {
  2247. /* stream endpoints often resubmit/unlink in completion */
  2248. done(ep, req, 0);
  2249. /* maybe advance queue to next request */
  2250. if (ep->num == 0) {
  2251. /* NOTE: net2280 could let gadget driver start the
  2252. * status stage later. since not all controllers let
  2253. * them control that, the api doesn't (yet) allow it.
  2254. */
  2255. if (!ep->stopped)
  2256. allow_status(ep);
  2257. req = NULL;
  2258. } else {
  2259. if (!list_empty(&ep->queue) && !ep->stopped)
  2260. req = list_entry(ep->queue.next,
  2261. struct net2280_request, queue);
  2262. else
  2263. req = NULL;
  2264. if (req && !ep->is_in)
  2265. stop_out_naking(ep);
  2266. }
  2267. }
  2268. /* is there a buffer for the next packet?
  2269. * for best streaming performance, make sure there is one.
  2270. */
  2271. if (req && !ep->stopped) {
  2272. /* load IN fifo with next packet (may be zlp) */
  2273. if (t & BIT(DATA_PACKET_TRANSMITTED_INTERRUPT))
  2274. write_fifo(ep, &req->req);
  2275. }
  2276. }
  2277. static struct net2280_ep *get_ep_by_addr(struct net2280 *dev, u16 wIndex)
  2278. {
  2279. struct net2280_ep *ep;
  2280. if ((wIndex & USB_ENDPOINT_NUMBER_MASK) == 0)
  2281. return &dev->ep[0];
  2282. list_for_each_entry(ep, &dev->gadget.ep_list, ep.ep_list) {
  2283. u8 bEndpointAddress;
  2284. if (!ep->desc)
  2285. continue;
  2286. bEndpointAddress = ep->desc->bEndpointAddress;
  2287. if ((wIndex ^ bEndpointAddress) & USB_DIR_IN)
  2288. continue;
  2289. if ((wIndex & 0x0f) == (bEndpointAddress & 0x0f))
  2290. return ep;
  2291. }
  2292. return NULL;
  2293. }
  2294. static void defect7374_workaround(struct net2280 *dev, struct usb_ctrlrequest r)
  2295. {
  2296. u32 scratch, fsmvalue;
  2297. u32 ack_wait_timeout, state;
  2298. /* Workaround for Defect 7374 (U1/U2 erroneously rejected): */
  2299. scratch = get_idx_reg(dev->regs, SCRATCH);
  2300. fsmvalue = scratch & (0xf << DEFECT7374_FSM_FIELD);
  2301. scratch &= ~(0xf << DEFECT7374_FSM_FIELD);
  2302. if (!((fsmvalue == DEFECT7374_FSM_WAITING_FOR_CONTROL_READ) &&
  2303. (r.bRequestType & USB_DIR_IN)))
  2304. return;
  2305. /* This is the first Control Read for this connection: */
  2306. if (!(readl(&dev->usb->usbstat) & BIT(SUPER_SPEED_MODE))) {
  2307. /*
  2308. * Connection is NOT SS:
  2309. * - Connection must be FS or HS.
  2310. * - This FSM state should allow workaround software to
  2311. * run after the next USB connection.
  2312. */
  2313. scratch |= DEFECT7374_FSM_NON_SS_CONTROL_READ;
  2314. goto restore_data_eps;
  2315. }
  2316. /* Connection is SS: */
  2317. for (ack_wait_timeout = 0;
  2318. ack_wait_timeout < DEFECT_7374_NUMBEROF_MAX_WAIT_LOOPS;
  2319. ack_wait_timeout++) {
  2320. state = readl(&dev->plregs->pl_ep_status_1)
  2321. & (0xff << STATE);
  2322. if ((state >= (ACK_GOOD_NORMAL << STATE)) &&
  2323. (state <= (ACK_GOOD_MORE_ACKS_TO_COME << STATE))) {
  2324. scratch |= DEFECT7374_FSM_SS_CONTROL_READ;
  2325. break;
  2326. }
  2327. /*
  2328. * We have not yet received host's Data Phase ACK
  2329. * - Wait and try again.
  2330. */
  2331. udelay(DEFECT_7374_PROCESSOR_WAIT_TIME);
  2332. continue;
  2333. }
  2334. if (ack_wait_timeout >= DEFECT_7374_NUMBEROF_MAX_WAIT_LOOPS) {
  2335. ep_err(dev, "FAIL: Defect 7374 workaround waited but failed "
  2336. "to detect SS host's data phase ACK.");
  2337. ep_err(dev, "PL_EP_STATUS_1(23:16):.Expected from 0x11 to 0x16"
  2338. "got 0x%2.2x.\n", state >> STATE);
  2339. } else {
  2340. ep_warn(dev, "INFO: Defect 7374 workaround waited about\n"
  2341. "%duSec for Control Read Data Phase ACK\n",
  2342. DEFECT_7374_PROCESSOR_WAIT_TIME * ack_wait_timeout);
  2343. }
  2344. restore_data_eps:
  2345. /*
  2346. * Restore data EPs to their pre-workaround settings (disabled,
  2347. * initialized, and other details).
  2348. */
  2349. defect7374_disable_data_eps(dev);
  2350. set_idx_reg(dev->regs, SCRATCH, scratch);
  2351. return;
  2352. }
  2353. static void ep_stall(struct net2280_ep *ep, int stall)
  2354. {
  2355. struct net2280 *dev = ep->dev;
  2356. u32 val;
  2357. static const u32 ep_pl[9] = { 0, 3, 4, 7, 8, 2, 5, 6, 9 };
  2358. if (stall) {
  2359. writel(BIT(SET_ENDPOINT_HALT) |
  2360. /* BIT(SET_NAK_PACKETS) | */
  2361. BIT(CLEAR_CONTROL_STATUS_PHASE_HANDSHAKE),
  2362. &ep->regs->ep_rsp);
  2363. ep->is_halt = 1;
  2364. } else {
  2365. if (dev->gadget.speed == USB_SPEED_SUPER) {
  2366. /*
  2367. * Workaround for SS SeqNum not cleared via
  2368. * Endpoint Halt (Clear) bit. select endpoint
  2369. */
  2370. val = readl(&dev->plregs->pl_ep_ctrl);
  2371. val = (val & ~0x1f) | ep_pl[ep->num];
  2372. writel(val, &dev->plregs->pl_ep_ctrl);
  2373. val |= BIT(SEQUENCE_NUMBER_RESET);
  2374. writel(val, &dev->plregs->pl_ep_ctrl);
  2375. }
  2376. val = readl(&ep->regs->ep_rsp);
  2377. val |= BIT(CLEAR_ENDPOINT_HALT) |
  2378. BIT(CLEAR_ENDPOINT_TOGGLE);
  2379. writel(val,
  2380. /* | BIT(CLEAR_NAK_PACKETS),*/
  2381. &ep->regs->ep_rsp);
  2382. ep->is_halt = 0;
  2383. val = readl(&ep->regs->ep_rsp);
  2384. }
  2385. }
  2386. static void ep_stdrsp(struct net2280_ep *ep, int value, int wedged)
  2387. {
  2388. /* set/clear, then synch memory views with the device */
  2389. if (value) {
  2390. ep->stopped = 1;
  2391. if (ep->num == 0)
  2392. ep->dev->protocol_stall = 1;
  2393. else {
  2394. if (ep->dma)
  2395. ep_stop_dma(ep);
  2396. ep_stall(ep, true);
  2397. }
  2398. if (wedged)
  2399. ep->wedged = 1;
  2400. } else {
  2401. ep->stopped = 0;
  2402. ep->wedged = 0;
  2403. ep_stall(ep, false);
  2404. /* Flush the queue */
  2405. if (!list_empty(&ep->queue)) {
  2406. struct net2280_request *req =
  2407. list_entry(ep->queue.next, struct net2280_request,
  2408. queue);
  2409. if (ep->dma)
  2410. resume_dma(ep);
  2411. else {
  2412. if (ep->is_in)
  2413. write_fifo(ep, &req->req);
  2414. else {
  2415. if (read_fifo(ep, req))
  2416. done(ep, req, 0);
  2417. }
  2418. }
  2419. }
  2420. }
  2421. }
  2422. static void handle_stat0_irqs_superspeed(struct net2280 *dev,
  2423. struct net2280_ep *ep, struct usb_ctrlrequest r)
  2424. {
  2425. int tmp = 0;
  2426. #define w_value le16_to_cpu(r.wValue)
  2427. #define w_index le16_to_cpu(r.wIndex)
  2428. #define w_length le16_to_cpu(r.wLength)
  2429. switch (r.bRequest) {
  2430. struct net2280_ep *e;
  2431. u16 status;
  2432. case USB_REQ_SET_CONFIGURATION:
  2433. dev->addressed_state = !w_value;
  2434. goto usb3_delegate;
  2435. case USB_REQ_GET_STATUS:
  2436. switch (r.bRequestType) {
  2437. case (USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_DEVICE):
  2438. status = dev->wakeup_enable ? 0x02 : 0x00;
  2439. if (dev->selfpowered)
  2440. status |= BIT(0);
  2441. status |= (dev->u1_enable << 2 | dev->u2_enable << 3 |
  2442. dev->ltm_enable << 4);
  2443. writel(0, &dev->epregs[0].ep_irqenb);
  2444. set_fifo_bytecount(ep, sizeof(status));
  2445. writel((__force u32) status, &dev->epregs[0].ep_data);
  2446. allow_status_338x(ep);
  2447. break;
  2448. case (USB_DIR_IN | USB_TYPE_STANDARD | USB_RECIP_ENDPOINT):
  2449. e = get_ep_by_addr(dev, w_index);
  2450. if (!e)
  2451. goto do_stall3;
  2452. status = readl(&e->regs->ep_rsp) &
  2453. BIT(CLEAR_ENDPOINT_HALT);
  2454. writel(0, &dev->epregs[0].ep_irqenb);
  2455. set_fifo_bytecount(ep, sizeof(status));
  2456. writel((__force u32) status, &dev->epregs[0].ep_data);
  2457. allow_status_338x(ep);
  2458. break;
  2459. default:
  2460. goto usb3_delegate;
  2461. }
  2462. break;
  2463. case USB_REQ_CLEAR_FEATURE:
  2464. switch (r.bRequestType) {
  2465. case (USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE):
  2466. if (!dev->addressed_state) {
  2467. switch (w_value) {
  2468. case USB_DEVICE_U1_ENABLE:
  2469. dev->u1_enable = 0;
  2470. writel(readl(&dev->usb_ext->usbctl2) &
  2471. ~BIT(U1_ENABLE),
  2472. &dev->usb_ext->usbctl2);
  2473. allow_status_338x(ep);
  2474. goto next_endpoints3;
  2475. case USB_DEVICE_U2_ENABLE:
  2476. dev->u2_enable = 0;
  2477. writel(readl(&dev->usb_ext->usbctl2) &
  2478. ~BIT(U2_ENABLE),
  2479. &dev->usb_ext->usbctl2);
  2480. allow_status_338x(ep);
  2481. goto next_endpoints3;
  2482. case USB_DEVICE_LTM_ENABLE:
  2483. dev->ltm_enable = 0;
  2484. writel(readl(&dev->usb_ext->usbctl2) &
  2485. ~BIT(LTM_ENABLE),
  2486. &dev->usb_ext->usbctl2);
  2487. allow_status_338x(ep);
  2488. goto next_endpoints3;
  2489. default:
  2490. break;
  2491. }
  2492. }
  2493. if (w_value == USB_DEVICE_REMOTE_WAKEUP) {
  2494. dev->wakeup_enable = 0;
  2495. writel(readl(&dev->usb->usbctl) &
  2496. ~BIT(DEVICE_REMOTE_WAKEUP_ENABLE),
  2497. &dev->usb->usbctl);
  2498. allow_status_338x(ep);
  2499. break;
  2500. }
  2501. goto usb3_delegate;
  2502. case (USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_ENDPOINT):
  2503. e = get_ep_by_addr(dev, w_index);
  2504. if (!e)
  2505. goto do_stall3;
  2506. if (w_value != USB_ENDPOINT_HALT)
  2507. goto do_stall3;
  2508. ep_vdbg(dev, "%s clear halt\n", e->ep.name);
  2509. ep_stall(e, false);
  2510. if (!list_empty(&e->queue) && e->td_dma)
  2511. restart_dma(e);
  2512. allow_status(ep);
  2513. ep->stopped = 1;
  2514. break;
  2515. default:
  2516. goto usb3_delegate;
  2517. }
  2518. break;
  2519. case USB_REQ_SET_FEATURE:
  2520. switch (r.bRequestType) {
  2521. case (USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_DEVICE):
  2522. if (!dev->addressed_state) {
  2523. switch (w_value) {
  2524. case USB_DEVICE_U1_ENABLE:
  2525. dev->u1_enable = 1;
  2526. writel(readl(&dev->usb_ext->usbctl2) |
  2527. BIT(U1_ENABLE),
  2528. &dev->usb_ext->usbctl2);
  2529. allow_status_338x(ep);
  2530. goto next_endpoints3;
  2531. case USB_DEVICE_U2_ENABLE:
  2532. dev->u2_enable = 1;
  2533. writel(readl(&dev->usb_ext->usbctl2) |
  2534. BIT(U2_ENABLE),
  2535. &dev->usb_ext->usbctl2);
  2536. allow_status_338x(ep);
  2537. goto next_endpoints3;
  2538. case USB_DEVICE_LTM_ENABLE:
  2539. dev->ltm_enable = 1;
  2540. writel(readl(&dev->usb_ext->usbctl2) |
  2541. BIT(LTM_ENABLE),
  2542. &dev->usb_ext->usbctl2);
  2543. allow_status_338x(ep);
  2544. goto next_endpoints3;
  2545. default:
  2546. break;
  2547. }
  2548. }
  2549. if (w_value == USB_DEVICE_REMOTE_WAKEUP) {
  2550. dev->wakeup_enable = 1;
  2551. writel(readl(&dev->usb->usbctl) |
  2552. BIT(DEVICE_REMOTE_WAKEUP_ENABLE),
  2553. &dev->usb->usbctl);
  2554. allow_status_338x(ep);
  2555. break;
  2556. }
  2557. goto usb3_delegate;
  2558. case (USB_DIR_OUT | USB_TYPE_STANDARD | USB_RECIP_ENDPOINT):
  2559. e = get_ep_by_addr(dev, w_index);
  2560. if (!e || (w_value != USB_ENDPOINT_HALT))
  2561. goto do_stall3;
  2562. ep_stdrsp(e, true, false);
  2563. allow_status_338x(ep);
  2564. break;
  2565. default:
  2566. goto usb3_delegate;
  2567. }
  2568. break;
  2569. default:
  2570. usb3_delegate:
  2571. ep_vdbg(dev, "setup %02x.%02x v%04x i%04x l%04x ep_cfg %08x\n",
  2572. r.bRequestType, r.bRequest,
  2573. w_value, w_index, w_length,
  2574. readl(&ep->cfg->ep_cfg));
  2575. ep->responded = 0;
  2576. spin_unlock(&dev->lock);
  2577. tmp = dev->driver->setup(&dev->gadget, &r);
  2578. spin_lock(&dev->lock);
  2579. }
  2580. do_stall3:
  2581. if (tmp < 0) {
  2582. ep_vdbg(dev, "req %02x.%02x protocol STALL; stat %d\n",
  2583. r.bRequestType, r.bRequest, tmp);
  2584. dev->protocol_stall = 1;
  2585. /* TD 9.9 Halt Endpoint test. TD 9.22 Set feature test */
  2586. ep_stall(ep, true);
  2587. }
  2588. next_endpoints3:
  2589. #undef w_value
  2590. #undef w_index
  2591. #undef w_length
  2592. return;
  2593. }
  2594. static void handle_stat0_irqs(struct net2280 *dev, u32 stat)
  2595. {
  2596. struct net2280_ep *ep;
  2597. u32 num, scratch;
  2598. /* most of these don't need individual acks */
  2599. stat &= ~BIT(INTA_ASSERTED);
  2600. if (!stat)
  2601. return;
  2602. /* ep_dbg(dev, "irqstat0 %04x\n", stat); */
  2603. /* starting a control request? */
  2604. if (unlikely(stat & BIT(SETUP_PACKET_INTERRUPT))) {
  2605. union {
  2606. u32 raw[2];
  2607. struct usb_ctrlrequest r;
  2608. } u;
  2609. int tmp;
  2610. struct net2280_request *req;
  2611. if (dev->gadget.speed == USB_SPEED_UNKNOWN) {
  2612. u32 val = readl(&dev->usb->usbstat);
  2613. if (val & BIT(SUPER_SPEED)) {
  2614. dev->gadget.speed = USB_SPEED_SUPER;
  2615. usb_ep_set_maxpacket_limit(&dev->ep[0].ep,
  2616. EP0_SS_MAX_PACKET_SIZE);
  2617. } else if (val & BIT(HIGH_SPEED)) {
  2618. dev->gadget.speed = USB_SPEED_HIGH;
  2619. usb_ep_set_maxpacket_limit(&dev->ep[0].ep,
  2620. EP0_HS_MAX_PACKET_SIZE);
  2621. } else {
  2622. dev->gadget.speed = USB_SPEED_FULL;
  2623. usb_ep_set_maxpacket_limit(&dev->ep[0].ep,
  2624. EP0_HS_MAX_PACKET_SIZE);
  2625. }
  2626. net2280_led_speed(dev, dev->gadget.speed);
  2627. ep_dbg(dev, "%s\n",
  2628. usb_speed_string(dev->gadget.speed));
  2629. }
  2630. ep = &dev->ep[0];
  2631. ep->irqs++;
  2632. /* make sure any leftover request state is cleared */
  2633. stat &= ~BIT(ENDPOINT_0_INTERRUPT);
  2634. while (!list_empty(&ep->queue)) {
  2635. req = list_entry(ep->queue.next,
  2636. struct net2280_request, queue);
  2637. done(ep, req, (req->req.actual == req->req.length)
  2638. ? 0 : -EPROTO);
  2639. }
  2640. ep->stopped = 0;
  2641. dev->protocol_stall = 0;
  2642. if (dev->quirks & PLX_SUPERSPEED)
  2643. ep->is_halt = 0;
  2644. else{
  2645. if (ep->dev->quirks & PLX_2280)
  2646. tmp = BIT(FIFO_OVERFLOW) |
  2647. BIT(FIFO_UNDERFLOW);
  2648. else
  2649. tmp = 0;
  2650. writel(tmp | BIT(TIMEOUT) |
  2651. BIT(USB_STALL_SENT) |
  2652. BIT(USB_IN_NAK_SENT) |
  2653. BIT(USB_IN_ACK_RCVD) |
  2654. BIT(USB_OUT_PING_NAK_SENT) |
  2655. BIT(USB_OUT_ACK_SENT) |
  2656. BIT(SHORT_PACKET_OUT_DONE_INTERRUPT) |
  2657. BIT(SHORT_PACKET_TRANSFERRED_INTERRUPT) |
  2658. BIT(DATA_PACKET_RECEIVED_INTERRUPT) |
  2659. BIT(DATA_PACKET_TRANSMITTED_INTERRUPT) |
  2660. BIT(DATA_OUT_PING_TOKEN_INTERRUPT) |
  2661. BIT(DATA_IN_TOKEN_INTERRUPT),
  2662. &ep->regs->ep_stat);
  2663. }
  2664. u.raw[0] = readl(&dev->usb->setup0123);
  2665. u.raw[1] = readl(&dev->usb->setup4567);
  2666. cpu_to_le32s(&u.raw[0]);
  2667. cpu_to_le32s(&u.raw[1]);
  2668. if (dev->quirks & PLX_SUPERSPEED)
  2669. defect7374_workaround(dev, u.r);
  2670. tmp = 0;
  2671. #define w_value le16_to_cpu(u.r.wValue)
  2672. #define w_index le16_to_cpu(u.r.wIndex)
  2673. #define w_length le16_to_cpu(u.r.wLength)
  2674. /* ack the irq */
  2675. writel(BIT(SETUP_PACKET_INTERRUPT), &dev->regs->irqstat0);
  2676. stat ^= BIT(SETUP_PACKET_INTERRUPT);
  2677. /* watch control traffic at the token level, and force
  2678. * synchronization before letting the status stage happen.
  2679. * FIXME ignore tokens we'll NAK, until driver responds.
  2680. * that'll mean a lot less irqs for some drivers.
  2681. */
  2682. ep->is_in = (u.r.bRequestType & USB_DIR_IN) != 0;
  2683. if (ep->is_in) {
  2684. scratch = BIT(DATA_PACKET_TRANSMITTED_INTERRUPT) |
  2685. BIT(DATA_OUT_PING_TOKEN_INTERRUPT) |
  2686. BIT(DATA_IN_TOKEN_INTERRUPT);
  2687. stop_out_naking(ep);
  2688. } else
  2689. scratch = BIT(DATA_PACKET_RECEIVED_INTERRUPT) |
  2690. BIT(DATA_OUT_PING_TOKEN_INTERRUPT) |
  2691. BIT(DATA_IN_TOKEN_INTERRUPT);
  2692. writel(scratch, &dev->epregs[0].ep_irqenb);
  2693. /* we made the hardware handle most lowlevel requests;
  2694. * everything else goes uplevel to the gadget code.
  2695. */
  2696. ep->responded = 1;
  2697. if (dev->gadget.speed == USB_SPEED_SUPER) {
  2698. handle_stat0_irqs_superspeed(dev, ep, u.r);
  2699. goto next_endpoints;
  2700. }
  2701. switch (u.r.bRequest) {
  2702. case USB_REQ_GET_STATUS: {
  2703. struct net2280_ep *e;
  2704. __le32 status;
  2705. /* hw handles device and interface status */
  2706. if (u.r.bRequestType != (USB_DIR_IN|USB_RECIP_ENDPOINT))
  2707. goto delegate;
  2708. e = get_ep_by_addr(dev, w_index);
  2709. if (!e || w_length > 2)
  2710. goto do_stall;
  2711. if (readl(&e->regs->ep_rsp) & BIT(SET_ENDPOINT_HALT))
  2712. status = cpu_to_le32(1);
  2713. else
  2714. status = cpu_to_le32(0);
  2715. /* don't bother with a request object! */
  2716. writel(0, &dev->epregs[0].ep_irqenb);
  2717. set_fifo_bytecount(ep, w_length);
  2718. writel((__force u32)status, &dev->epregs[0].ep_data);
  2719. allow_status(ep);
  2720. ep_vdbg(dev, "%s stat %02x\n", ep->ep.name, status);
  2721. goto next_endpoints;
  2722. }
  2723. break;
  2724. case USB_REQ_CLEAR_FEATURE: {
  2725. struct net2280_ep *e;
  2726. /* hw handles device features */
  2727. if (u.r.bRequestType != USB_RECIP_ENDPOINT)
  2728. goto delegate;
  2729. if (w_value != USB_ENDPOINT_HALT || w_length != 0)
  2730. goto do_stall;
  2731. e = get_ep_by_addr(dev, w_index);
  2732. if (!e)
  2733. goto do_stall;
  2734. if (e->wedged) {
  2735. ep_vdbg(dev, "%s wedged, halt not cleared\n",
  2736. ep->ep.name);
  2737. } else {
  2738. ep_vdbg(dev, "%s clear halt\n", e->ep.name);
  2739. clear_halt(e);
  2740. if ((ep->dev->quirks & PLX_SUPERSPEED) &&
  2741. !list_empty(&e->queue) && e->td_dma)
  2742. restart_dma(e);
  2743. }
  2744. allow_status(ep);
  2745. goto next_endpoints;
  2746. }
  2747. break;
  2748. case USB_REQ_SET_FEATURE: {
  2749. struct net2280_ep *e;
  2750. /* hw handles device features */
  2751. if (u.r.bRequestType != USB_RECIP_ENDPOINT)
  2752. goto delegate;
  2753. if (w_value != USB_ENDPOINT_HALT || w_length != 0)
  2754. goto do_stall;
  2755. e = get_ep_by_addr(dev, w_index);
  2756. if (!e)
  2757. goto do_stall;
  2758. if (e->ep.name == ep0name)
  2759. goto do_stall;
  2760. set_halt(e);
  2761. if ((dev->quirks & PLX_SUPERSPEED) && e->dma)
  2762. abort_dma(e);
  2763. allow_status(ep);
  2764. ep_vdbg(dev, "%s set halt\n", ep->ep.name);
  2765. goto next_endpoints;
  2766. }
  2767. break;
  2768. default:
  2769. delegate:
  2770. ep_vdbg(dev, "setup %02x.%02x v%04x i%04x l%04x "
  2771. "ep_cfg %08x\n",
  2772. u.r.bRequestType, u.r.bRequest,
  2773. w_value, w_index, w_length,
  2774. readl(&ep->cfg->ep_cfg));
  2775. ep->responded = 0;
  2776. spin_unlock(&dev->lock);
  2777. tmp = dev->driver->setup(&dev->gadget, &u.r);
  2778. spin_lock(&dev->lock);
  2779. }
  2780. /* stall ep0 on error */
  2781. if (tmp < 0) {
  2782. do_stall:
  2783. ep_vdbg(dev, "req %02x.%02x protocol STALL; stat %d\n",
  2784. u.r.bRequestType, u.r.bRequest, tmp);
  2785. dev->protocol_stall = 1;
  2786. }
  2787. /* some in/out token irq should follow; maybe stall then.
  2788. * driver must queue a request (even zlp) or halt ep0
  2789. * before the host times out.
  2790. */
  2791. }
  2792. #undef w_value
  2793. #undef w_index
  2794. #undef w_length
  2795. next_endpoints:
  2796. /* endpoint data irq ? */
  2797. scratch = stat & 0x7f;
  2798. stat &= ~0x7f;
  2799. for (num = 0; scratch; num++) {
  2800. u32 t;
  2801. /* do this endpoint's FIFO and queue need tending? */
  2802. t = BIT(num);
  2803. if ((scratch & t) == 0)
  2804. continue;
  2805. scratch ^= t;
  2806. ep = &dev->ep[num];
  2807. handle_ep_small(ep);
  2808. }
  2809. if (stat)
  2810. ep_dbg(dev, "unhandled irqstat0 %08x\n", stat);
  2811. }
  2812. #define DMA_INTERRUPTS (BIT(DMA_D_INTERRUPT) | \
  2813. BIT(DMA_C_INTERRUPT) | \
  2814. BIT(DMA_B_INTERRUPT) | \
  2815. BIT(DMA_A_INTERRUPT))
  2816. #define PCI_ERROR_INTERRUPTS ( \
  2817. BIT(PCI_MASTER_ABORT_RECEIVED_INTERRUPT) | \
  2818. BIT(PCI_TARGET_ABORT_RECEIVED_INTERRUPT) | \
  2819. BIT(PCI_RETRY_ABORT_INTERRUPT))
  2820. static void handle_stat1_irqs(struct net2280 *dev, u32 stat)
  2821. {
  2822. struct net2280_ep *ep;
  2823. u32 tmp, num, mask, scratch;
  2824. /* after disconnect there's nothing else to do! */
  2825. tmp = BIT(VBUS_INTERRUPT) | BIT(ROOT_PORT_RESET_INTERRUPT);
  2826. mask = BIT(SUPER_SPEED) | BIT(HIGH_SPEED) | BIT(FULL_SPEED);
  2827. /* VBUS disconnect is indicated by VBUS_PIN and VBUS_INTERRUPT set.
  2828. * Root Port Reset is indicated by ROOT_PORT_RESET_INTERRUPT set and
  2829. * both HIGH_SPEED and FULL_SPEED clear (as ROOT_PORT_RESET_INTERRUPT
  2830. * only indicates a change in the reset state).
  2831. */
  2832. if (stat & tmp) {
  2833. bool reset = false;
  2834. bool disconnect = false;
  2835. /*
  2836. * Ignore disconnects and resets if the speed hasn't been set.
  2837. * VBUS can bounce and there's always an initial reset.
  2838. */
  2839. writel(tmp, &dev->regs->irqstat1);
  2840. if (dev->gadget.speed != USB_SPEED_UNKNOWN) {
  2841. if ((stat & BIT(VBUS_INTERRUPT)) &&
  2842. (readl(&dev->usb->usbctl) &
  2843. BIT(VBUS_PIN)) == 0) {
  2844. disconnect = true;
  2845. ep_dbg(dev, "disconnect %s\n",
  2846. dev->driver->driver.name);
  2847. } else if ((stat & BIT(ROOT_PORT_RESET_INTERRUPT)) &&
  2848. (readl(&dev->usb->usbstat) & mask)
  2849. == 0) {
  2850. reset = true;
  2851. ep_dbg(dev, "reset %s\n",
  2852. dev->driver->driver.name);
  2853. }
  2854. if (disconnect || reset) {
  2855. stop_activity(dev, dev->driver);
  2856. ep0_start(dev);
  2857. spin_unlock(&dev->lock);
  2858. if (reset)
  2859. usb_gadget_udc_reset
  2860. (&dev->gadget, dev->driver);
  2861. else
  2862. (dev->driver->disconnect)
  2863. (&dev->gadget);
  2864. spin_lock(&dev->lock);
  2865. return;
  2866. }
  2867. }
  2868. stat &= ~tmp;
  2869. /* vBUS can bounce ... one of many reasons to ignore the
  2870. * notion of hotplug events on bus connect/disconnect!
  2871. */
  2872. if (!stat)
  2873. return;
  2874. }
  2875. /* NOTE: chip stays in PCI D0 state for now, but it could
  2876. * enter D1 to save more power
  2877. */
  2878. tmp = BIT(SUSPEND_REQUEST_CHANGE_INTERRUPT);
  2879. if (stat & tmp) {
  2880. writel(tmp, &dev->regs->irqstat1);
  2881. if (stat & BIT(SUSPEND_REQUEST_INTERRUPT)) {
  2882. if (dev->driver->suspend)
  2883. dev->driver->suspend(&dev->gadget);
  2884. if (!enable_suspend)
  2885. stat &= ~BIT(SUSPEND_REQUEST_INTERRUPT);
  2886. } else {
  2887. if (dev->driver->resume)
  2888. dev->driver->resume(&dev->gadget);
  2889. /* at high speed, note erratum 0133 */
  2890. }
  2891. stat &= ~tmp;
  2892. }
  2893. /* clear any other status/irqs */
  2894. if (stat)
  2895. writel(stat, &dev->regs->irqstat1);
  2896. /* some status we can just ignore */
  2897. if (dev->quirks & PLX_2280)
  2898. stat &= ~(BIT(CONTROL_STATUS_INTERRUPT) |
  2899. BIT(SUSPEND_REQUEST_INTERRUPT) |
  2900. BIT(RESUME_INTERRUPT) |
  2901. BIT(SOF_INTERRUPT));
  2902. else
  2903. stat &= ~(BIT(CONTROL_STATUS_INTERRUPT) |
  2904. BIT(RESUME_INTERRUPT) |
  2905. BIT(SOF_DOWN_INTERRUPT) |
  2906. BIT(SOF_INTERRUPT));
  2907. if (!stat)
  2908. return;
  2909. /* ep_dbg(dev, "irqstat1 %08x\n", stat);*/
  2910. /* DMA status, for ep-{a,b,c,d} */
  2911. scratch = stat & DMA_INTERRUPTS;
  2912. stat &= ~DMA_INTERRUPTS;
  2913. scratch >>= 9;
  2914. for (num = 0; scratch; num++) {
  2915. struct net2280_dma_regs __iomem *dma;
  2916. tmp = BIT(num);
  2917. if ((tmp & scratch) == 0)
  2918. continue;
  2919. scratch ^= tmp;
  2920. ep = &dev->ep[num + 1];
  2921. dma = ep->dma;
  2922. if (!dma)
  2923. continue;
  2924. /* clear ep's dma status */
  2925. tmp = readl(&dma->dmastat);
  2926. writel(tmp, &dma->dmastat);
  2927. /* dma sync*/
  2928. if (dev->quirks & PLX_SUPERSPEED) {
  2929. u32 r_dmacount = readl(&dma->dmacount);
  2930. if (!ep->is_in && (r_dmacount & 0x00FFFFFF) &&
  2931. (tmp & BIT(DMA_TRANSACTION_DONE_INTERRUPT)))
  2932. continue;
  2933. }
  2934. /* chaining should stop on abort, short OUT from fifo,
  2935. * or (stat0 codepath) short OUT transfer.
  2936. */
  2937. if (!use_dma_chaining) {
  2938. if (!(tmp & BIT(DMA_TRANSACTION_DONE_INTERRUPT))) {
  2939. ep_dbg(ep->dev, "%s no xact done? %08x\n",
  2940. ep->ep.name, tmp);
  2941. continue;
  2942. }
  2943. stop_dma(ep->dma);
  2944. }
  2945. /* OUT transfers terminate when the data from the
  2946. * host is in our memory. Process whatever's done.
  2947. * On this path, we know transfer's last packet wasn't
  2948. * less than req->length. NAK_OUT_PACKETS may be set,
  2949. * or the FIFO may already be holding new packets.
  2950. *
  2951. * IN transfers can linger in the FIFO for a very
  2952. * long time ... we ignore that for now, accounting
  2953. * precisely (like PIO does) needs per-packet irqs
  2954. */
  2955. scan_dma_completions(ep);
  2956. /* disable dma on inactive queues; else maybe restart */
  2957. if (list_empty(&ep->queue)) {
  2958. if (use_dma_chaining)
  2959. stop_dma(ep->dma);
  2960. } else {
  2961. tmp = readl(&dma->dmactl);
  2962. if (!use_dma_chaining || (tmp & BIT(DMA_ENABLE)) == 0)
  2963. restart_dma(ep);
  2964. else if (ep->is_in && use_dma_chaining) {
  2965. struct net2280_request *req;
  2966. __le32 dmacount;
  2967. /* the descriptor at the head of the chain
  2968. * may still have VALID_BIT clear; that's
  2969. * used to trigger changing DMA_FIFO_VALIDATE
  2970. * (affects automagic zlp writes).
  2971. */
  2972. req = list_entry(ep->queue.next,
  2973. struct net2280_request, queue);
  2974. dmacount = req->td->dmacount;
  2975. dmacount &= cpu_to_le32(BIT(VALID_BIT) |
  2976. DMA_BYTE_COUNT_MASK);
  2977. if (dmacount && (dmacount & valid_bit) == 0)
  2978. restart_dma(ep);
  2979. }
  2980. }
  2981. ep->irqs++;
  2982. }
  2983. /* NOTE: there are other PCI errors we might usefully notice.
  2984. * if they appear very often, here's where to try recovering.
  2985. */
  2986. if (stat & PCI_ERROR_INTERRUPTS) {
  2987. ep_err(dev, "pci dma error; stat %08x\n", stat);
  2988. stat &= ~PCI_ERROR_INTERRUPTS;
  2989. /* these are fatal errors, but "maybe" they won't
  2990. * happen again ...
  2991. */
  2992. stop_activity(dev, dev->driver);
  2993. ep0_start(dev);
  2994. stat = 0;
  2995. }
  2996. if (stat)
  2997. ep_dbg(dev, "unhandled irqstat1 %08x\n", stat);
  2998. }
  2999. static irqreturn_t net2280_irq(int irq, void *_dev)
  3000. {
  3001. struct net2280 *dev = _dev;
  3002. /* shared interrupt, not ours */
  3003. if ((dev->quirks & PLX_LEGACY) &&
  3004. (!(readl(&dev->regs->irqstat0) & BIT(INTA_ASSERTED))))
  3005. return IRQ_NONE;
  3006. spin_lock(&dev->lock);
  3007. /* handle disconnect, dma, and more */
  3008. handle_stat1_irqs(dev, readl(&dev->regs->irqstat1));
  3009. /* control requests and PIO */
  3010. handle_stat0_irqs(dev, readl(&dev->regs->irqstat0));
  3011. if (dev->quirks & PLX_SUPERSPEED) {
  3012. /* re-enable interrupt to trigger any possible new interrupt */
  3013. u32 pciirqenb1 = readl(&dev->regs->pciirqenb1);
  3014. writel(pciirqenb1 & 0x7FFFFFFF, &dev->regs->pciirqenb1);
  3015. writel(pciirqenb1, &dev->regs->pciirqenb1);
  3016. }
  3017. spin_unlock(&dev->lock);
  3018. return IRQ_HANDLED;
  3019. }
  3020. /*-------------------------------------------------------------------------*/
  3021. static void gadget_release(struct device *_dev)
  3022. {
  3023. struct net2280 *dev = dev_get_drvdata(_dev);
  3024. kfree(dev);
  3025. }
  3026. /* tear down the binding between this driver and the pci device */
  3027. static void net2280_remove(struct pci_dev *pdev)
  3028. {
  3029. struct net2280 *dev = pci_get_drvdata(pdev);
  3030. usb_del_gadget_udc(&dev->gadget);
  3031. BUG_ON(dev->driver);
  3032. /* then clean up the resources we allocated during probe() */
  3033. net2280_led_shutdown(dev);
  3034. if (dev->requests) {
  3035. int i;
  3036. for (i = 1; i < 5; i++) {
  3037. if (!dev->ep[i].dummy)
  3038. continue;
  3039. pci_pool_free(dev->requests, dev->ep[i].dummy,
  3040. dev->ep[i].td_dma);
  3041. }
  3042. pci_pool_destroy(dev->requests);
  3043. }
  3044. if (dev->got_irq)
  3045. free_irq(pdev->irq, dev);
  3046. if (use_msi && dev->quirks & PLX_SUPERSPEED)
  3047. pci_disable_msi(pdev);
  3048. if (dev->regs)
  3049. iounmap(dev->regs);
  3050. if (dev->region)
  3051. release_mem_region(pci_resource_start(pdev, 0),
  3052. pci_resource_len(pdev, 0));
  3053. if (dev->enabled)
  3054. pci_disable_device(pdev);
  3055. device_remove_file(&pdev->dev, &dev_attr_registers);
  3056. ep_info(dev, "unbind\n");
  3057. }
  3058. /* wrap this driver around the specified device, but
  3059. * don't respond over USB until a gadget driver binds to us.
  3060. */
  3061. static int net2280_probe(struct pci_dev *pdev, const struct pci_device_id *id)
  3062. {
  3063. struct net2280 *dev;
  3064. unsigned long resource, len;
  3065. void __iomem *base = NULL;
  3066. int retval, i;
  3067. if (!use_dma)
  3068. use_dma_chaining = 0;
  3069. /* alloc, and start init */
  3070. dev = kzalloc(sizeof(*dev), GFP_KERNEL);
  3071. if (dev == NULL) {
  3072. retval = -ENOMEM;
  3073. goto done;
  3074. }
  3075. pci_set_drvdata(pdev, dev);
  3076. spin_lock_init(&dev->lock);
  3077. dev->quirks = id->driver_data;
  3078. dev->pdev = pdev;
  3079. dev->gadget.ops = &net2280_ops;
  3080. dev->gadget.max_speed = (dev->quirks & PLX_SUPERSPEED) ?
  3081. USB_SPEED_SUPER : USB_SPEED_HIGH;
  3082. /* the "gadget" abstracts/virtualizes the controller */
  3083. dev->gadget.name = driver_name;
  3084. /* now all the pci goodies ... */
  3085. if (pci_enable_device(pdev) < 0) {
  3086. retval = -ENODEV;
  3087. goto done;
  3088. }
  3089. dev->enabled = 1;
  3090. /* BAR 0 holds all the registers
  3091. * BAR 1 is 8051 memory; unused here (note erratum 0103)
  3092. * BAR 2 is fifo memory; unused here
  3093. */
  3094. resource = pci_resource_start(pdev, 0);
  3095. len = pci_resource_len(pdev, 0);
  3096. if (!request_mem_region(resource, len, driver_name)) {
  3097. ep_dbg(dev, "controller already in use\n");
  3098. retval = -EBUSY;
  3099. goto done;
  3100. }
  3101. dev->region = 1;
  3102. /* FIXME provide firmware download interface to put
  3103. * 8051 code into the chip, e.g. to turn on PCI PM.
  3104. */
  3105. base = ioremap_nocache(resource, len);
  3106. if (base == NULL) {
  3107. ep_dbg(dev, "can't map memory\n");
  3108. retval = -EFAULT;
  3109. goto done;
  3110. }
  3111. dev->regs = (struct net2280_regs __iomem *) base;
  3112. dev->usb = (struct net2280_usb_regs __iomem *) (base + 0x0080);
  3113. dev->pci = (struct net2280_pci_regs __iomem *) (base + 0x0100);
  3114. dev->dma = (struct net2280_dma_regs __iomem *) (base + 0x0180);
  3115. dev->dep = (struct net2280_dep_regs __iomem *) (base + 0x0200);
  3116. dev->epregs = (struct net2280_ep_regs __iomem *) (base + 0x0300);
  3117. if (dev->quirks & PLX_SUPERSPEED) {
  3118. u32 fsmvalue;
  3119. u32 usbstat;
  3120. dev->usb_ext = (struct usb338x_usb_ext_regs __iomem *)
  3121. (base + 0x00b4);
  3122. dev->fiforegs = (struct usb338x_fifo_regs __iomem *)
  3123. (base + 0x0500);
  3124. dev->llregs = (struct usb338x_ll_regs __iomem *)
  3125. (base + 0x0700);
  3126. dev->ll_lfps_regs = (struct usb338x_ll_lfps_regs __iomem *)
  3127. (base + 0x0748);
  3128. dev->ll_tsn_regs = (struct usb338x_ll_tsn_regs __iomem *)
  3129. (base + 0x077c);
  3130. dev->ll_chicken_reg = (struct usb338x_ll_chi_regs __iomem *)
  3131. (base + 0x079c);
  3132. dev->plregs = (struct usb338x_pl_regs __iomem *)
  3133. (base + 0x0800);
  3134. usbstat = readl(&dev->usb->usbstat);
  3135. dev->enhanced_mode = !!(usbstat & BIT(11));
  3136. dev->n_ep = (dev->enhanced_mode) ? 9 : 5;
  3137. /* put into initial config, link up all endpoints */
  3138. fsmvalue = get_idx_reg(dev->regs, SCRATCH) &
  3139. (0xf << DEFECT7374_FSM_FIELD);
  3140. /* See if firmware needs to set up for workaround: */
  3141. if (fsmvalue == DEFECT7374_FSM_SS_CONTROL_READ)
  3142. writel(0, &dev->usb->usbctl);
  3143. } else{
  3144. dev->enhanced_mode = 0;
  3145. dev->n_ep = 7;
  3146. /* put into initial config, link up all endpoints */
  3147. writel(0, &dev->usb->usbctl);
  3148. }
  3149. usb_reset(dev);
  3150. usb_reinit(dev);
  3151. /* irq setup after old hardware is cleaned up */
  3152. if (!pdev->irq) {
  3153. ep_err(dev, "No IRQ. Check PCI setup!\n");
  3154. retval = -ENODEV;
  3155. goto done;
  3156. }
  3157. if (use_msi && (dev->quirks & PLX_SUPERSPEED))
  3158. if (pci_enable_msi(pdev))
  3159. ep_err(dev, "Failed to enable MSI mode\n");
  3160. if (request_irq(pdev->irq, net2280_irq, IRQF_SHARED,
  3161. driver_name, dev)) {
  3162. ep_err(dev, "request interrupt %d failed\n", pdev->irq);
  3163. retval = -EBUSY;
  3164. goto done;
  3165. }
  3166. dev->got_irq = 1;
  3167. /* DMA setup */
  3168. /* NOTE: we know only the 32 LSBs of dma addresses may be nonzero */
  3169. dev->requests = pci_pool_create("requests", pdev,
  3170. sizeof(struct net2280_dma),
  3171. 0 /* no alignment requirements */,
  3172. 0 /* or page-crossing issues */);
  3173. if (!dev->requests) {
  3174. ep_dbg(dev, "can't get request pool\n");
  3175. retval = -ENOMEM;
  3176. goto done;
  3177. }
  3178. for (i = 1; i < 5; i++) {
  3179. struct net2280_dma *td;
  3180. td = pci_pool_alloc(dev->requests, GFP_KERNEL,
  3181. &dev->ep[i].td_dma);
  3182. if (!td) {
  3183. ep_dbg(dev, "can't get dummy %d\n", i);
  3184. retval = -ENOMEM;
  3185. goto done;
  3186. }
  3187. td->dmacount = 0; /* not VALID */
  3188. td->dmadesc = td->dmaaddr;
  3189. dev->ep[i].dummy = td;
  3190. }
  3191. /* enable lower-overhead pci memory bursts during DMA */
  3192. if (dev->quirks & PLX_LEGACY)
  3193. writel(BIT(DMA_MEMORY_WRITE_AND_INVALIDATE_ENABLE) |
  3194. /*
  3195. * 256 write retries may not be enough...
  3196. BIT(PCI_RETRY_ABORT_ENABLE) |
  3197. */
  3198. BIT(DMA_READ_MULTIPLE_ENABLE) |
  3199. BIT(DMA_READ_LINE_ENABLE),
  3200. &dev->pci->pcimstctl);
  3201. /* erratum 0115 shouldn't appear: Linux inits PCI_LATENCY_TIMER */
  3202. pci_set_master(pdev);
  3203. pci_try_set_mwi(pdev);
  3204. /* ... also flushes any posted pci writes */
  3205. dev->chiprev = get_idx_reg(dev->regs, REG_CHIPREV) & 0xffff;
  3206. /* done */
  3207. ep_info(dev, "%s\n", driver_desc);
  3208. ep_info(dev, "irq %d, pci mem %p, chip rev %04x\n",
  3209. pdev->irq, base, dev->chiprev);
  3210. ep_info(dev, "version: " DRIVER_VERSION "; dma %s %s\n",
  3211. use_dma ? (use_dma_chaining ? "chaining" : "enabled")
  3212. : "disabled",
  3213. dev->enhanced_mode ? "enhanced mode" : "legacy mode");
  3214. retval = device_create_file(&pdev->dev, &dev_attr_registers);
  3215. if (retval)
  3216. goto done;
  3217. retval = usb_add_gadget_udc_release(&pdev->dev, &dev->gadget,
  3218. gadget_release);
  3219. if (retval)
  3220. goto done;
  3221. return 0;
  3222. done:
  3223. if (dev)
  3224. net2280_remove(pdev);
  3225. return retval;
  3226. }
  3227. /* make sure the board is quiescent; otherwise it will continue
  3228. * generating IRQs across the upcoming reboot.
  3229. */
  3230. static void net2280_shutdown(struct pci_dev *pdev)
  3231. {
  3232. struct net2280 *dev = pci_get_drvdata(pdev);
  3233. /* disable IRQs */
  3234. writel(0, &dev->regs->pciirqenb0);
  3235. writel(0, &dev->regs->pciirqenb1);
  3236. /* disable the pullup so the host will think we're gone */
  3237. writel(0, &dev->usb->usbctl);
  3238. /* Disable full-speed test mode */
  3239. if (dev->quirks & PLX_LEGACY)
  3240. writel(0, &dev->usb->xcvrdiag);
  3241. }
  3242. /*-------------------------------------------------------------------------*/
  3243. static const struct pci_device_id pci_ids[] = { {
  3244. .class = ((PCI_CLASS_SERIAL_USB << 8) | 0xfe),
  3245. .class_mask = ~0,
  3246. .vendor = PCI_VENDOR_ID_PLX_LEGACY,
  3247. .device = 0x2280,
  3248. .subvendor = PCI_ANY_ID,
  3249. .subdevice = PCI_ANY_ID,
  3250. .driver_data = PLX_LEGACY | PLX_2280,
  3251. }, {
  3252. .class = ((PCI_CLASS_SERIAL_USB << 8) | 0xfe),
  3253. .class_mask = ~0,
  3254. .vendor = PCI_VENDOR_ID_PLX_LEGACY,
  3255. .device = 0x2282,
  3256. .subvendor = PCI_ANY_ID,
  3257. .subdevice = PCI_ANY_ID,
  3258. .driver_data = PLX_LEGACY,
  3259. },
  3260. {
  3261. .class = ((PCI_CLASS_SERIAL_USB << 8) | 0xfe),
  3262. .class_mask = ~0,
  3263. .vendor = PCI_VENDOR_ID_PLX,
  3264. .device = 0x3380,
  3265. .subvendor = PCI_ANY_ID,
  3266. .subdevice = PCI_ANY_ID,
  3267. .driver_data = PLX_SUPERSPEED,
  3268. },
  3269. {
  3270. .class = ((PCI_CLASS_SERIAL_USB << 8) | 0xfe),
  3271. .class_mask = ~0,
  3272. .vendor = PCI_VENDOR_ID_PLX,
  3273. .device = 0x3382,
  3274. .subvendor = PCI_ANY_ID,
  3275. .subdevice = PCI_ANY_ID,
  3276. .driver_data = PLX_SUPERSPEED,
  3277. },
  3278. { /* end: all zeroes */ }
  3279. };
  3280. MODULE_DEVICE_TABLE(pci, pci_ids);
  3281. /* pci driver glue; this is a "new style" PCI driver module */
  3282. static struct pci_driver net2280_pci_driver = {
  3283. .name = (char *) driver_name,
  3284. .id_table = pci_ids,
  3285. .probe = net2280_probe,
  3286. .remove = net2280_remove,
  3287. .shutdown = net2280_shutdown,
  3288. /* FIXME add power management support */
  3289. };
  3290. module_pci_driver(net2280_pci_driver);
  3291. MODULE_DESCRIPTION(DRIVER_DESC);
  3292. MODULE_AUTHOR("David Brownell");
  3293. MODULE_LICENSE("GPL");