rockchip_thermal.c 18 KB

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  1. /*
  2. * Copyright (c) 2014, Fuzhou Rockchip Electronics Co., Ltd
  3. *
  4. * This program is free software; you can redistribute it and/or modify it
  5. * under the terms and conditions of the GNU General Public License,
  6. * version 2, as published by the Free Software Foundation.
  7. *
  8. * This program is distributed in the hope it will be useful, but WITHOUT
  9. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  11. * more details.
  12. */
  13. #include <linux/clk.h>
  14. #include <linux/delay.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/io.h>
  17. #include <linux/module.h>
  18. #include <linux/of.h>
  19. #include <linux/of_address.h>
  20. #include <linux/of_irq.h>
  21. #include <linux/platform_device.h>
  22. #include <linux/reset.h>
  23. #include <linux/thermal.h>
  24. /**
  25. * If the temperature over a period of time High,
  26. * the resulting TSHUT gave CRU module,let it reset the entire chip,
  27. * or via GPIO give PMIC.
  28. */
  29. enum tshut_mode {
  30. TSHUT_MODE_CRU = 0,
  31. TSHUT_MODE_GPIO,
  32. };
  33. /**
  34. * the system Temperature Sensors tshut(tshut) polarity
  35. * the bit 8 is tshut polarity.
  36. * 0: low active, 1: high active
  37. */
  38. enum tshut_polarity {
  39. TSHUT_LOW_ACTIVE = 0,
  40. TSHUT_HIGH_ACTIVE,
  41. };
  42. /**
  43. * The system has three Temperature Sensors. channel 0 is reserved,
  44. * channel 1 is for CPU, and channel 2 is for GPU.
  45. */
  46. enum sensor_id {
  47. SENSOR_CPU = 1,
  48. SENSOR_GPU,
  49. };
  50. struct rockchip_tsadc_chip {
  51. /* The hardware-controlled tshut property */
  52. long tshut_temp;
  53. enum tshut_mode tshut_mode;
  54. enum tshut_polarity tshut_polarity;
  55. /* Chip-wide methods */
  56. void (*initialize)(void __iomem *reg, enum tshut_polarity p);
  57. void (*irq_ack)(void __iomem *reg);
  58. void (*control)(void __iomem *reg, bool on);
  59. /* Per-sensor methods */
  60. int (*get_temp)(int chn, void __iomem *reg, long *temp);
  61. void (*set_tshut_temp)(int chn, void __iomem *reg, long temp);
  62. void (*set_tshut_mode)(int chn, void __iomem *reg, enum tshut_mode m);
  63. };
  64. struct rockchip_thermal_sensor {
  65. struct rockchip_thermal_data *thermal;
  66. struct thermal_zone_device *tzd;
  67. enum sensor_id id;
  68. };
  69. #define NUM_SENSORS 2 /* Ignore unused sensor 0 */
  70. struct rockchip_thermal_data {
  71. const struct rockchip_tsadc_chip *chip;
  72. struct platform_device *pdev;
  73. struct reset_control *reset;
  74. struct rockchip_thermal_sensor sensors[NUM_SENSORS];
  75. struct clk *clk;
  76. struct clk *pclk;
  77. void __iomem *regs;
  78. long tshut_temp;
  79. enum tshut_mode tshut_mode;
  80. enum tshut_polarity tshut_polarity;
  81. };
  82. /* TSADC V2 Sensor info define: */
  83. #define TSADCV2_AUTO_CON 0x04
  84. #define TSADCV2_INT_EN 0x08
  85. #define TSADCV2_INT_PD 0x0c
  86. #define TSADCV2_DATA(chn) (0x20 + (chn) * 0x04)
  87. #define TSADCV2_COMP_SHUT(chn) (0x40 + (chn) * 0x04)
  88. #define TSADCV2_HIGHT_INT_DEBOUNCE 0x60
  89. #define TSADCV2_HIGHT_TSHUT_DEBOUNCE 0x64
  90. #define TSADCV2_AUTO_PERIOD 0x68
  91. #define TSADCV2_AUTO_PERIOD_HT 0x6c
  92. #define TSADCV2_AUTO_EN BIT(0)
  93. #define TSADCV2_AUTO_DISABLE ~BIT(0)
  94. #define TSADCV2_AUTO_SRC_EN(chn) BIT(4 + (chn))
  95. #define TSADCV2_AUTO_TSHUT_POLARITY_HIGH BIT(8)
  96. #define TSADCV2_AUTO_TSHUT_POLARITY_LOW ~BIT(8)
  97. #define TSADCV2_INT_SRC_EN(chn) BIT(chn)
  98. #define TSADCV2_SHUT_2GPIO_SRC_EN(chn) BIT(4 + (chn))
  99. #define TSADCV2_SHUT_2CRU_SRC_EN(chn) BIT(8 + (chn))
  100. #define TSADCV2_INT_PD_CLEAR ~BIT(8)
  101. #define TSADCV2_DATA_MASK 0xfff
  102. #define TSADCV2_HIGHT_INT_DEBOUNCE_COUNT 4
  103. #define TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT 4
  104. #define TSADCV2_AUTO_PERIOD_TIME 250 /* msec */
  105. #define TSADCV2_AUTO_PERIOD_HT_TIME 50 /* msec */
  106. struct tsadc_table {
  107. unsigned long code;
  108. long temp;
  109. };
  110. static const struct tsadc_table v2_code_table[] = {
  111. {TSADCV2_DATA_MASK, -40000},
  112. {3800, -40000},
  113. {3792, -35000},
  114. {3783, -30000},
  115. {3774, -25000},
  116. {3765, -20000},
  117. {3756, -15000},
  118. {3747, -10000},
  119. {3737, -5000},
  120. {3728, 0},
  121. {3718, 5000},
  122. {3708, 10000},
  123. {3698, 15000},
  124. {3688, 20000},
  125. {3678, 25000},
  126. {3667, 30000},
  127. {3656, 35000},
  128. {3645, 40000},
  129. {3634, 45000},
  130. {3623, 50000},
  131. {3611, 55000},
  132. {3600, 60000},
  133. {3588, 65000},
  134. {3575, 70000},
  135. {3563, 75000},
  136. {3550, 80000},
  137. {3537, 85000},
  138. {3524, 90000},
  139. {3510, 95000},
  140. {3496, 100000},
  141. {3482, 105000},
  142. {3467, 110000},
  143. {3452, 115000},
  144. {3437, 120000},
  145. {3421, 125000},
  146. {0, 125000},
  147. };
  148. static u32 rk_tsadcv2_temp_to_code(long temp)
  149. {
  150. int high, low, mid;
  151. low = 0;
  152. high = ARRAY_SIZE(v2_code_table) - 1;
  153. mid = (high + low) / 2;
  154. if (temp < v2_code_table[low].temp || temp > v2_code_table[high].temp)
  155. return 0;
  156. while (low <= high) {
  157. if (temp == v2_code_table[mid].temp)
  158. return v2_code_table[mid].code;
  159. else if (temp < v2_code_table[mid].temp)
  160. high = mid - 1;
  161. else
  162. low = mid + 1;
  163. mid = (low + high) / 2;
  164. }
  165. return 0;
  166. }
  167. static long rk_tsadcv2_code_to_temp(u32 code)
  168. {
  169. int high, low, mid;
  170. low = 0;
  171. high = ARRAY_SIZE(v2_code_table) - 1;
  172. mid = (high + low) / 2;
  173. if (code > v2_code_table[low].code || code < v2_code_table[high].code)
  174. return 125000; /* No code available, return max temperature */
  175. while (low <= high) {
  176. if (code >= v2_code_table[mid].code && code <
  177. v2_code_table[mid - 1].code)
  178. return v2_code_table[mid].temp;
  179. else if (code < v2_code_table[mid].code)
  180. low = mid + 1;
  181. else
  182. high = mid - 1;
  183. mid = (low + high) / 2;
  184. }
  185. return 125000;
  186. }
  187. /**
  188. * rk_tsadcv2_initialize - initialize TASDC Controller
  189. * (1) Set TSADCV2_AUTO_PERIOD, configure the interleave between
  190. * every two accessing of TSADC in normal operation.
  191. * (2) Set TSADCV2_AUTO_PERIOD_HT, configure the interleave between
  192. * every two accessing of TSADC after the temperature is higher
  193. * than COM_SHUT or COM_INT.
  194. * (3) Set TSADCV2_HIGH_INT_DEBOUNCE and TSADC_HIGHT_TSHUT_DEBOUNCE,
  195. * if the temperature is higher than COMP_INT or COMP_SHUT for
  196. * "debounce" times, TSADC controller will generate interrupt or TSHUT.
  197. */
  198. static void rk_tsadcv2_initialize(void __iomem *regs,
  199. enum tshut_polarity tshut_polarity)
  200. {
  201. if (tshut_polarity == TSHUT_HIGH_ACTIVE)
  202. writel_relaxed(0 | (TSADCV2_AUTO_TSHUT_POLARITY_HIGH),
  203. regs + TSADCV2_AUTO_CON);
  204. else
  205. writel_relaxed(0 | (TSADCV2_AUTO_TSHUT_POLARITY_LOW),
  206. regs + TSADCV2_AUTO_CON);
  207. writel_relaxed(TSADCV2_AUTO_PERIOD_TIME, regs + TSADCV2_AUTO_PERIOD);
  208. writel_relaxed(TSADCV2_HIGHT_INT_DEBOUNCE_COUNT,
  209. regs + TSADCV2_HIGHT_INT_DEBOUNCE);
  210. writel_relaxed(TSADCV2_AUTO_PERIOD_HT_TIME,
  211. regs + TSADCV2_AUTO_PERIOD_HT);
  212. writel_relaxed(TSADCV2_HIGHT_TSHUT_DEBOUNCE_COUNT,
  213. regs + TSADCV2_HIGHT_TSHUT_DEBOUNCE);
  214. }
  215. static void rk_tsadcv2_irq_ack(void __iomem *regs)
  216. {
  217. u32 val;
  218. val = readl_relaxed(regs + TSADCV2_INT_PD);
  219. writel_relaxed(val & TSADCV2_INT_PD_CLEAR, regs + TSADCV2_INT_PD);
  220. }
  221. static void rk_tsadcv2_control(void __iomem *regs, bool enable)
  222. {
  223. u32 val;
  224. val = readl_relaxed(regs + TSADCV2_AUTO_CON);
  225. if (enable)
  226. val |= TSADCV2_AUTO_EN;
  227. else
  228. val &= ~TSADCV2_AUTO_EN;
  229. writel_relaxed(val, regs + TSADCV2_AUTO_CON);
  230. }
  231. static int rk_tsadcv2_get_temp(int chn, void __iomem *regs, long *temp)
  232. {
  233. u32 val;
  234. /* the A/D value of the channel last conversion need some time */
  235. val = readl_relaxed(regs + TSADCV2_DATA(chn));
  236. if (val == 0)
  237. return -EAGAIN;
  238. *temp = rk_tsadcv2_code_to_temp(val);
  239. return 0;
  240. }
  241. static void rk_tsadcv2_tshut_temp(int chn, void __iomem *regs, long temp)
  242. {
  243. u32 tshut_value, val;
  244. tshut_value = rk_tsadcv2_temp_to_code(temp);
  245. writel_relaxed(tshut_value, regs + TSADCV2_COMP_SHUT(chn));
  246. /* TSHUT will be valid */
  247. val = readl_relaxed(regs + TSADCV2_AUTO_CON);
  248. writel_relaxed(val | TSADCV2_AUTO_SRC_EN(chn), regs + TSADCV2_AUTO_CON);
  249. }
  250. static void rk_tsadcv2_tshut_mode(int chn, void __iomem *regs,
  251. enum tshut_mode mode)
  252. {
  253. u32 val;
  254. val = readl_relaxed(regs + TSADCV2_INT_EN);
  255. if (mode == TSHUT_MODE_GPIO) {
  256. val &= ~TSADCV2_SHUT_2CRU_SRC_EN(chn);
  257. val |= TSADCV2_SHUT_2GPIO_SRC_EN(chn);
  258. } else {
  259. val &= ~TSADCV2_SHUT_2GPIO_SRC_EN(chn);
  260. val |= TSADCV2_SHUT_2CRU_SRC_EN(chn);
  261. }
  262. writel_relaxed(val, regs + TSADCV2_INT_EN);
  263. }
  264. static const struct rockchip_tsadc_chip rk3288_tsadc_data = {
  265. .tshut_mode = TSHUT_MODE_GPIO, /* default TSHUT via GPIO give PMIC */
  266. .tshut_polarity = TSHUT_LOW_ACTIVE, /* default TSHUT LOW ACTIVE */
  267. .tshut_temp = 95000,
  268. .initialize = rk_tsadcv2_initialize,
  269. .irq_ack = rk_tsadcv2_irq_ack,
  270. .control = rk_tsadcv2_control,
  271. .get_temp = rk_tsadcv2_get_temp,
  272. .set_tshut_temp = rk_tsadcv2_tshut_temp,
  273. .set_tshut_mode = rk_tsadcv2_tshut_mode,
  274. };
  275. static const struct of_device_id of_rockchip_thermal_match[] = {
  276. {
  277. .compatible = "rockchip,rk3288-tsadc",
  278. .data = (void *)&rk3288_tsadc_data,
  279. },
  280. { /* end */ },
  281. };
  282. MODULE_DEVICE_TABLE(of, of_rockchip_thermal_match);
  283. static void
  284. rockchip_thermal_toggle_sensor(struct rockchip_thermal_sensor *sensor, bool on)
  285. {
  286. struct thermal_zone_device *tzd = sensor->tzd;
  287. tzd->ops->set_mode(tzd,
  288. on ? THERMAL_DEVICE_ENABLED : THERMAL_DEVICE_DISABLED);
  289. }
  290. static irqreturn_t rockchip_thermal_alarm_irq_thread(int irq, void *dev)
  291. {
  292. struct rockchip_thermal_data *thermal = dev;
  293. int i;
  294. dev_dbg(&thermal->pdev->dev, "thermal alarm\n");
  295. thermal->chip->irq_ack(thermal->regs);
  296. for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
  297. thermal_zone_device_update(thermal->sensors[i].tzd);
  298. return IRQ_HANDLED;
  299. }
  300. static int rockchip_thermal_get_temp(void *_sensor, long *out_temp)
  301. {
  302. struct rockchip_thermal_sensor *sensor = _sensor;
  303. struct rockchip_thermal_data *thermal = sensor->thermal;
  304. const struct rockchip_tsadc_chip *tsadc = sensor->thermal->chip;
  305. int retval;
  306. retval = tsadc->get_temp(sensor->id, thermal->regs, out_temp);
  307. dev_dbg(&thermal->pdev->dev, "sensor %d - temp: %ld, retval: %d\n",
  308. sensor->id, *out_temp, retval);
  309. return retval;
  310. }
  311. static const struct thermal_zone_of_device_ops rockchip_of_thermal_ops = {
  312. .get_temp = rockchip_thermal_get_temp,
  313. };
  314. static int rockchip_configure_from_dt(struct device *dev,
  315. struct device_node *np,
  316. struct rockchip_thermal_data *thermal)
  317. {
  318. u32 shut_temp, tshut_mode, tshut_polarity;
  319. if (of_property_read_u32(np, "rockchip,hw-tshut-temp", &shut_temp)) {
  320. dev_warn(dev,
  321. "Missing tshut temp property, using default %ld\n",
  322. thermal->chip->tshut_temp);
  323. thermal->tshut_temp = thermal->chip->tshut_temp;
  324. } else {
  325. thermal->tshut_temp = shut_temp;
  326. }
  327. if (thermal->tshut_temp > INT_MAX) {
  328. dev_err(dev, "Invalid tshut temperature specified: %ld\n",
  329. thermal->tshut_temp);
  330. return -ERANGE;
  331. }
  332. if (of_property_read_u32(np, "rockchip,hw-tshut-mode", &tshut_mode)) {
  333. dev_warn(dev,
  334. "Missing tshut mode property, using default (%s)\n",
  335. thermal->chip->tshut_mode == TSHUT_MODE_GPIO ?
  336. "gpio" : "cru");
  337. thermal->tshut_mode = thermal->chip->tshut_mode;
  338. } else {
  339. thermal->tshut_mode = tshut_mode;
  340. }
  341. if (thermal->tshut_mode > 1) {
  342. dev_err(dev, "Invalid tshut mode specified: %d\n",
  343. thermal->tshut_mode);
  344. return -EINVAL;
  345. }
  346. if (of_property_read_u32(np, "rockchip,hw-tshut-polarity",
  347. &tshut_polarity)) {
  348. dev_warn(dev,
  349. "Missing tshut-polarity property, using default (%s)\n",
  350. thermal->chip->tshut_polarity == TSHUT_LOW_ACTIVE ?
  351. "low" : "high");
  352. thermal->tshut_polarity = thermal->chip->tshut_polarity;
  353. } else {
  354. thermal->tshut_polarity = tshut_polarity;
  355. }
  356. if (thermal->tshut_polarity > 1) {
  357. dev_err(dev, "Invalid tshut-polarity specified: %d\n",
  358. thermal->tshut_polarity);
  359. return -EINVAL;
  360. }
  361. return 0;
  362. }
  363. static int
  364. rockchip_thermal_register_sensor(struct platform_device *pdev,
  365. struct rockchip_thermal_data *thermal,
  366. struct rockchip_thermal_sensor *sensor,
  367. enum sensor_id id)
  368. {
  369. const struct rockchip_tsadc_chip *tsadc = thermal->chip;
  370. int error;
  371. tsadc->set_tshut_mode(id, thermal->regs, thermal->tshut_mode);
  372. tsadc->set_tshut_temp(id, thermal->regs, thermal->tshut_temp);
  373. sensor->thermal = thermal;
  374. sensor->id = id;
  375. sensor->tzd = thermal_zone_of_sensor_register(&pdev->dev, id, sensor,
  376. &rockchip_of_thermal_ops);
  377. if (IS_ERR(sensor->tzd)) {
  378. error = PTR_ERR(sensor->tzd);
  379. dev_err(&pdev->dev, "failed to register sensor %d: %d\n",
  380. id, error);
  381. return error;
  382. }
  383. return 0;
  384. }
  385. /*
  386. * Reset TSADC Controller, reset all tsadc registers.
  387. */
  388. static void rockchip_thermal_reset_controller(struct reset_control *reset)
  389. {
  390. reset_control_assert(reset);
  391. usleep_range(10, 20);
  392. reset_control_deassert(reset);
  393. }
  394. static int rockchip_thermal_probe(struct platform_device *pdev)
  395. {
  396. struct device_node *np = pdev->dev.of_node;
  397. struct rockchip_thermal_data *thermal;
  398. const struct of_device_id *match;
  399. struct resource *res;
  400. int irq;
  401. int i;
  402. int error;
  403. match = of_match_node(of_rockchip_thermal_match, np);
  404. if (!match)
  405. return -ENXIO;
  406. irq = platform_get_irq(pdev, 0);
  407. if (irq < 0) {
  408. dev_err(&pdev->dev, "no irq resource?\n");
  409. return -EINVAL;
  410. }
  411. thermal = devm_kzalloc(&pdev->dev, sizeof(struct rockchip_thermal_data),
  412. GFP_KERNEL);
  413. if (!thermal)
  414. return -ENOMEM;
  415. thermal->pdev = pdev;
  416. thermal->chip = (const struct rockchip_tsadc_chip *)match->data;
  417. if (!thermal->chip)
  418. return -EINVAL;
  419. res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
  420. thermal->regs = devm_ioremap_resource(&pdev->dev, res);
  421. if (IS_ERR(thermal->regs))
  422. return PTR_ERR(thermal->regs);
  423. thermal->reset = devm_reset_control_get(&pdev->dev, "tsadc-apb");
  424. if (IS_ERR(thermal->reset)) {
  425. error = PTR_ERR(thermal->reset);
  426. dev_err(&pdev->dev, "failed to get tsadc reset: %d\n", error);
  427. return error;
  428. }
  429. thermal->clk = devm_clk_get(&pdev->dev, "tsadc");
  430. if (IS_ERR(thermal->clk)) {
  431. error = PTR_ERR(thermal->clk);
  432. dev_err(&pdev->dev, "failed to get tsadc clock: %d\n", error);
  433. return error;
  434. }
  435. thermal->pclk = devm_clk_get(&pdev->dev, "apb_pclk");
  436. if (IS_ERR(thermal->pclk)) {
  437. error = PTR_ERR(thermal->clk);
  438. dev_err(&pdev->dev, "failed to get apb_pclk clock: %d\n",
  439. error);
  440. return error;
  441. }
  442. error = clk_prepare_enable(thermal->clk);
  443. if (error) {
  444. dev_err(&pdev->dev, "failed to enable converter clock: %d\n",
  445. error);
  446. return error;
  447. }
  448. error = clk_prepare_enable(thermal->pclk);
  449. if (error) {
  450. dev_err(&pdev->dev, "failed to enable pclk: %d\n", error);
  451. goto err_disable_clk;
  452. }
  453. rockchip_thermal_reset_controller(thermal->reset);
  454. error = rockchip_configure_from_dt(&pdev->dev, np, thermal);
  455. if (error) {
  456. dev_err(&pdev->dev, "failed to parse device tree data: %d\n",
  457. error);
  458. goto err_disable_pclk;
  459. }
  460. thermal->chip->initialize(thermal->regs, thermal->tshut_polarity);
  461. error = rockchip_thermal_register_sensor(pdev, thermal,
  462. &thermal->sensors[0],
  463. SENSOR_CPU);
  464. if (error) {
  465. dev_err(&pdev->dev,
  466. "failed to register CPU thermal sensor: %d\n", error);
  467. goto err_disable_pclk;
  468. }
  469. error = rockchip_thermal_register_sensor(pdev, thermal,
  470. &thermal->sensors[1],
  471. SENSOR_GPU);
  472. if (error) {
  473. dev_err(&pdev->dev,
  474. "failed to register GPU thermal sensor: %d\n", error);
  475. goto err_unregister_cpu_sensor;
  476. }
  477. error = devm_request_threaded_irq(&pdev->dev, irq, NULL,
  478. &rockchip_thermal_alarm_irq_thread,
  479. IRQF_ONESHOT,
  480. "rockchip_thermal", thermal);
  481. if (error) {
  482. dev_err(&pdev->dev,
  483. "failed to request tsadc irq: %d\n", error);
  484. goto err_unregister_gpu_sensor;
  485. }
  486. thermal->chip->control(thermal->regs, true);
  487. for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
  488. rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
  489. platform_set_drvdata(pdev, thermal);
  490. return 0;
  491. err_unregister_gpu_sensor:
  492. thermal_zone_of_sensor_unregister(&pdev->dev, thermal->sensors[1].tzd);
  493. err_unregister_cpu_sensor:
  494. thermal_zone_of_sensor_unregister(&pdev->dev, thermal->sensors[0].tzd);
  495. err_disable_pclk:
  496. clk_disable_unprepare(thermal->pclk);
  497. err_disable_clk:
  498. clk_disable_unprepare(thermal->clk);
  499. return error;
  500. }
  501. static int rockchip_thermal_remove(struct platform_device *pdev)
  502. {
  503. struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
  504. int i;
  505. for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++) {
  506. struct rockchip_thermal_sensor *sensor = &thermal->sensors[i];
  507. rockchip_thermal_toggle_sensor(sensor, false);
  508. thermal_zone_of_sensor_unregister(&pdev->dev, sensor->tzd);
  509. }
  510. thermal->chip->control(thermal->regs, false);
  511. clk_disable_unprepare(thermal->pclk);
  512. clk_disable_unprepare(thermal->clk);
  513. return 0;
  514. }
  515. static int __maybe_unused rockchip_thermal_suspend(struct device *dev)
  516. {
  517. struct platform_device *pdev = to_platform_device(dev);
  518. struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
  519. int i;
  520. for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
  521. rockchip_thermal_toggle_sensor(&thermal->sensors[i], false);
  522. thermal->chip->control(thermal->regs, false);
  523. clk_disable(thermal->pclk);
  524. clk_disable(thermal->clk);
  525. return 0;
  526. }
  527. static int __maybe_unused rockchip_thermal_resume(struct device *dev)
  528. {
  529. struct platform_device *pdev = to_platform_device(dev);
  530. struct rockchip_thermal_data *thermal = platform_get_drvdata(pdev);
  531. int i;
  532. int error;
  533. error = clk_enable(thermal->clk);
  534. if (error)
  535. return error;
  536. error = clk_enable(thermal->pclk);
  537. if (error)
  538. return error;
  539. rockchip_thermal_reset_controller(thermal->reset);
  540. thermal->chip->initialize(thermal->regs, thermal->tshut_polarity);
  541. for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++) {
  542. enum sensor_id id = thermal->sensors[i].id;
  543. thermal->chip->set_tshut_mode(id, thermal->regs,
  544. thermal->tshut_mode);
  545. thermal->chip->set_tshut_temp(id, thermal->regs,
  546. thermal->tshut_temp);
  547. }
  548. thermal->chip->control(thermal->regs, true);
  549. for (i = 0; i < ARRAY_SIZE(thermal->sensors); i++)
  550. rockchip_thermal_toggle_sensor(&thermal->sensors[i], true);
  551. return 0;
  552. }
  553. static SIMPLE_DEV_PM_OPS(rockchip_thermal_pm_ops,
  554. rockchip_thermal_suspend, rockchip_thermal_resume);
  555. static struct platform_driver rockchip_thermal_driver = {
  556. .driver = {
  557. .name = "rockchip-thermal",
  558. .pm = &rockchip_thermal_pm_ops,
  559. .of_match_table = of_rockchip_thermal_match,
  560. },
  561. .probe = rockchip_thermal_probe,
  562. .remove = rockchip_thermal_remove,
  563. };
  564. module_platform_driver(rockchip_thermal_driver);
  565. MODULE_DESCRIPTION("ROCKCHIP THERMAL Driver");
  566. MODULE_AUTHOR("Rockchip, Inc.");
  567. MODULE_LICENSE("GPL v2");
  568. MODULE_ALIAS("platform:rockchip-thermal");