core.c 30 KB

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  1. /*
  2. * Copyright (c) 2005-2011 Atheros Communications Inc.
  3. * Copyright (c) 2011-2013 Qualcomm Atheros, Inc.
  4. *
  5. * Permission to use, copy, modify, and/or distribute this software for any
  6. * purpose with or without fee is hereby granted, provided that the above
  7. * copyright notice and this permission notice appear in all copies.
  8. *
  9. * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES
  10. * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF
  11. * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR
  12. * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES
  13. * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN
  14. * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  15. * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  16. */
  17. #include <linux/module.h>
  18. #include <linux/firmware.h>
  19. #include "core.h"
  20. #include "mac.h"
  21. #include "htc.h"
  22. #include "hif.h"
  23. #include "wmi.h"
  24. #include "bmi.h"
  25. #include "debug.h"
  26. #include "htt.h"
  27. #include "testmode.h"
  28. unsigned int ath10k_debug_mask;
  29. static bool uart_print;
  30. static unsigned int ath10k_p2p;
  31. static bool skip_otp;
  32. module_param_named(debug_mask, ath10k_debug_mask, uint, 0644);
  33. module_param(uart_print, bool, 0644);
  34. module_param_named(p2p, ath10k_p2p, uint, 0644);
  35. module_param(skip_otp, bool, 0644);
  36. MODULE_PARM_DESC(debug_mask, "Debugging mask");
  37. MODULE_PARM_DESC(uart_print, "Uart target debugging");
  38. MODULE_PARM_DESC(p2p, "Enable ath10k P2P support");
  39. MODULE_PARM_DESC(skip_otp, "Skip otp failure for calibration in testmode");
  40. static const struct ath10k_hw_params ath10k_hw_params_list[] = {
  41. {
  42. .id = QCA988X_HW_2_0_VERSION,
  43. .name = "qca988x hw2.0",
  44. .patch_load_addr = QCA988X_HW_2_0_PATCH_LOAD_ADDR,
  45. .fw = {
  46. .dir = QCA988X_HW_2_0_FW_DIR,
  47. .fw = QCA988X_HW_2_0_FW_FILE,
  48. .otp = QCA988X_HW_2_0_OTP_FILE,
  49. .board = QCA988X_HW_2_0_BOARD_DATA_FILE,
  50. },
  51. },
  52. };
  53. static void ath10k_send_suspend_complete(struct ath10k *ar)
  54. {
  55. ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot suspend complete\n");
  56. complete(&ar->target_suspend);
  57. }
  58. static int ath10k_init_configure_target(struct ath10k *ar)
  59. {
  60. u32 param_host;
  61. int ret;
  62. /* tell target which HTC version it is used*/
  63. ret = ath10k_bmi_write32(ar, hi_app_host_interest,
  64. HTC_PROTOCOL_VERSION);
  65. if (ret) {
  66. ath10k_err(ar, "settings HTC version failed\n");
  67. return ret;
  68. }
  69. /* set the firmware mode to STA/IBSS/AP */
  70. ret = ath10k_bmi_read32(ar, hi_option_flag, &param_host);
  71. if (ret) {
  72. ath10k_err(ar, "setting firmware mode (1/2) failed\n");
  73. return ret;
  74. }
  75. /* TODO following parameters need to be re-visited. */
  76. /* num_device */
  77. param_host |= (1 << HI_OPTION_NUM_DEV_SHIFT);
  78. /* Firmware mode */
  79. /* FIXME: Why FW_MODE_AP ??.*/
  80. param_host |= (HI_OPTION_FW_MODE_AP << HI_OPTION_FW_MODE_SHIFT);
  81. /* mac_addr_method */
  82. param_host |= (1 << HI_OPTION_MAC_ADDR_METHOD_SHIFT);
  83. /* firmware_bridge */
  84. param_host |= (0 << HI_OPTION_FW_BRIDGE_SHIFT);
  85. /* fwsubmode */
  86. param_host |= (0 << HI_OPTION_FW_SUBMODE_SHIFT);
  87. ret = ath10k_bmi_write32(ar, hi_option_flag, param_host);
  88. if (ret) {
  89. ath10k_err(ar, "setting firmware mode (2/2) failed\n");
  90. return ret;
  91. }
  92. /* We do all byte-swapping on the host */
  93. ret = ath10k_bmi_write32(ar, hi_be, 0);
  94. if (ret) {
  95. ath10k_err(ar, "setting host CPU BE mode failed\n");
  96. return ret;
  97. }
  98. /* FW descriptor/Data swap flags */
  99. ret = ath10k_bmi_write32(ar, hi_fw_swap, 0);
  100. if (ret) {
  101. ath10k_err(ar, "setting FW data/desc swap flags failed\n");
  102. return ret;
  103. }
  104. return 0;
  105. }
  106. static const struct firmware *ath10k_fetch_fw_file(struct ath10k *ar,
  107. const char *dir,
  108. const char *file)
  109. {
  110. char filename[100];
  111. const struct firmware *fw;
  112. int ret;
  113. if (file == NULL)
  114. return ERR_PTR(-ENOENT);
  115. if (dir == NULL)
  116. dir = ".";
  117. snprintf(filename, sizeof(filename), "%s/%s", dir, file);
  118. ret = request_firmware(&fw, filename, ar->dev);
  119. if (ret)
  120. return ERR_PTR(ret);
  121. return fw;
  122. }
  123. static int ath10k_push_board_ext_data(struct ath10k *ar, const void *data,
  124. size_t data_len)
  125. {
  126. u32 board_data_size = QCA988X_BOARD_DATA_SZ;
  127. u32 board_ext_data_size = QCA988X_BOARD_EXT_DATA_SZ;
  128. u32 board_ext_data_addr;
  129. int ret;
  130. ret = ath10k_bmi_read32(ar, hi_board_ext_data, &board_ext_data_addr);
  131. if (ret) {
  132. ath10k_err(ar, "could not read board ext data addr (%d)\n",
  133. ret);
  134. return ret;
  135. }
  136. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  137. "boot push board extended data addr 0x%x\n",
  138. board_ext_data_addr);
  139. if (board_ext_data_addr == 0)
  140. return 0;
  141. if (data_len != (board_data_size + board_ext_data_size)) {
  142. ath10k_err(ar, "invalid board (ext) data sizes %zu != %d+%d\n",
  143. data_len, board_data_size, board_ext_data_size);
  144. return -EINVAL;
  145. }
  146. ret = ath10k_bmi_write_memory(ar, board_ext_data_addr,
  147. data + board_data_size,
  148. board_ext_data_size);
  149. if (ret) {
  150. ath10k_err(ar, "could not write board ext data (%d)\n", ret);
  151. return ret;
  152. }
  153. ret = ath10k_bmi_write32(ar, hi_board_ext_data_config,
  154. (board_ext_data_size << 16) | 1);
  155. if (ret) {
  156. ath10k_err(ar, "could not write board ext data bit (%d)\n",
  157. ret);
  158. return ret;
  159. }
  160. return 0;
  161. }
  162. static int ath10k_download_board_data(struct ath10k *ar, const void *data,
  163. size_t data_len)
  164. {
  165. u32 board_data_size = QCA988X_BOARD_DATA_SZ;
  166. u32 address;
  167. int ret;
  168. ret = ath10k_push_board_ext_data(ar, data, data_len);
  169. if (ret) {
  170. ath10k_err(ar, "could not push board ext data (%d)\n", ret);
  171. goto exit;
  172. }
  173. ret = ath10k_bmi_read32(ar, hi_board_data, &address);
  174. if (ret) {
  175. ath10k_err(ar, "could not read board data addr (%d)\n", ret);
  176. goto exit;
  177. }
  178. ret = ath10k_bmi_write_memory(ar, address, data,
  179. min_t(u32, board_data_size,
  180. data_len));
  181. if (ret) {
  182. ath10k_err(ar, "could not write board data (%d)\n", ret);
  183. goto exit;
  184. }
  185. ret = ath10k_bmi_write32(ar, hi_board_data_initialized, 1);
  186. if (ret) {
  187. ath10k_err(ar, "could not write board data bit (%d)\n", ret);
  188. goto exit;
  189. }
  190. exit:
  191. return ret;
  192. }
  193. static int ath10k_download_cal_file(struct ath10k *ar)
  194. {
  195. int ret;
  196. if (!ar->cal_file)
  197. return -ENOENT;
  198. if (IS_ERR(ar->cal_file))
  199. return PTR_ERR(ar->cal_file);
  200. ret = ath10k_download_board_data(ar, ar->cal_file->data,
  201. ar->cal_file->size);
  202. if (ret) {
  203. ath10k_err(ar, "failed to download cal_file data: %d\n", ret);
  204. return ret;
  205. }
  206. ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot cal file downloaded\n");
  207. return 0;
  208. }
  209. static int ath10k_download_and_run_otp(struct ath10k *ar)
  210. {
  211. u32 result, address = ar->hw_params.patch_load_addr;
  212. int ret;
  213. ret = ath10k_download_board_data(ar, ar->board_data, ar->board_len);
  214. if (ret) {
  215. ath10k_err(ar, "failed to download board data: %d\n", ret);
  216. return ret;
  217. }
  218. /* OTP is optional */
  219. if (!ar->otp_data || !ar->otp_len) {
  220. ath10k_warn(ar, "Not running otp, calibration will be incorrect (otp-data %p otp_len %zd)!\n",
  221. ar->otp_data, ar->otp_len);
  222. return 0;
  223. }
  224. ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot upload otp to 0x%x len %zd\n",
  225. address, ar->otp_len);
  226. ret = ath10k_bmi_fast_download(ar, address, ar->otp_data, ar->otp_len);
  227. if (ret) {
  228. ath10k_err(ar, "could not write otp (%d)\n", ret);
  229. return ret;
  230. }
  231. ret = ath10k_bmi_execute(ar, address, 0, &result);
  232. if (ret) {
  233. ath10k_err(ar, "could not execute otp (%d)\n", ret);
  234. return ret;
  235. }
  236. ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot otp execute result %d\n", result);
  237. if (!skip_otp && result != 0) {
  238. ath10k_err(ar, "otp calibration failed: %d", result);
  239. return -EINVAL;
  240. }
  241. return 0;
  242. }
  243. static int ath10k_download_fw(struct ath10k *ar, enum ath10k_firmware_mode mode)
  244. {
  245. u32 address, data_len;
  246. const char *mode_name;
  247. const void *data;
  248. int ret;
  249. address = ar->hw_params.patch_load_addr;
  250. switch (mode) {
  251. case ATH10K_FIRMWARE_MODE_NORMAL:
  252. data = ar->firmware_data;
  253. data_len = ar->firmware_len;
  254. mode_name = "normal";
  255. break;
  256. case ATH10K_FIRMWARE_MODE_UTF:
  257. data = ar->testmode.utf->data;
  258. data_len = ar->testmode.utf->size;
  259. mode_name = "utf";
  260. break;
  261. default:
  262. ath10k_err(ar, "unknown firmware mode: %d\n", mode);
  263. return -EINVAL;
  264. }
  265. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  266. "boot uploading firmware image %p len %d mode %s\n",
  267. data, data_len, mode_name);
  268. ret = ath10k_bmi_fast_download(ar, address, data, data_len);
  269. if (ret) {
  270. ath10k_err(ar, "failed to download %s firmware: %d\n",
  271. mode_name, ret);
  272. return ret;
  273. }
  274. return ret;
  275. }
  276. static void ath10k_core_free_firmware_files(struct ath10k *ar)
  277. {
  278. if (ar->board && !IS_ERR(ar->board))
  279. release_firmware(ar->board);
  280. if (ar->otp && !IS_ERR(ar->otp))
  281. release_firmware(ar->otp);
  282. if (ar->firmware && !IS_ERR(ar->firmware))
  283. release_firmware(ar->firmware);
  284. if (ar->cal_file && !IS_ERR(ar->cal_file))
  285. release_firmware(ar->cal_file);
  286. ar->board = NULL;
  287. ar->board_data = NULL;
  288. ar->board_len = 0;
  289. ar->otp = NULL;
  290. ar->otp_data = NULL;
  291. ar->otp_len = 0;
  292. ar->firmware = NULL;
  293. ar->firmware_data = NULL;
  294. ar->firmware_len = 0;
  295. ar->cal_file = NULL;
  296. }
  297. static int ath10k_fetch_cal_file(struct ath10k *ar)
  298. {
  299. char filename[100];
  300. /* cal-<bus>-<id>.bin */
  301. scnprintf(filename, sizeof(filename), "cal-%s-%s.bin",
  302. ath10k_bus_str(ar->hif.bus), dev_name(ar->dev));
  303. ar->cal_file = ath10k_fetch_fw_file(ar, ATH10K_FW_DIR, filename);
  304. if (IS_ERR(ar->cal_file))
  305. /* calibration file is optional, don't print any warnings */
  306. return PTR_ERR(ar->cal_file);
  307. ath10k_dbg(ar, ATH10K_DBG_BOOT, "found calibration file %s/%s\n",
  308. ATH10K_FW_DIR, filename);
  309. return 0;
  310. }
  311. static int ath10k_core_fetch_firmware_api_1(struct ath10k *ar)
  312. {
  313. int ret = 0;
  314. if (ar->hw_params.fw.fw == NULL) {
  315. ath10k_err(ar, "firmware file not defined\n");
  316. return -EINVAL;
  317. }
  318. if (ar->hw_params.fw.board == NULL) {
  319. ath10k_err(ar, "board data file not defined");
  320. return -EINVAL;
  321. }
  322. ar->board = ath10k_fetch_fw_file(ar,
  323. ar->hw_params.fw.dir,
  324. ar->hw_params.fw.board);
  325. if (IS_ERR(ar->board)) {
  326. ret = PTR_ERR(ar->board);
  327. ath10k_err(ar, "could not fetch board data (%d)\n", ret);
  328. goto err;
  329. }
  330. ar->board_data = ar->board->data;
  331. ar->board_len = ar->board->size;
  332. ar->firmware = ath10k_fetch_fw_file(ar,
  333. ar->hw_params.fw.dir,
  334. ar->hw_params.fw.fw);
  335. if (IS_ERR(ar->firmware)) {
  336. ret = PTR_ERR(ar->firmware);
  337. ath10k_err(ar, "could not fetch firmware (%d)\n", ret);
  338. goto err;
  339. }
  340. ar->firmware_data = ar->firmware->data;
  341. ar->firmware_len = ar->firmware->size;
  342. /* OTP may be undefined. If so, don't fetch it at all */
  343. if (ar->hw_params.fw.otp == NULL)
  344. return 0;
  345. ar->otp = ath10k_fetch_fw_file(ar,
  346. ar->hw_params.fw.dir,
  347. ar->hw_params.fw.otp);
  348. if (IS_ERR(ar->otp)) {
  349. ret = PTR_ERR(ar->otp);
  350. ath10k_err(ar, "could not fetch otp (%d)\n", ret);
  351. goto err;
  352. }
  353. ar->otp_data = ar->otp->data;
  354. ar->otp_len = ar->otp->size;
  355. return 0;
  356. err:
  357. ath10k_core_free_firmware_files(ar);
  358. return ret;
  359. }
  360. static int ath10k_core_fetch_firmware_api_n(struct ath10k *ar, const char *name)
  361. {
  362. size_t magic_len, len, ie_len;
  363. int ie_id, i, index, bit, ret;
  364. struct ath10k_fw_ie *hdr;
  365. const u8 *data;
  366. __le32 *timestamp;
  367. /* first fetch the firmware file (firmware-*.bin) */
  368. ar->firmware = ath10k_fetch_fw_file(ar, ar->hw_params.fw.dir, name);
  369. if (IS_ERR(ar->firmware)) {
  370. ath10k_err(ar, "could not fetch firmware file '%s/%s': %ld\n",
  371. ar->hw_params.fw.dir, name, PTR_ERR(ar->firmware));
  372. return PTR_ERR(ar->firmware);
  373. }
  374. data = ar->firmware->data;
  375. len = ar->firmware->size;
  376. /* magic also includes the null byte, check that as well */
  377. magic_len = strlen(ATH10K_FIRMWARE_MAGIC) + 1;
  378. if (len < magic_len) {
  379. ath10k_err(ar, "firmware file '%s/%s' too small to contain magic: %zu\n",
  380. ar->hw_params.fw.dir, name, len);
  381. ret = -EINVAL;
  382. goto err;
  383. }
  384. if (memcmp(data, ATH10K_FIRMWARE_MAGIC, magic_len) != 0) {
  385. ath10k_err(ar, "invalid firmware magic\n");
  386. ret = -EINVAL;
  387. goto err;
  388. }
  389. /* jump over the padding */
  390. magic_len = ALIGN(magic_len, 4);
  391. len -= magic_len;
  392. data += magic_len;
  393. /* loop elements */
  394. while (len > sizeof(struct ath10k_fw_ie)) {
  395. hdr = (struct ath10k_fw_ie *)data;
  396. ie_id = le32_to_cpu(hdr->id);
  397. ie_len = le32_to_cpu(hdr->len);
  398. len -= sizeof(*hdr);
  399. data += sizeof(*hdr);
  400. if (len < ie_len) {
  401. ath10k_err(ar, "invalid length for FW IE %d (%zu < %zu)\n",
  402. ie_id, len, ie_len);
  403. ret = -EINVAL;
  404. goto err;
  405. }
  406. switch (ie_id) {
  407. case ATH10K_FW_IE_FW_VERSION:
  408. if (ie_len > sizeof(ar->hw->wiphy->fw_version) - 1)
  409. break;
  410. memcpy(ar->hw->wiphy->fw_version, data, ie_len);
  411. ar->hw->wiphy->fw_version[ie_len] = '\0';
  412. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  413. "found fw version %s\n",
  414. ar->hw->wiphy->fw_version);
  415. break;
  416. case ATH10K_FW_IE_TIMESTAMP:
  417. if (ie_len != sizeof(u32))
  418. break;
  419. timestamp = (__le32 *)data;
  420. ath10k_dbg(ar, ATH10K_DBG_BOOT, "found fw timestamp %d\n",
  421. le32_to_cpup(timestamp));
  422. break;
  423. case ATH10K_FW_IE_FEATURES:
  424. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  425. "found firmware features ie (%zd B)\n",
  426. ie_len);
  427. for (i = 0; i < ATH10K_FW_FEATURE_COUNT; i++) {
  428. index = i / 8;
  429. bit = i % 8;
  430. if (index == ie_len)
  431. break;
  432. if (data[index] & (1 << bit)) {
  433. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  434. "Enabling feature bit: %i\n",
  435. i);
  436. __set_bit(i, ar->fw_features);
  437. }
  438. }
  439. ath10k_dbg_dump(ar, ATH10K_DBG_BOOT, "features", "",
  440. ar->fw_features,
  441. sizeof(ar->fw_features));
  442. break;
  443. case ATH10K_FW_IE_FW_IMAGE:
  444. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  445. "found fw image ie (%zd B)\n",
  446. ie_len);
  447. ar->firmware_data = data;
  448. ar->firmware_len = ie_len;
  449. break;
  450. case ATH10K_FW_IE_OTP_IMAGE:
  451. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  452. "found otp image ie (%zd B)\n",
  453. ie_len);
  454. ar->otp_data = data;
  455. ar->otp_len = ie_len;
  456. break;
  457. default:
  458. ath10k_warn(ar, "Unknown FW IE: %u\n",
  459. le32_to_cpu(hdr->id));
  460. break;
  461. }
  462. /* jump over the padding */
  463. ie_len = ALIGN(ie_len, 4);
  464. len -= ie_len;
  465. data += ie_len;
  466. }
  467. if (!ar->firmware_data || !ar->firmware_len) {
  468. ath10k_warn(ar, "No ATH10K_FW_IE_FW_IMAGE found from '%s/%s', skipping\n",
  469. ar->hw_params.fw.dir, name);
  470. ret = -ENOMEDIUM;
  471. goto err;
  472. }
  473. if (test_bit(ATH10K_FW_FEATURE_WMI_10_2, ar->fw_features) &&
  474. !test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
  475. ath10k_err(ar, "feature bits corrupted: 10.2 feature requires 10.x feature to be set as well");
  476. ret = -EINVAL;
  477. goto err;
  478. }
  479. /* now fetch the board file */
  480. if (ar->hw_params.fw.board == NULL) {
  481. ath10k_err(ar, "board data file not defined");
  482. ret = -EINVAL;
  483. goto err;
  484. }
  485. ar->board = ath10k_fetch_fw_file(ar,
  486. ar->hw_params.fw.dir,
  487. ar->hw_params.fw.board);
  488. if (IS_ERR(ar->board)) {
  489. ret = PTR_ERR(ar->board);
  490. ath10k_err(ar, "could not fetch board data '%s/%s' (%d)\n",
  491. ar->hw_params.fw.dir, ar->hw_params.fw.board,
  492. ret);
  493. goto err;
  494. }
  495. ar->board_data = ar->board->data;
  496. ar->board_len = ar->board->size;
  497. return 0;
  498. err:
  499. ath10k_core_free_firmware_files(ar);
  500. return ret;
  501. }
  502. static int ath10k_core_fetch_firmware_files(struct ath10k *ar)
  503. {
  504. int ret;
  505. /* calibration file is optional, don't check for any errors */
  506. ath10k_fetch_cal_file(ar);
  507. ar->fw_api = 3;
  508. ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
  509. ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API3_FILE);
  510. if (ret == 0)
  511. goto success;
  512. ar->fw_api = 2;
  513. ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
  514. ret = ath10k_core_fetch_firmware_api_n(ar, ATH10K_FW_API2_FILE);
  515. if (ret == 0)
  516. goto success;
  517. ar->fw_api = 1;
  518. ath10k_dbg(ar, ATH10K_DBG_BOOT, "trying fw api %d\n", ar->fw_api);
  519. ret = ath10k_core_fetch_firmware_api_1(ar);
  520. if (ret)
  521. return ret;
  522. success:
  523. ath10k_dbg(ar, ATH10K_DBG_BOOT, "using fw api %d\n", ar->fw_api);
  524. return 0;
  525. }
  526. static int ath10k_download_cal_data(struct ath10k *ar)
  527. {
  528. int ret;
  529. ret = ath10k_download_cal_file(ar);
  530. if (ret == 0) {
  531. ar->cal_mode = ATH10K_CAL_MODE_FILE;
  532. goto done;
  533. }
  534. ath10k_dbg(ar, ATH10K_DBG_BOOT,
  535. "boot did not find a calibration file, try OTP next: %d\n",
  536. ret);
  537. ret = ath10k_download_and_run_otp(ar);
  538. if (ret) {
  539. ath10k_err(ar, "failed to run otp: %d\n", ret);
  540. return ret;
  541. }
  542. ar->cal_mode = ATH10K_CAL_MODE_OTP;
  543. done:
  544. ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot using calibration mode %s\n",
  545. ath10k_cal_mode_str(ar->cal_mode));
  546. return 0;
  547. }
  548. static int ath10k_init_uart(struct ath10k *ar)
  549. {
  550. int ret;
  551. /*
  552. * Explicitly setting UART prints to zero as target turns it on
  553. * based on scratch registers.
  554. */
  555. ret = ath10k_bmi_write32(ar, hi_serial_enable, 0);
  556. if (ret) {
  557. ath10k_warn(ar, "could not disable UART prints (%d)\n", ret);
  558. return ret;
  559. }
  560. if (!uart_print)
  561. return 0;
  562. ret = ath10k_bmi_write32(ar, hi_dbg_uart_txpin, 7);
  563. if (ret) {
  564. ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
  565. return ret;
  566. }
  567. ret = ath10k_bmi_write32(ar, hi_serial_enable, 1);
  568. if (ret) {
  569. ath10k_warn(ar, "could not enable UART prints (%d)\n", ret);
  570. return ret;
  571. }
  572. /* Set the UART baud rate to 19200. */
  573. ret = ath10k_bmi_write32(ar, hi_desired_baud_rate, 19200);
  574. if (ret) {
  575. ath10k_warn(ar, "could not set the baud rate (%d)\n", ret);
  576. return ret;
  577. }
  578. ath10k_info(ar, "UART prints enabled\n");
  579. return 0;
  580. }
  581. static int ath10k_init_hw_params(struct ath10k *ar)
  582. {
  583. const struct ath10k_hw_params *uninitialized_var(hw_params);
  584. int i;
  585. for (i = 0; i < ARRAY_SIZE(ath10k_hw_params_list); i++) {
  586. hw_params = &ath10k_hw_params_list[i];
  587. if (hw_params->id == ar->target_version)
  588. break;
  589. }
  590. if (i == ARRAY_SIZE(ath10k_hw_params_list)) {
  591. ath10k_err(ar, "Unsupported hardware version: 0x%x\n",
  592. ar->target_version);
  593. return -EINVAL;
  594. }
  595. ar->hw_params = *hw_params;
  596. ath10k_dbg(ar, ATH10K_DBG_BOOT, "Hardware name %s version 0x%x\n",
  597. ar->hw_params.name, ar->target_version);
  598. return 0;
  599. }
  600. static void ath10k_core_restart(struct work_struct *work)
  601. {
  602. struct ath10k *ar = container_of(work, struct ath10k, restart_work);
  603. set_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
  604. /* Place a barrier to make sure the compiler doesn't reorder
  605. * CRASH_FLUSH and calling other functions.
  606. */
  607. barrier();
  608. ieee80211_stop_queues(ar->hw);
  609. ath10k_drain_tx(ar);
  610. complete_all(&ar->scan.started);
  611. complete_all(&ar->scan.completed);
  612. complete_all(&ar->scan.on_channel);
  613. complete_all(&ar->offchan_tx_completed);
  614. complete_all(&ar->install_key_done);
  615. complete_all(&ar->vdev_setup_done);
  616. wake_up(&ar->htt.empty_tx_wq);
  617. wake_up(&ar->wmi.tx_credits_wq);
  618. wake_up(&ar->peer_mapping_wq);
  619. mutex_lock(&ar->conf_mutex);
  620. switch (ar->state) {
  621. case ATH10K_STATE_ON:
  622. ar->state = ATH10K_STATE_RESTARTING;
  623. ath10k_hif_stop(ar);
  624. ath10k_scan_finish(ar);
  625. ieee80211_restart_hw(ar->hw);
  626. break;
  627. case ATH10K_STATE_OFF:
  628. /* this can happen if driver is being unloaded
  629. * or if the crash happens during FW probing */
  630. ath10k_warn(ar, "cannot restart a device that hasn't been started\n");
  631. break;
  632. case ATH10K_STATE_RESTARTING:
  633. /* hw restart might be requested from multiple places */
  634. break;
  635. case ATH10K_STATE_RESTARTED:
  636. ar->state = ATH10K_STATE_WEDGED;
  637. /* fall through */
  638. case ATH10K_STATE_WEDGED:
  639. ath10k_warn(ar, "device is wedged, will not restart\n");
  640. break;
  641. case ATH10K_STATE_UTF:
  642. ath10k_warn(ar, "firmware restart in UTF mode not supported\n");
  643. break;
  644. }
  645. mutex_unlock(&ar->conf_mutex);
  646. }
  647. static void ath10k_core_init_max_sta_count(struct ath10k *ar)
  648. {
  649. if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features)) {
  650. ar->max_num_peers = TARGET_10X_NUM_PEERS;
  651. ar->max_num_stations = TARGET_10X_NUM_STATIONS;
  652. } else {
  653. ar->max_num_peers = TARGET_NUM_PEERS;
  654. ar->max_num_stations = TARGET_NUM_STATIONS;
  655. }
  656. }
  657. int ath10k_core_start(struct ath10k *ar, enum ath10k_firmware_mode mode)
  658. {
  659. int status;
  660. lockdep_assert_held(&ar->conf_mutex);
  661. clear_bit(ATH10K_FLAG_CRASH_FLUSH, &ar->dev_flags);
  662. ath10k_bmi_start(ar);
  663. if (ath10k_init_configure_target(ar)) {
  664. status = -EINVAL;
  665. goto err;
  666. }
  667. status = ath10k_download_cal_data(ar);
  668. if (status)
  669. goto err;
  670. status = ath10k_download_fw(ar, mode);
  671. if (status)
  672. goto err;
  673. status = ath10k_init_uart(ar);
  674. if (status)
  675. goto err;
  676. ar->htc.htc_ops.target_send_suspend_complete =
  677. ath10k_send_suspend_complete;
  678. status = ath10k_htc_init(ar);
  679. if (status) {
  680. ath10k_err(ar, "could not init HTC (%d)\n", status);
  681. goto err;
  682. }
  683. status = ath10k_bmi_done(ar);
  684. if (status)
  685. goto err;
  686. status = ath10k_wmi_attach(ar);
  687. if (status) {
  688. ath10k_err(ar, "WMI attach failed: %d\n", status);
  689. goto err;
  690. }
  691. status = ath10k_htt_init(ar);
  692. if (status) {
  693. ath10k_err(ar, "failed to init htt: %d\n", status);
  694. goto err_wmi_detach;
  695. }
  696. status = ath10k_htt_tx_alloc(&ar->htt);
  697. if (status) {
  698. ath10k_err(ar, "failed to alloc htt tx: %d\n", status);
  699. goto err_wmi_detach;
  700. }
  701. status = ath10k_htt_rx_alloc(&ar->htt);
  702. if (status) {
  703. ath10k_err(ar, "failed to alloc htt rx: %d\n", status);
  704. goto err_htt_tx_detach;
  705. }
  706. status = ath10k_hif_start(ar);
  707. if (status) {
  708. ath10k_err(ar, "could not start HIF: %d\n", status);
  709. goto err_htt_rx_detach;
  710. }
  711. status = ath10k_htc_wait_target(&ar->htc);
  712. if (status) {
  713. ath10k_err(ar, "failed to connect to HTC: %d\n", status);
  714. goto err_hif_stop;
  715. }
  716. if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
  717. status = ath10k_htt_connect(&ar->htt);
  718. if (status) {
  719. ath10k_err(ar, "failed to connect htt (%d)\n", status);
  720. goto err_hif_stop;
  721. }
  722. }
  723. status = ath10k_wmi_connect(ar);
  724. if (status) {
  725. ath10k_err(ar, "could not connect wmi: %d\n", status);
  726. goto err_hif_stop;
  727. }
  728. status = ath10k_htc_start(&ar->htc);
  729. if (status) {
  730. ath10k_err(ar, "failed to start htc: %d\n", status);
  731. goto err_hif_stop;
  732. }
  733. if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
  734. status = ath10k_wmi_wait_for_service_ready(ar);
  735. if (status <= 0) {
  736. ath10k_warn(ar, "wmi service ready event not received");
  737. status = -ETIMEDOUT;
  738. goto err_hif_stop;
  739. }
  740. }
  741. ath10k_dbg(ar, ATH10K_DBG_BOOT, "firmware %s booted\n",
  742. ar->hw->wiphy->fw_version);
  743. status = ath10k_wmi_cmd_init(ar);
  744. if (status) {
  745. ath10k_err(ar, "could not send WMI init command (%d)\n",
  746. status);
  747. goto err_hif_stop;
  748. }
  749. status = ath10k_wmi_wait_for_unified_ready(ar);
  750. if (status <= 0) {
  751. ath10k_err(ar, "wmi unified ready event not received\n");
  752. status = -ETIMEDOUT;
  753. goto err_hif_stop;
  754. }
  755. /* we don't care about HTT in UTF mode */
  756. if (mode == ATH10K_FIRMWARE_MODE_NORMAL) {
  757. status = ath10k_htt_setup(&ar->htt);
  758. if (status) {
  759. ath10k_err(ar, "failed to setup htt: %d\n", status);
  760. goto err_hif_stop;
  761. }
  762. }
  763. status = ath10k_debug_start(ar);
  764. if (status)
  765. goto err_hif_stop;
  766. if (test_bit(ATH10K_FW_FEATURE_WMI_10X, ar->fw_features))
  767. ar->free_vdev_map = (1LL << TARGET_10X_NUM_VDEVS) - 1;
  768. else
  769. ar->free_vdev_map = (1LL << TARGET_NUM_VDEVS) - 1;
  770. INIT_LIST_HEAD(&ar->arvifs);
  771. return 0;
  772. err_hif_stop:
  773. ath10k_hif_stop(ar);
  774. err_htt_rx_detach:
  775. ath10k_htt_rx_free(&ar->htt);
  776. err_htt_tx_detach:
  777. ath10k_htt_tx_free(&ar->htt);
  778. err_wmi_detach:
  779. ath10k_wmi_detach(ar);
  780. err:
  781. return status;
  782. }
  783. EXPORT_SYMBOL(ath10k_core_start);
  784. int ath10k_wait_for_suspend(struct ath10k *ar, u32 suspend_opt)
  785. {
  786. int ret;
  787. reinit_completion(&ar->target_suspend);
  788. ret = ath10k_wmi_pdev_suspend_target(ar, suspend_opt);
  789. if (ret) {
  790. ath10k_warn(ar, "could not suspend target (%d)\n", ret);
  791. return ret;
  792. }
  793. ret = wait_for_completion_timeout(&ar->target_suspend, 1 * HZ);
  794. if (ret == 0) {
  795. ath10k_warn(ar, "suspend timed out - target pause event never came\n");
  796. return -ETIMEDOUT;
  797. }
  798. return 0;
  799. }
  800. void ath10k_core_stop(struct ath10k *ar)
  801. {
  802. lockdep_assert_held(&ar->conf_mutex);
  803. /* try to suspend target */
  804. if (ar->state != ATH10K_STATE_RESTARTING &&
  805. ar->state != ATH10K_STATE_UTF)
  806. ath10k_wait_for_suspend(ar, WMI_PDEV_SUSPEND_AND_DISABLE_INTR);
  807. ath10k_debug_stop(ar);
  808. ath10k_hif_stop(ar);
  809. ath10k_htt_tx_free(&ar->htt);
  810. ath10k_htt_rx_free(&ar->htt);
  811. ath10k_wmi_detach(ar);
  812. }
  813. EXPORT_SYMBOL(ath10k_core_stop);
  814. /* mac80211 manages fw/hw initialization through start/stop hooks. However in
  815. * order to know what hw capabilities should be advertised to mac80211 it is
  816. * necessary to load the firmware (and tear it down immediately since start
  817. * hook will try to init it again) before registering */
  818. static int ath10k_core_probe_fw(struct ath10k *ar)
  819. {
  820. struct bmi_target_info target_info;
  821. int ret = 0;
  822. ret = ath10k_hif_power_up(ar);
  823. if (ret) {
  824. ath10k_err(ar, "could not start pci hif (%d)\n", ret);
  825. return ret;
  826. }
  827. memset(&target_info, 0, sizeof(target_info));
  828. ret = ath10k_bmi_get_target_info(ar, &target_info);
  829. if (ret) {
  830. ath10k_err(ar, "could not get target info (%d)\n", ret);
  831. ath10k_hif_power_down(ar);
  832. return ret;
  833. }
  834. ar->target_version = target_info.version;
  835. ar->hw->wiphy->hw_version = target_info.version;
  836. ret = ath10k_init_hw_params(ar);
  837. if (ret) {
  838. ath10k_err(ar, "could not get hw params (%d)\n", ret);
  839. ath10k_hif_power_down(ar);
  840. return ret;
  841. }
  842. ret = ath10k_core_fetch_firmware_files(ar);
  843. if (ret) {
  844. ath10k_err(ar, "could not fetch firmware files (%d)\n", ret);
  845. ath10k_hif_power_down(ar);
  846. return ret;
  847. }
  848. ath10k_core_init_max_sta_count(ar);
  849. mutex_lock(&ar->conf_mutex);
  850. ret = ath10k_core_start(ar, ATH10K_FIRMWARE_MODE_NORMAL);
  851. if (ret) {
  852. ath10k_err(ar, "could not init core (%d)\n", ret);
  853. ath10k_core_free_firmware_files(ar);
  854. ath10k_hif_power_down(ar);
  855. mutex_unlock(&ar->conf_mutex);
  856. return ret;
  857. }
  858. ath10k_print_driver_info(ar);
  859. ath10k_core_stop(ar);
  860. mutex_unlock(&ar->conf_mutex);
  861. ath10k_hif_power_down(ar);
  862. return 0;
  863. }
  864. static int ath10k_core_check_chip_id(struct ath10k *ar)
  865. {
  866. u32 hw_revision = MS(ar->chip_id, SOC_CHIP_ID_REV);
  867. ath10k_dbg(ar, ATH10K_DBG_BOOT, "boot chip_id 0x%08x hw_revision 0x%x\n",
  868. ar->chip_id, hw_revision);
  869. /* Check that we are not using hw1.0 (some of them have same pci id
  870. * as hw2.0) before doing anything else as ath10k crashes horribly
  871. * due to missing hw1.0 workarounds. */
  872. switch (hw_revision) {
  873. case QCA988X_HW_1_0_CHIP_ID_REV:
  874. ath10k_err(ar, "ERROR: qca988x hw1.0 is not supported\n");
  875. return -EOPNOTSUPP;
  876. case QCA988X_HW_2_0_CHIP_ID_REV:
  877. /* known hardware revision, continue normally */
  878. return 0;
  879. default:
  880. ath10k_warn(ar, "Warning: hardware revision unknown (0x%x), expect problems\n",
  881. ar->chip_id);
  882. return 0;
  883. }
  884. return 0;
  885. }
  886. static void ath10k_core_register_work(struct work_struct *work)
  887. {
  888. struct ath10k *ar = container_of(work, struct ath10k, register_work);
  889. int status;
  890. status = ath10k_core_probe_fw(ar);
  891. if (status) {
  892. ath10k_err(ar, "could not probe fw (%d)\n", status);
  893. goto err;
  894. }
  895. status = ath10k_mac_register(ar);
  896. if (status) {
  897. ath10k_err(ar, "could not register to mac80211 (%d)\n", status);
  898. goto err_release_fw;
  899. }
  900. status = ath10k_debug_register(ar);
  901. if (status) {
  902. ath10k_err(ar, "unable to initialize debugfs\n");
  903. goto err_unregister_mac;
  904. }
  905. status = ath10k_spectral_create(ar);
  906. if (status) {
  907. ath10k_err(ar, "failed to initialize spectral\n");
  908. goto err_debug_destroy;
  909. }
  910. set_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags);
  911. return;
  912. err_debug_destroy:
  913. ath10k_debug_destroy(ar);
  914. err_unregister_mac:
  915. ath10k_mac_unregister(ar);
  916. err_release_fw:
  917. ath10k_core_free_firmware_files(ar);
  918. err:
  919. /* TODO: It's probably a good idea to release device from the driver
  920. * but calling device_release_driver() here will cause a deadlock.
  921. */
  922. return;
  923. }
  924. int ath10k_core_register(struct ath10k *ar, u32 chip_id)
  925. {
  926. int status;
  927. ar->chip_id = chip_id;
  928. status = ath10k_core_check_chip_id(ar);
  929. if (status) {
  930. ath10k_err(ar, "Unsupported chip id 0x%08x\n", ar->chip_id);
  931. return status;
  932. }
  933. queue_work(ar->workqueue, &ar->register_work);
  934. return 0;
  935. }
  936. EXPORT_SYMBOL(ath10k_core_register);
  937. void ath10k_core_unregister(struct ath10k *ar)
  938. {
  939. cancel_work_sync(&ar->register_work);
  940. if (!test_bit(ATH10K_FLAG_CORE_REGISTERED, &ar->dev_flags))
  941. return;
  942. /* Stop spectral before unregistering from mac80211 to remove the
  943. * relayfs debugfs file cleanly. Otherwise the parent debugfs tree
  944. * would be already be free'd recursively, leading to a double free.
  945. */
  946. ath10k_spectral_destroy(ar);
  947. /* We must unregister from mac80211 before we stop HTC and HIF.
  948. * Otherwise we will fail to submit commands to FW and mac80211 will be
  949. * unhappy about callback failures. */
  950. ath10k_mac_unregister(ar);
  951. ath10k_testmode_destroy(ar);
  952. ath10k_core_free_firmware_files(ar);
  953. ath10k_debug_unregister(ar);
  954. }
  955. EXPORT_SYMBOL(ath10k_core_unregister);
  956. struct ath10k *ath10k_core_create(size_t priv_size, struct device *dev,
  957. enum ath10k_bus bus,
  958. const struct ath10k_hif_ops *hif_ops)
  959. {
  960. struct ath10k *ar;
  961. int ret;
  962. ar = ath10k_mac_create(priv_size);
  963. if (!ar)
  964. return NULL;
  965. ar->ath_common.priv = ar;
  966. ar->ath_common.hw = ar->hw;
  967. ar->p2p = !!ath10k_p2p;
  968. ar->dev = dev;
  969. ar->hif.ops = hif_ops;
  970. ar->hif.bus = bus;
  971. init_completion(&ar->scan.started);
  972. init_completion(&ar->scan.completed);
  973. init_completion(&ar->scan.on_channel);
  974. init_completion(&ar->target_suspend);
  975. init_completion(&ar->install_key_done);
  976. init_completion(&ar->vdev_setup_done);
  977. INIT_DELAYED_WORK(&ar->scan.timeout, ath10k_scan_timeout_work);
  978. ar->workqueue = create_singlethread_workqueue("ath10k_wq");
  979. if (!ar->workqueue)
  980. goto err_free_mac;
  981. mutex_init(&ar->conf_mutex);
  982. spin_lock_init(&ar->data_lock);
  983. INIT_LIST_HEAD(&ar->peers);
  984. init_waitqueue_head(&ar->peer_mapping_wq);
  985. init_waitqueue_head(&ar->htt.empty_tx_wq);
  986. init_waitqueue_head(&ar->wmi.tx_credits_wq);
  987. init_completion(&ar->offchan_tx_completed);
  988. INIT_WORK(&ar->offchan_tx_work, ath10k_offchan_tx_work);
  989. skb_queue_head_init(&ar->offchan_tx_queue);
  990. INIT_WORK(&ar->wmi_mgmt_tx_work, ath10k_mgmt_over_wmi_tx_work);
  991. skb_queue_head_init(&ar->wmi_mgmt_tx_queue);
  992. INIT_WORK(&ar->register_work, ath10k_core_register_work);
  993. INIT_WORK(&ar->restart_work, ath10k_core_restart);
  994. ret = ath10k_debug_create(ar);
  995. if (ret)
  996. goto err_free_wq;
  997. return ar;
  998. err_free_wq:
  999. destroy_workqueue(ar->workqueue);
  1000. err_free_mac:
  1001. ath10k_mac_destroy(ar);
  1002. return NULL;
  1003. }
  1004. EXPORT_SYMBOL(ath10k_core_create);
  1005. void ath10k_core_destroy(struct ath10k *ar)
  1006. {
  1007. flush_workqueue(ar->workqueue);
  1008. destroy_workqueue(ar->workqueue);
  1009. ath10k_debug_destroy(ar);
  1010. ath10k_mac_destroy(ar);
  1011. }
  1012. EXPORT_SYMBOL(ath10k_core_destroy);
  1013. MODULE_AUTHOR("Qualcomm Atheros");
  1014. MODULE_DESCRIPTION("Core module for QCA988X PCIe devices.");
  1015. MODULE_LICENSE("Dual BSD/GPL");