bnx2x_dcb.c 73 KB

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  1. /* bnx2x_dcb.c: Broadcom Everest network driver.
  2. *
  3. * Copyright 2009-2013 Broadcom Corporation
  4. *
  5. * Unless you and Broadcom execute a separate written software license
  6. * agreement governing use of this software, this software is licensed to you
  7. * under the terms of the GNU General Public License version 2, available
  8. * at http://www.gnu.org/licenses/old-licenses/gpl-2.0.html (the "GPL").
  9. *
  10. * Notwithstanding the above, under no circumstances may you combine this
  11. * software in any way with any other Broadcom software provided under a
  12. * license other than the GPL, without Broadcom's express prior written
  13. * consent.
  14. *
  15. * Maintained by: Ariel Elior <ariel.elior@qlogic.com>
  16. * Written by: Dmitry Kravkov
  17. *
  18. */
  19. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  20. #include <linux/netdevice.h>
  21. #include <linux/types.h>
  22. #include <linux/errno.h>
  23. #include <linux/rtnetlink.h>
  24. #include <net/dcbnl.h>
  25. #include "bnx2x.h"
  26. #include "bnx2x_cmn.h"
  27. #include "bnx2x_dcb.h"
  28. /* forward declarations of dcbx related functions */
  29. static void bnx2x_pfc_set_pfc(struct bnx2x *bp);
  30. static void bnx2x_dcbx_update_ets_params(struct bnx2x *bp);
  31. static void bnx2x_dcbx_get_ets_pri_pg_tbl(struct bnx2x *bp,
  32. u32 *set_configuration_ets_pg,
  33. u32 *pri_pg_tbl);
  34. static void bnx2x_dcbx_get_num_pg_traf_type(struct bnx2x *bp,
  35. u32 *pg_pri_orginal_spread,
  36. struct pg_help_data *help_data);
  37. static void bnx2x_dcbx_fill_cos_params(struct bnx2x *bp,
  38. struct pg_help_data *help_data,
  39. struct dcbx_ets_feature *ets,
  40. u32 *pg_pri_orginal_spread);
  41. static void bnx2x_dcbx_separate_pauseable_from_non(struct bnx2x *bp,
  42. struct cos_help_data *cos_data,
  43. u32 *pg_pri_orginal_spread,
  44. struct dcbx_ets_feature *ets);
  45. static void bnx2x_dcbx_fw_struct(struct bnx2x *bp,
  46. struct bnx2x_func_tx_start_params*);
  47. /* helpers: read/write len bytes from addr into buff by REG_RD/REG_WR */
  48. static void bnx2x_read_data(struct bnx2x *bp, u32 *buff,
  49. u32 addr, u32 len)
  50. {
  51. int i;
  52. for (i = 0; i < len; i += 4, buff++)
  53. *buff = REG_RD(bp, addr + i);
  54. }
  55. static void bnx2x_write_data(struct bnx2x *bp, u32 *buff,
  56. u32 addr, u32 len)
  57. {
  58. int i;
  59. for (i = 0; i < len; i += 4, buff++)
  60. REG_WR(bp, addr + i, *buff);
  61. }
  62. static void bnx2x_pfc_set(struct bnx2x *bp)
  63. {
  64. struct bnx2x_nig_brb_pfc_port_params pfc_params = {0};
  65. u32 pri_bit, val = 0;
  66. int i;
  67. pfc_params.num_of_rx_cos_priority_mask =
  68. bp->dcbx_port_params.ets.num_of_cos;
  69. /* Tx COS configuration */
  70. for (i = 0; i < bp->dcbx_port_params.ets.num_of_cos; i++)
  71. /*
  72. * We configure only the pauseable bits (non pauseable aren't
  73. * configured at all) it's done to avoid false pauses from
  74. * network
  75. */
  76. pfc_params.rx_cos_priority_mask[i] =
  77. bp->dcbx_port_params.ets.cos_params[i].pri_bitmask
  78. & DCBX_PFC_PRI_PAUSE_MASK(bp);
  79. /*
  80. * Rx COS configuration
  81. * Changing PFC RX configuration .
  82. * In RX COS0 will always be configured to lossless and COS1 to lossy
  83. */
  84. for (i = 0 ; i < MAX_PFC_PRIORITIES ; i++) {
  85. pri_bit = 1 << i;
  86. if (!(pri_bit & DCBX_PFC_PRI_PAUSE_MASK(bp)))
  87. val |= 1 << (i * 4);
  88. }
  89. pfc_params.pkt_priority_to_cos = val;
  90. /* RX COS0 */
  91. pfc_params.llfc_low_priority_classes = DCBX_PFC_PRI_PAUSE_MASK(bp);
  92. /* RX COS1 */
  93. pfc_params.llfc_high_priority_classes = 0;
  94. bnx2x_acquire_phy_lock(bp);
  95. bp->link_params.feature_config_flags |= FEATURE_CONFIG_PFC_ENABLED;
  96. bnx2x_update_pfc(&bp->link_params, &bp->link_vars, &pfc_params);
  97. bnx2x_release_phy_lock(bp);
  98. }
  99. static void bnx2x_pfc_clear(struct bnx2x *bp)
  100. {
  101. struct bnx2x_nig_brb_pfc_port_params nig_params = {0};
  102. nig_params.pause_enable = 1;
  103. bnx2x_acquire_phy_lock(bp);
  104. bp->link_params.feature_config_flags &= ~FEATURE_CONFIG_PFC_ENABLED;
  105. bnx2x_update_pfc(&bp->link_params, &bp->link_vars, &nig_params);
  106. bnx2x_release_phy_lock(bp);
  107. }
  108. static void bnx2x_dump_dcbx_drv_param(struct bnx2x *bp,
  109. struct dcbx_features *features,
  110. u32 error)
  111. {
  112. u8 i = 0;
  113. DP(NETIF_MSG_LINK, "local_mib.error %x\n", error);
  114. /* PG */
  115. DP(NETIF_MSG_LINK,
  116. "local_mib.features.ets.enabled %x\n", features->ets.enabled);
  117. for (i = 0; i < DCBX_MAX_NUM_PG_BW_ENTRIES; i++)
  118. DP(NETIF_MSG_LINK,
  119. "local_mib.features.ets.pg_bw_tbl[%d] %d\n", i,
  120. DCBX_PG_BW_GET(features->ets.pg_bw_tbl, i));
  121. for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES; i++)
  122. DP(NETIF_MSG_LINK,
  123. "local_mib.features.ets.pri_pg_tbl[%d] %d\n", i,
  124. DCBX_PRI_PG_GET(features->ets.pri_pg_tbl, i));
  125. /* pfc */
  126. DP(BNX2X_MSG_DCB, "dcbx_features.pfc.pri_en_bitmap %x\n",
  127. features->pfc.pri_en_bitmap);
  128. DP(BNX2X_MSG_DCB, "dcbx_features.pfc.pfc_caps %x\n",
  129. features->pfc.pfc_caps);
  130. DP(BNX2X_MSG_DCB, "dcbx_features.pfc.enabled %x\n",
  131. features->pfc.enabled);
  132. DP(BNX2X_MSG_DCB, "dcbx_features.app.default_pri %x\n",
  133. features->app.default_pri);
  134. DP(BNX2X_MSG_DCB, "dcbx_features.app.tc_supported %x\n",
  135. features->app.tc_supported);
  136. DP(BNX2X_MSG_DCB, "dcbx_features.app.enabled %x\n",
  137. features->app.enabled);
  138. for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++) {
  139. DP(BNX2X_MSG_DCB,
  140. "dcbx_features.app.app_pri_tbl[%x].app_id %x\n",
  141. i, features->app.app_pri_tbl[i].app_id);
  142. DP(BNX2X_MSG_DCB,
  143. "dcbx_features.app.app_pri_tbl[%x].pri_bitmap %x\n",
  144. i, features->app.app_pri_tbl[i].pri_bitmap);
  145. DP(BNX2X_MSG_DCB,
  146. "dcbx_features.app.app_pri_tbl[%x].appBitfield %x\n",
  147. i, features->app.app_pri_tbl[i].appBitfield);
  148. }
  149. }
  150. static void bnx2x_dcbx_get_ap_priority(struct bnx2x *bp,
  151. u8 pri_bitmap,
  152. u8 llfc_traf_type)
  153. {
  154. u32 pri = MAX_PFC_PRIORITIES;
  155. u32 index = MAX_PFC_PRIORITIES - 1;
  156. u32 pri_mask;
  157. u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
  158. /* Choose the highest priority */
  159. while ((MAX_PFC_PRIORITIES == pri) && (0 != index)) {
  160. pri_mask = 1 << index;
  161. if (GET_FLAGS(pri_bitmap, pri_mask))
  162. pri = index ;
  163. index--;
  164. }
  165. if (pri < MAX_PFC_PRIORITIES)
  166. ttp[llfc_traf_type] = max_t(u32, ttp[llfc_traf_type], pri);
  167. }
  168. static void bnx2x_dcbx_get_ap_feature(struct bnx2x *bp,
  169. struct dcbx_app_priority_feature *app,
  170. u32 error) {
  171. u8 index;
  172. u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
  173. if (GET_FLAGS(error, DCBX_LOCAL_APP_ERROR))
  174. DP(BNX2X_MSG_DCB, "DCBX_LOCAL_APP_ERROR\n");
  175. if (GET_FLAGS(error, DCBX_LOCAL_APP_MISMATCH))
  176. DP(BNX2X_MSG_DCB, "DCBX_LOCAL_APP_MISMATCH\n");
  177. if (GET_FLAGS(error, DCBX_REMOTE_APP_TLV_NOT_FOUND))
  178. DP(BNX2X_MSG_DCB, "DCBX_REMOTE_APP_TLV_NOT_FOUND\n");
  179. if (app->enabled &&
  180. !GET_FLAGS(error, DCBX_LOCAL_APP_ERROR | DCBX_LOCAL_APP_MISMATCH |
  181. DCBX_REMOTE_APP_TLV_NOT_FOUND)) {
  182. bp->dcbx_port_params.app.enabled = true;
  183. for (index = 0 ; index < LLFC_DRIVER_TRAFFIC_TYPE_MAX; index++)
  184. ttp[index] = 0;
  185. if (app->default_pri < MAX_PFC_PRIORITIES)
  186. ttp[LLFC_TRAFFIC_TYPE_NW] = app->default_pri;
  187. for (index = 0 ; index < DCBX_MAX_APP_PROTOCOL; index++) {
  188. struct dcbx_app_priority_entry *entry =
  189. app->app_pri_tbl;
  190. if (GET_FLAGS(entry[index].appBitfield,
  191. DCBX_APP_SF_ETH_TYPE) &&
  192. ETH_TYPE_FCOE == entry[index].app_id)
  193. bnx2x_dcbx_get_ap_priority(bp,
  194. entry[index].pri_bitmap,
  195. LLFC_TRAFFIC_TYPE_FCOE);
  196. if (GET_FLAGS(entry[index].appBitfield,
  197. DCBX_APP_SF_PORT) &&
  198. TCP_PORT_ISCSI == entry[index].app_id)
  199. bnx2x_dcbx_get_ap_priority(bp,
  200. entry[index].pri_bitmap,
  201. LLFC_TRAFFIC_TYPE_ISCSI);
  202. }
  203. } else {
  204. DP(BNX2X_MSG_DCB, "DCBX_LOCAL_APP_DISABLED\n");
  205. bp->dcbx_port_params.app.enabled = false;
  206. for (index = 0 ; index < LLFC_DRIVER_TRAFFIC_TYPE_MAX; index++)
  207. ttp[index] = INVALID_TRAFFIC_TYPE_PRIORITY;
  208. }
  209. }
  210. static void bnx2x_dcbx_get_ets_feature(struct bnx2x *bp,
  211. struct dcbx_ets_feature *ets,
  212. u32 error) {
  213. int i = 0;
  214. u32 pg_pri_orginal_spread[DCBX_MAX_NUM_PG_BW_ENTRIES] = {0};
  215. struct pg_help_data pg_help_data;
  216. struct bnx2x_dcbx_cos_params *cos_params =
  217. bp->dcbx_port_params.ets.cos_params;
  218. memset(&pg_help_data, 0, sizeof(struct pg_help_data));
  219. if (GET_FLAGS(error, DCBX_LOCAL_ETS_ERROR))
  220. DP(BNX2X_MSG_DCB, "DCBX_LOCAL_ETS_ERROR\n");
  221. if (GET_FLAGS(error, DCBX_REMOTE_ETS_TLV_NOT_FOUND))
  222. DP(BNX2X_MSG_DCB, "DCBX_REMOTE_ETS_TLV_NOT_FOUND\n");
  223. /* Clean up old settings of ets on COS */
  224. for (i = 0; i < ARRAY_SIZE(bp->dcbx_port_params.ets.cos_params) ; i++) {
  225. cos_params[i].pauseable = false;
  226. cos_params[i].strict = BNX2X_DCBX_STRICT_INVALID;
  227. cos_params[i].bw_tbl = DCBX_INVALID_COS_BW;
  228. cos_params[i].pri_bitmask = 0;
  229. }
  230. if (bp->dcbx_port_params.app.enabled && ets->enabled &&
  231. !GET_FLAGS(error,
  232. DCBX_LOCAL_ETS_ERROR | DCBX_REMOTE_ETS_TLV_NOT_FOUND)) {
  233. DP(BNX2X_MSG_DCB, "DCBX_LOCAL_ETS_ENABLE\n");
  234. bp->dcbx_port_params.ets.enabled = true;
  235. bnx2x_dcbx_get_ets_pri_pg_tbl(bp,
  236. pg_pri_orginal_spread,
  237. ets->pri_pg_tbl);
  238. bnx2x_dcbx_get_num_pg_traf_type(bp,
  239. pg_pri_orginal_spread,
  240. &pg_help_data);
  241. bnx2x_dcbx_fill_cos_params(bp, &pg_help_data,
  242. ets, pg_pri_orginal_spread);
  243. } else {
  244. DP(BNX2X_MSG_DCB, "DCBX_LOCAL_ETS_DISABLED\n");
  245. bp->dcbx_port_params.ets.enabled = false;
  246. ets->pri_pg_tbl[0] = 0;
  247. for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES ; i++)
  248. DCBX_PG_BW_SET(ets->pg_bw_tbl, i, 1);
  249. }
  250. }
  251. static void bnx2x_dcbx_get_pfc_feature(struct bnx2x *bp,
  252. struct dcbx_pfc_feature *pfc, u32 error)
  253. {
  254. if (GET_FLAGS(error, DCBX_LOCAL_PFC_ERROR))
  255. DP(BNX2X_MSG_DCB, "DCBX_LOCAL_PFC_ERROR\n");
  256. if (GET_FLAGS(error, DCBX_REMOTE_PFC_TLV_NOT_FOUND))
  257. DP(BNX2X_MSG_DCB, "DCBX_REMOTE_PFC_TLV_NOT_FOUND\n");
  258. if (bp->dcbx_port_params.app.enabled && pfc->enabled &&
  259. !GET_FLAGS(error, DCBX_LOCAL_PFC_ERROR | DCBX_LOCAL_PFC_MISMATCH |
  260. DCBX_REMOTE_PFC_TLV_NOT_FOUND)) {
  261. bp->dcbx_port_params.pfc.enabled = true;
  262. bp->dcbx_port_params.pfc.priority_non_pauseable_mask =
  263. ~(pfc->pri_en_bitmap);
  264. } else {
  265. DP(BNX2X_MSG_DCB, "DCBX_LOCAL_PFC_DISABLED\n");
  266. bp->dcbx_port_params.pfc.enabled = false;
  267. bp->dcbx_port_params.pfc.priority_non_pauseable_mask = 0;
  268. }
  269. }
  270. /* maps unmapped priorities to to the same COS as L2 */
  271. static void bnx2x_dcbx_map_nw(struct bnx2x *bp)
  272. {
  273. int i;
  274. u32 unmapped = (1 << MAX_PFC_PRIORITIES) - 1; /* all ones */
  275. u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
  276. u32 nw_prio = 1 << ttp[LLFC_TRAFFIC_TYPE_NW];
  277. struct bnx2x_dcbx_cos_params *cos_params =
  278. bp->dcbx_port_params.ets.cos_params;
  279. /* get unmapped priorities by clearing mapped bits */
  280. for (i = 0; i < LLFC_DRIVER_TRAFFIC_TYPE_MAX; i++)
  281. unmapped &= ~(1 << ttp[i]);
  282. /* find cos for nw prio and extend it with unmapped */
  283. for (i = 0; i < ARRAY_SIZE(bp->dcbx_port_params.ets.cos_params); i++) {
  284. if (cos_params[i].pri_bitmask & nw_prio) {
  285. /* extend the bitmask with unmapped */
  286. DP(BNX2X_MSG_DCB,
  287. "cos %d extended with 0x%08x\n", i, unmapped);
  288. cos_params[i].pri_bitmask |= unmapped;
  289. break;
  290. }
  291. }
  292. }
  293. static void bnx2x_get_dcbx_drv_param(struct bnx2x *bp,
  294. struct dcbx_features *features,
  295. u32 error)
  296. {
  297. bnx2x_dcbx_get_ap_feature(bp, &features->app, error);
  298. bnx2x_dcbx_get_pfc_feature(bp, &features->pfc, error);
  299. bnx2x_dcbx_get_ets_feature(bp, &features->ets, error);
  300. bnx2x_dcbx_map_nw(bp);
  301. }
  302. #define DCBX_LOCAL_MIB_MAX_TRY_READ (100)
  303. static int bnx2x_dcbx_read_mib(struct bnx2x *bp,
  304. u32 *base_mib_addr,
  305. u32 offset,
  306. int read_mib_type)
  307. {
  308. int max_try_read = 0;
  309. u32 mib_size, prefix_seq_num, suffix_seq_num;
  310. struct lldp_remote_mib *remote_mib ;
  311. struct lldp_local_mib *local_mib;
  312. switch (read_mib_type) {
  313. case DCBX_READ_LOCAL_MIB:
  314. mib_size = sizeof(struct lldp_local_mib);
  315. break;
  316. case DCBX_READ_REMOTE_MIB:
  317. mib_size = sizeof(struct lldp_remote_mib);
  318. break;
  319. default:
  320. return 1; /*error*/
  321. }
  322. offset += BP_PORT(bp) * mib_size;
  323. do {
  324. bnx2x_read_data(bp, base_mib_addr, offset, mib_size);
  325. max_try_read++;
  326. switch (read_mib_type) {
  327. case DCBX_READ_LOCAL_MIB:
  328. local_mib = (struct lldp_local_mib *) base_mib_addr;
  329. prefix_seq_num = local_mib->prefix_seq_num;
  330. suffix_seq_num = local_mib->suffix_seq_num;
  331. break;
  332. case DCBX_READ_REMOTE_MIB:
  333. remote_mib = (struct lldp_remote_mib *) base_mib_addr;
  334. prefix_seq_num = remote_mib->prefix_seq_num;
  335. suffix_seq_num = remote_mib->suffix_seq_num;
  336. break;
  337. default:
  338. return 1; /*error*/
  339. }
  340. } while ((prefix_seq_num != suffix_seq_num) &&
  341. (max_try_read < DCBX_LOCAL_MIB_MAX_TRY_READ));
  342. if (max_try_read >= DCBX_LOCAL_MIB_MAX_TRY_READ) {
  343. BNX2X_ERR("MIB could not be read\n");
  344. return 1;
  345. }
  346. return 0;
  347. }
  348. static void bnx2x_pfc_set_pfc(struct bnx2x *bp)
  349. {
  350. int mfw_configured = SHMEM2_HAS(bp, drv_flags) &&
  351. GET_FLAGS(SHMEM2_RD(bp, drv_flags),
  352. 1 << DRV_FLAGS_DCB_MFW_CONFIGURED);
  353. if (bp->dcbx_port_params.pfc.enabled &&
  354. (!(bp->dcbx_error & DCBX_REMOTE_MIB_ERROR) || mfw_configured))
  355. /*
  356. * 1. Fills up common PFC structures if required
  357. * 2. Configure NIG, MAC and BRB via the elink
  358. */
  359. bnx2x_pfc_set(bp);
  360. else
  361. bnx2x_pfc_clear(bp);
  362. }
  363. int bnx2x_dcbx_stop_hw_tx(struct bnx2x *bp)
  364. {
  365. struct bnx2x_func_state_params func_params = {NULL};
  366. int rc;
  367. func_params.f_obj = &bp->func_obj;
  368. func_params.cmd = BNX2X_F_CMD_TX_STOP;
  369. __set_bit(RAMROD_COMP_WAIT, &func_params.ramrod_flags);
  370. __set_bit(RAMROD_RETRY, &func_params.ramrod_flags);
  371. DP(BNX2X_MSG_DCB, "STOP TRAFFIC\n");
  372. rc = bnx2x_func_state_change(bp, &func_params);
  373. if (rc) {
  374. BNX2X_ERR("Unable to hold traffic for HW configuration\n");
  375. bnx2x_panic();
  376. }
  377. return rc;
  378. }
  379. int bnx2x_dcbx_resume_hw_tx(struct bnx2x *bp)
  380. {
  381. struct bnx2x_func_state_params func_params = {NULL};
  382. struct bnx2x_func_tx_start_params *tx_params =
  383. &func_params.params.tx_start;
  384. int rc;
  385. func_params.f_obj = &bp->func_obj;
  386. func_params.cmd = BNX2X_F_CMD_TX_START;
  387. __set_bit(RAMROD_COMP_WAIT, &func_params.ramrod_flags);
  388. __set_bit(RAMROD_RETRY, &func_params.ramrod_flags);
  389. bnx2x_dcbx_fw_struct(bp, tx_params);
  390. DP(BNX2X_MSG_DCB, "START TRAFFIC\n");
  391. rc = bnx2x_func_state_change(bp, &func_params);
  392. if (rc) {
  393. BNX2X_ERR("Unable to resume traffic after HW configuration\n");
  394. bnx2x_panic();
  395. }
  396. return rc;
  397. }
  398. static void bnx2x_dcbx_2cos_limit_update_ets_config(struct bnx2x *bp)
  399. {
  400. struct bnx2x_dcbx_pg_params *ets = &(bp->dcbx_port_params.ets);
  401. int rc = 0;
  402. if (ets->num_of_cos == 0 || ets->num_of_cos > DCBX_COS_MAX_NUM_E2) {
  403. BNX2X_ERR("Illegal number of COSes %d\n", ets->num_of_cos);
  404. return;
  405. }
  406. /* valid COS entries */
  407. if (ets->num_of_cos == 1) /* no ETS */
  408. return;
  409. /* sanity */
  410. if (((BNX2X_DCBX_STRICT_INVALID == ets->cos_params[0].strict) &&
  411. (DCBX_INVALID_COS_BW == ets->cos_params[0].bw_tbl)) ||
  412. ((BNX2X_DCBX_STRICT_INVALID == ets->cos_params[1].strict) &&
  413. (DCBX_INVALID_COS_BW == ets->cos_params[1].bw_tbl))) {
  414. BNX2X_ERR("all COS should have at least bw_limit or strict"
  415. "ets->cos_params[0].strict= %x"
  416. "ets->cos_params[0].bw_tbl= %x"
  417. "ets->cos_params[1].strict= %x"
  418. "ets->cos_params[1].bw_tbl= %x",
  419. ets->cos_params[0].strict,
  420. ets->cos_params[0].bw_tbl,
  421. ets->cos_params[1].strict,
  422. ets->cos_params[1].bw_tbl);
  423. return;
  424. }
  425. /* If we join a group and there is bw_tbl and strict then bw rules */
  426. if ((DCBX_INVALID_COS_BW != ets->cos_params[0].bw_tbl) &&
  427. (DCBX_INVALID_COS_BW != ets->cos_params[1].bw_tbl)) {
  428. u32 bw_tbl_0 = ets->cos_params[0].bw_tbl;
  429. u32 bw_tbl_1 = ets->cos_params[1].bw_tbl;
  430. /* Do not allow 0-100 configuration
  431. * since PBF does not support it
  432. * force 1-99 instead
  433. */
  434. if (bw_tbl_0 == 0) {
  435. bw_tbl_0 = 1;
  436. bw_tbl_1 = 99;
  437. } else if (bw_tbl_1 == 0) {
  438. bw_tbl_1 = 1;
  439. bw_tbl_0 = 99;
  440. }
  441. bnx2x_ets_bw_limit(&bp->link_params, bw_tbl_0, bw_tbl_1);
  442. } else {
  443. if (ets->cos_params[0].strict == BNX2X_DCBX_STRICT_COS_HIGHEST)
  444. rc = bnx2x_ets_strict(&bp->link_params, 0);
  445. else if (ets->cos_params[1].strict
  446. == BNX2X_DCBX_STRICT_COS_HIGHEST)
  447. rc = bnx2x_ets_strict(&bp->link_params, 1);
  448. if (rc)
  449. BNX2X_ERR("update_ets_params failed\n");
  450. }
  451. }
  452. /*
  453. * In E3B0 the configuration may have more than 2 COS.
  454. */
  455. static void bnx2x_dcbx_update_ets_config(struct bnx2x *bp)
  456. {
  457. struct bnx2x_dcbx_pg_params *ets = &(bp->dcbx_port_params.ets);
  458. struct bnx2x_ets_params ets_params = { 0 };
  459. u8 i;
  460. ets_params.num_of_cos = ets->num_of_cos;
  461. for (i = 0; i < ets->num_of_cos; i++) {
  462. /* COS is SP */
  463. if (ets->cos_params[i].strict != BNX2X_DCBX_STRICT_INVALID) {
  464. if (ets->cos_params[i].bw_tbl != DCBX_INVALID_COS_BW) {
  465. BNX2X_ERR("COS can't be not BW and not SP\n");
  466. return;
  467. }
  468. ets_params.cos[i].state = bnx2x_cos_state_strict;
  469. ets_params.cos[i].params.sp_params.pri =
  470. ets->cos_params[i].strict;
  471. } else { /* COS is BW */
  472. if (ets->cos_params[i].bw_tbl == DCBX_INVALID_COS_BW) {
  473. BNX2X_ERR("COS can't be not BW and not SP\n");
  474. return;
  475. }
  476. ets_params.cos[i].state = bnx2x_cos_state_bw;
  477. ets_params.cos[i].params.bw_params.bw =
  478. (u8)ets->cos_params[i].bw_tbl;
  479. }
  480. }
  481. /* Configure the ETS in HW */
  482. if (bnx2x_ets_e3b0_config(&bp->link_params, &bp->link_vars,
  483. &ets_params)) {
  484. BNX2X_ERR("bnx2x_ets_e3b0_config failed\n");
  485. bnx2x_ets_disabled(&bp->link_params, &bp->link_vars);
  486. }
  487. }
  488. static void bnx2x_dcbx_update_ets_params(struct bnx2x *bp)
  489. {
  490. int mfw_configured = SHMEM2_HAS(bp, drv_flags) &&
  491. GET_FLAGS(SHMEM2_RD(bp, drv_flags),
  492. 1 << DRV_FLAGS_DCB_MFW_CONFIGURED);
  493. bnx2x_ets_disabled(&bp->link_params, &bp->link_vars);
  494. if (!bp->dcbx_port_params.ets.enabled ||
  495. ((bp->dcbx_error & DCBX_REMOTE_MIB_ERROR) && !mfw_configured))
  496. return;
  497. if (CHIP_IS_E3B0(bp))
  498. bnx2x_dcbx_update_ets_config(bp);
  499. else
  500. bnx2x_dcbx_2cos_limit_update_ets_config(bp);
  501. }
  502. #ifdef BCM_DCBNL
  503. static int bnx2x_dcbx_read_shmem_remote_mib(struct bnx2x *bp)
  504. {
  505. struct lldp_remote_mib remote_mib = {0};
  506. u32 dcbx_remote_mib_offset = SHMEM2_RD(bp, dcbx_remote_mib_offset);
  507. int rc;
  508. DP(BNX2X_MSG_DCB, "dcbx_remote_mib_offset 0x%x\n",
  509. dcbx_remote_mib_offset);
  510. if (SHMEM_DCBX_REMOTE_MIB_NONE == dcbx_remote_mib_offset) {
  511. BNX2X_ERR("FW doesn't support dcbx_remote_mib_offset\n");
  512. return -EINVAL;
  513. }
  514. rc = bnx2x_dcbx_read_mib(bp, (u32 *)&remote_mib, dcbx_remote_mib_offset,
  515. DCBX_READ_REMOTE_MIB);
  516. if (rc) {
  517. BNX2X_ERR("Failed to read remote mib from FW\n");
  518. return rc;
  519. }
  520. /* save features and flags */
  521. bp->dcbx_remote_feat = remote_mib.features;
  522. bp->dcbx_remote_flags = remote_mib.flags;
  523. return 0;
  524. }
  525. #endif
  526. static int bnx2x_dcbx_read_shmem_neg_results(struct bnx2x *bp)
  527. {
  528. struct lldp_local_mib local_mib = {0};
  529. u32 dcbx_neg_res_offset = SHMEM2_RD(bp, dcbx_neg_res_offset);
  530. int rc;
  531. DP(BNX2X_MSG_DCB, "dcbx_neg_res_offset 0x%x\n", dcbx_neg_res_offset);
  532. if (SHMEM_DCBX_NEG_RES_NONE == dcbx_neg_res_offset) {
  533. BNX2X_ERR("FW doesn't support dcbx_neg_res_offset\n");
  534. return -EINVAL;
  535. }
  536. rc = bnx2x_dcbx_read_mib(bp, (u32 *)&local_mib, dcbx_neg_res_offset,
  537. DCBX_READ_LOCAL_MIB);
  538. if (rc) {
  539. BNX2X_ERR("Failed to read local mib from FW\n");
  540. return rc;
  541. }
  542. /* save features and error */
  543. bp->dcbx_local_feat = local_mib.features;
  544. bp->dcbx_error = local_mib.error;
  545. return 0;
  546. }
  547. #ifdef BCM_DCBNL
  548. static inline
  549. u8 bnx2x_dcbx_dcbnl_app_up(struct dcbx_app_priority_entry *ent)
  550. {
  551. u8 pri;
  552. /* Choose the highest priority */
  553. for (pri = MAX_PFC_PRIORITIES - 1; pri > 0; pri--)
  554. if (ent->pri_bitmap & (1 << pri))
  555. break;
  556. return pri;
  557. }
  558. static inline
  559. u8 bnx2x_dcbx_dcbnl_app_idtype(struct dcbx_app_priority_entry *ent)
  560. {
  561. return ((ent->appBitfield & DCBX_APP_ENTRY_SF_MASK) ==
  562. DCBX_APP_SF_PORT) ? DCB_APP_IDTYPE_PORTNUM :
  563. DCB_APP_IDTYPE_ETHTYPE;
  564. }
  565. int bnx2x_dcbnl_update_applist(struct bnx2x *bp, bool delall)
  566. {
  567. int i, err = 0;
  568. for (i = 0; i < DCBX_MAX_APP_PROTOCOL && err == 0; i++) {
  569. struct dcbx_app_priority_entry *ent =
  570. &bp->dcbx_local_feat.app.app_pri_tbl[i];
  571. if (ent->appBitfield & DCBX_APP_ENTRY_VALID) {
  572. u8 up = bnx2x_dcbx_dcbnl_app_up(ent);
  573. /* avoid invalid user-priority */
  574. if (up) {
  575. struct dcb_app app;
  576. app.selector = bnx2x_dcbx_dcbnl_app_idtype(ent);
  577. app.protocol = ent->app_id;
  578. app.priority = delall ? 0 : up;
  579. err = dcb_setapp(bp->dev, &app);
  580. }
  581. }
  582. }
  583. return err;
  584. }
  585. #endif
  586. static inline void bnx2x_dcbx_update_tc_mapping(struct bnx2x *bp)
  587. {
  588. u8 prio, cos;
  589. for (cos = 0; cos < bp->dcbx_port_params.ets.num_of_cos; cos++) {
  590. for (prio = 0; prio < BNX2X_MAX_PRIORITY; prio++) {
  591. if (bp->dcbx_port_params.ets.cos_params[cos].pri_bitmask
  592. & (1 << prio)) {
  593. bp->prio_to_cos[prio] = cos;
  594. DP(BNX2X_MSG_DCB,
  595. "tx_mapping %d --> %d\n", prio, cos);
  596. }
  597. }
  598. }
  599. /* setup tc must be called under rtnl lock, but we can't take it here
  600. * as we are handling an attention on a work queue which must be
  601. * flushed at some rtnl-locked contexts (e.g. if down)
  602. */
  603. bnx2x_schedule_sp_rtnl(bp, BNX2X_SP_RTNL_SETUP_TC, 0);
  604. }
  605. void bnx2x_dcbx_set_params(struct bnx2x *bp, u32 state)
  606. {
  607. switch (state) {
  608. case BNX2X_DCBX_STATE_NEG_RECEIVED:
  609. {
  610. DP(BNX2X_MSG_DCB, "BNX2X_DCBX_STATE_NEG_RECEIVED\n");
  611. #ifdef BCM_DCBNL
  612. /**
  613. * Delete app tlvs from dcbnl before reading new
  614. * negotiation results
  615. */
  616. bnx2x_dcbnl_update_applist(bp, true);
  617. /* Read remote mib if dcbx is in the FW */
  618. if (bnx2x_dcbx_read_shmem_remote_mib(bp))
  619. return;
  620. #endif
  621. /* Read neg results if dcbx is in the FW */
  622. if (bnx2x_dcbx_read_shmem_neg_results(bp))
  623. return;
  624. bnx2x_dump_dcbx_drv_param(bp, &bp->dcbx_local_feat,
  625. bp->dcbx_error);
  626. bnx2x_get_dcbx_drv_param(bp, &bp->dcbx_local_feat,
  627. bp->dcbx_error);
  628. /* mark DCBX result for PMF migration */
  629. bnx2x_update_drv_flags(bp,
  630. 1 << DRV_FLAGS_DCB_CONFIGURED,
  631. 1);
  632. #ifdef BCM_DCBNL
  633. /*
  634. * Add new app tlvs to dcbnl
  635. */
  636. bnx2x_dcbnl_update_applist(bp, false);
  637. #endif
  638. /*
  639. * reconfigure the netdevice with the results of the new
  640. * dcbx negotiation.
  641. */
  642. bnx2x_dcbx_update_tc_mapping(bp);
  643. /*
  644. * allow other functions to update their netdevices
  645. * accordingly
  646. */
  647. if (IS_MF(bp))
  648. bnx2x_link_sync_notify(bp);
  649. bnx2x_schedule_sp_rtnl(bp, BNX2X_SP_RTNL_TX_STOP, 0);
  650. return;
  651. }
  652. case BNX2X_DCBX_STATE_TX_PAUSED:
  653. DP(BNX2X_MSG_DCB, "BNX2X_DCBX_STATE_TX_PAUSED\n");
  654. bnx2x_pfc_set_pfc(bp);
  655. bnx2x_dcbx_update_ets_params(bp);
  656. /* ets may affect cmng configuration: reinit it in hw */
  657. bnx2x_set_local_cmng(bp);
  658. return;
  659. case BNX2X_DCBX_STATE_TX_RELEASED:
  660. DP(BNX2X_MSG_DCB, "BNX2X_DCBX_STATE_TX_RELEASED\n");
  661. bnx2x_fw_command(bp, DRV_MSG_CODE_DCBX_PMF_DRV_OK, 0);
  662. #ifdef BCM_DCBNL
  663. /*
  664. * Send a notification for the new negotiated parameters
  665. */
  666. dcbnl_cee_notify(bp->dev, RTM_GETDCB, DCB_CMD_CEE_GET, 0, 0);
  667. #endif
  668. return;
  669. default:
  670. BNX2X_ERR("Unknown DCBX_STATE\n");
  671. }
  672. }
  673. #define LLDP_ADMIN_MIB_OFFSET(bp) (PORT_MAX*sizeof(struct lldp_params) + \
  674. BP_PORT(bp)*sizeof(struct lldp_admin_mib))
  675. static void bnx2x_dcbx_admin_mib_updated_params(struct bnx2x *bp,
  676. u32 dcbx_lldp_params_offset)
  677. {
  678. struct lldp_admin_mib admin_mib;
  679. u32 i, other_traf_type = PREDEFINED_APP_IDX_MAX, traf_type = 0;
  680. u32 offset = dcbx_lldp_params_offset + LLDP_ADMIN_MIB_OFFSET(bp);
  681. /*shortcuts*/
  682. struct dcbx_features *af = &admin_mib.features;
  683. struct bnx2x_config_dcbx_params *dp = &bp->dcbx_config_params;
  684. memset(&admin_mib, 0, sizeof(struct lldp_admin_mib));
  685. /* Read the data first */
  686. bnx2x_read_data(bp, (u32 *)&admin_mib, offset,
  687. sizeof(struct lldp_admin_mib));
  688. if (bp->dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_ON)
  689. SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_DCBX_ENABLED);
  690. else
  691. RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_DCBX_ENABLED);
  692. if (dp->overwrite_settings == BNX2X_DCBX_OVERWRITE_SETTINGS_ENABLE) {
  693. RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_CEE_VERSION_MASK);
  694. admin_mib.ver_cfg_flags |=
  695. (dp->admin_dcbx_version << DCBX_CEE_VERSION_SHIFT) &
  696. DCBX_CEE_VERSION_MASK;
  697. af->ets.enabled = (u8)dp->admin_ets_enable;
  698. af->pfc.enabled = (u8)dp->admin_pfc_enable;
  699. /* FOR IEEE dp->admin_tc_supported_tx_enable */
  700. if (dp->admin_ets_configuration_tx_enable)
  701. SET_FLAGS(admin_mib.ver_cfg_flags,
  702. DCBX_ETS_CONFIG_TX_ENABLED);
  703. else
  704. RESET_FLAGS(admin_mib.ver_cfg_flags,
  705. DCBX_ETS_CONFIG_TX_ENABLED);
  706. /* For IEEE admin_ets_recommendation_tx_enable */
  707. if (dp->admin_pfc_tx_enable)
  708. SET_FLAGS(admin_mib.ver_cfg_flags,
  709. DCBX_PFC_CONFIG_TX_ENABLED);
  710. else
  711. RESET_FLAGS(admin_mib.ver_cfg_flags,
  712. DCBX_PFC_CONFIG_TX_ENABLED);
  713. if (dp->admin_application_priority_tx_enable)
  714. SET_FLAGS(admin_mib.ver_cfg_flags,
  715. DCBX_APP_CONFIG_TX_ENABLED);
  716. else
  717. RESET_FLAGS(admin_mib.ver_cfg_flags,
  718. DCBX_APP_CONFIG_TX_ENABLED);
  719. if (dp->admin_ets_willing)
  720. SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_ETS_WILLING);
  721. else
  722. RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_ETS_WILLING);
  723. /* For IEEE admin_ets_reco_valid */
  724. if (dp->admin_pfc_willing)
  725. SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_PFC_WILLING);
  726. else
  727. RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_PFC_WILLING);
  728. if (dp->admin_app_priority_willing)
  729. SET_FLAGS(admin_mib.ver_cfg_flags, DCBX_APP_WILLING);
  730. else
  731. RESET_FLAGS(admin_mib.ver_cfg_flags, DCBX_APP_WILLING);
  732. for (i = 0 ; i < DCBX_MAX_NUM_PG_BW_ENTRIES; i++) {
  733. DCBX_PG_BW_SET(af->ets.pg_bw_tbl, i,
  734. (u8)dp->admin_configuration_bw_precentage[i]);
  735. DP(BNX2X_MSG_DCB, "pg_bw_tbl[%d] = %02x\n",
  736. i, DCBX_PG_BW_GET(af->ets.pg_bw_tbl, i));
  737. }
  738. for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES; i++) {
  739. DCBX_PRI_PG_SET(af->ets.pri_pg_tbl, i,
  740. (u8)dp->admin_configuration_ets_pg[i]);
  741. DP(BNX2X_MSG_DCB, "pri_pg_tbl[%d] = %02x\n",
  742. i, DCBX_PRI_PG_GET(af->ets.pri_pg_tbl, i));
  743. }
  744. /*For IEEE admin_recommendation_bw_percentage
  745. *For IEEE admin_recommendation_ets_pg */
  746. af->pfc.pri_en_bitmap = (u8)dp->admin_pfc_bitmap;
  747. for (i = 0; i < DCBX_CONFIG_MAX_APP_PROTOCOL; i++) {
  748. if (dp->admin_priority_app_table[i].valid) {
  749. struct bnx2x_admin_priority_app_table *table =
  750. dp->admin_priority_app_table;
  751. if ((ETH_TYPE_FCOE == table[i].app_id) &&
  752. (TRAFFIC_TYPE_ETH == table[i].traffic_type))
  753. traf_type = FCOE_APP_IDX;
  754. else if ((TCP_PORT_ISCSI == table[i].app_id) &&
  755. (TRAFFIC_TYPE_PORT == table[i].traffic_type))
  756. traf_type = ISCSI_APP_IDX;
  757. else
  758. traf_type = other_traf_type++;
  759. af->app.app_pri_tbl[traf_type].app_id =
  760. table[i].app_id;
  761. af->app.app_pri_tbl[traf_type].pri_bitmap =
  762. (u8)(1 << table[i].priority);
  763. af->app.app_pri_tbl[traf_type].appBitfield =
  764. (DCBX_APP_ENTRY_VALID);
  765. af->app.app_pri_tbl[traf_type].appBitfield |=
  766. (TRAFFIC_TYPE_ETH == table[i].traffic_type) ?
  767. DCBX_APP_SF_ETH_TYPE : DCBX_APP_SF_PORT;
  768. }
  769. }
  770. af->app.default_pri = (u8)dp->admin_default_priority;
  771. }
  772. /* Write the data. */
  773. bnx2x_write_data(bp, (u32 *)&admin_mib, offset,
  774. sizeof(struct lldp_admin_mib));
  775. }
  776. void bnx2x_dcbx_set_state(struct bnx2x *bp, bool dcb_on, u32 dcbx_enabled)
  777. {
  778. if (!CHIP_IS_E1x(bp)) {
  779. bp->dcb_state = dcb_on;
  780. bp->dcbx_enabled = dcbx_enabled;
  781. } else {
  782. bp->dcb_state = false;
  783. bp->dcbx_enabled = BNX2X_DCBX_ENABLED_INVALID;
  784. }
  785. DP(BNX2X_MSG_DCB, "DCB state [%s:%s]\n",
  786. dcb_on ? "ON" : "OFF",
  787. dcbx_enabled == BNX2X_DCBX_ENABLED_OFF ? "user-mode" :
  788. dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_OFF ? "on-chip static" :
  789. dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_ON ?
  790. "on-chip with negotiation" : "invalid");
  791. }
  792. void bnx2x_dcbx_init_params(struct bnx2x *bp)
  793. {
  794. bp->dcbx_config_params.admin_dcbx_version = 0x0; /* 0 - CEE; 1 - IEEE */
  795. bp->dcbx_config_params.admin_ets_willing = 1;
  796. bp->dcbx_config_params.admin_pfc_willing = 1;
  797. bp->dcbx_config_params.overwrite_settings = 1;
  798. bp->dcbx_config_params.admin_ets_enable = 1;
  799. bp->dcbx_config_params.admin_pfc_enable = 1;
  800. bp->dcbx_config_params.admin_tc_supported_tx_enable = 1;
  801. bp->dcbx_config_params.admin_ets_configuration_tx_enable = 1;
  802. bp->dcbx_config_params.admin_pfc_tx_enable = 1;
  803. bp->dcbx_config_params.admin_application_priority_tx_enable = 1;
  804. bp->dcbx_config_params.admin_ets_reco_valid = 1;
  805. bp->dcbx_config_params.admin_app_priority_willing = 1;
  806. bp->dcbx_config_params.admin_configuration_bw_precentage[0] = 100;
  807. bp->dcbx_config_params.admin_configuration_bw_precentage[1] = 0;
  808. bp->dcbx_config_params.admin_configuration_bw_precentage[2] = 0;
  809. bp->dcbx_config_params.admin_configuration_bw_precentage[3] = 0;
  810. bp->dcbx_config_params.admin_configuration_bw_precentage[4] = 0;
  811. bp->dcbx_config_params.admin_configuration_bw_precentage[5] = 0;
  812. bp->dcbx_config_params.admin_configuration_bw_precentage[6] = 0;
  813. bp->dcbx_config_params.admin_configuration_bw_precentage[7] = 0;
  814. bp->dcbx_config_params.admin_configuration_ets_pg[0] = 0;
  815. bp->dcbx_config_params.admin_configuration_ets_pg[1] = 0;
  816. bp->dcbx_config_params.admin_configuration_ets_pg[2] = 0;
  817. bp->dcbx_config_params.admin_configuration_ets_pg[3] = 0;
  818. bp->dcbx_config_params.admin_configuration_ets_pg[4] = 0;
  819. bp->dcbx_config_params.admin_configuration_ets_pg[5] = 0;
  820. bp->dcbx_config_params.admin_configuration_ets_pg[6] = 0;
  821. bp->dcbx_config_params.admin_configuration_ets_pg[7] = 0;
  822. bp->dcbx_config_params.admin_recommendation_bw_precentage[0] = 100;
  823. bp->dcbx_config_params.admin_recommendation_bw_precentage[1] = 0;
  824. bp->dcbx_config_params.admin_recommendation_bw_precentage[2] = 0;
  825. bp->dcbx_config_params.admin_recommendation_bw_precentage[3] = 0;
  826. bp->dcbx_config_params.admin_recommendation_bw_precentage[4] = 0;
  827. bp->dcbx_config_params.admin_recommendation_bw_precentage[5] = 0;
  828. bp->dcbx_config_params.admin_recommendation_bw_precentage[6] = 0;
  829. bp->dcbx_config_params.admin_recommendation_bw_precentage[7] = 0;
  830. bp->dcbx_config_params.admin_recommendation_ets_pg[0] = 0;
  831. bp->dcbx_config_params.admin_recommendation_ets_pg[1] = 1;
  832. bp->dcbx_config_params.admin_recommendation_ets_pg[2] = 2;
  833. bp->dcbx_config_params.admin_recommendation_ets_pg[3] = 3;
  834. bp->dcbx_config_params.admin_recommendation_ets_pg[4] = 4;
  835. bp->dcbx_config_params.admin_recommendation_ets_pg[5] = 5;
  836. bp->dcbx_config_params.admin_recommendation_ets_pg[6] = 6;
  837. bp->dcbx_config_params.admin_recommendation_ets_pg[7] = 7;
  838. bp->dcbx_config_params.admin_pfc_bitmap = 0x0;
  839. bp->dcbx_config_params.admin_priority_app_table[0].valid = 0;
  840. bp->dcbx_config_params.admin_priority_app_table[1].valid = 0;
  841. bp->dcbx_config_params.admin_priority_app_table[2].valid = 0;
  842. bp->dcbx_config_params.admin_priority_app_table[3].valid = 0;
  843. bp->dcbx_config_params.admin_default_priority = 0;
  844. }
  845. void bnx2x_dcbx_init(struct bnx2x *bp, bool update_shmem)
  846. {
  847. u32 dcbx_lldp_params_offset = SHMEM_LLDP_DCBX_PARAMS_NONE;
  848. /* only PMF can send ADMIN msg to MFW in old MFW versions */
  849. if ((!bp->port.pmf) && (!(bp->flags & BC_SUPPORTS_DCBX_MSG_NON_PMF)))
  850. return;
  851. if (bp->dcbx_enabled <= 0)
  852. return;
  853. /* validate:
  854. * chip of good for dcbx version,
  855. * dcb is wanted
  856. * shmem2 contains DCBX support fields
  857. */
  858. DP(BNX2X_MSG_DCB, "dcb_state %d bp->port.pmf %d\n",
  859. bp->dcb_state, bp->port.pmf);
  860. if (bp->dcb_state == BNX2X_DCB_STATE_ON &&
  861. SHMEM2_HAS(bp, dcbx_lldp_params_offset)) {
  862. dcbx_lldp_params_offset =
  863. SHMEM2_RD(bp, dcbx_lldp_params_offset);
  864. DP(BNX2X_MSG_DCB, "dcbx_lldp_params_offset 0x%x\n",
  865. dcbx_lldp_params_offset);
  866. bnx2x_update_drv_flags(bp, 1 << DRV_FLAGS_DCB_CONFIGURED, 0);
  867. if (SHMEM_LLDP_DCBX_PARAMS_NONE != dcbx_lldp_params_offset) {
  868. /* need HW lock to avoid scenario of two drivers
  869. * writing in parallel to shmem
  870. */
  871. bnx2x_acquire_hw_lock(bp,
  872. HW_LOCK_RESOURCE_DCBX_ADMIN_MIB);
  873. if (update_shmem)
  874. bnx2x_dcbx_admin_mib_updated_params(bp,
  875. dcbx_lldp_params_offset);
  876. /* Let HW start negotiation */
  877. bnx2x_fw_command(bp,
  878. DRV_MSG_CODE_DCBX_ADMIN_PMF_MSG, 0);
  879. /* release HW lock only after MFW acks that it finished
  880. * reading values from shmem
  881. */
  882. bnx2x_release_hw_lock(bp,
  883. HW_LOCK_RESOURCE_DCBX_ADMIN_MIB);
  884. }
  885. }
  886. }
  887. static void
  888. bnx2x_dcbx_print_cos_params(struct bnx2x *bp,
  889. struct bnx2x_func_tx_start_params *pfc_fw_cfg)
  890. {
  891. u8 pri = 0;
  892. u8 cos = 0;
  893. DP(BNX2X_MSG_DCB,
  894. "pfc_fw_cfg->dcb_version %x\n", pfc_fw_cfg->dcb_version);
  895. DP(BNX2X_MSG_DCB,
  896. "pdev->params.dcbx_port_params.pfc.priority_non_pauseable_mask %x\n",
  897. bp->dcbx_port_params.pfc.priority_non_pauseable_mask);
  898. for (cos = 0 ; cos < bp->dcbx_port_params.ets.num_of_cos ; cos++) {
  899. DP(BNX2X_MSG_DCB,
  900. "pdev->params.dcbx_port_params.ets.cos_params[%d].pri_bitmask %x\n",
  901. cos, bp->dcbx_port_params.ets.cos_params[cos].pri_bitmask);
  902. DP(BNX2X_MSG_DCB,
  903. "pdev->params.dcbx_port_params.ets.cos_params[%d].bw_tbl %x\n",
  904. cos, bp->dcbx_port_params.ets.cos_params[cos].bw_tbl);
  905. DP(BNX2X_MSG_DCB,
  906. "pdev->params.dcbx_port_params.ets.cos_params[%d].strict %x\n",
  907. cos, bp->dcbx_port_params.ets.cos_params[cos].strict);
  908. DP(BNX2X_MSG_DCB,
  909. "pdev->params.dcbx_port_params.ets.cos_params[%d].pauseable %x\n",
  910. cos, bp->dcbx_port_params.ets.cos_params[cos].pauseable);
  911. }
  912. for (pri = 0; pri < LLFC_DRIVER_TRAFFIC_TYPE_MAX; pri++) {
  913. DP(BNX2X_MSG_DCB,
  914. "pfc_fw_cfg->traffic_type_to_priority_cos[%d].priority %x\n",
  915. pri, pfc_fw_cfg->traffic_type_to_priority_cos[pri].priority);
  916. DP(BNX2X_MSG_DCB,
  917. "pfc_fw_cfg->traffic_type_to_priority_cos[%d].cos %x\n",
  918. pri, pfc_fw_cfg->traffic_type_to_priority_cos[pri].cos);
  919. }
  920. }
  921. /* fills help_data according to pg_info */
  922. static void bnx2x_dcbx_get_num_pg_traf_type(struct bnx2x *bp,
  923. u32 *pg_pri_orginal_spread,
  924. struct pg_help_data *help_data)
  925. {
  926. bool pg_found = false;
  927. u32 i, traf_type, add_traf_type, add_pg;
  928. u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
  929. struct pg_entry_help_data *data = help_data->data; /*shortcut*/
  930. /* Set to invalid */
  931. for (i = 0; i < LLFC_DRIVER_TRAFFIC_TYPE_MAX; i++)
  932. data[i].pg = DCBX_ILLEGAL_PG;
  933. for (add_traf_type = 0;
  934. add_traf_type < LLFC_DRIVER_TRAFFIC_TYPE_MAX; add_traf_type++) {
  935. pg_found = false;
  936. if (ttp[add_traf_type] < MAX_PFC_PRIORITIES) {
  937. add_pg = (u8)pg_pri_orginal_spread[ttp[add_traf_type]];
  938. for (traf_type = 0;
  939. traf_type < LLFC_DRIVER_TRAFFIC_TYPE_MAX;
  940. traf_type++) {
  941. if (data[traf_type].pg == add_pg) {
  942. if (!(data[traf_type].pg_priority &
  943. (1 << ttp[add_traf_type])))
  944. data[traf_type].
  945. num_of_dif_pri++;
  946. data[traf_type].pg_priority |=
  947. (1 << ttp[add_traf_type]);
  948. pg_found = true;
  949. break;
  950. }
  951. }
  952. if (false == pg_found) {
  953. data[help_data->num_of_pg].pg = add_pg;
  954. data[help_data->num_of_pg].pg_priority =
  955. (1 << ttp[add_traf_type]);
  956. data[help_data->num_of_pg].num_of_dif_pri = 1;
  957. help_data->num_of_pg++;
  958. }
  959. }
  960. DP(BNX2X_MSG_DCB,
  961. "add_traf_type %d pg_found %s num_of_pg %d\n",
  962. add_traf_type, (false == pg_found) ? "NO" : "YES",
  963. help_data->num_of_pg);
  964. }
  965. }
  966. static void bnx2x_dcbx_ets_disabled_entry_data(struct bnx2x *bp,
  967. struct cos_help_data *cos_data,
  968. u32 pri_join_mask)
  969. {
  970. /* Only one priority than only one COS */
  971. cos_data->data[0].pausable =
  972. IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask);
  973. cos_data->data[0].pri_join_mask = pri_join_mask;
  974. cos_data->data[0].cos_bw = 100;
  975. cos_data->num_of_cos = 1;
  976. }
  977. static inline void bnx2x_dcbx_add_to_cos_bw(struct bnx2x *bp,
  978. struct cos_entry_help_data *data,
  979. u8 pg_bw)
  980. {
  981. if (data->cos_bw == DCBX_INVALID_COS_BW)
  982. data->cos_bw = pg_bw;
  983. else
  984. data->cos_bw += pg_bw;
  985. }
  986. static void bnx2x_dcbx_separate_pauseable_from_non(struct bnx2x *bp,
  987. struct cos_help_data *cos_data,
  988. u32 *pg_pri_orginal_spread,
  989. struct dcbx_ets_feature *ets)
  990. {
  991. u32 pri_tested = 0;
  992. u8 i = 0;
  993. u8 entry = 0;
  994. u8 pg_entry = 0;
  995. u8 num_of_pri = LLFC_DRIVER_TRAFFIC_TYPE_MAX;
  996. cos_data->data[0].pausable = true;
  997. cos_data->data[1].pausable = false;
  998. cos_data->data[0].pri_join_mask = cos_data->data[1].pri_join_mask = 0;
  999. for (i = 0 ; i < num_of_pri ; i++) {
  1000. pri_tested = 1 << bp->dcbx_port_params.
  1001. app.traffic_type_priority[i];
  1002. if (pri_tested & DCBX_PFC_PRI_NON_PAUSE_MASK(bp)) {
  1003. cos_data->data[1].pri_join_mask |= pri_tested;
  1004. entry = 1;
  1005. } else {
  1006. cos_data->data[0].pri_join_mask |= pri_tested;
  1007. entry = 0;
  1008. }
  1009. pg_entry = (u8)pg_pri_orginal_spread[bp->dcbx_port_params.
  1010. app.traffic_type_priority[i]];
  1011. /* There can be only one strict pg */
  1012. if (pg_entry < DCBX_MAX_NUM_PG_BW_ENTRIES)
  1013. bnx2x_dcbx_add_to_cos_bw(bp, &cos_data->data[entry],
  1014. DCBX_PG_BW_GET(ets->pg_bw_tbl, pg_entry));
  1015. else
  1016. /* If we join a group and one is strict
  1017. * than the bw rules
  1018. */
  1019. cos_data->data[entry].strict =
  1020. BNX2X_DCBX_STRICT_COS_HIGHEST;
  1021. }
  1022. if ((0 == cos_data->data[0].pri_join_mask) &&
  1023. (0 == cos_data->data[1].pri_join_mask))
  1024. BNX2X_ERR("dcbx error: Both groups must have priorities\n");
  1025. }
  1026. #ifndef POWER_OF_2
  1027. #define POWER_OF_2(x) ((0 != x) && (0 == (x & (x-1))))
  1028. #endif
  1029. static void bnx2x_dcbx_2cos_limit_cee_single_pg_to_cos_params(struct bnx2x *bp,
  1030. struct pg_help_data *pg_help_data,
  1031. struct cos_help_data *cos_data,
  1032. u32 pri_join_mask,
  1033. u8 num_of_dif_pri)
  1034. {
  1035. u8 i = 0;
  1036. u32 pri_tested = 0;
  1037. u32 pri_mask_without_pri = 0;
  1038. u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
  1039. /*debug*/
  1040. if (num_of_dif_pri == 1) {
  1041. bnx2x_dcbx_ets_disabled_entry_data(bp, cos_data, pri_join_mask);
  1042. return;
  1043. }
  1044. /* single priority group */
  1045. if (pg_help_data->data[0].pg < DCBX_MAX_NUM_PG_BW_ENTRIES) {
  1046. /* If there are both pauseable and non-pauseable priorities,
  1047. * the pauseable priorities go to the first queue and
  1048. * the non-pauseable priorities go to the second queue.
  1049. */
  1050. if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) {
  1051. /* Pauseable */
  1052. cos_data->data[0].pausable = true;
  1053. /* Non pauseable.*/
  1054. cos_data->data[1].pausable = false;
  1055. if (2 == num_of_dif_pri) {
  1056. cos_data->data[0].cos_bw = 50;
  1057. cos_data->data[1].cos_bw = 50;
  1058. }
  1059. if (3 == num_of_dif_pri) {
  1060. if (POWER_OF_2(DCBX_PFC_PRI_GET_PAUSE(bp,
  1061. pri_join_mask))) {
  1062. cos_data->data[0].cos_bw = 33;
  1063. cos_data->data[1].cos_bw = 67;
  1064. } else {
  1065. cos_data->data[0].cos_bw = 67;
  1066. cos_data->data[1].cos_bw = 33;
  1067. }
  1068. }
  1069. } else if (IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask)) {
  1070. /* If there are only pauseable priorities,
  1071. * then one/two priorities go to the first queue
  1072. * and one priority goes to the second queue.
  1073. */
  1074. if (2 == num_of_dif_pri) {
  1075. cos_data->data[0].cos_bw = 50;
  1076. cos_data->data[1].cos_bw = 50;
  1077. } else {
  1078. cos_data->data[0].cos_bw = 67;
  1079. cos_data->data[1].cos_bw = 33;
  1080. }
  1081. cos_data->data[1].pausable = true;
  1082. cos_data->data[0].pausable = true;
  1083. /* All priorities except FCOE */
  1084. cos_data->data[0].pri_join_mask = (pri_join_mask &
  1085. ((u8)~(1 << ttp[LLFC_TRAFFIC_TYPE_FCOE])));
  1086. /* Only FCOE priority.*/
  1087. cos_data->data[1].pri_join_mask =
  1088. (1 << ttp[LLFC_TRAFFIC_TYPE_FCOE]);
  1089. } else
  1090. /* If there are only non-pauseable priorities,
  1091. * they will all go to the same queue.
  1092. */
  1093. bnx2x_dcbx_ets_disabled_entry_data(bp,
  1094. cos_data, pri_join_mask);
  1095. } else {
  1096. /* priority group which is not BW limited (PG#15):*/
  1097. if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) {
  1098. /* If there are both pauseable and non-pauseable
  1099. * priorities, the pauseable priorities go to the first
  1100. * queue and the non-pauseable priorities
  1101. * go to the second queue.
  1102. */
  1103. if (DCBX_PFC_PRI_GET_PAUSE(bp, pri_join_mask) >
  1104. DCBX_PFC_PRI_GET_NON_PAUSE(bp, pri_join_mask)) {
  1105. cos_data->data[0].strict =
  1106. BNX2X_DCBX_STRICT_COS_HIGHEST;
  1107. cos_data->data[1].strict =
  1108. BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI(
  1109. BNX2X_DCBX_STRICT_COS_HIGHEST);
  1110. } else {
  1111. cos_data->data[0].strict =
  1112. BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI(
  1113. BNX2X_DCBX_STRICT_COS_HIGHEST);
  1114. cos_data->data[1].strict =
  1115. BNX2X_DCBX_STRICT_COS_HIGHEST;
  1116. }
  1117. /* Pauseable */
  1118. cos_data->data[0].pausable = true;
  1119. /* Non pause-able.*/
  1120. cos_data->data[1].pausable = false;
  1121. } else {
  1122. /* If there are only pauseable priorities or
  1123. * only non-pauseable,* the lower priorities go
  1124. * to the first queue and the higher priorities go
  1125. * to the second queue.
  1126. */
  1127. cos_data->data[0].pausable =
  1128. cos_data->data[1].pausable =
  1129. IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask);
  1130. for (i = 0 ; i < LLFC_DRIVER_TRAFFIC_TYPE_MAX; i++) {
  1131. pri_tested = 1 << bp->dcbx_port_params.
  1132. app.traffic_type_priority[i];
  1133. /* Remove priority tested */
  1134. pri_mask_without_pri =
  1135. (pri_join_mask & ((u8)(~pri_tested)));
  1136. if (pri_mask_without_pri < pri_tested)
  1137. break;
  1138. }
  1139. if (i == LLFC_DRIVER_TRAFFIC_TYPE_MAX)
  1140. BNX2X_ERR("Invalid value for pri_join_mask - could not find a priority\n");
  1141. cos_data->data[0].pri_join_mask = pri_mask_without_pri;
  1142. cos_data->data[1].pri_join_mask = pri_tested;
  1143. /* Both queues are strict priority,
  1144. * and that with the highest priority
  1145. * gets the highest strict priority in the arbiter.
  1146. */
  1147. cos_data->data[0].strict =
  1148. BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI(
  1149. BNX2X_DCBX_STRICT_COS_HIGHEST);
  1150. cos_data->data[1].strict =
  1151. BNX2X_DCBX_STRICT_COS_HIGHEST;
  1152. }
  1153. }
  1154. }
  1155. static void bnx2x_dcbx_2cos_limit_cee_two_pg_to_cos_params(
  1156. struct bnx2x *bp,
  1157. struct pg_help_data *pg_help_data,
  1158. struct dcbx_ets_feature *ets,
  1159. struct cos_help_data *cos_data,
  1160. u32 *pg_pri_orginal_spread,
  1161. u32 pri_join_mask,
  1162. u8 num_of_dif_pri)
  1163. {
  1164. u8 i = 0;
  1165. u8 pg[DCBX_COS_MAX_NUM_E2] = { 0 };
  1166. /* If there are both pauseable and non-pauseable priorities,
  1167. * the pauseable priorities go to the first queue and
  1168. * the non-pauseable priorities go to the second queue.
  1169. */
  1170. if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask)) {
  1171. if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp,
  1172. pg_help_data->data[0].pg_priority) ||
  1173. IS_DCBX_PFC_PRI_MIX_PAUSE(bp,
  1174. pg_help_data->data[1].pg_priority)) {
  1175. /* If one PG contains both pauseable and
  1176. * non-pauseable priorities then ETS is disabled.
  1177. */
  1178. bnx2x_dcbx_separate_pauseable_from_non(bp, cos_data,
  1179. pg_pri_orginal_spread, ets);
  1180. bp->dcbx_port_params.ets.enabled = false;
  1181. return;
  1182. }
  1183. /* Pauseable */
  1184. cos_data->data[0].pausable = true;
  1185. /* Non pauseable. */
  1186. cos_data->data[1].pausable = false;
  1187. if (IS_DCBX_PFC_PRI_ONLY_PAUSE(bp,
  1188. pg_help_data->data[0].pg_priority)) {
  1189. /* 0 is pauseable */
  1190. cos_data->data[0].pri_join_mask =
  1191. pg_help_data->data[0].pg_priority;
  1192. pg[0] = pg_help_data->data[0].pg;
  1193. cos_data->data[1].pri_join_mask =
  1194. pg_help_data->data[1].pg_priority;
  1195. pg[1] = pg_help_data->data[1].pg;
  1196. } else {/* 1 is pauseable */
  1197. cos_data->data[0].pri_join_mask =
  1198. pg_help_data->data[1].pg_priority;
  1199. pg[0] = pg_help_data->data[1].pg;
  1200. cos_data->data[1].pri_join_mask =
  1201. pg_help_data->data[0].pg_priority;
  1202. pg[1] = pg_help_data->data[0].pg;
  1203. }
  1204. } else {
  1205. /* If there are only pauseable priorities or
  1206. * only non-pauseable, each PG goes to a queue.
  1207. */
  1208. cos_data->data[0].pausable = cos_data->data[1].pausable =
  1209. IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask);
  1210. cos_data->data[0].pri_join_mask =
  1211. pg_help_data->data[0].pg_priority;
  1212. pg[0] = pg_help_data->data[0].pg;
  1213. cos_data->data[1].pri_join_mask =
  1214. pg_help_data->data[1].pg_priority;
  1215. pg[1] = pg_help_data->data[1].pg;
  1216. }
  1217. /* There can be only one strict pg */
  1218. for (i = 0 ; i < ARRAY_SIZE(pg); i++) {
  1219. if (pg[i] < DCBX_MAX_NUM_PG_BW_ENTRIES)
  1220. cos_data->data[i].cos_bw =
  1221. DCBX_PG_BW_GET(ets->pg_bw_tbl, pg[i]);
  1222. else
  1223. cos_data->data[i].strict =
  1224. BNX2X_DCBX_STRICT_COS_HIGHEST;
  1225. }
  1226. }
  1227. static int bnx2x_dcbx_join_pgs(
  1228. struct bnx2x *bp,
  1229. struct dcbx_ets_feature *ets,
  1230. struct pg_help_data *pg_help_data,
  1231. u8 required_num_of_pg)
  1232. {
  1233. u8 entry_joined = pg_help_data->num_of_pg - 1;
  1234. u8 entry_removed = entry_joined + 1;
  1235. u8 pg_joined = 0;
  1236. if (required_num_of_pg == 0 || ARRAY_SIZE(pg_help_data->data)
  1237. <= pg_help_data->num_of_pg) {
  1238. BNX2X_ERR("required_num_of_pg can't be zero\n");
  1239. return -EINVAL;
  1240. }
  1241. while (required_num_of_pg < pg_help_data->num_of_pg) {
  1242. entry_joined = pg_help_data->num_of_pg - 2;
  1243. entry_removed = entry_joined + 1;
  1244. /* protect index */
  1245. entry_removed %= ARRAY_SIZE(pg_help_data->data);
  1246. pg_help_data->data[entry_joined].pg_priority |=
  1247. pg_help_data->data[entry_removed].pg_priority;
  1248. pg_help_data->data[entry_joined].num_of_dif_pri +=
  1249. pg_help_data->data[entry_removed].num_of_dif_pri;
  1250. if (pg_help_data->data[entry_joined].pg == DCBX_STRICT_PRI_PG ||
  1251. pg_help_data->data[entry_removed].pg == DCBX_STRICT_PRI_PG)
  1252. /* Entries joined strict priority rules */
  1253. pg_help_data->data[entry_joined].pg =
  1254. DCBX_STRICT_PRI_PG;
  1255. else {
  1256. /* Entries can be joined join BW */
  1257. pg_joined = DCBX_PG_BW_GET(ets->pg_bw_tbl,
  1258. pg_help_data->data[entry_joined].pg) +
  1259. DCBX_PG_BW_GET(ets->pg_bw_tbl,
  1260. pg_help_data->data[entry_removed].pg);
  1261. DCBX_PG_BW_SET(ets->pg_bw_tbl,
  1262. pg_help_data->data[entry_joined].pg, pg_joined);
  1263. }
  1264. /* Joined the entries */
  1265. pg_help_data->num_of_pg--;
  1266. }
  1267. return 0;
  1268. }
  1269. static void bnx2x_dcbx_2cos_limit_cee_three_pg_to_cos_params(
  1270. struct bnx2x *bp,
  1271. struct pg_help_data *pg_help_data,
  1272. struct dcbx_ets_feature *ets,
  1273. struct cos_help_data *cos_data,
  1274. u32 *pg_pri_orginal_spread,
  1275. u32 pri_join_mask,
  1276. u8 num_of_dif_pri)
  1277. {
  1278. u8 i = 0;
  1279. u32 pri_tested = 0;
  1280. u8 entry = 0;
  1281. u8 pg_entry = 0;
  1282. bool b_found_strict = false;
  1283. u8 num_of_pri = LLFC_DRIVER_TRAFFIC_TYPE_MAX;
  1284. cos_data->data[0].pri_join_mask = cos_data->data[1].pri_join_mask = 0;
  1285. /* If there are both pauseable and non-pauseable priorities,
  1286. * the pauseable priorities go to the first queue and the
  1287. * non-pauseable priorities go to the second queue.
  1288. */
  1289. if (IS_DCBX_PFC_PRI_MIX_PAUSE(bp, pri_join_mask))
  1290. bnx2x_dcbx_separate_pauseable_from_non(bp,
  1291. cos_data, pg_pri_orginal_spread, ets);
  1292. else {
  1293. /* If two BW-limited PG-s were combined to one queue,
  1294. * the BW is their sum.
  1295. *
  1296. * If there are only pauseable priorities or only non-pauseable,
  1297. * and there are both BW-limited and non-BW-limited PG-s,
  1298. * the BW-limited PG/s go to one queue and the non-BW-limited
  1299. * PG/s go to the second queue.
  1300. *
  1301. * If there are only pauseable priorities or only non-pauseable
  1302. * and all are BW limited, then two priorities go to the first
  1303. * queue and one priority goes to the second queue.
  1304. *
  1305. * We will join this two cases:
  1306. * if one is BW limited it will go to the second queue
  1307. * otherwise the last priority will get it
  1308. */
  1309. cos_data->data[0].pausable = cos_data->data[1].pausable =
  1310. IS_DCBX_PFC_PRI_ONLY_PAUSE(bp, pri_join_mask);
  1311. for (i = 0 ; i < num_of_pri; i++) {
  1312. pri_tested = 1 << bp->dcbx_port_params.
  1313. app.traffic_type_priority[i];
  1314. pg_entry = (u8)pg_pri_orginal_spread[bp->
  1315. dcbx_port_params.app.traffic_type_priority[i]];
  1316. if (pg_entry < DCBX_MAX_NUM_PG_BW_ENTRIES) {
  1317. entry = 0;
  1318. if (i == (num_of_pri-1) &&
  1319. false == b_found_strict)
  1320. /* last entry will be handled separately
  1321. * If no priority is strict than last
  1322. * entry goes to last queue.
  1323. */
  1324. entry = 1;
  1325. cos_data->data[entry].pri_join_mask |=
  1326. pri_tested;
  1327. bnx2x_dcbx_add_to_cos_bw(bp,
  1328. &cos_data->data[entry],
  1329. DCBX_PG_BW_GET(ets->pg_bw_tbl,
  1330. pg_entry));
  1331. } else {
  1332. b_found_strict = true;
  1333. cos_data->data[1].pri_join_mask |= pri_tested;
  1334. /* If we join a group and one is strict
  1335. * than the bw rules
  1336. */
  1337. cos_data->data[1].strict =
  1338. BNX2X_DCBX_STRICT_COS_HIGHEST;
  1339. }
  1340. }
  1341. }
  1342. }
  1343. static void bnx2x_dcbx_2cos_limit_cee_fill_cos_params(struct bnx2x *bp,
  1344. struct pg_help_data *help_data,
  1345. struct dcbx_ets_feature *ets,
  1346. struct cos_help_data *cos_data,
  1347. u32 *pg_pri_orginal_spread,
  1348. u32 pri_join_mask,
  1349. u8 num_of_dif_pri)
  1350. {
  1351. /* default E2 settings */
  1352. cos_data->num_of_cos = DCBX_COS_MAX_NUM_E2;
  1353. switch (help_data->num_of_pg) {
  1354. case 1:
  1355. bnx2x_dcbx_2cos_limit_cee_single_pg_to_cos_params(
  1356. bp,
  1357. help_data,
  1358. cos_data,
  1359. pri_join_mask,
  1360. num_of_dif_pri);
  1361. break;
  1362. case 2:
  1363. bnx2x_dcbx_2cos_limit_cee_two_pg_to_cos_params(
  1364. bp,
  1365. help_data,
  1366. ets,
  1367. cos_data,
  1368. pg_pri_orginal_spread,
  1369. pri_join_mask,
  1370. num_of_dif_pri);
  1371. break;
  1372. case 3:
  1373. bnx2x_dcbx_2cos_limit_cee_three_pg_to_cos_params(
  1374. bp,
  1375. help_data,
  1376. ets,
  1377. cos_data,
  1378. pg_pri_orginal_spread,
  1379. pri_join_mask,
  1380. num_of_dif_pri);
  1381. break;
  1382. default:
  1383. BNX2X_ERR("Wrong pg_help_data.num_of_pg\n");
  1384. bnx2x_dcbx_ets_disabled_entry_data(bp,
  1385. cos_data, pri_join_mask);
  1386. }
  1387. }
  1388. static int bnx2x_dcbx_spread_strict_pri(struct bnx2x *bp,
  1389. struct cos_help_data *cos_data,
  1390. u8 entry,
  1391. u8 num_spread_of_entries,
  1392. u8 strict_app_pris)
  1393. {
  1394. u8 strict_pri = BNX2X_DCBX_STRICT_COS_HIGHEST;
  1395. u8 num_of_app_pri = MAX_PFC_PRIORITIES;
  1396. u8 app_pri_bit = 0;
  1397. while (num_spread_of_entries && num_of_app_pri > 0) {
  1398. app_pri_bit = 1 << (num_of_app_pri - 1);
  1399. if (app_pri_bit & strict_app_pris) {
  1400. struct cos_entry_help_data *data = &cos_data->
  1401. data[entry];
  1402. num_spread_of_entries--;
  1403. if (num_spread_of_entries == 0) {
  1404. /* last entry needed put all the entries left */
  1405. data->cos_bw = DCBX_INVALID_COS_BW;
  1406. data->strict = strict_pri;
  1407. data->pri_join_mask = strict_app_pris;
  1408. data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp,
  1409. data->pri_join_mask);
  1410. } else {
  1411. strict_app_pris &= ~app_pri_bit;
  1412. data->cos_bw = DCBX_INVALID_COS_BW;
  1413. data->strict = strict_pri;
  1414. data->pri_join_mask = app_pri_bit;
  1415. data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp,
  1416. data->pri_join_mask);
  1417. }
  1418. strict_pri =
  1419. BNX2X_DCBX_STRICT_COS_NEXT_LOWER_PRI(strict_pri);
  1420. entry++;
  1421. }
  1422. num_of_app_pri--;
  1423. }
  1424. if (num_spread_of_entries) {
  1425. BNX2X_ERR("Didn't succeed to spread strict priorities\n");
  1426. return -EINVAL;
  1427. }
  1428. return 0;
  1429. }
  1430. static u8 bnx2x_dcbx_cee_fill_strict_pri(struct bnx2x *bp,
  1431. struct cos_help_data *cos_data,
  1432. u8 entry,
  1433. u8 num_spread_of_entries,
  1434. u8 strict_app_pris)
  1435. {
  1436. if (bnx2x_dcbx_spread_strict_pri(bp, cos_data, entry,
  1437. num_spread_of_entries,
  1438. strict_app_pris)) {
  1439. struct cos_entry_help_data *data = &cos_data->
  1440. data[entry];
  1441. /* Fill BW entry */
  1442. data->cos_bw = DCBX_INVALID_COS_BW;
  1443. data->strict = BNX2X_DCBX_STRICT_COS_HIGHEST;
  1444. data->pri_join_mask = strict_app_pris;
  1445. data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp,
  1446. data->pri_join_mask);
  1447. return 1;
  1448. }
  1449. return num_spread_of_entries;
  1450. }
  1451. static void bnx2x_dcbx_cee_fill_cos_params(struct bnx2x *bp,
  1452. struct pg_help_data *help_data,
  1453. struct dcbx_ets_feature *ets,
  1454. struct cos_help_data *cos_data,
  1455. u32 pri_join_mask)
  1456. {
  1457. u8 need_num_of_entries = 0;
  1458. u8 i = 0;
  1459. u8 entry = 0;
  1460. /*
  1461. * if the number of requested PG-s in CEE is greater than 3
  1462. * then the results are not determined since this is a violation
  1463. * of the standard.
  1464. */
  1465. if (help_data->num_of_pg > DCBX_COS_MAX_NUM_E3B0) {
  1466. if (bnx2x_dcbx_join_pgs(bp, ets, help_data,
  1467. DCBX_COS_MAX_NUM_E3B0)) {
  1468. BNX2X_ERR("Unable to reduce the number of PGs - we will disables ETS\n");
  1469. bnx2x_dcbx_ets_disabled_entry_data(bp, cos_data,
  1470. pri_join_mask);
  1471. return;
  1472. }
  1473. }
  1474. for (i = 0 ; i < help_data->num_of_pg; i++) {
  1475. struct pg_entry_help_data *pg = &help_data->data[i];
  1476. if (pg->pg < DCBX_MAX_NUM_PG_BW_ENTRIES) {
  1477. struct cos_entry_help_data *data = &cos_data->
  1478. data[entry];
  1479. /* Fill BW entry */
  1480. data->cos_bw = DCBX_PG_BW_GET(ets->pg_bw_tbl, pg->pg);
  1481. data->strict = BNX2X_DCBX_STRICT_INVALID;
  1482. data->pri_join_mask = pg->pg_priority;
  1483. data->pausable = DCBX_IS_PFC_PRI_SOME_PAUSE(bp,
  1484. data->pri_join_mask);
  1485. entry++;
  1486. } else {
  1487. need_num_of_entries = min_t(u8,
  1488. (u8)pg->num_of_dif_pri,
  1489. (u8)DCBX_COS_MAX_NUM_E3B0 -
  1490. help_data->num_of_pg + 1);
  1491. /*
  1492. * If there are still VOQ-s which have no associated PG,
  1493. * then associate these VOQ-s to PG15. These PG-s will
  1494. * be used for SP between priorities on PG15.
  1495. */
  1496. entry += bnx2x_dcbx_cee_fill_strict_pri(bp, cos_data,
  1497. entry, need_num_of_entries, pg->pg_priority);
  1498. }
  1499. }
  1500. /* the entry will represent the number of COSes used */
  1501. cos_data->num_of_cos = entry;
  1502. }
  1503. static void bnx2x_dcbx_fill_cos_params(struct bnx2x *bp,
  1504. struct pg_help_data *help_data,
  1505. struct dcbx_ets_feature *ets,
  1506. u32 *pg_pri_orginal_spread)
  1507. {
  1508. struct cos_help_data cos_data;
  1509. u8 i = 0;
  1510. u32 pri_join_mask = 0;
  1511. u8 num_of_dif_pri = 0;
  1512. memset(&cos_data, 0, sizeof(cos_data));
  1513. /* Validate the pg value */
  1514. for (i = 0; i < help_data->num_of_pg ; i++) {
  1515. if (DCBX_STRICT_PRIORITY != help_data->data[i].pg &&
  1516. DCBX_MAX_NUM_PG_BW_ENTRIES <= help_data->data[i].pg)
  1517. BNX2X_ERR("Invalid pg[%d] data %x\n", i,
  1518. help_data->data[i].pg);
  1519. pri_join_mask |= help_data->data[i].pg_priority;
  1520. num_of_dif_pri += help_data->data[i].num_of_dif_pri;
  1521. }
  1522. /* defaults */
  1523. cos_data.num_of_cos = 1;
  1524. for (i = 0; i < ARRAY_SIZE(cos_data.data); i++) {
  1525. cos_data.data[i].pri_join_mask = 0;
  1526. cos_data.data[i].pausable = false;
  1527. cos_data.data[i].strict = BNX2X_DCBX_STRICT_INVALID;
  1528. cos_data.data[i].cos_bw = DCBX_INVALID_COS_BW;
  1529. }
  1530. if (CHIP_IS_E3B0(bp))
  1531. bnx2x_dcbx_cee_fill_cos_params(bp, help_data, ets,
  1532. &cos_data, pri_join_mask);
  1533. else /* E2 + E3A0 */
  1534. bnx2x_dcbx_2cos_limit_cee_fill_cos_params(bp,
  1535. help_data, ets,
  1536. &cos_data,
  1537. pg_pri_orginal_spread,
  1538. pri_join_mask,
  1539. num_of_dif_pri);
  1540. for (i = 0; i < cos_data.num_of_cos ; i++) {
  1541. struct bnx2x_dcbx_cos_params *p =
  1542. &bp->dcbx_port_params.ets.cos_params[i];
  1543. p->strict = cos_data.data[i].strict;
  1544. p->bw_tbl = cos_data.data[i].cos_bw;
  1545. p->pri_bitmask = cos_data.data[i].pri_join_mask;
  1546. p->pauseable = cos_data.data[i].pausable;
  1547. /* sanity */
  1548. if (p->bw_tbl != DCBX_INVALID_COS_BW ||
  1549. p->strict != BNX2X_DCBX_STRICT_INVALID) {
  1550. if (p->pri_bitmask == 0)
  1551. BNX2X_ERR("Invalid pri_bitmask for %d\n", i);
  1552. if (CHIP_IS_E2(bp) || CHIP_IS_E3A0(bp)) {
  1553. if (p->pauseable &&
  1554. DCBX_PFC_PRI_GET_NON_PAUSE(bp,
  1555. p->pri_bitmask) != 0)
  1556. BNX2X_ERR("Inconsistent config for pausable COS %d\n",
  1557. i);
  1558. if (!p->pauseable &&
  1559. DCBX_PFC_PRI_GET_PAUSE(bp,
  1560. p->pri_bitmask) != 0)
  1561. BNX2X_ERR("Inconsistent config for nonpausable COS %d\n",
  1562. i);
  1563. }
  1564. }
  1565. if (p->pauseable)
  1566. DP(BNX2X_MSG_DCB, "COS %d PAUSABLE prijoinmask 0x%x\n",
  1567. i, cos_data.data[i].pri_join_mask);
  1568. else
  1569. DP(BNX2X_MSG_DCB,
  1570. "COS %d NONPAUSABLE prijoinmask 0x%x\n",
  1571. i, cos_data.data[i].pri_join_mask);
  1572. }
  1573. bp->dcbx_port_params.ets.num_of_cos = cos_data.num_of_cos ;
  1574. }
  1575. static void bnx2x_dcbx_get_ets_pri_pg_tbl(struct bnx2x *bp,
  1576. u32 *set_configuration_ets_pg,
  1577. u32 *pri_pg_tbl)
  1578. {
  1579. int i;
  1580. for (i = 0; i < DCBX_MAX_NUM_PRI_PG_ENTRIES; i++) {
  1581. set_configuration_ets_pg[i] = DCBX_PRI_PG_GET(pri_pg_tbl, i);
  1582. DP(BNX2X_MSG_DCB, "set_configuration_ets_pg[%d] = 0x%x\n",
  1583. i, set_configuration_ets_pg[i]);
  1584. }
  1585. }
  1586. static void bnx2x_dcbx_fw_struct(struct bnx2x *bp,
  1587. struct bnx2x_func_tx_start_params *pfc_fw_cfg)
  1588. {
  1589. u16 pri_bit = 0;
  1590. u8 cos = 0, pri = 0;
  1591. struct priority_cos *tt2cos;
  1592. u32 *ttp = bp->dcbx_port_params.app.traffic_type_priority;
  1593. int mfw_configured = SHMEM2_HAS(bp, drv_flags) &&
  1594. GET_FLAGS(SHMEM2_RD(bp, drv_flags),
  1595. 1 << DRV_FLAGS_DCB_MFW_CONFIGURED);
  1596. memset(pfc_fw_cfg, 0, sizeof(*pfc_fw_cfg));
  1597. /* to disable DCB - the structure must be zeroed */
  1598. if ((bp->dcbx_error & DCBX_REMOTE_MIB_ERROR) && !mfw_configured)
  1599. return;
  1600. /*shortcut*/
  1601. tt2cos = pfc_fw_cfg->traffic_type_to_priority_cos;
  1602. /* Fw version should be incremented each update */
  1603. pfc_fw_cfg->dcb_version = ++bp->dcb_version;
  1604. pfc_fw_cfg->dcb_enabled = 1;
  1605. /* Fill priority parameters */
  1606. for (pri = 0; pri < LLFC_DRIVER_TRAFFIC_TYPE_MAX; pri++) {
  1607. tt2cos[pri].priority = ttp[pri];
  1608. pri_bit = 1 << tt2cos[pri].priority;
  1609. /* Fill COS parameters based on COS calculated to
  1610. * make it more general for future use */
  1611. for (cos = 0; cos < bp->dcbx_port_params.ets.num_of_cos; cos++)
  1612. if (bp->dcbx_port_params.ets.cos_params[cos].
  1613. pri_bitmask & pri_bit)
  1614. tt2cos[pri].cos = cos;
  1615. }
  1616. /* we never want the FW to add a 0 vlan tag */
  1617. pfc_fw_cfg->dont_add_pri_0_en = 1;
  1618. bnx2x_dcbx_print_cos_params(bp, pfc_fw_cfg);
  1619. }
  1620. void bnx2x_dcbx_pmf_update(struct bnx2x *bp)
  1621. {
  1622. /* if we need to synchronize DCBX result from prev PMF
  1623. * read it from shmem and update bp and netdev accordingly
  1624. */
  1625. if (SHMEM2_HAS(bp, drv_flags) &&
  1626. GET_FLAGS(SHMEM2_RD(bp, drv_flags), 1 << DRV_FLAGS_DCB_CONFIGURED)) {
  1627. /* Read neg results if dcbx is in the FW */
  1628. if (bnx2x_dcbx_read_shmem_neg_results(bp))
  1629. return;
  1630. bnx2x_dump_dcbx_drv_param(bp, &bp->dcbx_local_feat,
  1631. bp->dcbx_error);
  1632. bnx2x_get_dcbx_drv_param(bp, &bp->dcbx_local_feat,
  1633. bp->dcbx_error);
  1634. #ifdef BCM_DCBNL
  1635. /*
  1636. * Add new app tlvs to dcbnl
  1637. */
  1638. bnx2x_dcbnl_update_applist(bp, false);
  1639. /*
  1640. * Send a notification for the new negotiated parameters
  1641. */
  1642. dcbnl_cee_notify(bp->dev, RTM_GETDCB, DCB_CMD_CEE_GET, 0, 0);
  1643. #endif
  1644. /*
  1645. * reconfigure the netdevice with the results of the new
  1646. * dcbx negotiation.
  1647. */
  1648. bnx2x_dcbx_update_tc_mapping(bp);
  1649. }
  1650. }
  1651. /* DCB netlink */
  1652. #ifdef BCM_DCBNL
  1653. #define BNX2X_DCBX_CAPS (DCB_CAP_DCBX_LLD_MANAGED | \
  1654. DCB_CAP_DCBX_VER_CEE | DCB_CAP_DCBX_STATIC)
  1655. static inline bool bnx2x_dcbnl_set_valid(struct bnx2x *bp)
  1656. {
  1657. /* validate dcbnl call that may change HW state:
  1658. * DCB is on and DCBX mode was SUCCESSFULLY set by the user.
  1659. */
  1660. return bp->dcb_state && bp->dcbx_mode_uset;
  1661. }
  1662. static u8 bnx2x_dcbnl_get_state(struct net_device *netdev)
  1663. {
  1664. struct bnx2x *bp = netdev_priv(netdev);
  1665. DP(BNX2X_MSG_DCB, "state = %d\n", bp->dcb_state);
  1666. return bp->dcb_state;
  1667. }
  1668. static u8 bnx2x_dcbnl_set_state(struct net_device *netdev, u8 state)
  1669. {
  1670. struct bnx2x *bp = netdev_priv(netdev);
  1671. DP(BNX2X_MSG_DCB, "state = %s\n", state ? "on" : "off");
  1672. /* Fail to set state to "enabled" if dcbx is disabled in nvram */
  1673. if (state && ((bp->dcbx_enabled == BNX2X_DCBX_ENABLED_OFF) ||
  1674. (bp->dcbx_enabled == BNX2X_DCBX_ENABLED_INVALID))) {
  1675. DP(BNX2X_MSG_DCB, "Can not set dcbx to enabled while it is disabled in nvm\n");
  1676. return 1;
  1677. }
  1678. bnx2x_dcbx_set_state(bp, (state ? true : false), bp->dcbx_enabled);
  1679. return 0;
  1680. }
  1681. static void bnx2x_dcbnl_get_perm_hw_addr(struct net_device *netdev,
  1682. u8 *perm_addr)
  1683. {
  1684. struct bnx2x *bp = netdev_priv(netdev);
  1685. DP(BNX2X_MSG_DCB, "GET-PERM-ADDR\n");
  1686. /* first the HW mac address */
  1687. memcpy(perm_addr, netdev->dev_addr, netdev->addr_len);
  1688. if (CNIC_LOADED(bp))
  1689. /* second SAN address */
  1690. memcpy(perm_addr+netdev->addr_len, bp->fip_mac,
  1691. netdev->addr_len);
  1692. }
  1693. static void bnx2x_dcbnl_set_pg_tccfg_tx(struct net_device *netdev, int prio,
  1694. u8 prio_type, u8 pgid, u8 bw_pct,
  1695. u8 up_map)
  1696. {
  1697. struct bnx2x *bp = netdev_priv(netdev);
  1698. DP(BNX2X_MSG_DCB, "prio[%d] = %d\n", prio, pgid);
  1699. if (!bnx2x_dcbnl_set_valid(bp) || prio >= DCBX_MAX_NUM_PRI_PG_ENTRIES)
  1700. return;
  1701. /**
  1702. * bw_pct ignored - band-width percentage devision between user
  1703. * priorities within the same group is not
  1704. * standard and hence not supported
  1705. *
  1706. * prio_type ignored - priority levels within the same group are not
  1707. * standard and hence are not supported. According
  1708. * to the standard pgid 15 is dedicated to strict
  1709. * priority traffic (on the port level).
  1710. *
  1711. * up_map ignored
  1712. */
  1713. bp->dcbx_config_params.admin_configuration_ets_pg[prio] = pgid;
  1714. bp->dcbx_config_params.admin_ets_configuration_tx_enable = 1;
  1715. }
  1716. static void bnx2x_dcbnl_set_pg_bwgcfg_tx(struct net_device *netdev,
  1717. int pgid, u8 bw_pct)
  1718. {
  1719. struct bnx2x *bp = netdev_priv(netdev);
  1720. DP(BNX2X_MSG_DCB, "pgid[%d] = %d\n", pgid, bw_pct);
  1721. if (!bnx2x_dcbnl_set_valid(bp) || pgid >= DCBX_MAX_NUM_PG_BW_ENTRIES)
  1722. return;
  1723. bp->dcbx_config_params.admin_configuration_bw_precentage[pgid] = bw_pct;
  1724. bp->dcbx_config_params.admin_ets_configuration_tx_enable = 1;
  1725. }
  1726. static void bnx2x_dcbnl_set_pg_tccfg_rx(struct net_device *netdev, int prio,
  1727. u8 prio_type, u8 pgid, u8 bw_pct,
  1728. u8 up_map)
  1729. {
  1730. struct bnx2x *bp = netdev_priv(netdev);
  1731. DP(BNX2X_MSG_DCB, "Nothing to set; No RX support\n");
  1732. }
  1733. static void bnx2x_dcbnl_set_pg_bwgcfg_rx(struct net_device *netdev,
  1734. int pgid, u8 bw_pct)
  1735. {
  1736. struct bnx2x *bp = netdev_priv(netdev);
  1737. DP(BNX2X_MSG_DCB, "Nothing to set; No RX support\n");
  1738. }
  1739. static void bnx2x_dcbnl_get_pg_tccfg_tx(struct net_device *netdev, int prio,
  1740. u8 *prio_type, u8 *pgid, u8 *bw_pct,
  1741. u8 *up_map)
  1742. {
  1743. struct bnx2x *bp = netdev_priv(netdev);
  1744. DP(BNX2X_MSG_DCB, "prio = %d\n", prio);
  1745. /**
  1746. * bw_pct ignored - band-width percentage devision between user
  1747. * priorities within the same group is not
  1748. * standard and hence not supported
  1749. *
  1750. * prio_type ignored - priority levels within the same group are not
  1751. * standard and hence are not supported. According
  1752. * to the standard pgid 15 is dedicated to strict
  1753. * priority traffic (on the port level).
  1754. *
  1755. * up_map ignored
  1756. */
  1757. *up_map = *bw_pct = *prio_type = *pgid = 0;
  1758. if (!bp->dcb_state || prio >= DCBX_MAX_NUM_PRI_PG_ENTRIES)
  1759. return;
  1760. *pgid = DCBX_PRI_PG_GET(bp->dcbx_local_feat.ets.pri_pg_tbl, prio);
  1761. }
  1762. static void bnx2x_dcbnl_get_pg_bwgcfg_tx(struct net_device *netdev,
  1763. int pgid, u8 *bw_pct)
  1764. {
  1765. struct bnx2x *bp = netdev_priv(netdev);
  1766. DP(BNX2X_MSG_DCB, "pgid = %d\n", pgid);
  1767. *bw_pct = 0;
  1768. if (!bp->dcb_state || pgid >= DCBX_MAX_NUM_PG_BW_ENTRIES)
  1769. return;
  1770. *bw_pct = DCBX_PG_BW_GET(bp->dcbx_local_feat.ets.pg_bw_tbl, pgid);
  1771. }
  1772. static void bnx2x_dcbnl_get_pg_tccfg_rx(struct net_device *netdev, int prio,
  1773. u8 *prio_type, u8 *pgid, u8 *bw_pct,
  1774. u8 *up_map)
  1775. {
  1776. struct bnx2x *bp = netdev_priv(netdev);
  1777. DP(BNX2X_MSG_DCB, "Nothing to get; No RX support\n");
  1778. *prio_type = *pgid = *bw_pct = *up_map = 0;
  1779. }
  1780. static void bnx2x_dcbnl_get_pg_bwgcfg_rx(struct net_device *netdev,
  1781. int pgid, u8 *bw_pct)
  1782. {
  1783. struct bnx2x *bp = netdev_priv(netdev);
  1784. DP(BNX2X_MSG_DCB, "Nothing to get; No RX support\n");
  1785. *bw_pct = 0;
  1786. }
  1787. static void bnx2x_dcbnl_set_pfc_cfg(struct net_device *netdev, int prio,
  1788. u8 setting)
  1789. {
  1790. struct bnx2x *bp = netdev_priv(netdev);
  1791. DP(BNX2X_MSG_DCB, "prio[%d] = %d\n", prio, setting);
  1792. if (!bnx2x_dcbnl_set_valid(bp) || prio >= MAX_PFC_PRIORITIES)
  1793. return;
  1794. if (setting) {
  1795. bp->dcbx_config_params.admin_pfc_bitmap |= (1 << prio);
  1796. bp->dcbx_config_params.admin_pfc_tx_enable = 1;
  1797. } else {
  1798. bp->dcbx_config_params.admin_pfc_bitmap &= ~(1 << prio);
  1799. }
  1800. }
  1801. static void bnx2x_dcbnl_get_pfc_cfg(struct net_device *netdev, int prio,
  1802. u8 *setting)
  1803. {
  1804. struct bnx2x *bp = netdev_priv(netdev);
  1805. DP(BNX2X_MSG_DCB, "prio = %d\n", prio);
  1806. *setting = 0;
  1807. if (!bp->dcb_state || prio >= MAX_PFC_PRIORITIES)
  1808. return;
  1809. *setting = (bp->dcbx_local_feat.pfc.pri_en_bitmap >> prio) & 0x1;
  1810. }
  1811. static u8 bnx2x_dcbnl_set_all(struct net_device *netdev)
  1812. {
  1813. struct bnx2x *bp = netdev_priv(netdev);
  1814. DP(BNX2X_MSG_DCB, "SET-ALL\n");
  1815. if (!bnx2x_dcbnl_set_valid(bp))
  1816. return 1;
  1817. if (bp->recovery_state != BNX2X_RECOVERY_DONE) {
  1818. netdev_err(bp->dev,
  1819. "Handling parity error recovery. Try again later\n");
  1820. return 1;
  1821. }
  1822. if (netif_running(bp->dev)) {
  1823. bnx2x_update_drv_flags(bp,
  1824. 1 << DRV_FLAGS_DCB_MFW_CONFIGURED,
  1825. 1);
  1826. bnx2x_dcbx_init(bp, true);
  1827. }
  1828. DP(BNX2X_MSG_DCB, "set_dcbx_params done\n");
  1829. return 0;
  1830. }
  1831. static u8 bnx2x_dcbnl_get_cap(struct net_device *netdev, int capid, u8 *cap)
  1832. {
  1833. struct bnx2x *bp = netdev_priv(netdev);
  1834. u8 rval = 0;
  1835. if (bp->dcb_state) {
  1836. switch (capid) {
  1837. case DCB_CAP_ATTR_PG:
  1838. *cap = true;
  1839. break;
  1840. case DCB_CAP_ATTR_PFC:
  1841. *cap = true;
  1842. break;
  1843. case DCB_CAP_ATTR_UP2TC:
  1844. *cap = false;
  1845. break;
  1846. case DCB_CAP_ATTR_PG_TCS:
  1847. *cap = 0x80; /* 8 priorities for PGs */
  1848. break;
  1849. case DCB_CAP_ATTR_PFC_TCS:
  1850. *cap = 0x80; /* 8 priorities for PFC */
  1851. break;
  1852. case DCB_CAP_ATTR_GSP:
  1853. *cap = true;
  1854. break;
  1855. case DCB_CAP_ATTR_BCN:
  1856. *cap = false;
  1857. break;
  1858. case DCB_CAP_ATTR_DCBX:
  1859. *cap = BNX2X_DCBX_CAPS;
  1860. break;
  1861. default:
  1862. BNX2X_ERR("Non valid capability ID\n");
  1863. rval = 1;
  1864. break;
  1865. }
  1866. } else {
  1867. DP(BNX2X_MSG_DCB, "DCB disabled\n");
  1868. rval = 1;
  1869. }
  1870. DP(BNX2X_MSG_DCB, "capid %d:%x\n", capid, *cap);
  1871. return rval;
  1872. }
  1873. static int bnx2x_dcbnl_get_numtcs(struct net_device *netdev, int tcid, u8 *num)
  1874. {
  1875. struct bnx2x *bp = netdev_priv(netdev);
  1876. u8 rval = 0;
  1877. DP(BNX2X_MSG_DCB, "tcid %d\n", tcid);
  1878. if (bp->dcb_state) {
  1879. switch (tcid) {
  1880. case DCB_NUMTCS_ATTR_PG:
  1881. *num = CHIP_IS_E3B0(bp) ? DCBX_COS_MAX_NUM_E3B0 :
  1882. DCBX_COS_MAX_NUM_E2;
  1883. break;
  1884. case DCB_NUMTCS_ATTR_PFC:
  1885. *num = CHIP_IS_E3B0(bp) ? DCBX_COS_MAX_NUM_E3B0 :
  1886. DCBX_COS_MAX_NUM_E2;
  1887. break;
  1888. default:
  1889. BNX2X_ERR("Non valid TC-ID\n");
  1890. rval = 1;
  1891. break;
  1892. }
  1893. } else {
  1894. DP(BNX2X_MSG_DCB, "DCB disabled\n");
  1895. rval = 1;
  1896. }
  1897. return rval;
  1898. }
  1899. static int bnx2x_dcbnl_set_numtcs(struct net_device *netdev, int tcid, u8 num)
  1900. {
  1901. struct bnx2x *bp = netdev_priv(netdev);
  1902. DP(BNX2X_MSG_DCB, "num tcs = %d; Not supported\n", num);
  1903. return -EINVAL;
  1904. }
  1905. static u8 bnx2x_dcbnl_get_pfc_state(struct net_device *netdev)
  1906. {
  1907. struct bnx2x *bp = netdev_priv(netdev);
  1908. DP(BNX2X_MSG_DCB, "state = %d\n", bp->dcbx_local_feat.pfc.enabled);
  1909. if (!bp->dcb_state)
  1910. return 0;
  1911. return bp->dcbx_local_feat.pfc.enabled;
  1912. }
  1913. static void bnx2x_dcbnl_set_pfc_state(struct net_device *netdev, u8 state)
  1914. {
  1915. struct bnx2x *bp = netdev_priv(netdev);
  1916. DP(BNX2X_MSG_DCB, "state = %s\n", state ? "on" : "off");
  1917. if (!bnx2x_dcbnl_set_valid(bp))
  1918. return;
  1919. bp->dcbx_config_params.admin_pfc_tx_enable =
  1920. bp->dcbx_config_params.admin_pfc_enable = (state ? 1 : 0);
  1921. }
  1922. static void bnx2x_admin_app_set_ent(
  1923. struct bnx2x_admin_priority_app_table *app_ent,
  1924. u8 idtype, u16 idval, u8 up)
  1925. {
  1926. app_ent->valid = 1;
  1927. switch (idtype) {
  1928. case DCB_APP_IDTYPE_ETHTYPE:
  1929. app_ent->traffic_type = TRAFFIC_TYPE_ETH;
  1930. break;
  1931. case DCB_APP_IDTYPE_PORTNUM:
  1932. app_ent->traffic_type = TRAFFIC_TYPE_PORT;
  1933. break;
  1934. default:
  1935. break; /* never gets here */
  1936. }
  1937. app_ent->app_id = idval;
  1938. app_ent->priority = up;
  1939. }
  1940. static bool bnx2x_admin_app_is_equal(
  1941. struct bnx2x_admin_priority_app_table *app_ent,
  1942. u8 idtype, u16 idval)
  1943. {
  1944. if (!app_ent->valid)
  1945. return false;
  1946. switch (idtype) {
  1947. case DCB_APP_IDTYPE_ETHTYPE:
  1948. if (app_ent->traffic_type != TRAFFIC_TYPE_ETH)
  1949. return false;
  1950. break;
  1951. case DCB_APP_IDTYPE_PORTNUM:
  1952. if (app_ent->traffic_type != TRAFFIC_TYPE_PORT)
  1953. return false;
  1954. break;
  1955. default:
  1956. return false;
  1957. }
  1958. if (app_ent->app_id != idval)
  1959. return false;
  1960. return true;
  1961. }
  1962. static int bnx2x_set_admin_app_up(struct bnx2x *bp, u8 idtype, u16 idval, u8 up)
  1963. {
  1964. int i, ff;
  1965. /* iterate over the app entries looking for idtype and idval */
  1966. for (i = 0, ff = -1; i < DCBX_CONFIG_MAX_APP_PROTOCOL; i++) {
  1967. struct bnx2x_admin_priority_app_table *app_ent =
  1968. &bp->dcbx_config_params.admin_priority_app_table[i];
  1969. if (bnx2x_admin_app_is_equal(app_ent, idtype, idval))
  1970. break;
  1971. if (ff < 0 && !app_ent->valid)
  1972. ff = i;
  1973. }
  1974. if (i < DCBX_CONFIG_MAX_APP_PROTOCOL)
  1975. /* if found overwrite up */
  1976. bp->dcbx_config_params.
  1977. admin_priority_app_table[i].priority = up;
  1978. else if (ff >= 0)
  1979. /* not found use first-free */
  1980. bnx2x_admin_app_set_ent(
  1981. &bp->dcbx_config_params.admin_priority_app_table[ff],
  1982. idtype, idval, up);
  1983. else {
  1984. /* app table is full */
  1985. BNX2X_ERR("Application table is too large\n");
  1986. return -EBUSY;
  1987. }
  1988. /* up configured, if not 0 make sure feature is enabled */
  1989. if (up)
  1990. bp->dcbx_config_params.admin_application_priority_tx_enable = 1;
  1991. return 0;
  1992. }
  1993. static int bnx2x_dcbnl_set_app_up(struct net_device *netdev, u8 idtype,
  1994. u16 idval, u8 up)
  1995. {
  1996. struct bnx2x *bp = netdev_priv(netdev);
  1997. DP(BNX2X_MSG_DCB, "app_type %d, app_id %x, prio bitmap %d\n",
  1998. idtype, idval, up);
  1999. if (!bnx2x_dcbnl_set_valid(bp)) {
  2000. DP(BNX2X_MSG_DCB, "dcbnl call not valid\n");
  2001. return -EINVAL;
  2002. }
  2003. /* verify idtype */
  2004. switch (idtype) {
  2005. case DCB_APP_IDTYPE_ETHTYPE:
  2006. case DCB_APP_IDTYPE_PORTNUM:
  2007. break;
  2008. default:
  2009. DP(BNX2X_MSG_DCB, "Wrong ID type\n");
  2010. return -EINVAL;
  2011. }
  2012. return bnx2x_set_admin_app_up(bp, idtype, idval, up);
  2013. }
  2014. static u8 bnx2x_dcbnl_get_dcbx(struct net_device *netdev)
  2015. {
  2016. struct bnx2x *bp = netdev_priv(netdev);
  2017. u8 state;
  2018. state = DCB_CAP_DCBX_LLD_MANAGED | DCB_CAP_DCBX_VER_CEE;
  2019. if (bp->dcbx_enabled == BNX2X_DCBX_ENABLED_ON_NEG_OFF)
  2020. state |= DCB_CAP_DCBX_STATIC;
  2021. return state;
  2022. }
  2023. static u8 bnx2x_dcbnl_set_dcbx(struct net_device *netdev, u8 state)
  2024. {
  2025. struct bnx2x *bp = netdev_priv(netdev);
  2026. DP(BNX2X_MSG_DCB, "state = %02x\n", state);
  2027. /* set dcbx mode */
  2028. if ((state & BNX2X_DCBX_CAPS) != state) {
  2029. BNX2X_ERR("Requested DCBX mode %x is beyond advertised capabilities\n",
  2030. state);
  2031. return 1;
  2032. }
  2033. if (bp->dcb_state != BNX2X_DCB_STATE_ON) {
  2034. BNX2X_ERR("DCB turned off, DCBX configuration is invalid\n");
  2035. return 1;
  2036. }
  2037. if (state & DCB_CAP_DCBX_STATIC)
  2038. bp->dcbx_enabled = BNX2X_DCBX_ENABLED_ON_NEG_OFF;
  2039. else
  2040. bp->dcbx_enabled = BNX2X_DCBX_ENABLED_ON_NEG_ON;
  2041. bp->dcbx_mode_uset = true;
  2042. return 0;
  2043. }
  2044. static u8 bnx2x_dcbnl_get_featcfg(struct net_device *netdev, int featid,
  2045. u8 *flags)
  2046. {
  2047. struct bnx2x *bp = netdev_priv(netdev);
  2048. u8 rval = 0;
  2049. DP(BNX2X_MSG_DCB, "featid %d\n", featid);
  2050. if (bp->dcb_state) {
  2051. *flags = 0;
  2052. switch (featid) {
  2053. case DCB_FEATCFG_ATTR_PG:
  2054. if (bp->dcbx_local_feat.ets.enabled)
  2055. *flags |= DCB_FEATCFG_ENABLE;
  2056. if (bp->dcbx_error & (DCBX_LOCAL_ETS_ERROR |
  2057. DCBX_REMOTE_MIB_ERROR))
  2058. *flags |= DCB_FEATCFG_ERROR;
  2059. break;
  2060. case DCB_FEATCFG_ATTR_PFC:
  2061. if (bp->dcbx_local_feat.pfc.enabled)
  2062. *flags |= DCB_FEATCFG_ENABLE;
  2063. if (bp->dcbx_error & (DCBX_LOCAL_PFC_ERROR |
  2064. DCBX_LOCAL_PFC_MISMATCH |
  2065. DCBX_REMOTE_MIB_ERROR))
  2066. *flags |= DCB_FEATCFG_ERROR;
  2067. break;
  2068. case DCB_FEATCFG_ATTR_APP:
  2069. if (bp->dcbx_local_feat.app.enabled)
  2070. *flags |= DCB_FEATCFG_ENABLE;
  2071. if (bp->dcbx_error & (DCBX_LOCAL_APP_ERROR |
  2072. DCBX_LOCAL_APP_MISMATCH |
  2073. DCBX_REMOTE_MIB_ERROR))
  2074. *flags |= DCB_FEATCFG_ERROR;
  2075. break;
  2076. default:
  2077. BNX2X_ERR("Non valid feature-ID\n");
  2078. rval = 1;
  2079. break;
  2080. }
  2081. } else {
  2082. DP(BNX2X_MSG_DCB, "DCB disabled\n");
  2083. rval = 1;
  2084. }
  2085. return rval;
  2086. }
  2087. static u8 bnx2x_dcbnl_set_featcfg(struct net_device *netdev, int featid,
  2088. u8 flags)
  2089. {
  2090. struct bnx2x *bp = netdev_priv(netdev);
  2091. u8 rval = 0;
  2092. DP(BNX2X_MSG_DCB, "featid = %d flags = %02x\n", featid, flags);
  2093. /* ignore the 'advertise' flag */
  2094. if (bnx2x_dcbnl_set_valid(bp)) {
  2095. switch (featid) {
  2096. case DCB_FEATCFG_ATTR_PG:
  2097. bp->dcbx_config_params.admin_ets_enable =
  2098. flags & DCB_FEATCFG_ENABLE ? 1 : 0;
  2099. bp->dcbx_config_params.admin_ets_willing =
  2100. flags & DCB_FEATCFG_WILLING ? 1 : 0;
  2101. break;
  2102. case DCB_FEATCFG_ATTR_PFC:
  2103. bp->dcbx_config_params.admin_pfc_enable =
  2104. flags & DCB_FEATCFG_ENABLE ? 1 : 0;
  2105. bp->dcbx_config_params.admin_pfc_willing =
  2106. flags & DCB_FEATCFG_WILLING ? 1 : 0;
  2107. break;
  2108. case DCB_FEATCFG_ATTR_APP:
  2109. /* ignore enable, always enabled */
  2110. bp->dcbx_config_params.admin_app_priority_willing =
  2111. flags & DCB_FEATCFG_WILLING ? 1 : 0;
  2112. break;
  2113. default:
  2114. BNX2X_ERR("Non valid feature-ID\n");
  2115. rval = 1;
  2116. break;
  2117. }
  2118. } else {
  2119. DP(BNX2X_MSG_DCB, "dcbnl call not valid\n");
  2120. rval = 1;
  2121. }
  2122. return rval;
  2123. }
  2124. static int bnx2x_peer_appinfo(struct net_device *netdev,
  2125. struct dcb_peer_app_info *info, u16* app_count)
  2126. {
  2127. int i;
  2128. struct bnx2x *bp = netdev_priv(netdev);
  2129. DP(BNX2X_MSG_DCB, "APP-INFO\n");
  2130. info->willing = (bp->dcbx_remote_flags & DCBX_APP_REM_WILLING) ?: 0;
  2131. info->error = (bp->dcbx_remote_flags & DCBX_APP_RX_ERROR) ?: 0;
  2132. *app_count = 0;
  2133. for (i = 0; i < DCBX_MAX_APP_PROTOCOL; i++)
  2134. if (bp->dcbx_remote_feat.app.app_pri_tbl[i].appBitfield &
  2135. DCBX_APP_ENTRY_VALID)
  2136. (*app_count)++;
  2137. return 0;
  2138. }
  2139. static int bnx2x_peer_apptable(struct net_device *netdev,
  2140. struct dcb_app *table)
  2141. {
  2142. int i, j;
  2143. struct bnx2x *bp = netdev_priv(netdev);
  2144. DP(BNX2X_MSG_DCB, "APP-TABLE\n");
  2145. for (i = 0, j = 0; i < DCBX_MAX_APP_PROTOCOL; i++) {
  2146. struct dcbx_app_priority_entry *ent =
  2147. &bp->dcbx_remote_feat.app.app_pri_tbl[i];
  2148. if (ent->appBitfield & DCBX_APP_ENTRY_VALID) {
  2149. table[j].selector = bnx2x_dcbx_dcbnl_app_idtype(ent);
  2150. table[j].priority = bnx2x_dcbx_dcbnl_app_up(ent);
  2151. table[j++].protocol = ent->app_id;
  2152. }
  2153. }
  2154. return 0;
  2155. }
  2156. static int bnx2x_cee_peer_getpg(struct net_device *netdev, struct cee_pg *pg)
  2157. {
  2158. int i;
  2159. struct bnx2x *bp = netdev_priv(netdev);
  2160. pg->willing = (bp->dcbx_remote_flags & DCBX_ETS_REM_WILLING) ?: 0;
  2161. for (i = 0; i < CEE_DCBX_MAX_PGS; i++) {
  2162. pg->pg_bw[i] =
  2163. DCBX_PG_BW_GET(bp->dcbx_remote_feat.ets.pg_bw_tbl, i);
  2164. pg->prio_pg[i] =
  2165. DCBX_PRI_PG_GET(bp->dcbx_remote_feat.ets.pri_pg_tbl, i);
  2166. }
  2167. return 0;
  2168. }
  2169. static int bnx2x_cee_peer_getpfc(struct net_device *netdev,
  2170. struct cee_pfc *pfc)
  2171. {
  2172. struct bnx2x *bp = netdev_priv(netdev);
  2173. pfc->tcs_supported = bp->dcbx_remote_feat.pfc.pfc_caps;
  2174. pfc->pfc_en = bp->dcbx_remote_feat.pfc.pri_en_bitmap;
  2175. return 0;
  2176. }
  2177. const struct dcbnl_rtnl_ops bnx2x_dcbnl_ops = {
  2178. .getstate = bnx2x_dcbnl_get_state,
  2179. .setstate = bnx2x_dcbnl_set_state,
  2180. .getpermhwaddr = bnx2x_dcbnl_get_perm_hw_addr,
  2181. .setpgtccfgtx = bnx2x_dcbnl_set_pg_tccfg_tx,
  2182. .setpgbwgcfgtx = bnx2x_dcbnl_set_pg_bwgcfg_tx,
  2183. .setpgtccfgrx = bnx2x_dcbnl_set_pg_tccfg_rx,
  2184. .setpgbwgcfgrx = bnx2x_dcbnl_set_pg_bwgcfg_rx,
  2185. .getpgtccfgtx = bnx2x_dcbnl_get_pg_tccfg_tx,
  2186. .getpgbwgcfgtx = bnx2x_dcbnl_get_pg_bwgcfg_tx,
  2187. .getpgtccfgrx = bnx2x_dcbnl_get_pg_tccfg_rx,
  2188. .getpgbwgcfgrx = bnx2x_dcbnl_get_pg_bwgcfg_rx,
  2189. .setpfccfg = bnx2x_dcbnl_set_pfc_cfg,
  2190. .getpfccfg = bnx2x_dcbnl_get_pfc_cfg,
  2191. .setall = bnx2x_dcbnl_set_all,
  2192. .getcap = bnx2x_dcbnl_get_cap,
  2193. .getnumtcs = bnx2x_dcbnl_get_numtcs,
  2194. .setnumtcs = bnx2x_dcbnl_set_numtcs,
  2195. .getpfcstate = bnx2x_dcbnl_get_pfc_state,
  2196. .setpfcstate = bnx2x_dcbnl_set_pfc_state,
  2197. .setapp = bnx2x_dcbnl_set_app_up,
  2198. .getdcbx = bnx2x_dcbnl_get_dcbx,
  2199. .setdcbx = bnx2x_dcbnl_set_dcbx,
  2200. .getfeatcfg = bnx2x_dcbnl_get_featcfg,
  2201. .setfeatcfg = bnx2x_dcbnl_set_featcfg,
  2202. .peer_getappinfo = bnx2x_peer_appinfo,
  2203. .peer_getapptable = bnx2x_peer_apptable,
  2204. .cee_peer_getpg = bnx2x_cee_peer_getpg,
  2205. .cee_peer_getpfc = bnx2x_cee_peer_getpfc,
  2206. };
  2207. #endif /* BCM_DCBNL */