tw68.h 6.3 KB

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  1. /*
  2. * tw68 driver common header file
  3. *
  4. * Much of this code is derived from the cx88 and sa7134 drivers, which
  5. * were in turn derived from the bt87x driver. The original work was by
  6. * Gerd Knorr; more recently the code was enhanced by Mauro Carvalho Chehab,
  7. * Hans Verkuil, Andy Walls and many others. Their work is gratefully
  8. * acknowledged. Full credit goes to them - any problems within this code
  9. * are mine.
  10. *
  11. * Copyright (C) 2009 William M. Brack
  12. *
  13. * Refactored and updated to the latest v4l core frameworks:
  14. *
  15. * Copyright (C) 2014 Hans Verkuil <hverkuil@xs4all.nl>
  16. *
  17. * This program is free software; you can redistribute it and/or modify
  18. * it under the terms of the GNU General Public License as published by
  19. * the Free Software Foundation; either version 2 of the License, or
  20. * (at your option) any later version.
  21. *
  22. * This program is distributed in the hope that it will be useful,
  23. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  24. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  25. * GNU General Public License for more details.
  26. */
  27. #include <linux/version.h>
  28. #include <linux/pci.h>
  29. #include <linux/videodev2.h>
  30. #include <linux/notifier.h>
  31. #include <linux/delay.h>
  32. #include <linux/mutex.h>
  33. #include <linux/io.h>
  34. #include <media/v4l2-common.h>
  35. #include <media/v4l2-ioctl.h>
  36. #include <media/v4l2-ctrls.h>
  37. #include <media/v4l2-device.h>
  38. #include <media/videobuf2-dma-sg.h>
  39. #include "tw68-reg.h"
  40. #define UNSET (-1U)
  41. /* system vendor and device ID's */
  42. #define PCI_VENDOR_ID_TECHWELL 0x1797
  43. #define PCI_DEVICE_ID_6800 0x6800
  44. #define PCI_DEVICE_ID_6801 0x6801
  45. #define PCI_DEVICE_ID_AUDIO2 0x6802
  46. #define PCI_DEVICE_ID_TS3 0x6803
  47. #define PCI_DEVICE_ID_6804 0x6804
  48. #define PCI_DEVICE_ID_AUDIO5 0x6805
  49. #define PCI_DEVICE_ID_TS6 0x6806
  50. /* tw6816 based cards */
  51. #define PCI_DEVICE_ID_6816_1 0x6810
  52. #define PCI_DEVICE_ID_6816_2 0x6811
  53. #define PCI_DEVICE_ID_6816_3 0x6812
  54. #define PCI_DEVICE_ID_6816_4 0x6813
  55. #define TW68_NORMS ( \
  56. V4L2_STD_NTSC | V4L2_STD_PAL | V4L2_STD_SECAM | \
  57. V4L2_STD_PAL_M | V4L2_STD_PAL_Nc | V4L2_STD_PAL_60)
  58. #define TW68_VID_INTS (TW68_FFERR | TW68_PABORT | TW68_DMAPERR | \
  59. TW68_FFOF | TW68_DMAPI)
  60. /* TW6800 chips have trouble with these, so we don't set them for that chip */
  61. #define TW68_VID_INTSX (TW68_FDMIS | TW68_HLOCK | TW68_VLOCK)
  62. #define TW68_I2C_INTS (TW68_SBERR | TW68_SBDONE | TW68_SBERR2 | \
  63. TW68_SBDONE2)
  64. enum tw68_decoder_type {
  65. TW6800,
  66. TW6801,
  67. TW6804,
  68. TWXXXX,
  69. };
  70. /* ----------------------------------------------------------- */
  71. /* static data */
  72. struct tw68_tvnorm {
  73. char *name;
  74. v4l2_std_id id;
  75. /* video decoder */
  76. u32 sync_control;
  77. u32 luma_control;
  78. u32 chroma_ctrl1;
  79. u32 chroma_gain;
  80. u32 chroma_ctrl2;
  81. u32 vgate_misc;
  82. /* video scaler */
  83. u32 h_delay;
  84. u32 h_delay0; /* for TW6800 */
  85. u32 h_start;
  86. u32 h_stop;
  87. u32 v_delay;
  88. u32 video_v_start;
  89. u32 video_v_stop;
  90. u32 vbi_v_start_0;
  91. u32 vbi_v_stop_0;
  92. u32 vbi_v_start_1;
  93. /* Techwell specific */
  94. u32 format;
  95. };
  96. struct tw68_format {
  97. char *name;
  98. u32 fourcc;
  99. u32 depth;
  100. u32 twformat;
  101. };
  102. /* ----------------------------------------------------------- */
  103. /* card configuration */
  104. #define TW68_BOARD_NOAUTO UNSET
  105. #define TW68_BOARD_UNKNOWN 0
  106. #define TW68_BOARD_GENERIC_6802 1
  107. #define TW68_MAXBOARDS 16
  108. #define TW68_INPUT_MAX 4
  109. /* ----------------------------------------------------------- */
  110. /* device / file handle status */
  111. #define BUFFER_TIMEOUT msecs_to_jiffies(500) /* 0.5 seconds */
  112. struct tw68_dev; /* forward delclaration */
  113. /* buffer for one video/vbi/ts frame */
  114. struct tw68_buf {
  115. struct vb2_buffer vb;
  116. struct list_head list;
  117. unsigned int size;
  118. __le32 *cpu;
  119. __le32 *jmp;
  120. dma_addr_t dma;
  121. };
  122. struct tw68_fmt {
  123. char *name;
  124. u32 fourcc; /* v4l2 format id */
  125. int depth;
  126. int flags;
  127. u32 twformat;
  128. };
  129. /* global device status */
  130. struct tw68_dev {
  131. struct mutex lock;
  132. spinlock_t slock;
  133. u16 instance;
  134. struct v4l2_device v4l2_dev;
  135. /* various device info */
  136. enum tw68_decoder_type vdecoder;
  137. struct video_device vdev;
  138. struct v4l2_ctrl_handler hdl;
  139. /* pci i/o */
  140. char *name;
  141. struct pci_dev *pci;
  142. unsigned char pci_rev, pci_lat;
  143. u32 __iomem *lmmio;
  144. u8 __iomem *bmmio;
  145. u32 pci_irqmask;
  146. /* The irq mask to be used will depend upon the chip type */
  147. u32 board_virqmask;
  148. /* video capture */
  149. const struct tw68_format *fmt;
  150. unsigned width, height;
  151. unsigned seqnr;
  152. unsigned field;
  153. struct vb2_queue vidq;
  154. struct list_head active;
  155. void *alloc_ctx;
  156. /* various v4l controls */
  157. const struct tw68_tvnorm *tvnorm; /* video */
  158. int input;
  159. };
  160. /* ----------------------------------------------------------- */
  161. #define tw_readl(reg) readl(dev->lmmio + ((reg) >> 2))
  162. #define tw_readb(reg) readb(dev->bmmio + (reg))
  163. #define tw_writel(reg, value) writel((value), dev->lmmio + ((reg) >> 2))
  164. #define tw_writeb(reg, value) writeb((value), dev->bmmio + (reg))
  165. #define tw_andorl(reg, mask, value) \
  166. writel((readl(dev->lmmio+((reg)>>2)) & ~(mask)) |\
  167. ((value) & (mask)), dev->lmmio+((reg)>>2))
  168. #define tw_andorb(reg, mask, value) \
  169. writeb((readb(dev->bmmio + (reg)) & ~(mask)) |\
  170. ((value) & (mask)), dev->bmmio+(reg))
  171. #define tw_setl(reg, bit) tw_andorl((reg), (bit), (bit))
  172. #define tw_setb(reg, bit) tw_andorb((reg), (bit), (bit))
  173. #define tw_clearl(reg, bit) \
  174. writel((readl(dev->lmmio + ((reg) >> 2)) & ~(bit)), \
  175. dev->lmmio + ((reg) >> 2))
  176. #define tw_clearb(reg, bit) \
  177. writeb((readb(dev->bmmio+(reg)) & ~(bit)), \
  178. dev->bmmio + (reg))
  179. #define tw_wait(us) { udelay(us); }
  180. /* ----------------------------------------------------------- */
  181. /* tw68-video.c */
  182. void tw68_set_tvnorm_hw(struct tw68_dev *dev);
  183. int tw68_video_init1(struct tw68_dev *dev);
  184. int tw68_video_init2(struct tw68_dev *dev, int video_nr);
  185. void tw68_irq_video_done(struct tw68_dev *dev, unsigned long status);
  186. int tw68_video_start_dma(struct tw68_dev *dev, struct tw68_buf *buf);
  187. /* ----------------------------------------------------------- */
  188. /* tw68-risc.c */
  189. int tw68_risc_buffer(struct pci_dev *pci, struct tw68_buf *buf,
  190. struct scatterlist *sglist, unsigned int top_offset,
  191. unsigned int bottom_offset, unsigned int bpl,
  192. unsigned int padding, unsigned int lines);