cx18-streams.c 29 KB

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  1. /*
  2. * cx18 init/start/stop/exit stream functions
  3. *
  4. * Derived from ivtv-streams.c
  5. *
  6. * Copyright (C) 2007 Hans Verkuil <hverkuil@xs4all.nl>
  7. * Copyright (C) 2008 Andy Walls <awalls@md.metrocast.net>
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License as published by
  11. * the Free Software Foundation; either version 2 of the License, or
  12. * (at your option) any later version.
  13. *
  14. * This program is distributed in the hope that it will be useful,
  15. * but WITHOUT ANY WARRANTY; without even the implied warranty of
  16. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  17. * GNU General Public License for more details.
  18. *
  19. * You should have received a copy of the GNU General Public License
  20. * along with this program; if not, write to the Free Software
  21. * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA
  22. * 02111-1307 USA
  23. */
  24. #include "cx18-driver.h"
  25. #include "cx18-io.h"
  26. #include "cx18-fileops.h"
  27. #include "cx18-mailbox.h"
  28. #include "cx18-i2c.h"
  29. #include "cx18-queue.h"
  30. #include "cx18-ioctl.h"
  31. #include "cx18-streams.h"
  32. #include "cx18-cards.h"
  33. #include "cx18-scb.h"
  34. #include "cx18-dvb.h"
  35. #define CX18_DSP0_INTERRUPT_MASK 0xd0004C
  36. static struct v4l2_file_operations cx18_v4l2_enc_fops = {
  37. .owner = THIS_MODULE,
  38. .read = cx18_v4l2_read,
  39. .open = cx18_v4l2_open,
  40. .unlocked_ioctl = video_ioctl2,
  41. .release = cx18_v4l2_close,
  42. .poll = cx18_v4l2_enc_poll,
  43. .mmap = cx18_v4l2_mmap,
  44. };
  45. /* offset from 0 to register ts v4l2 minors on */
  46. #define CX18_V4L2_ENC_TS_OFFSET 16
  47. /* offset from 0 to register pcm v4l2 minors on */
  48. #define CX18_V4L2_ENC_PCM_OFFSET 24
  49. /* offset from 0 to register yuv v4l2 minors on */
  50. #define CX18_V4L2_ENC_YUV_OFFSET 32
  51. static struct {
  52. const char *name;
  53. int vfl_type;
  54. int num_offset;
  55. int dma;
  56. u32 caps;
  57. } cx18_stream_info[] = {
  58. { /* CX18_ENC_STREAM_TYPE_MPG */
  59. "encoder MPEG",
  60. VFL_TYPE_GRABBER, 0,
  61. PCI_DMA_FROMDEVICE,
  62. V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE |
  63. V4L2_CAP_AUDIO | V4L2_CAP_TUNER
  64. },
  65. { /* CX18_ENC_STREAM_TYPE_TS */
  66. "TS",
  67. VFL_TYPE_GRABBER, -1,
  68. PCI_DMA_FROMDEVICE,
  69. },
  70. { /* CX18_ENC_STREAM_TYPE_YUV */
  71. "encoder YUV",
  72. VFL_TYPE_GRABBER, CX18_V4L2_ENC_YUV_OFFSET,
  73. PCI_DMA_FROMDEVICE,
  74. V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_READWRITE |
  75. V4L2_CAP_STREAMING | V4L2_CAP_AUDIO | V4L2_CAP_TUNER
  76. },
  77. { /* CX18_ENC_STREAM_TYPE_VBI */
  78. "encoder VBI",
  79. VFL_TYPE_VBI, 0,
  80. PCI_DMA_FROMDEVICE,
  81. V4L2_CAP_VBI_CAPTURE | V4L2_CAP_SLICED_VBI_CAPTURE |
  82. V4L2_CAP_READWRITE | V4L2_CAP_TUNER
  83. },
  84. { /* CX18_ENC_STREAM_TYPE_PCM */
  85. "encoder PCM audio",
  86. VFL_TYPE_GRABBER, CX18_V4L2_ENC_PCM_OFFSET,
  87. PCI_DMA_FROMDEVICE,
  88. },
  89. { /* CX18_ENC_STREAM_TYPE_IDX */
  90. "encoder IDX",
  91. VFL_TYPE_GRABBER, -1,
  92. PCI_DMA_FROMDEVICE,
  93. },
  94. { /* CX18_ENC_STREAM_TYPE_RAD */
  95. "encoder radio",
  96. VFL_TYPE_RADIO, 0,
  97. PCI_DMA_NONE,
  98. V4L2_CAP_RADIO | V4L2_CAP_TUNER
  99. },
  100. };
  101. static void cx18_dma_free(struct videobuf_queue *q,
  102. struct cx18_stream *s, struct cx18_videobuf_buffer *buf)
  103. {
  104. videobuf_waiton(q, &buf->vb, 0, 0);
  105. videobuf_vmalloc_free(&buf->vb);
  106. buf->vb.state = VIDEOBUF_NEEDS_INIT;
  107. }
  108. static int cx18_prepare_buffer(struct videobuf_queue *q,
  109. struct cx18_stream *s,
  110. struct cx18_videobuf_buffer *buf,
  111. u32 pixelformat,
  112. unsigned int width, unsigned int height,
  113. enum v4l2_field field)
  114. {
  115. struct cx18 *cx = s->cx;
  116. int rc = 0;
  117. /* check settings */
  118. buf->bytes_used = 0;
  119. if ((width < 48) || (height < 32))
  120. return -EINVAL;
  121. buf->vb.size = (width * height * 2);
  122. if ((buf->vb.baddr != 0) && (buf->vb.bsize < buf->vb.size))
  123. return -EINVAL;
  124. /* alloc + fill struct (if changed) */
  125. if (buf->vb.width != width || buf->vb.height != height ||
  126. buf->vb.field != field || s->pixelformat != pixelformat ||
  127. buf->tvnorm != cx->std) {
  128. buf->vb.width = width;
  129. buf->vb.height = height;
  130. buf->vb.field = field;
  131. buf->tvnorm = cx->std;
  132. s->pixelformat = pixelformat;
  133. /* HM12 YUV size is (Y=(h*720) + UV=(h*(720/2)))
  134. UYUV YUV size is (Y=(h*720) + UV=(h*(720))) */
  135. if (s->pixelformat == V4L2_PIX_FMT_HM12)
  136. s->vb_bytes_per_frame = height * 720 * 3 / 2;
  137. else
  138. s->vb_bytes_per_frame = height * 720 * 2;
  139. cx18_dma_free(q, s, buf);
  140. }
  141. if ((buf->vb.baddr != 0) && (buf->vb.bsize < buf->vb.size))
  142. return -EINVAL;
  143. if (buf->vb.field == 0)
  144. buf->vb.field = V4L2_FIELD_INTERLACED;
  145. if (VIDEOBUF_NEEDS_INIT == buf->vb.state) {
  146. buf->vb.width = width;
  147. buf->vb.height = height;
  148. buf->vb.field = field;
  149. buf->tvnorm = cx->std;
  150. s->pixelformat = pixelformat;
  151. /* HM12 YUV size is (Y=(h*720) + UV=(h*(720/2)))
  152. UYUV YUV size is (Y=(h*720) + UV=(h*(720))) */
  153. if (s->pixelformat == V4L2_PIX_FMT_HM12)
  154. s->vb_bytes_per_frame = height * 720 * 3 / 2;
  155. else
  156. s->vb_bytes_per_frame = height * 720 * 2;
  157. rc = videobuf_iolock(q, &buf->vb, NULL);
  158. if (rc != 0)
  159. goto fail;
  160. }
  161. buf->vb.state = VIDEOBUF_PREPARED;
  162. return 0;
  163. fail:
  164. cx18_dma_free(q, s, buf);
  165. return rc;
  166. }
  167. /* VB_MIN_BUFSIZE is lcm(1440 * 480, 1440 * 576)
  168. 1440 is a single line of 4:2:2 YUV at 720 luma samples wide
  169. */
  170. #define VB_MIN_BUFFERS 32
  171. #define VB_MIN_BUFSIZE 4147200
  172. static int buffer_setup(struct videobuf_queue *q,
  173. unsigned int *count, unsigned int *size)
  174. {
  175. struct cx18_stream *s = q->priv_data;
  176. struct cx18 *cx = s->cx;
  177. *size = 2 * cx->cxhdl.width * cx->cxhdl.height;
  178. if (*count == 0)
  179. *count = VB_MIN_BUFFERS;
  180. while (*size * *count > VB_MIN_BUFFERS * VB_MIN_BUFSIZE)
  181. (*count)--;
  182. q->field = V4L2_FIELD_INTERLACED;
  183. q->last = V4L2_FIELD_INTERLACED;
  184. return 0;
  185. }
  186. static int buffer_prepare(struct videobuf_queue *q,
  187. struct videobuf_buffer *vb,
  188. enum v4l2_field field)
  189. {
  190. struct cx18_videobuf_buffer *buf =
  191. container_of(vb, struct cx18_videobuf_buffer, vb);
  192. struct cx18_stream *s = q->priv_data;
  193. struct cx18 *cx = s->cx;
  194. return cx18_prepare_buffer(q, s, buf, s->pixelformat,
  195. cx->cxhdl.width, cx->cxhdl.height, field);
  196. }
  197. static void buffer_release(struct videobuf_queue *q,
  198. struct videobuf_buffer *vb)
  199. {
  200. struct cx18_videobuf_buffer *buf =
  201. container_of(vb, struct cx18_videobuf_buffer, vb);
  202. struct cx18_stream *s = q->priv_data;
  203. cx18_dma_free(q, s, buf);
  204. }
  205. static void buffer_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
  206. {
  207. struct cx18_videobuf_buffer *buf =
  208. container_of(vb, struct cx18_videobuf_buffer, vb);
  209. struct cx18_stream *s = q->priv_data;
  210. buf->vb.state = VIDEOBUF_QUEUED;
  211. list_add_tail(&buf->vb.queue, &s->vb_capture);
  212. }
  213. static struct videobuf_queue_ops cx18_videobuf_qops = {
  214. .buf_setup = buffer_setup,
  215. .buf_prepare = buffer_prepare,
  216. .buf_queue = buffer_queue,
  217. .buf_release = buffer_release,
  218. };
  219. static void cx18_stream_init(struct cx18 *cx, int type)
  220. {
  221. struct cx18_stream *s = &cx->streams[type];
  222. struct video_device *video_dev = s->video_dev;
  223. /* we need to keep video_dev, so restore it afterwards */
  224. memset(s, 0, sizeof(*s));
  225. s->video_dev = video_dev;
  226. /* initialize cx18_stream fields */
  227. s->dvb = NULL;
  228. s->cx = cx;
  229. s->type = type;
  230. s->name = cx18_stream_info[type].name;
  231. s->handle = CX18_INVALID_TASK_HANDLE;
  232. s->dma = cx18_stream_info[type].dma;
  233. s->v4l2_dev_caps = cx18_stream_info[type].caps;
  234. s->buffers = cx->stream_buffers[type];
  235. s->buf_size = cx->stream_buf_size[type];
  236. INIT_LIST_HEAD(&s->buf_pool);
  237. s->bufs_per_mdl = 1;
  238. s->mdl_size = s->buf_size * s->bufs_per_mdl;
  239. init_waitqueue_head(&s->waitq);
  240. s->id = -1;
  241. spin_lock_init(&s->q_free.lock);
  242. cx18_queue_init(&s->q_free);
  243. spin_lock_init(&s->q_busy.lock);
  244. cx18_queue_init(&s->q_busy);
  245. spin_lock_init(&s->q_full.lock);
  246. cx18_queue_init(&s->q_full);
  247. spin_lock_init(&s->q_idle.lock);
  248. cx18_queue_init(&s->q_idle);
  249. INIT_WORK(&s->out_work_order, cx18_out_work_handler);
  250. INIT_LIST_HEAD(&s->vb_capture);
  251. s->vb_timeout.function = cx18_vb_timeout;
  252. s->vb_timeout.data = (unsigned long)s;
  253. init_timer(&s->vb_timeout);
  254. spin_lock_init(&s->vb_lock);
  255. if (type == CX18_ENC_STREAM_TYPE_YUV) {
  256. spin_lock_init(&s->vbuf_q_lock);
  257. s->vb_type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
  258. videobuf_queue_vmalloc_init(&s->vbuf_q, &cx18_videobuf_qops,
  259. &cx->pci_dev->dev, &s->vbuf_q_lock,
  260. V4L2_BUF_TYPE_VIDEO_CAPTURE,
  261. V4L2_FIELD_INTERLACED,
  262. sizeof(struct cx18_videobuf_buffer),
  263. s, &cx->serialize_lock);
  264. /* Assume the previous pixel default */
  265. s->pixelformat = V4L2_PIX_FMT_HM12;
  266. s->vb_bytes_per_frame = cx->cxhdl.height * 720 * 3 / 2;
  267. }
  268. }
  269. static int cx18_prep_dev(struct cx18 *cx, int type)
  270. {
  271. struct cx18_stream *s = &cx->streams[type];
  272. u32 cap = cx->v4l2_cap;
  273. int num_offset = cx18_stream_info[type].num_offset;
  274. int num = cx->instance + cx18_first_minor + num_offset;
  275. /*
  276. * These five fields are always initialized.
  277. * For analog capture related streams, if video_dev == NULL then the
  278. * stream is not in use.
  279. * For the TS stream, if dvb == NULL then the stream is not in use.
  280. * In those cases no other fields but these four can be used.
  281. */
  282. s->video_dev = NULL;
  283. s->dvb = NULL;
  284. s->cx = cx;
  285. s->type = type;
  286. s->name = cx18_stream_info[type].name;
  287. /* Check whether the radio is supported */
  288. if (type == CX18_ENC_STREAM_TYPE_RAD && !(cap & V4L2_CAP_RADIO))
  289. return 0;
  290. /* Check whether VBI is supported */
  291. if (type == CX18_ENC_STREAM_TYPE_VBI &&
  292. !(cap & (V4L2_CAP_VBI_CAPTURE | V4L2_CAP_SLICED_VBI_CAPTURE)))
  293. return 0;
  294. /* User explicitly selected 0 buffers for these streams, so don't
  295. create them. */
  296. if (cx18_stream_info[type].dma != PCI_DMA_NONE &&
  297. cx->stream_buffers[type] == 0) {
  298. CX18_INFO("Disabled %s device\n", cx18_stream_info[type].name);
  299. return 0;
  300. }
  301. cx18_stream_init(cx, type);
  302. /* Allocate the cx18_dvb struct only for the TS on cards with DTV */
  303. if (type == CX18_ENC_STREAM_TYPE_TS) {
  304. if (cx->card->hw_all & CX18_HW_DVB) {
  305. s->dvb = kzalloc(sizeof(struct cx18_dvb), GFP_KERNEL);
  306. if (s->dvb == NULL) {
  307. CX18_ERR("Couldn't allocate cx18_dvb structure"
  308. " for %s\n", s->name);
  309. return -ENOMEM;
  310. }
  311. } else {
  312. /* Don't need buffers for the TS, if there is no DVB */
  313. s->buffers = 0;
  314. }
  315. }
  316. if (num_offset == -1)
  317. return 0;
  318. /* allocate and initialize the v4l2 video device structure */
  319. s->video_dev = video_device_alloc();
  320. if (s->video_dev == NULL) {
  321. CX18_ERR("Couldn't allocate v4l2 video_device for %s\n",
  322. s->name);
  323. return -ENOMEM;
  324. }
  325. snprintf(s->video_dev->name, sizeof(s->video_dev->name), "%s %s",
  326. cx->v4l2_dev.name, s->name);
  327. s->video_dev->num = num;
  328. s->video_dev->v4l2_dev = &cx->v4l2_dev;
  329. s->video_dev->fops = &cx18_v4l2_enc_fops;
  330. s->video_dev->release = video_device_release;
  331. s->video_dev->tvnorms = V4L2_STD_ALL;
  332. s->video_dev->lock = &cx->serialize_lock;
  333. cx18_set_funcs(s->video_dev);
  334. return 0;
  335. }
  336. /* Initialize v4l2 variables and register v4l2 devices */
  337. int cx18_streams_setup(struct cx18 *cx)
  338. {
  339. int type, ret;
  340. /* Setup V4L2 Devices */
  341. for (type = 0; type < CX18_MAX_STREAMS; type++) {
  342. /* Prepare device */
  343. ret = cx18_prep_dev(cx, type);
  344. if (ret < 0)
  345. break;
  346. /* Allocate Stream */
  347. ret = cx18_stream_alloc(&cx->streams[type]);
  348. if (ret < 0)
  349. break;
  350. }
  351. if (type == CX18_MAX_STREAMS)
  352. return 0;
  353. /* One or more streams could not be initialized. Clean 'em all up. */
  354. cx18_streams_cleanup(cx, 0);
  355. return ret;
  356. }
  357. static int cx18_reg_dev(struct cx18 *cx, int type)
  358. {
  359. struct cx18_stream *s = &cx->streams[type];
  360. int vfl_type = cx18_stream_info[type].vfl_type;
  361. const char *name;
  362. int num, ret;
  363. if (type == CX18_ENC_STREAM_TYPE_TS && s->dvb != NULL) {
  364. ret = cx18_dvb_register(s);
  365. if (ret < 0) {
  366. CX18_ERR("DVB failed to register\n");
  367. return ret;
  368. }
  369. }
  370. if (s->video_dev == NULL)
  371. return 0;
  372. num = s->video_dev->num;
  373. /* card number + user defined offset + device offset */
  374. if (type != CX18_ENC_STREAM_TYPE_MPG) {
  375. struct cx18_stream *s_mpg = &cx->streams[CX18_ENC_STREAM_TYPE_MPG];
  376. if (s_mpg->video_dev)
  377. num = s_mpg->video_dev->num
  378. + cx18_stream_info[type].num_offset;
  379. }
  380. video_set_drvdata(s->video_dev, s);
  381. /* Register device. First try the desired minor, then any free one. */
  382. ret = video_register_device_no_warn(s->video_dev, vfl_type, num);
  383. if (ret < 0) {
  384. CX18_ERR("Couldn't register v4l2 device for %s (device node number %d)\n",
  385. s->name, num);
  386. video_device_release(s->video_dev);
  387. s->video_dev = NULL;
  388. return ret;
  389. }
  390. name = video_device_node_name(s->video_dev);
  391. switch (vfl_type) {
  392. case VFL_TYPE_GRABBER:
  393. CX18_INFO("Registered device %s for %s (%d x %d.%02d kB)\n",
  394. name, s->name, cx->stream_buffers[type],
  395. cx->stream_buf_size[type] / 1024,
  396. (cx->stream_buf_size[type] * 100 / 1024) % 100);
  397. break;
  398. case VFL_TYPE_RADIO:
  399. CX18_INFO("Registered device %s for %s\n", name, s->name);
  400. break;
  401. case VFL_TYPE_VBI:
  402. if (cx->stream_buffers[type])
  403. CX18_INFO("Registered device %s for %s "
  404. "(%d x %d bytes)\n",
  405. name, s->name, cx->stream_buffers[type],
  406. cx->stream_buf_size[type]);
  407. else
  408. CX18_INFO("Registered device %s for %s\n",
  409. name, s->name);
  410. break;
  411. }
  412. return 0;
  413. }
  414. /* Register v4l2 devices */
  415. int cx18_streams_register(struct cx18 *cx)
  416. {
  417. int type;
  418. int err;
  419. int ret = 0;
  420. /* Register V4L2 devices */
  421. for (type = 0; type < CX18_MAX_STREAMS; type++) {
  422. err = cx18_reg_dev(cx, type);
  423. if (err && ret == 0)
  424. ret = err;
  425. }
  426. if (ret == 0)
  427. return 0;
  428. /* One or more streams could not be initialized. Clean 'em all up. */
  429. cx18_streams_cleanup(cx, 1);
  430. return ret;
  431. }
  432. /* Unregister v4l2 devices */
  433. void cx18_streams_cleanup(struct cx18 *cx, int unregister)
  434. {
  435. struct video_device *vdev;
  436. int type;
  437. /* Teardown all streams */
  438. for (type = 0; type < CX18_MAX_STREAMS; type++) {
  439. /* The TS has a cx18_dvb structure, not a video_device */
  440. if (type == CX18_ENC_STREAM_TYPE_TS) {
  441. if (cx->streams[type].dvb != NULL) {
  442. if (unregister)
  443. cx18_dvb_unregister(&cx->streams[type]);
  444. kfree(cx->streams[type].dvb);
  445. cx->streams[type].dvb = NULL;
  446. cx18_stream_free(&cx->streams[type]);
  447. }
  448. continue;
  449. }
  450. /* No struct video_device, but can have buffers allocated */
  451. if (type == CX18_ENC_STREAM_TYPE_IDX) {
  452. /* If the module params didn't inhibit IDX ... */
  453. if (cx->stream_buffers[type] != 0) {
  454. cx->stream_buffers[type] = 0;
  455. /*
  456. * Before calling cx18_stream_free(),
  457. * check if the IDX stream was actually set up.
  458. * Needed, since the cx18_probe() error path
  459. * exits through here as well as normal clean up
  460. */
  461. if (cx->streams[type].buffers != 0)
  462. cx18_stream_free(&cx->streams[type]);
  463. }
  464. continue;
  465. }
  466. /* If struct video_device exists, can have buffers allocated */
  467. vdev = cx->streams[type].video_dev;
  468. cx->streams[type].video_dev = NULL;
  469. if (vdev == NULL)
  470. continue;
  471. if (type == CX18_ENC_STREAM_TYPE_YUV)
  472. videobuf_mmap_free(&cx->streams[type].vbuf_q);
  473. cx18_stream_free(&cx->streams[type]);
  474. /* Unregister or release device */
  475. if (unregister)
  476. video_unregister_device(vdev);
  477. else
  478. video_device_release(vdev);
  479. }
  480. }
  481. static void cx18_vbi_setup(struct cx18_stream *s)
  482. {
  483. struct cx18 *cx = s->cx;
  484. int raw = cx18_raw_vbi(cx);
  485. u32 data[CX2341X_MBOX_MAX_DATA];
  486. int lines;
  487. if (cx->is_60hz) {
  488. cx->vbi.count = 12;
  489. cx->vbi.start[0] = 10;
  490. cx->vbi.start[1] = 273;
  491. } else { /* PAL/SECAM */
  492. cx->vbi.count = 18;
  493. cx->vbi.start[0] = 6;
  494. cx->vbi.start[1] = 318;
  495. }
  496. /* setup VBI registers */
  497. if (raw)
  498. v4l2_subdev_call(cx->sd_av, vbi, s_raw_fmt, &cx->vbi.in.fmt.vbi);
  499. else
  500. v4l2_subdev_call(cx->sd_av, vbi, s_sliced_fmt, &cx->vbi.in.fmt.sliced);
  501. /*
  502. * Send the CX18_CPU_SET_RAW_VBI_PARAM API command to setup Encoder Raw
  503. * VBI when the first analog capture channel starts, as once it starts
  504. * (e.g. MPEG), we can't effect any change in the Encoder Raw VBI setup
  505. * (i.e. for the VBI capture channels). We also send it for each
  506. * analog capture channel anyway just to make sure we get the proper
  507. * behavior
  508. */
  509. if (raw) {
  510. lines = cx->vbi.count * 2;
  511. } else {
  512. /*
  513. * For 525/60 systems, according to the VIP 2 & BT.656 std:
  514. * The EAV RP code's Field bit toggles on line 4, a few lines
  515. * after the Vertcal Blank bit has already toggled.
  516. * Tell the encoder to capture 21-4+1=18 lines per field,
  517. * since we want lines 10 through 21.
  518. *
  519. * For 625/50 systems, according to the VIP 2 & BT.656 std:
  520. * The EAV RP code's Field bit toggles on line 1, a few lines
  521. * after the Vertcal Blank bit has already toggled.
  522. * (We've actually set the digitizer so that the Field bit
  523. * toggles on line 2.) Tell the encoder to capture 23-2+1=22
  524. * lines per field, since we want lines 6 through 23.
  525. */
  526. lines = cx->is_60hz ? (21 - 4 + 1) * 2 : (23 - 2 + 1) * 2;
  527. }
  528. data[0] = s->handle;
  529. /* Lines per field */
  530. data[1] = (lines / 2) | ((lines / 2) << 16);
  531. /* bytes per line */
  532. data[2] = (raw ? vbi_active_samples
  533. : (cx->is_60hz ? vbi_hblank_samples_60Hz
  534. : vbi_hblank_samples_50Hz));
  535. /* Every X number of frames a VBI interrupt arrives
  536. (frames as in 25 or 30 fps) */
  537. data[3] = 1;
  538. /*
  539. * Set the SAV/EAV RP codes to look for as start/stop points
  540. * when in VIP-1.1 mode
  541. */
  542. if (raw) {
  543. /*
  544. * Start codes for beginning of "active" line in vertical blank
  545. * 0x20 ( VerticalBlank )
  546. * 0x60 ( EvenField VerticalBlank )
  547. */
  548. data[4] = 0x20602060;
  549. /*
  550. * End codes for end of "active" raw lines and regular lines
  551. * 0x30 ( VerticalBlank HorizontalBlank)
  552. * 0x70 ( EvenField VerticalBlank HorizontalBlank)
  553. * 0x90 (Task HorizontalBlank)
  554. * 0xd0 (Task EvenField HorizontalBlank)
  555. */
  556. data[5] = 0x307090d0;
  557. } else {
  558. /*
  559. * End codes for active video, we want data in the hblank region
  560. * 0xb0 (Task 0 VerticalBlank HorizontalBlank)
  561. * 0xf0 (Task EvenField VerticalBlank HorizontalBlank)
  562. *
  563. * Since the V bit is only allowed to toggle in the EAV RP code,
  564. * just before the first active region line, these two
  565. * are problematic:
  566. * 0x90 (Task HorizontalBlank)
  567. * 0xd0 (Task EvenField HorizontalBlank)
  568. *
  569. * We have set the digitzer such that we don't have to worry
  570. * about these problem codes.
  571. */
  572. data[4] = 0xB0F0B0F0;
  573. /*
  574. * Start codes for beginning of active line in vertical blank
  575. * 0xa0 (Task VerticalBlank )
  576. * 0xe0 (Task EvenField VerticalBlank )
  577. */
  578. data[5] = 0xA0E0A0E0;
  579. }
  580. CX18_DEBUG_INFO("Setup VBI h: %d lines %x bpl %d fr %d %x %x\n",
  581. data[0], data[1], data[2], data[3], data[4], data[5]);
  582. cx18_api(cx, CX18_CPU_SET_RAW_VBI_PARAM, 6, data);
  583. }
  584. void cx18_stream_rotate_idx_mdls(struct cx18 *cx)
  585. {
  586. struct cx18_stream *s = &cx->streams[CX18_ENC_STREAM_TYPE_IDX];
  587. struct cx18_mdl *mdl;
  588. if (!cx18_stream_enabled(s))
  589. return;
  590. /* Return if the firmware is not running low on MDLs */
  591. if ((atomic_read(&s->q_free.depth) + atomic_read(&s->q_busy.depth)) >=
  592. CX18_ENC_STREAM_TYPE_IDX_FW_MDL_MIN)
  593. return;
  594. /* Return if there are no MDLs to rotate back to the firmware */
  595. if (atomic_read(&s->q_full.depth) < 2)
  596. return;
  597. /*
  598. * Take the oldest IDX MDL still holding data, and discard its index
  599. * entries by scheduling the MDL to go back to the firmware
  600. */
  601. mdl = cx18_dequeue(s, &s->q_full);
  602. if (mdl != NULL)
  603. cx18_enqueue(s, mdl, &s->q_free);
  604. }
  605. static
  606. struct cx18_queue *_cx18_stream_put_mdl_fw(struct cx18_stream *s,
  607. struct cx18_mdl *mdl)
  608. {
  609. struct cx18 *cx = s->cx;
  610. struct cx18_queue *q;
  611. /* Don't give it to the firmware, if we're not running a capture */
  612. if (s->handle == CX18_INVALID_TASK_HANDLE ||
  613. test_bit(CX18_F_S_STOPPING, &s->s_flags) ||
  614. !test_bit(CX18_F_S_STREAMING, &s->s_flags))
  615. return cx18_enqueue(s, mdl, &s->q_free);
  616. q = cx18_enqueue(s, mdl, &s->q_busy);
  617. if (q != &s->q_busy)
  618. return q; /* The firmware has the max MDLs it can handle */
  619. cx18_mdl_sync_for_device(s, mdl);
  620. cx18_vapi(cx, CX18_CPU_DE_SET_MDL, 5, s->handle,
  621. (void __iomem *) &cx->scb->cpu_mdl[mdl->id] - cx->enc_mem,
  622. s->bufs_per_mdl, mdl->id, s->mdl_size);
  623. return q;
  624. }
  625. static
  626. void _cx18_stream_load_fw_queue(struct cx18_stream *s)
  627. {
  628. struct cx18_queue *q;
  629. struct cx18_mdl *mdl;
  630. if (atomic_read(&s->q_free.depth) == 0 ||
  631. atomic_read(&s->q_busy.depth) >= CX18_MAX_FW_MDLS_PER_STREAM)
  632. return;
  633. /* Move from q_free to q_busy notifying the firmware, until the limit */
  634. do {
  635. mdl = cx18_dequeue(s, &s->q_free);
  636. if (mdl == NULL)
  637. break;
  638. q = _cx18_stream_put_mdl_fw(s, mdl);
  639. } while (atomic_read(&s->q_busy.depth) < CX18_MAX_FW_MDLS_PER_STREAM
  640. && q == &s->q_busy);
  641. }
  642. void cx18_out_work_handler(struct work_struct *work)
  643. {
  644. struct cx18_stream *s =
  645. container_of(work, struct cx18_stream, out_work_order);
  646. _cx18_stream_load_fw_queue(s);
  647. }
  648. static void cx18_stream_configure_mdls(struct cx18_stream *s)
  649. {
  650. cx18_unload_queues(s);
  651. switch (s->type) {
  652. case CX18_ENC_STREAM_TYPE_YUV:
  653. /*
  654. * Height should be a multiple of 32 lines.
  655. * Set the MDL size to the exact size needed for one frame.
  656. * Use enough buffers per MDL to cover the MDL size
  657. */
  658. if (s->pixelformat == V4L2_PIX_FMT_HM12)
  659. s->mdl_size = 720 * s->cx->cxhdl.height * 3 / 2;
  660. else
  661. s->mdl_size = 720 * s->cx->cxhdl.height * 2;
  662. s->bufs_per_mdl = s->mdl_size / s->buf_size;
  663. if (s->mdl_size % s->buf_size)
  664. s->bufs_per_mdl++;
  665. break;
  666. case CX18_ENC_STREAM_TYPE_VBI:
  667. s->bufs_per_mdl = 1;
  668. if (cx18_raw_vbi(s->cx)) {
  669. s->mdl_size = (s->cx->is_60hz ? 12 : 18)
  670. * 2 * vbi_active_samples;
  671. } else {
  672. /*
  673. * See comment in cx18_vbi_setup() below about the
  674. * extra lines we capture in sliced VBI mode due to
  675. * the lines on which EAV RP codes toggle.
  676. */
  677. s->mdl_size = s->cx->is_60hz
  678. ? (21 - 4 + 1) * 2 * vbi_hblank_samples_60Hz
  679. : (23 - 2 + 1) * 2 * vbi_hblank_samples_50Hz;
  680. }
  681. break;
  682. default:
  683. s->bufs_per_mdl = 1;
  684. s->mdl_size = s->buf_size * s->bufs_per_mdl;
  685. break;
  686. }
  687. cx18_load_queues(s);
  688. }
  689. int cx18_start_v4l2_encode_stream(struct cx18_stream *s)
  690. {
  691. u32 data[MAX_MB_ARGUMENTS];
  692. struct cx18 *cx = s->cx;
  693. int captype = 0;
  694. struct cx18_stream *s_idx;
  695. if (!cx18_stream_enabled(s))
  696. return -EINVAL;
  697. CX18_DEBUG_INFO("Start encoder stream %s\n", s->name);
  698. switch (s->type) {
  699. case CX18_ENC_STREAM_TYPE_MPG:
  700. captype = CAPTURE_CHANNEL_TYPE_MPEG;
  701. cx->mpg_data_received = cx->vbi_data_inserted = 0;
  702. cx->dualwatch_jiffies = jiffies;
  703. cx->dualwatch_stereo_mode = v4l2_ctrl_g_ctrl(cx->cxhdl.audio_mode);
  704. cx->search_pack_header = 0;
  705. break;
  706. case CX18_ENC_STREAM_TYPE_IDX:
  707. captype = CAPTURE_CHANNEL_TYPE_INDEX;
  708. break;
  709. case CX18_ENC_STREAM_TYPE_TS:
  710. captype = CAPTURE_CHANNEL_TYPE_TS;
  711. break;
  712. case CX18_ENC_STREAM_TYPE_YUV:
  713. captype = CAPTURE_CHANNEL_TYPE_YUV;
  714. break;
  715. case CX18_ENC_STREAM_TYPE_PCM:
  716. captype = CAPTURE_CHANNEL_TYPE_PCM;
  717. break;
  718. case CX18_ENC_STREAM_TYPE_VBI:
  719. #ifdef CX18_ENCODER_PARSES_SLICED
  720. captype = cx18_raw_vbi(cx) ?
  721. CAPTURE_CHANNEL_TYPE_VBI : CAPTURE_CHANNEL_TYPE_SLICED_VBI;
  722. #else
  723. /*
  724. * Currently we set things up so that Sliced VBI from the
  725. * digitizer is handled as Raw VBI by the encoder
  726. */
  727. captype = CAPTURE_CHANNEL_TYPE_VBI;
  728. #endif
  729. cx->vbi.frame = 0;
  730. cx->vbi.inserted_frame = 0;
  731. memset(cx->vbi.sliced_mpeg_size,
  732. 0, sizeof(cx->vbi.sliced_mpeg_size));
  733. break;
  734. default:
  735. return -EINVAL;
  736. }
  737. /* Clear Streamoff flags in case left from last capture */
  738. clear_bit(CX18_F_S_STREAMOFF, &s->s_flags);
  739. cx18_vapi_result(cx, data, CX18_CREATE_TASK, 1, CPU_CMD_MASK_CAPTURE);
  740. s->handle = data[0];
  741. cx18_vapi(cx, CX18_CPU_SET_CHANNEL_TYPE, 2, s->handle, captype);
  742. /*
  743. * For everything but CAPTURE_CHANNEL_TYPE_TS, play it safe and
  744. * set up all the parameters, as it is not obvious which parameters the
  745. * firmware shares across capture channel types and which it does not.
  746. *
  747. * Some of the cx18_vapi() calls below apply to only certain capture
  748. * channel types. We're hoping there's no harm in calling most of them
  749. * anyway, as long as the values are all consistent. Setting some
  750. * shared parameters will have no effect once an analog capture channel
  751. * has started streaming.
  752. */
  753. if (captype != CAPTURE_CHANNEL_TYPE_TS) {
  754. cx18_vapi(cx, CX18_CPU_SET_VER_CROP_LINE, 2, s->handle, 0);
  755. cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 3, 1);
  756. cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 8, 0);
  757. cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 3, s->handle, 4, 1);
  758. /*
  759. * Audio related reset according to
  760. * Documentation/video4linux/cx2341x/fw-encoder-api.txt
  761. */
  762. if (atomic_read(&cx->ana_capturing) == 0)
  763. cx18_vapi(cx, CX18_CPU_SET_MISC_PARAMETERS, 2,
  764. s->handle, 12);
  765. /*
  766. * Number of lines for Field 1 & Field 2 according to
  767. * Documentation/video4linux/cx2341x/fw-encoder-api.txt
  768. * Field 1 is 312 for 625 line systems in BT.656
  769. * Field 2 is 313 for 625 line systems in BT.656
  770. */
  771. cx18_vapi(cx, CX18_CPU_SET_CAPTURE_LINE_NO, 3,
  772. s->handle, 312, 313);
  773. if (cx->v4l2_cap & V4L2_CAP_VBI_CAPTURE)
  774. cx18_vbi_setup(s);
  775. /*
  776. * Select to receive I, P, and B frame index entries, if the
  777. * index stream is enabled. Otherwise disable index entry
  778. * generation.
  779. */
  780. s_idx = &cx->streams[CX18_ENC_STREAM_TYPE_IDX];
  781. cx18_vapi_result(cx, data, CX18_CPU_SET_INDEXTABLE, 2,
  782. s->handle, cx18_stream_enabled(s_idx) ? 7 : 0);
  783. /* Call out to the common CX2341x API setup for user controls */
  784. cx->cxhdl.priv = s;
  785. cx2341x_handler_setup(&cx->cxhdl);
  786. /*
  787. * When starting a capture and we're set for radio,
  788. * ensure the video is muted, despite the user control.
  789. */
  790. if (!cx->cxhdl.video_mute &&
  791. test_bit(CX18_F_I_RADIO_USER, &cx->i_flags))
  792. cx18_vapi(cx, CX18_CPU_SET_VIDEO_MUTE, 2, s->handle,
  793. (v4l2_ctrl_g_ctrl(cx->cxhdl.video_mute_yuv) << 8) | 1);
  794. /* Enable the Video Format Converter for UYVY 4:2:2 support,
  795. * rather than the default HM12 Macroblovk 4:2:0 support.
  796. */
  797. if (captype == CAPTURE_CHANNEL_TYPE_YUV) {
  798. if (s->pixelformat == V4L2_PIX_FMT_UYVY)
  799. cx18_vapi(cx, CX18_CPU_SET_VFC_PARAM, 2,
  800. s->handle, 1);
  801. else
  802. /* If in doubt, default to HM12 */
  803. cx18_vapi(cx, CX18_CPU_SET_VFC_PARAM, 2,
  804. s->handle, 0);
  805. }
  806. }
  807. if (atomic_read(&cx->tot_capturing) == 0) {
  808. cx2341x_handler_set_busy(&cx->cxhdl, 1);
  809. clear_bit(CX18_F_I_EOS, &cx->i_flags);
  810. cx18_write_reg(cx, 7, CX18_DSP0_INTERRUPT_MASK);
  811. }
  812. cx18_vapi(cx, CX18_CPU_DE_SET_MDL_ACK, 3, s->handle,
  813. (void __iomem *)&cx->scb->cpu_mdl_ack[s->type][0] - cx->enc_mem,
  814. (void __iomem *)&cx->scb->cpu_mdl_ack[s->type][1] - cx->enc_mem);
  815. /* Init all the cpu_mdls for this stream */
  816. cx18_stream_configure_mdls(s);
  817. _cx18_stream_load_fw_queue(s);
  818. /* begin_capture */
  819. if (cx18_vapi(cx, CX18_CPU_CAPTURE_START, 1, s->handle)) {
  820. CX18_DEBUG_WARN("Error starting capture!\n");
  821. /* Ensure we're really not capturing before releasing MDLs */
  822. set_bit(CX18_F_S_STOPPING, &s->s_flags);
  823. if (s->type == CX18_ENC_STREAM_TYPE_MPG)
  824. cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 2, s->handle, 1);
  825. else
  826. cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 1, s->handle);
  827. clear_bit(CX18_F_S_STREAMING, &s->s_flags);
  828. /* FIXME - CX18_F_S_STREAMOFF as well? */
  829. cx18_vapi(cx, CX18_CPU_DE_RELEASE_MDL, 1, s->handle);
  830. cx18_vapi(cx, CX18_DESTROY_TASK, 1, s->handle);
  831. s->handle = CX18_INVALID_TASK_HANDLE;
  832. clear_bit(CX18_F_S_STOPPING, &s->s_flags);
  833. if (atomic_read(&cx->tot_capturing) == 0) {
  834. set_bit(CX18_F_I_EOS, &cx->i_flags);
  835. cx18_write_reg(cx, 5, CX18_DSP0_INTERRUPT_MASK);
  836. }
  837. return -EINVAL;
  838. }
  839. /* you're live! sit back and await interrupts :) */
  840. if (captype != CAPTURE_CHANNEL_TYPE_TS)
  841. atomic_inc(&cx->ana_capturing);
  842. atomic_inc(&cx->tot_capturing);
  843. return 0;
  844. }
  845. EXPORT_SYMBOL(cx18_start_v4l2_encode_stream);
  846. void cx18_stop_all_captures(struct cx18 *cx)
  847. {
  848. int i;
  849. for (i = CX18_MAX_STREAMS - 1; i >= 0; i--) {
  850. struct cx18_stream *s = &cx->streams[i];
  851. if (!cx18_stream_enabled(s))
  852. continue;
  853. if (test_bit(CX18_F_S_STREAMING, &s->s_flags))
  854. cx18_stop_v4l2_encode_stream(s, 0);
  855. }
  856. }
  857. int cx18_stop_v4l2_encode_stream(struct cx18_stream *s, int gop_end)
  858. {
  859. struct cx18 *cx = s->cx;
  860. if (!cx18_stream_enabled(s))
  861. return -EINVAL;
  862. /* This function assumes that you are allowed to stop the capture
  863. and that we are actually capturing */
  864. CX18_DEBUG_INFO("Stop Capture\n");
  865. if (atomic_read(&cx->tot_capturing) == 0)
  866. return 0;
  867. set_bit(CX18_F_S_STOPPING, &s->s_flags);
  868. if (s->type == CX18_ENC_STREAM_TYPE_MPG)
  869. cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 2, s->handle, !gop_end);
  870. else
  871. cx18_vapi(cx, CX18_CPU_CAPTURE_STOP, 1, s->handle);
  872. if (s->type == CX18_ENC_STREAM_TYPE_MPG && gop_end) {
  873. CX18_INFO("ignoring gop_end: not (yet?) supported by the firmware\n");
  874. }
  875. if (s->type != CX18_ENC_STREAM_TYPE_TS)
  876. atomic_dec(&cx->ana_capturing);
  877. atomic_dec(&cx->tot_capturing);
  878. /* Clear capture and no-read bits */
  879. clear_bit(CX18_F_S_STREAMING, &s->s_flags);
  880. /* Tell the CX23418 it can't use our buffers anymore */
  881. cx18_vapi(cx, CX18_CPU_DE_RELEASE_MDL, 1, s->handle);
  882. cx18_vapi(cx, CX18_DESTROY_TASK, 1, s->handle);
  883. s->handle = CX18_INVALID_TASK_HANDLE;
  884. clear_bit(CX18_F_S_STOPPING, &s->s_flags);
  885. if (atomic_read(&cx->tot_capturing) > 0)
  886. return 0;
  887. cx2341x_handler_set_busy(&cx->cxhdl, 0);
  888. cx18_write_reg(cx, 5, CX18_DSP0_INTERRUPT_MASK);
  889. wake_up(&s->waitq);
  890. return 0;
  891. }
  892. EXPORT_SYMBOL(cx18_stop_v4l2_encode_stream);
  893. u32 cx18_find_handle(struct cx18 *cx)
  894. {
  895. int i;
  896. /* find first available handle to be used for global settings */
  897. for (i = 0; i < CX18_MAX_STREAMS; i++) {
  898. struct cx18_stream *s = &cx->streams[i];
  899. if (s->video_dev && (s->handle != CX18_INVALID_TASK_HANDLE))
  900. return s->handle;
  901. }
  902. return CX18_INVALID_TASK_HANDLE;
  903. }
  904. struct cx18_stream *cx18_handle_to_stream(struct cx18 *cx, u32 handle)
  905. {
  906. int i;
  907. struct cx18_stream *s;
  908. if (handle == CX18_INVALID_TASK_HANDLE)
  909. return NULL;
  910. for (i = 0; i < CX18_MAX_STREAMS; i++) {
  911. s = &cx->streams[i];
  912. if (s->handle != handle)
  913. continue;
  914. if (cx18_stream_enabled(s))
  915. return s;
  916. }
  917. return NULL;
  918. }