vmwgfx_execbuf.c 79 KB

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  1. /**************************************************************************
  2. *
  3. * Copyright © 2009 VMware, Inc., Palo Alto, CA., USA
  4. * All Rights Reserved.
  5. *
  6. * Permission is hereby granted, free of charge, to any person obtaining a
  7. * copy of this software and associated documentation files (the
  8. * "Software"), to deal in the Software without restriction, including
  9. * without limitation the rights to use, copy, modify, merge, publish,
  10. * distribute, sub license, and/or sell copies of the Software, and to
  11. * permit persons to whom the Software is furnished to do so, subject to
  12. * the following conditions:
  13. *
  14. * The above copyright notice and this permission notice (including the
  15. * next paragraph) shall be included in all copies or substantial portions
  16. * of the Software.
  17. *
  18. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20. * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  21. * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  22. * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  23. * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  24. * USE OR OTHER DEALINGS IN THE SOFTWARE.
  25. *
  26. **************************************************************************/
  27. #include "vmwgfx_drv.h"
  28. #include "vmwgfx_reg.h"
  29. #include <drm/ttm/ttm_bo_api.h>
  30. #include <drm/ttm/ttm_placement.h>
  31. #define VMW_RES_HT_ORDER 12
  32. /**
  33. * struct vmw_resource_relocation - Relocation info for resources
  34. *
  35. * @head: List head for the software context's relocation list.
  36. * @res: Non-ref-counted pointer to the resource.
  37. * @offset: Offset of 4 byte entries into the command buffer where the
  38. * id that needs fixup is located.
  39. */
  40. struct vmw_resource_relocation {
  41. struct list_head head;
  42. const struct vmw_resource *res;
  43. unsigned long offset;
  44. };
  45. /**
  46. * struct vmw_resource_val_node - Validation info for resources
  47. *
  48. * @head: List head for the software context's resource list.
  49. * @hash: Hash entry for quick resouce to val_node lookup.
  50. * @res: Ref-counted pointer to the resource.
  51. * @switch_backup: Boolean whether to switch backup buffer on unreserve.
  52. * @new_backup: Refcounted pointer to the new backup buffer.
  53. * @staged_bindings: If @res is a context, tracks bindings set up during
  54. * the command batch. Otherwise NULL.
  55. * @new_backup_offset: New backup buffer offset if @new_backup is non-NUll.
  56. * @first_usage: Set to true the first time the resource is referenced in
  57. * the command stream.
  58. * @no_buffer_needed: Resources do not need to allocate buffer backup on
  59. * reservation. The command stream will provide one.
  60. */
  61. struct vmw_resource_val_node {
  62. struct list_head head;
  63. struct drm_hash_item hash;
  64. struct vmw_resource *res;
  65. struct vmw_dma_buffer *new_backup;
  66. struct vmw_ctx_binding_state *staged_bindings;
  67. unsigned long new_backup_offset;
  68. bool first_usage;
  69. bool no_buffer_needed;
  70. };
  71. /**
  72. * struct vmw_cmd_entry - Describe a command for the verifier
  73. *
  74. * @user_allow: Whether allowed from the execbuf ioctl.
  75. * @gb_disable: Whether disabled if guest-backed objects are available.
  76. * @gb_enable: Whether enabled iff guest-backed objects are available.
  77. */
  78. struct vmw_cmd_entry {
  79. int (*func) (struct vmw_private *, struct vmw_sw_context *,
  80. SVGA3dCmdHeader *);
  81. bool user_allow;
  82. bool gb_disable;
  83. bool gb_enable;
  84. };
  85. #define VMW_CMD_DEF(_cmd, _func, _user_allow, _gb_disable, _gb_enable) \
  86. [(_cmd) - SVGA_3D_CMD_BASE] = {(_func), (_user_allow),\
  87. (_gb_disable), (_gb_enable)}
  88. /**
  89. * vmw_resource_unreserve - unreserve resources previously reserved for
  90. * command submission.
  91. *
  92. * @list_head: list of resources to unreserve.
  93. * @backoff: Whether command submission failed.
  94. */
  95. static void vmw_resource_list_unreserve(struct list_head *list,
  96. bool backoff)
  97. {
  98. struct vmw_resource_val_node *val;
  99. list_for_each_entry(val, list, head) {
  100. struct vmw_resource *res = val->res;
  101. struct vmw_dma_buffer *new_backup =
  102. backoff ? NULL : val->new_backup;
  103. /*
  104. * Transfer staged context bindings to the
  105. * persistent context binding tracker.
  106. */
  107. if (unlikely(val->staged_bindings)) {
  108. if (!backoff) {
  109. vmw_context_binding_state_transfer
  110. (val->res, val->staged_bindings);
  111. }
  112. kfree(val->staged_bindings);
  113. val->staged_bindings = NULL;
  114. }
  115. vmw_resource_unreserve(res, new_backup,
  116. val->new_backup_offset);
  117. vmw_dmabuf_unreference(&val->new_backup);
  118. }
  119. }
  120. /**
  121. * vmw_resource_val_add - Add a resource to the software context's
  122. * resource list if it's not already on it.
  123. *
  124. * @sw_context: Pointer to the software context.
  125. * @res: Pointer to the resource.
  126. * @p_node On successful return points to a valid pointer to a
  127. * struct vmw_resource_val_node, if non-NULL on entry.
  128. */
  129. static int vmw_resource_val_add(struct vmw_sw_context *sw_context,
  130. struct vmw_resource *res,
  131. struct vmw_resource_val_node **p_node)
  132. {
  133. struct vmw_resource_val_node *node;
  134. struct drm_hash_item *hash;
  135. int ret;
  136. if (likely(drm_ht_find_item(&sw_context->res_ht, (unsigned long) res,
  137. &hash) == 0)) {
  138. node = container_of(hash, struct vmw_resource_val_node, hash);
  139. node->first_usage = false;
  140. if (unlikely(p_node != NULL))
  141. *p_node = node;
  142. return 0;
  143. }
  144. node = kzalloc(sizeof(*node), GFP_KERNEL);
  145. if (unlikely(node == NULL)) {
  146. DRM_ERROR("Failed to allocate a resource validation "
  147. "entry.\n");
  148. return -ENOMEM;
  149. }
  150. node->hash.key = (unsigned long) res;
  151. ret = drm_ht_insert_item(&sw_context->res_ht, &node->hash);
  152. if (unlikely(ret != 0)) {
  153. DRM_ERROR("Failed to initialize a resource validation "
  154. "entry.\n");
  155. kfree(node);
  156. return ret;
  157. }
  158. list_add_tail(&node->head, &sw_context->resource_list);
  159. node->res = vmw_resource_reference(res);
  160. node->first_usage = true;
  161. if (unlikely(p_node != NULL))
  162. *p_node = node;
  163. return 0;
  164. }
  165. /**
  166. * vmw_resource_context_res_add - Put resources previously bound to a context on
  167. * the validation list
  168. *
  169. * @dev_priv: Pointer to a device private structure
  170. * @sw_context: Pointer to a software context used for this command submission
  171. * @ctx: Pointer to the context resource
  172. *
  173. * This function puts all resources that were previously bound to @ctx on
  174. * the resource validation list. This is part of the context state reemission
  175. */
  176. static int vmw_resource_context_res_add(struct vmw_private *dev_priv,
  177. struct vmw_sw_context *sw_context,
  178. struct vmw_resource *ctx)
  179. {
  180. struct list_head *binding_list;
  181. struct vmw_ctx_binding *entry;
  182. int ret = 0;
  183. struct vmw_resource *res;
  184. mutex_lock(&dev_priv->binding_mutex);
  185. binding_list = vmw_context_binding_list(ctx);
  186. list_for_each_entry(entry, binding_list, ctx_list) {
  187. res = vmw_resource_reference_unless_doomed(entry->bi.res);
  188. if (unlikely(res == NULL))
  189. continue;
  190. ret = vmw_resource_val_add(sw_context, entry->bi.res, NULL);
  191. vmw_resource_unreference(&res);
  192. if (unlikely(ret != 0))
  193. break;
  194. }
  195. mutex_unlock(&dev_priv->binding_mutex);
  196. return ret;
  197. }
  198. /**
  199. * vmw_resource_relocation_add - Add a relocation to the relocation list
  200. *
  201. * @list: Pointer to head of relocation list.
  202. * @res: The resource.
  203. * @offset: Offset into the command buffer currently being parsed where the
  204. * id that needs fixup is located. Granularity is 4 bytes.
  205. */
  206. static int vmw_resource_relocation_add(struct list_head *list,
  207. const struct vmw_resource *res,
  208. unsigned long offset)
  209. {
  210. struct vmw_resource_relocation *rel;
  211. rel = kmalloc(sizeof(*rel), GFP_KERNEL);
  212. if (unlikely(rel == NULL)) {
  213. DRM_ERROR("Failed to allocate a resource relocation.\n");
  214. return -ENOMEM;
  215. }
  216. rel->res = res;
  217. rel->offset = offset;
  218. list_add_tail(&rel->head, list);
  219. return 0;
  220. }
  221. /**
  222. * vmw_resource_relocations_free - Free all relocations on a list
  223. *
  224. * @list: Pointer to the head of the relocation list.
  225. */
  226. static void vmw_resource_relocations_free(struct list_head *list)
  227. {
  228. struct vmw_resource_relocation *rel, *n;
  229. list_for_each_entry_safe(rel, n, list, head) {
  230. list_del(&rel->head);
  231. kfree(rel);
  232. }
  233. }
  234. /**
  235. * vmw_resource_relocations_apply - Apply all relocations on a list
  236. *
  237. * @cb: Pointer to the start of the command buffer bein patch. This need
  238. * not be the same buffer as the one being parsed when the relocation
  239. * list was built, but the contents must be the same modulo the
  240. * resource ids.
  241. * @list: Pointer to the head of the relocation list.
  242. */
  243. static void vmw_resource_relocations_apply(uint32_t *cb,
  244. struct list_head *list)
  245. {
  246. struct vmw_resource_relocation *rel;
  247. list_for_each_entry(rel, list, head) {
  248. if (likely(rel->res != NULL))
  249. cb[rel->offset] = rel->res->id;
  250. else
  251. cb[rel->offset] = SVGA_3D_CMD_NOP;
  252. }
  253. }
  254. static int vmw_cmd_invalid(struct vmw_private *dev_priv,
  255. struct vmw_sw_context *sw_context,
  256. SVGA3dCmdHeader *header)
  257. {
  258. return capable(CAP_SYS_ADMIN) ? : -EINVAL;
  259. }
  260. static int vmw_cmd_ok(struct vmw_private *dev_priv,
  261. struct vmw_sw_context *sw_context,
  262. SVGA3dCmdHeader *header)
  263. {
  264. return 0;
  265. }
  266. /**
  267. * vmw_bo_to_validate_list - add a bo to a validate list
  268. *
  269. * @sw_context: The software context used for this command submission batch.
  270. * @bo: The buffer object to add.
  271. * @validate_as_mob: Validate this buffer as a MOB.
  272. * @p_val_node: If non-NULL Will be updated with the validate node number
  273. * on return.
  274. *
  275. * Returns -EINVAL if the limit of number of buffer objects per command
  276. * submission is reached.
  277. */
  278. static int vmw_bo_to_validate_list(struct vmw_sw_context *sw_context,
  279. struct ttm_buffer_object *bo,
  280. bool validate_as_mob,
  281. uint32_t *p_val_node)
  282. {
  283. uint32_t val_node;
  284. struct vmw_validate_buffer *vval_buf;
  285. struct ttm_validate_buffer *val_buf;
  286. struct drm_hash_item *hash;
  287. int ret;
  288. if (likely(drm_ht_find_item(&sw_context->res_ht, (unsigned long) bo,
  289. &hash) == 0)) {
  290. vval_buf = container_of(hash, struct vmw_validate_buffer,
  291. hash);
  292. if (unlikely(vval_buf->validate_as_mob != validate_as_mob)) {
  293. DRM_ERROR("Inconsistent buffer usage.\n");
  294. return -EINVAL;
  295. }
  296. val_buf = &vval_buf->base;
  297. val_node = vval_buf - sw_context->val_bufs;
  298. } else {
  299. val_node = sw_context->cur_val_buf;
  300. if (unlikely(val_node >= VMWGFX_MAX_VALIDATIONS)) {
  301. DRM_ERROR("Max number of DMA buffers per submission "
  302. "exceeded.\n");
  303. return -EINVAL;
  304. }
  305. vval_buf = &sw_context->val_bufs[val_node];
  306. vval_buf->hash.key = (unsigned long) bo;
  307. ret = drm_ht_insert_item(&sw_context->res_ht, &vval_buf->hash);
  308. if (unlikely(ret != 0)) {
  309. DRM_ERROR("Failed to initialize a buffer validation "
  310. "entry.\n");
  311. return ret;
  312. }
  313. ++sw_context->cur_val_buf;
  314. val_buf = &vval_buf->base;
  315. val_buf->bo = ttm_bo_reference(bo);
  316. val_buf->shared = false;
  317. list_add_tail(&val_buf->head, &sw_context->validate_nodes);
  318. vval_buf->validate_as_mob = validate_as_mob;
  319. }
  320. if (p_val_node)
  321. *p_val_node = val_node;
  322. return 0;
  323. }
  324. /**
  325. * vmw_resources_reserve - Reserve all resources on the sw_context's
  326. * resource list.
  327. *
  328. * @sw_context: Pointer to the software context.
  329. *
  330. * Note that since vmware's command submission currently is protected by
  331. * the cmdbuf mutex, no fancy deadlock avoidance is required for resources,
  332. * since only a single thread at once will attempt this.
  333. */
  334. static int vmw_resources_reserve(struct vmw_sw_context *sw_context)
  335. {
  336. struct vmw_resource_val_node *val;
  337. int ret;
  338. list_for_each_entry(val, &sw_context->resource_list, head) {
  339. struct vmw_resource *res = val->res;
  340. ret = vmw_resource_reserve(res, val->no_buffer_needed);
  341. if (unlikely(ret != 0))
  342. return ret;
  343. if (res->backup) {
  344. struct ttm_buffer_object *bo = &res->backup->base;
  345. ret = vmw_bo_to_validate_list
  346. (sw_context, bo,
  347. vmw_resource_needs_backup(res), NULL);
  348. if (unlikely(ret != 0))
  349. return ret;
  350. }
  351. }
  352. return 0;
  353. }
  354. /**
  355. * vmw_resources_validate - Validate all resources on the sw_context's
  356. * resource list.
  357. *
  358. * @sw_context: Pointer to the software context.
  359. *
  360. * Before this function is called, all resource backup buffers must have
  361. * been validated.
  362. */
  363. static int vmw_resources_validate(struct vmw_sw_context *sw_context)
  364. {
  365. struct vmw_resource_val_node *val;
  366. int ret;
  367. list_for_each_entry(val, &sw_context->resource_list, head) {
  368. struct vmw_resource *res = val->res;
  369. ret = vmw_resource_validate(res);
  370. if (unlikely(ret != 0)) {
  371. if (ret != -ERESTARTSYS)
  372. DRM_ERROR("Failed to validate resource.\n");
  373. return ret;
  374. }
  375. }
  376. return 0;
  377. }
  378. /**
  379. * vmw_cmd_res_reloc_add - Add a resource to a software context's
  380. * relocation- and validation lists.
  381. *
  382. * @dev_priv: Pointer to a struct vmw_private identifying the device.
  383. * @sw_context: Pointer to the software context.
  384. * @res_type: Resource type.
  385. * @id_loc: Pointer to where the id that needs translation is located.
  386. * @res: Valid pointer to a struct vmw_resource.
  387. * @p_val: If non null, a pointer to the struct vmw_resource_validate_node
  388. * used for this resource is returned here.
  389. */
  390. static int vmw_cmd_res_reloc_add(struct vmw_private *dev_priv,
  391. struct vmw_sw_context *sw_context,
  392. enum vmw_res_type res_type,
  393. uint32_t *id_loc,
  394. struct vmw_resource *res,
  395. struct vmw_resource_val_node **p_val)
  396. {
  397. int ret;
  398. struct vmw_resource_val_node *node;
  399. *p_val = NULL;
  400. ret = vmw_resource_relocation_add(&sw_context->res_relocations,
  401. res,
  402. id_loc - sw_context->buf_start);
  403. if (unlikely(ret != 0))
  404. return ret;
  405. ret = vmw_resource_val_add(sw_context, res, &node);
  406. if (unlikely(ret != 0))
  407. return ret;
  408. if (res_type == vmw_res_context && dev_priv->has_mob &&
  409. node->first_usage) {
  410. /*
  411. * Put contexts first on the list to be able to exit
  412. * list traversal for contexts early.
  413. */
  414. list_del(&node->head);
  415. list_add(&node->head, &sw_context->resource_list);
  416. ret = vmw_resource_context_res_add(dev_priv, sw_context, res);
  417. if (unlikely(ret != 0))
  418. return ret;
  419. node->staged_bindings =
  420. kzalloc(sizeof(*node->staged_bindings), GFP_KERNEL);
  421. if (node->staged_bindings == NULL) {
  422. DRM_ERROR("Failed to allocate context binding "
  423. "information.\n");
  424. return -ENOMEM;
  425. }
  426. INIT_LIST_HEAD(&node->staged_bindings->list);
  427. }
  428. if (p_val)
  429. *p_val = node;
  430. return 0;
  431. }
  432. /**
  433. * vmw_cmd_res_check - Check that a resource is present and if so, put it
  434. * on the resource validate list unless it's already there.
  435. *
  436. * @dev_priv: Pointer to a device private structure.
  437. * @sw_context: Pointer to the software context.
  438. * @res_type: Resource type.
  439. * @converter: User-space visisble type specific information.
  440. * @id_loc: Pointer to the location in the command buffer currently being
  441. * parsed from where the user-space resource id handle is located.
  442. * @p_val: Pointer to pointer to resource validalidation node. Populated
  443. * on exit.
  444. */
  445. static int
  446. vmw_cmd_res_check(struct vmw_private *dev_priv,
  447. struct vmw_sw_context *sw_context,
  448. enum vmw_res_type res_type,
  449. const struct vmw_user_resource_conv *converter,
  450. uint32_t *id_loc,
  451. struct vmw_resource_val_node **p_val)
  452. {
  453. struct vmw_res_cache_entry *rcache =
  454. &sw_context->res_cache[res_type];
  455. struct vmw_resource *res;
  456. struct vmw_resource_val_node *node;
  457. int ret;
  458. if (*id_loc == SVGA3D_INVALID_ID) {
  459. if (p_val)
  460. *p_val = NULL;
  461. if (res_type == vmw_res_context) {
  462. DRM_ERROR("Illegal context invalid id.\n");
  463. return -EINVAL;
  464. }
  465. return 0;
  466. }
  467. /*
  468. * Fastpath in case of repeated commands referencing the same
  469. * resource
  470. */
  471. if (likely(rcache->valid && *id_loc == rcache->handle)) {
  472. const struct vmw_resource *res = rcache->res;
  473. rcache->node->first_usage = false;
  474. if (p_val)
  475. *p_val = rcache->node;
  476. return vmw_resource_relocation_add
  477. (&sw_context->res_relocations, res,
  478. id_loc - sw_context->buf_start);
  479. }
  480. ret = vmw_user_resource_lookup_handle(dev_priv,
  481. sw_context->fp->tfile,
  482. *id_loc,
  483. converter,
  484. &res);
  485. if (unlikely(ret != 0)) {
  486. DRM_ERROR("Could not find or use resource 0x%08x.\n",
  487. (unsigned) *id_loc);
  488. dump_stack();
  489. return ret;
  490. }
  491. rcache->valid = true;
  492. rcache->res = res;
  493. rcache->handle = *id_loc;
  494. ret = vmw_cmd_res_reloc_add(dev_priv, sw_context, res_type, id_loc,
  495. res, &node);
  496. if (unlikely(ret != 0))
  497. goto out_no_reloc;
  498. rcache->node = node;
  499. if (p_val)
  500. *p_val = node;
  501. vmw_resource_unreference(&res);
  502. return 0;
  503. out_no_reloc:
  504. BUG_ON(sw_context->error_resource != NULL);
  505. sw_context->error_resource = res;
  506. return ret;
  507. }
  508. /**
  509. * vmw_rebind_contexts - Rebind all resources previously bound to
  510. * referenced contexts.
  511. *
  512. * @sw_context: Pointer to the software context.
  513. *
  514. * Rebind context binding points that have been scrubbed because of eviction.
  515. */
  516. static int vmw_rebind_contexts(struct vmw_sw_context *sw_context)
  517. {
  518. struct vmw_resource_val_node *val;
  519. int ret;
  520. list_for_each_entry(val, &sw_context->resource_list, head) {
  521. if (unlikely(!val->staged_bindings))
  522. break;
  523. ret = vmw_context_rebind_all(val->res);
  524. if (unlikely(ret != 0)) {
  525. if (ret != -ERESTARTSYS)
  526. DRM_ERROR("Failed to rebind context.\n");
  527. return ret;
  528. }
  529. }
  530. return 0;
  531. }
  532. /**
  533. * vmw_cmd_cid_check - Check a command header for valid context information.
  534. *
  535. * @dev_priv: Pointer to a device private structure.
  536. * @sw_context: Pointer to the software context.
  537. * @header: A command header with an embedded user-space context handle.
  538. *
  539. * Convenience function: Call vmw_cmd_res_check with the user-space context
  540. * handle embedded in @header.
  541. */
  542. static int vmw_cmd_cid_check(struct vmw_private *dev_priv,
  543. struct vmw_sw_context *sw_context,
  544. SVGA3dCmdHeader *header)
  545. {
  546. struct vmw_cid_cmd {
  547. SVGA3dCmdHeader header;
  548. uint32_t cid;
  549. } *cmd;
  550. cmd = container_of(header, struct vmw_cid_cmd, header);
  551. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  552. user_context_converter, &cmd->cid, NULL);
  553. }
  554. static int vmw_cmd_set_render_target_check(struct vmw_private *dev_priv,
  555. struct vmw_sw_context *sw_context,
  556. SVGA3dCmdHeader *header)
  557. {
  558. struct vmw_sid_cmd {
  559. SVGA3dCmdHeader header;
  560. SVGA3dCmdSetRenderTarget body;
  561. } *cmd;
  562. struct vmw_resource_val_node *ctx_node;
  563. struct vmw_resource_val_node *res_node;
  564. int ret;
  565. cmd = container_of(header, struct vmw_sid_cmd, header);
  566. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  567. user_context_converter, &cmd->body.cid,
  568. &ctx_node);
  569. if (unlikely(ret != 0))
  570. return ret;
  571. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  572. user_surface_converter,
  573. &cmd->body.target.sid, &res_node);
  574. if (unlikely(ret != 0))
  575. return ret;
  576. if (dev_priv->has_mob) {
  577. struct vmw_ctx_bindinfo bi;
  578. bi.ctx = ctx_node->res;
  579. bi.res = res_node ? res_node->res : NULL;
  580. bi.bt = vmw_ctx_binding_rt;
  581. bi.i1.rt_type = cmd->body.type;
  582. return vmw_context_binding_add(ctx_node->staged_bindings, &bi);
  583. }
  584. return 0;
  585. }
  586. static int vmw_cmd_surface_copy_check(struct vmw_private *dev_priv,
  587. struct vmw_sw_context *sw_context,
  588. SVGA3dCmdHeader *header)
  589. {
  590. struct vmw_sid_cmd {
  591. SVGA3dCmdHeader header;
  592. SVGA3dCmdSurfaceCopy body;
  593. } *cmd;
  594. int ret;
  595. cmd = container_of(header, struct vmw_sid_cmd, header);
  596. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  597. user_surface_converter,
  598. &cmd->body.src.sid, NULL);
  599. if (unlikely(ret != 0))
  600. return ret;
  601. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  602. user_surface_converter,
  603. &cmd->body.dest.sid, NULL);
  604. }
  605. static int vmw_cmd_stretch_blt_check(struct vmw_private *dev_priv,
  606. struct vmw_sw_context *sw_context,
  607. SVGA3dCmdHeader *header)
  608. {
  609. struct vmw_sid_cmd {
  610. SVGA3dCmdHeader header;
  611. SVGA3dCmdSurfaceStretchBlt body;
  612. } *cmd;
  613. int ret;
  614. cmd = container_of(header, struct vmw_sid_cmd, header);
  615. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  616. user_surface_converter,
  617. &cmd->body.src.sid, NULL);
  618. if (unlikely(ret != 0))
  619. return ret;
  620. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  621. user_surface_converter,
  622. &cmd->body.dest.sid, NULL);
  623. }
  624. static int vmw_cmd_blt_surf_screen_check(struct vmw_private *dev_priv,
  625. struct vmw_sw_context *sw_context,
  626. SVGA3dCmdHeader *header)
  627. {
  628. struct vmw_sid_cmd {
  629. SVGA3dCmdHeader header;
  630. SVGA3dCmdBlitSurfaceToScreen body;
  631. } *cmd;
  632. cmd = container_of(header, struct vmw_sid_cmd, header);
  633. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  634. user_surface_converter,
  635. &cmd->body.srcImage.sid, NULL);
  636. }
  637. static int vmw_cmd_present_check(struct vmw_private *dev_priv,
  638. struct vmw_sw_context *sw_context,
  639. SVGA3dCmdHeader *header)
  640. {
  641. struct vmw_sid_cmd {
  642. SVGA3dCmdHeader header;
  643. SVGA3dCmdPresent body;
  644. } *cmd;
  645. cmd = container_of(header, struct vmw_sid_cmd, header);
  646. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  647. user_surface_converter, &cmd->body.sid,
  648. NULL);
  649. }
  650. /**
  651. * vmw_query_bo_switch_prepare - Prepare to switch pinned buffer for queries.
  652. *
  653. * @dev_priv: The device private structure.
  654. * @new_query_bo: The new buffer holding query results.
  655. * @sw_context: The software context used for this command submission.
  656. *
  657. * This function checks whether @new_query_bo is suitable for holding
  658. * query results, and if another buffer currently is pinned for query
  659. * results. If so, the function prepares the state of @sw_context for
  660. * switching pinned buffers after successful submission of the current
  661. * command batch.
  662. */
  663. static int vmw_query_bo_switch_prepare(struct vmw_private *dev_priv,
  664. struct ttm_buffer_object *new_query_bo,
  665. struct vmw_sw_context *sw_context)
  666. {
  667. struct vmw_res_cache_entry *ctx_entry =
  668. &sw_context->res_cache[vmw_res_context];
  669. int ret;
  670. BUG_ON(!ctx_entry->valid);
  671. sw_context->last_query_ctx = ctx_entry->res;
  672. if (unlikely(new_query_bo != sw_context->cur_query_bo)) {
  673. if (unlikely(new_query_bo->num_pages > 4)) {
  674. DRM_ERROR("Query buffer too large.\n");
  675. return -EINVAL;
  676. }
  677. if (unlikely(sw_context->cur_query_bo != NULL)) {
  678. sw_context->needs_post_query_barrier = true;
  679. ret = vmw_bo_to_validate_list(sw_context,
  680. sw_context->cur_query_bo,
  681. dev_priv->has_mob, NULL);
  682. if (unlikely(ret != 0))
  683. return ret;
  684. }
  685. sw_context->cur_query_bo = new_query_bo;
  686. ret = vmw_bo_to_validate_list(sw_context,
  687. dev_priv->dummy_query_bo,
  688. dev_priv->has_mob, NULL);
  689. if (unlikely(ret != 0))
  690. return ret;
  691. }
  692. return 0;
  693. }
  694. /**
  695. * vmw_query_bo_switch_commit - Finalize switching pinned query buffer
  696. *
  697. * @dev_priv: The device private structure.
  698. * @sw_context: The software context used for this command submission batch.
  699. *
  700. * This function will check if we're switching query buffers, and will then,
  701. * issue a dummy occlusion query wait used as a query barrier. When the fence
  702. * object following that query wait has signaled, we are sure that all
  703. * preceding queries have finished, and the old query buffer can be unpinned.
  704. * However, since both the new query buffer and the old one are fenced with
  705. * that fence, we can do an asynchronus unpin now, and be sure that the
  706. * old query buffer won't be moved until the fence has signaled.
  707. *
  708. * As mentioned above, both the new - and old query buffers need to be fenced
  709. * using a sequence emitted *after* calling this function.
  710. */
  711. static void vmw_query_bo_switch_commit(struct vmw_private *dev_priv,
  712. struct vmw_sw_context *sw_context)
  713. {
  714. /*
  715. * The validate list should still hold references to all
  716. * contexts here.
  717. */
  718. if (sw_context->needs_post_query_barrier) {
  719. struct vmw_res_cache_entry *ctx_entry =
  720. &sw_context->res_cache[vmw_res_context];
  721. struct vmw_resource *ctx;
  722. int ret;
  723. BUG_ON(!ctx_entry->valid);
  724. ctx = ctx_entry->res;
  725. ret = vmw_fifo_emit_dummy_query(dev_priv, ctx->id);
  726. if (unlikely(ret != 0))
  727. DRM_ERROR("Out of fifo space for dummy query.\n");
  728. }
  729. if (dev_priv->pinned_bo != sw_context->cur_query_bo) {
  730. if (dev_priv->pinned_bo) {
  731. vmw_bo_pin(dev_priv->pinned_bo, false);
  732. ttm_bo_unref(&dev_priv->pinned_bo);
  733. }
  734. if (!sw_context->needs_post_query_barrier) {
  735. vmw_bo_pin(sw_context->cur_query_bo, true);
  736. /*
  737. * We pin also the dummy_query_bo buffer so that we
  738. * don't need to validate it when emitting
  739. * dummy queries in context destroy paths.
  740. */
  741. vmw_bo_pin(dev_priv->dummy_query_bo, true);
  742. dev_priv->dummy_query_bo_pinned = true;
  743. BUG_ON(sw_context->last_query_ctx == NULL);
  744. dev_priv->query_cid = sw_context->last_query_ctx->id;
  745. dev_priv->query_cid_valid = true;
  746. dev_priv->pinned_bo =
  747. ttm_bo_reference(sw_context->cur_query_bo);
  748. }
  749. }
  750. }
  751. /**
  752. * vmw_translate_mob_pointer - Prepare to translate a user-space buffer
  753. * handle to a MOB id.
  754. *
  755. * @dev_priv: Pointer to a device private structure.
  756. * @sw_context: The software context used for this command batch validation.
  757. * @id: Pointer to the user-space handle to be translated.
  758. * @vmw_bo_p: Points to a location that, on successful return will carry
  759. * a reference-counted pointer to the DMA buffer identified by the
  760. * user-space handle in @id.
  761. *
  762. * This function saves information needed to translate a user-space buffer
  763. * handle to a MOB id. The translation does not take place immediately, but
  764. * during a call to vmw_apply_relocations(). This function builds a relocation
  765. * list and a list of buffers to validate. The former needs to be freed using
  766. * either vmw_apply_relocations() or vmw_free_relocations(). The latter
  767. * needs to be freed using vmw_clear_validations.
  768. */
  769. static int vmw_translate_mob_ptr(struct vmw_private *dev_priv,
  770. struct vmw_sw_context *sw_context,
  771. SVGAMobId *id,
  772. struct vmw_dma_buffer **vmw_bo_p)
  773. {
  774. struct vmw_dma_buffer *vmw_bo = NULL;
  775. struct ttm_buffer_object *bo;
  776. uint32_t handle = *id;
  777. struct vmw_relocation *reloc;
  778. int ret;
  779. ret = vmw_user_dmabuf_lookup(sw_context->fp->tfile, handle, &vmw_bo);
  780. if (unlikely(ret != 0)) {
  781. DRM_ERROR("Could not find or use MOB buffer.\n");
  782. return -EINVAL;
  783. }
  784. bo = &vmw_bo->base;
  785. if (unlikely(sw_context->cur_reloc >= VMWGFX_MAX_RELOCATIONS)) {
  786. DRM_ERROR("Max number relocations per submission"
  787. " exceeded\n");
  788. ret = -EINVAL;
  789. goto out_no_reloc;
  790. }
  791. reloc = &sw_context->relocs[sw_context->cur_reloc++];
  792. reloc->mob_loc = id;
  793. reloc->location = NULL;
  794. ret = vmw_bo_to_validate_list(sw_context, bo, true, &reloc->index);
  795. if (unlikely(ret != 0))
  796. goto out_no_reloc;
  797. *vmw_bo_p = vmw_bo;
  798. return 0;
  799. out_no_reloc:
  800. vmw_dmabuf_unreference(&vmw_bo);
  801. vmw_bo_p = NULL;
  802. return ret;
  803. }
  804. /**
  805. * vmw_translate_guest_pointer - Prepare to translate a user-space buffer
  806. * handle to a valid SVGAGuestPtr
  807. *
  808. * @dev_priv: Pointer to a device private structure.
  809. * @sw_context: The software context used for this command batch validation.
  810. * @ptr: Pointer to the user-space handle to be translated.
  811. * @vmw_bo_p: Points to a location that, on successful return will carry
  812. * a reference-counted pointer to the DMA buffer identified by the
  813. * user-space handle in @id.
  814. *
  815. * This function saves information needed to translate a user-space buffer
  816. * handle to a valid SVGAGuestPtr. The translation does not take place
  817. * immediately, but during a call to vmw_apply_relocations().
  818. * This function builds a relocation list and a list of buffers to validate.
  819. * The former needs to be freed using either vmw_apply_relocations() or
  820. * vmw_free_relocations(). The latter needs to be freed using
  821. * vmw_clear_validations.
  822. */
  823. static int vmw_translate_guest_ptr(struct vmw_private *dev_priv,
  824. struct vmw_sw_context *sw_context,
  825. SVGAGuestPtr *ptr,
  826. struct vmw_dma_buffer **vmw_bo_p)
  827. {
  828. struct vmw_dma_buffer *vmw_bo = NULL;
  829. struct ttm_buffer_object *bo;
  830. uint32_t handle = ptr->gmrId;
  831. struct vmw_relocation *reloc;
  832. int ret;
  833. ret = vmw_user_dmabuf_lookup(sw_context->fp->tfile, handle, &vmw_bo);
  834. if (unlikely(ret != 0)) {
  835. DRM_ERROR("Could not find or use GMR region.\n");
  836. return -EINVAL;
  837. }
  838. bo = &vmw_bo->base;
  839. if (unlikely(sw_context->cur_reloc >= VMWGFX_MAX_RELOCATIONS)) {
  840. DRM_ERROR("Max number relocations per submission"
  841. " exceeded\n");
  842. ret = -EINVAL;
  843. goto out_no_reloc;
  844. }
  845. reloc = &sw_context->relocs[sw_context->cur_reloc++];
  846. reloc->location = ptr;
  847. ret = vmw_bo_to_validate_list(sw_context, bo, false, &reloc->index);
  848. if (unlikely(ret != 0))
  849. goto out_no_reloc;
  850. *vmw_bo_p = vmw_bo;
  851. return 0;
  852. out_no_reloc:
  853. vmw_dmabuf_unreference(&vmw_bo);
  854. vmw_bo_p = NULL;
  855. return ret;
  856. }
  857. /**
  858. * vmw_cmd_begin_gb_query - validate a SVGA_3D_CMD_BEGIN_GB_QUERY command.
  859. *
  860. * @dev_priv: Pointer to a device private struct.
  861. * @sw_context: The software context used for this command submission.
  862. * @header: Pointer to the command header in the command stream.
  863. */
  864. static int vmw_cmd_begin_gb_query(struct vmw_private *dev_priv,
  865. struct vmw_sw_context *sw_context,
  866. SVGA3dCmdHeader *header)
  867. {
  868. struct vmw_begin_gb_query_cmd {
  869. SVGA3dCmdHeader header;
  870. SVGA3dCmdBeginGBQuery q;
  871. } *cmd;
  872. cmd = container_of(header, struct vmw_begin_gb_query_cmd,
  873. header);
  874. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  875. user_context_converter, &cmd->q.cid,
  876. NULL);
  877. }
  878. /**
  879. * vmw_cmd_begin_query - validate a SVGA_3D_CMD_BEGIN_QUERY command.
  880. *
  881. * @dev_priv: Pointer to a device private struct.
  882. * @sw_context: The software context used for this command submission.
  883. * @header: Pointer to the command header in the command stream.
  884. */
  885. static int vmw_cmd_begin_query(struct vmw_private *dev_priv,
  886. struct vmw_sw_context *sw_context,
  887. SVGA3dCmdHeader *header)
  888. {
  889. struct vmw_begin_query_cmd {
  890. SVGA3dCmdHeader header;
  891. SVGA3dCmdBeginQuery q;
  892. } *cmd;
  893. cmd = container_of(header, struct vmw_begin_query_cmd,
  894. header);
  895. if (unlikely(dev_priv->has_mob)) {
  896. struct {
  897. SVGA3dCmdHeader header;
  898. SVGA3dCmdBeginGBQuery q;
  899. } gb_cmd;
  900. BUG_ON(sizeof(gb_cmd) != sizeof(*cmd));
  901. gb_cmd.header.id = SVGA_3D_CMD_BEGIN_GB_QUERY;
  902. gb_cmd.header.size = cmd->header.size;
  903. gb_cmd.q.cid = cmd->q.cid;
  904. gb_cmd.q.type = cmd->q.type;
  905. memcpy(cmd, &gb_cmd, sizeof(*cmd));
  906. return vmw_cmd_begin_gb_query(dev_priv, sw_context, header);
  907. }
  908. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  909. user_context_converter, &cmd->q.cid,
  910. NULL);
  911. }
  912. /**
  913. * vmw_cmd_end_gb_query - validate a SVGA_3D_CMD_END_GB_QUERY command.
  914. *
  915. * @dev_priv: Pointer to a device private struct.
  916. * @sw_context: The software context used for this command submission.
  917. * @header: Pointer to the command header in the command stream.
  918. */
  919. static int vmw_cmd_end_gb_query(struct vmw_private *dev_priv,
  920. struct vmw_sw_context *sw_context,
  921. SVGA3dCmdHeader *header)
  922. {
  923. struct vmw_dma_buffer *vmw_bo;
  924. struct vmw_query_cmd {
  925. SVGA3dCmdHeader header;
  926. SVGA3dCmdEndGBQuery q;
  927. } *cmd;
  928. int ret;
  929. cmd = container_of(header, struct vmw_query_cmd, header);
  930. ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
  931. if (unlikely(ret != 0))
  932. return ret;
  933. ret = vmw_translate_mob_ptr(dev_priv, sw_context,
  934. &cmd->q.mobid,
  935. &vmw_bo);
  936. if (unlikely(ret != 0))
  937. return ret;
  938. ret = vmw_query_bo_switch_prepare(dev_priv, &vmw_bo->base, sw_context);
  939. vmw_dmabuf_unreference(&vmw_bo);
  940. return ret;
  941. }
  942. /**
  943. * vmw_cmd_end_query - validate a SVGA_3D_CMD_END_QUERY command.
  944. *
  945. * @dev_priv: Pointer to a device private struct.
  946. * @sw_context: The software context used for this command submission.
  947. * @header: Pointer to the command header in the command stream.
  948. */
  949. static int vmw_cmd_end_query(struct vmw_private *dev_priv,
  950. struct vmw_sw_context *sw_context,
  951. SVGA3dCmdHeader *header)
  952. {
  953. struct vmw_dma_buffer *vmw_bo;
  954. struct vmw_query_cmd {
  955. SVGA3dCmdHeader header;
  956. SVGA3dCmdEndQuery q;
  957. } *cmd;
  958. int ret;
  959. cmd = container_of(header, struct vmw_query_cmd, header);
  960. if (dev_priv->has_mob) {
  961. struct {
  962. SVGA3dCmdHeader header;
  963. SVGA3dCmdEndGBQuery q;
  964. } gb_cmd;
  965. BUG_ON(sizeof(gb_cmd) != sizeof(*cmd));
  966. gb_cmd.header.id = SVGA_3D_CMD_END_GB_QUERY;
  967. gb_cmd.header.size = cmd->header.size;
  968. gb_cmd.q.cid = cmd->q.cid;
  969. gb_cmd.q.type = cmd->q.type;
  970. gb_cmd.q.mobid = cmd->q.guestResult.gmrId;
  971. gb_cmd.q.offset = cmd->q.guestResult.offset;
  972. memcpy(cmd, &gb_cmd, sizeof(*cmd));
  973. return vmw_cmd_end_gb_query(dev_priv, sw_context, header);
  974. }
  975. ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
  976. if (unlikely(ret != 0))
  977. return ret;
  978. ret = vmw_translate_guest_ptr(dev_priv, sw_context,
  979. &cmd->q.guestResult,
  980. &vmw_bo);
  981. if (unlikely(ret != 0))
  982. return ret;
  983. ret = vmw_query_bo_switch_prepare(dev_priv, &vmw_bo->base, sw_context);
  984. vmw_dmabuf_unreference(&vmw_bo);
  985. return ret;
  986. }
  987. /**
  988. * vmw_cmd_wait_gb_query - validate a SVGA_3D_CMD_WAIT_GB_QUERY command.
  989. *
  990. * @dev_priv: Pointer to a device private struct.
  991. * @sw_context: The software context used for this command submission.
  992. * @header: Pointer to the command header in the command stream.
  993. */
  994. static int vmw_cmd_wait_gb_query(struct vmw_private *dev_priv,
  995. struct vmw_sw_context *sw_context,
  996. SVGA3dCmdHeader *header)
  997. {
  998. struct vmw_dma_buffer *vmw_bo;
  999. struct vmw_query_cmd {
  1000. SVGA3dCmdHeader header;
  1001. SVGA3dCmdWaitForGBQuery q;
  1002. } *cmd;
  1003. int ret;
  1004. cmd = container_of(header, struct vmw_query_cmd, header);
  1005. ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
  1006. if (unlikely(ret != 0))
  1007. return ret;
  1008. ret = vmw_translate_mob_ptr(dev_priv, sw_context,
  1009. &cmd->q.mobid,
  1010. &vmw_bo);
  1011. if (unlikely(ret != 0))
  1012. return ret;
  1013. vmw_dmabuf_unreference(&vmw_bo);
  1014. return 0;
  1015. }
  1016. /**
  1017. * vmw_cmd_wait_query - validate a SVGA_3D_CMD_WAIT_QUERY command.
  1018. *
  1019. * @dev_priv: Pointer to a device private struct.
  1020. * @sw_context: The software context used for this command submission.
  1021. * @header: Pointer to the command header in the command stream.
  1022. */
  1023. static int vmw_cmd_wait_query(struct vmw_private *dev_priv,
  1024. struct vmw_sw_context *sw_context,
  1025. SVGA3dCmdHeader *header)
  1026. {
  1027. struct vmw_dma_buffer *vmw_bo;
  1028. struct vmw_query_cmd {
  1029. SVGA3dCmdHeader header;
  1030. SVGA3dCmdWaitForQuery q;
  1031. } *cmd;
  1032. int ret;
  1033. cmd = container_of(header, struct vmw_query_cmd, header);
  1034. if (dev_priv->has_mob) {
  1035. struct {
  1036. SVGA3dCmdHeader header;
  1037. SVGA3dCmdWaitForGBQuery q;
  1038. } gb_cmd;
  1039. BUG_ON(sizeof(gb_cmd) != sizeof(*cmd));
  1040. gb_cmd.header.id = SVGA_3D_CMD_WAIT_FOR_GB_QUERY;
  1041. gb_cmd.header.size = cmd->header.size;
  1042. gb_cmd.q.cid = cmd->q.cid;
  1043. gb_cmd.q.type = cmd->q.type;
  1044. gb_cmd.q.mobid = cmd->q.guestResult.gmrId;
  1045. gb_cmd.q.offset = cmd->q.guestResult.offset;
  1046. memcpy(cmd, &gb_cmd, sizeof(*cmd));
  1047. return vmw_cmd_wait_gb_query(dev_priv, sw_context, header);
  1048. }
  1049. ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
  1050. if (unlikely(ret != 0))
  1051. return ret;
  1052. ret = vmw_translate_guest_ptr(dev_priv, sw_context,
  1053. &cmd->q.guestResult,
  1054. &vmw_bo);
  1055. if (unlikely(ret != 0))
  1056. return ret;
  1057. vmw_dmabuf_unreference(&vmw_bo);
  1058. return 0;
  1059. }
  1060. static int vmw_cmd_dma(struct vmw_private *dev_priv,
  1061. struct vmw_sw_context *sw_context,
  1062. SVGA3dCmdHeader *header)
  1063. {
  1064. struct vmw_dma_buffer *vmw_bo = NULL;
  1065. struct vmw_surface *srf = NULL;
  1066. struct vmw_dma_cmd {
  1067. SVGA3dCmdHeader header;
  1068. SVGA3dCmdSurfaceDMA dma;
  1069. } *cmd;
  1070. int ret;
  1071. SVGA3dCmdSurfaceDMASuffix *suffix;
  1072. uint32_t bo_size;
  1073. cmd = container_of(header, struct vmw_dma_cmd, header);
  1074. suffix = (SVGA3dCmdSurfaceDMASuffix *)((unsigned long) &cmd->dma +
  1075. header->size - sizeof(*suffix));
  1076. /* Make sure device and verifier stays in sync. */
  1077. if (unlikely(suffix->suffixSize != sizeof(*suffix))) {
  1078. DRM_ERROR("Invalid DMA suffix size.\n");
  1079. return -EINVAL;
  1080. }
  1081. ret = vmw_translate_guest_ptr(dev_priv, sw_context,
  1082. &cmd->dma.guest.ptr,
  1083. &vmw_bo);
  1084. if (unlikely(ret != 0))
  1085. return ret;
  1086. /* Make sure DMA doesn't cross BO boundaries. */
  1087. bo_size = vmw_bo->base.num_pages * PAGE_SIZE;
  1088. if (unlikely(cmd->dma.guest.ptr.offset > bo_size)) {
  1089. DRM_ERROR("Invalid DMA offset.\n");
  1090. return -EINVAL;
  1091. }
  1092. bo_size -= cmd->dma.guest.ptr.offset;
  1093. if (unlikely(suffix->maximumOffset > bo_size))
  1094. suffix->maximumOffset = bo_size;
  1095. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1096. user_surface_converter, &cmd->dma.host.sid,
  1097. NULL);
  1098. if (unlikely(ret != 0)) {
  1099. if (unlikely(ret != -ERESTARTSYS))
  1100. DRM_ERROR("could not find surface for DMA.\n");
  1101. goto out_no_surface;
  1102. }
  1103. srf = vmw_res_to_srf(sw_context->res_cache[vmw_res_surface].res);
  1104. vmw_kms_cursor_snoop(srf, sw_context->fp->tfile, &vmw_bo->base,
  1105. header);
  1106. out_no_surface:
  1107. vmw_dmabuf_unreference(&vmw_bo);
  1108. return ret;
  1109. }
  1110. static int vmw_cmd_draw(struct vmw_private *dev_priv,
  1111. struct vmw_sw_context *sw_context,
  1112. SVGA3dCmdHeader *header)
  1113. {
  1114. struct vmw_draw_cmd {
  1115. SVGA3dCmdHeader header;
  1116. SVGA3dCmdDrawPrimitives body;
  1117. } *cmd;
  1118. SVGA3dVertexDecl *decl = (SVGA3dVertexDecl *)(
  1119. (unsigned long)header + sizeof(*cmd));
  1120. SVGA3dPrimitiveRange *range;
  1121. uint32_t i;
  1122. uint32_t maxnum;
  1123. int ret;
  1124. ret = vmw_cmd_cid_check(dev_priv, sw_context, header);
  1125. if (unlikely(ret != 0))
  1126. return ret;
  1127. cmd = container_of(header, struct vmw_draw_cmd, header);
  1128. maxnum = (header->size - sizeof(cmd->body)) / sizeof(*decl);
  1129. if (unlikely(cmd->body.numVertexDecls > maxnum)) {
  1130. DRM_ERROR("Illegal number of vertex declarations.\n");
  1131. return -EINVAL;
  1132. }
  1133. for (i = 0; i < cmd->body.numVertexDecls; ++i, ++decl) {
  1134. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1135. user_surface_converter,
  1136. &decl->array.surfaceId, NULL);
  1137. if (unlikely(ret != 0))
  1138. return ret;
  1139. }
  1140. maxnum = (header->size - sizeof(cmd->body) -
  1141. cmd->body.numVertexDecls * sizeof(*decl)) / sizeof(*range);
  1142. if (unlikely(cmd->body.numRanges > maxnum)) {
  1143. DRM_ERROR("Illegal number of index ranges.\n");
  1144. return -EINVAL;
  1145. }
  1146. range = (SVGA3dPrimitiveRange *) decl;
  1147. for (i = 0; i < cmd->body.numRanges; ++i, ++range) {
  1148. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1149. user_surface_converter,
  1150. &range->indexArray.surfaceId, NULL);
  1151. if (unlikely(ret != 0))
  1152. return ret;
  1153. }
  1154. return 0;
  1155. }
  1156. static int vmw_cmd_tex_state(struct vmw_private *dev_priv,
  1157. struct vmw_sw_context *sw_context,
  1158. SVGA3dCmdHeader *header)
  1159. {
  1160. struct vmw_tex_state_cmd {
  1161. SVGA3dCmdHeader header;
  1162. SVGA3dCmdSetTextureState state;
  1163. } *cmd;
  1164. SVGA3dTextureState *last_state = (SVGA3dTextureState *)
  1165. ((unsigned long) header + header->size + sizeof(header));
  1166. SVGA3dTextureState *cur_state = (SVGA3dTextureState *)
  1167. ((unsigned long) header + sizeof(struct vmw_tex_state_cmd));
  1168. struct vmw_resource_val_node *ctx_node;
  1169. struct vmw_resource_val_node *res_node;
  1170. int ret;
  1171. cmd = container_of(header, struct vmw_tex_state_cmd,
  1172. header);
  1173. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  1174. user_context_converter, &cmd->state.cid,
  1175. &ctx_node);
  1176. if (unlikely(ret != 0))
  1177. return ret;
  1178. for (; cur_state < last_state; ++cur_state) {
  1179. if (likely(cur_state->name != SVGA3D_TS_BIND_TEXTURE))
  1180. continue;
  1181. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1182. user_surface_converter,
  1183. &cur_state->value, &res_node);
  1184. if (unlikely(ret != 0))
  1185. return ret;
  1186. if (dev_priv->has_mob) {
  1187. struct vmw_ctx_bindinfo bi;
  1188. bi.ctx = ctx_node->res;
  1189. bi.res = res_node ? res_node->res : NULL;
  1190. bi.bt = vmw_ctx_binding_tex;
  1191. bi.i1.texture_stage = cur_state->stage;
  1192. vmw_context_binding_add(ctx_node->staged_bindings,
  1193. &bi);
  1194. }
  1195. }
  1196. return 0;
  1197. }
  1198. static int vmw_cmd_check_define_gmrfb(struct vmw_private *dev_priv,
  1199. struct vmw_sw_context *sw_context,
  1200. void *buf)
  1201. {
  1202. struct vmw_dma_buffer *vmw_bo;
  1203. int ret;
  1204. struct {
  1205. uint32_t header;
  1206. SVGAFifoCmdDefineGMRFB body;
  1207. } *cmd = buf;
  1208. ret = vmw_translate_guest_ptr(dev_priv, sw_context,
  1209. &cmd->body.ptr,
  1210. &vmw_bo);
  1211. if (unlikely(ret != 0))
  1212. return ret;
  1213. vmw_dmabuf_unreference(&vmw_bo);
  1214. return ret;
  1215. }
  1216. /**
  1217. * vmw_cmd_switch_backup - Utility function to handle backup buffer switching
  1218. *
  1219. * @dev_priv: Pointer to a device private struct.
  1220. * @sw_context: The software context being used for this batch.
  1221. * @res_type: The resource type.
  1222. * @converter: Information about user-space binding for this resource type.
  1223. * @res_id: Pointer to the user-space resource handle in the command stream.
  1224. * @buf_id: Pointer to the user-space backup buffer handle in the command
  1225. * stream.
  1226. * @backup_offset: Offset of backup into MOB.
  1227. *
  1228. * This function prepares for registering a switch of backup buffers
  1229. * in the resource metadata just prior to unreserving.
  1230. */
  1231. static int vmw_cmd_switch_backup(struct vmw_private *dev_priv,
  1232. struct vmw_sw_context *sw_context,
  1233. enum vmw_res_type res_type,
  1234. const struct vmw_user_resource_conv
  1235. *converter,
  1236. uint32_t *res_id,
  1237. uint32_t *buf_id,
  1238. unsigned long backup_offset)
  1239. {
  1240. int ret;
  1241. struct vmw_dma_buffer *dma_buf;
  1242. struct vmw_resource_val_node *val_node;
  1243. ret = vmw_cmd_res_check(dev_priv, sw_context, res_type,
  1244. converter, res_id, &val_node);
  1245. if (unlikely(ret != 0))
  1246. return ret;
  1247. ret = vmw_translate_mob_ptr(dev_priv, sw_context, buf_id, &dma_buf);
  1248. if (unlikely(ret != 0))
  1249. return ret;
  1250. if (val_node->first_usage)
  1251. val_node->no_buffer_needed = true;
  1252. vmw_dmabuf_unreference(&val_node->new_backup);
  1253. val_node->new_backup = dma_buf;
  1254. val_node->new_backup_offset = backup_offset;
  1255. return 0;
  1256. }
  1257. /**
  1258. * vmw_cmd_bind_gb_surface - Validate an SVGA_3D_CMD_BIND_GB_SURFACE
  1259. * command
  1260. *
  1261. * @dev_priv: Pointer to a device private struct.
  1262. * @sw_context: The software context being used for this batch.
  1263. * @header: Pointer to the command header in the command stream.
  1264. */
  1265. static int vmw_cmd_bind_gb_surface(struct vmw_private *dev_priv,
  1266. struct vmw_sw_context *sw_context,
  1267. SVGA3dCmdHeader *header)
  1268. {
  1269. struct vmw_bind_gb_surface_cmd {
  1270. SVGA3dCmdHeader header;
  1271. SVGA3dCmdBindGBSurface body;
  1272. } *cmd;
  1273. cmd = container_of(header, struct vmw_bind_gb_surface_cmd, header);
  1274. return vmw_cmd_switch_backup(dev_priv, sw_context, vmw_res_surface,
  1275. user_surface_converter,
  1276. &cmd->body.sid, &cmd->body.mobid,
  1277. 0);
  1278. }
  1279. /**
  1280. * vmw_cmd_update_gb_image - Validate an SVGA_3D_CMD_UPDATE_GB_IMAGE
  1281. * command
  1282. *
  1283. * @dev_priv: Pointer to a device private struct.
  1284. * @sw_context: The software context being used for this batch.
  1285. * @header: Pointer to the command header in the command stream.
  1286. */
  1287. static int vmw_cmd_update_gb_image(struct vmw_private *dev_priv,
  1288. struct vmw_sw_context *sw_context,
  1289. SVGA3dCmdHeader *header)
  1290. {
  1291. struct vmw_gb_surface_cmd {
  1292. SVGA3dCmdHeader header;
  1293. SVGA3dCmdUpdateGBImage body;
  1294. } *cmd;
  1295. cmd = container_of(header, struct vmw_gb_surface_cmd, header);
  1296. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1297. user_surface_converter,
  1298. &cmd->body.image.sid, NULL);
  1299. }
  1300. /**
  1301. * vmw_cmd_update_gb_surface - Validate an SVGA_3D_CMD_UPDATE_GB_SURFACE
  1302. * command
  1303. *
  1304. * @dev_priv: Pointer to a device private struct.
  1305. * @sw_context: The software context being used for this batch.
  1306. * @header: Pointer to the command header in the command stream.
  1307. */
  1308. static int vmw_cmd_update_gb_surface(struct vmw_private *dev_priv,
  1309. struct vmw_sw_context *sw_context,
  1310. SVGA3dCmdHeader *header)
  1311. {
  1312. struct vmw_gb_surface_cmd {
  1313. SVGA3dCmdHeader header;
  1314. SVGA3dCmdUpdateGBSurface body;
  1315. } *cmd;
  1316. cmd = container_of(header, struct vmw_gb_surface_cmd, header);
  1317. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1318. user_surface_converter,
  1319. &cmd->body.sid, NULL);
  1320. }
  1321. /**
  1322. * vmw_cmd_readback_gb_image - Validate an SVGA_3D_CMD_READBACK_GB_IMAGE
  1323. * command
  1324. *
  1325. * @dev_priv: Pointer to a device private struct.
  1326. * @sw_context: The software context being used for this batch.
  1327. * @header: Pointer to the command header in the command stream.
  1328. */
  1329. static int vmw_cmd_readback_gb_image(struct vmw_private *dev_priv,
  1330. struct vmw_sw_context *sw_context,
  1331. SVGA3dCmdHeader *header)
  1332. {
  1333. struct vmw_gb_surface_cmd {
  1334. SVGA3dCmdHeader header;
  1335. SVGA3dCmdReadbackGBImage body;
  1336. } *cmd;
  1337. cmd = container_of(header, struct vmw_gb_surface_cmd, header);
  1338. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1339. user_surface_converter,
  1340. &cmd->body.image.sid, NULL);
  1341. }
  1342. /**
  1343. * vmw_cmd_readback_gb_surface - Validate an SVGA_3D_CMD_READBACK_GB_SURFACE
  1344. * command
  1345. *
  1346. * @dev_priv: Pointer to a device private struct.
  1347. * @sw_context: The software context being used for this batch.
  1348. * @header: Pointer to the command header in the command stream.
  1349. */
  1350. static int vmw_cmd_readback_gb_surface(struct vmw_private *dev_priv,
  1351. struct vmw_sw_context *sw_context,
  1352. SVGA3dCmdHeader *header)
  1353. {
  1354. struct vmw_gb_surface_cmd {
  1355. SVGA3dCmdHeader header;
  1356. SVGA3dCmdReadbackGBSurface body;
  1357. } *cmd;
  1358. cmd = container_of(header, struct vmw_gb_surface_cmd, header);
  1359. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1360. user_surface_converter,
  1361. &cmd->body.sid, NULL);
  1362. }
  1363. /**
  1364. * vmw_cmd_invalidate_gb_image - Validate an SVGA_3D_CMD_INVALIDATE_GB_IMAGE
  1365. * command
  1366. *
  1367. * @dev_priv: Pointer to a device private struct.
  1368. * @sw_context: The software context being used for this batch.
  1369. * @header: Pointer to the command header in the command stream.
  1370. */
  1371. static int vmw_cmd_invalidate_gb_image(struct vmw_private *dev_priv,
  1372. struct vmw_sw_context *sw_context,
  1373. SVGA3dCmdHeader *header)
  1374. {
  1375. struct vmw_gb_surface_cmd {
  1376. SVGA3dCmdHeader header;
  1377. SVGA3dCmdInvalidateGBImage body;
  1378. } *cmd;
  1379. cmd = container_of(header, struct vmw_gb_surface_cmd, header);
  1380. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1381. user_surface_converter,
  1382. &cmd->body.image.sid, NULL);
  1383. }
  1384. /**
  1385. * vmw_cmd_invalidate_gb_surface - Validate an
  1386. * SVGA_3D_CMD_INVALIDATE_GB_SURFACE command
  1387. *
  1388. * @dev_priv: Pointer to a device private struct.
  1389. * @sw_context: The software context being used for this batch.
  1390. * @header: Pointer to the command header in the command stream.
  1391. */
  1392. static int vmw_cmd_invalidate_gb_surface(struct vmw_private *dev_priv,
  1393. struct vmw_sw_context *sw_context,
  1394. SVGA3dCmdHeader *header)
  1395. {
  1396. struct vmw_gb_surface_cmd {
  1397. SVGA3dCmdHeader header;
  1398. SVGA3dCmdInvalidateGBSurface body;
  1399. } *cmd;
  1400. cmd = container_of(header, struct vmw_gb_surface_cmd, header);
  1401. return vmw_cmd_res_check(dev_priv, sw_context, vmw_res_surface,
  1402. user_surface_converter,
  1403. &cmd->body.sid, NULL);
  1404. }
  1405. /**
  1406. * vmw_cmd_shader_define - Validate an SVGA_3D_CMD_SHADER_DEFINE
  1407. * command
  1408. *
  1409. * @dev_priv: Pointer to a device private struct.
  1410. * @sw_context: The software context being used for this batch.
  1411. * @header: Pointer to the command header in the command stream.
  1412. */
  1413. static int vmw_cmd_shader_define(struct vmw_private *dev_priv,
  1414. struct vmw_sw_context *sw_context,
  1415. SVGA3dCmdHeader *header)
  1416. {
  1417. struct vmw_shader_define_cmd {
  1418. SVGA3dCmdHeader header;
  1419. SVGA3dCmdDefineShader body;
  1420. } *cmd;
  1421. int ret;
  1422. size_t size;
  1423. struct vmw_resource_val_node *val;
  1424. cmd = container_of(header, struct vmw_shader_define_cmd,
  1425. header);
  1426. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  1427. user_context_converter, &cmd->body.cid,
  1428. &val);
  1429. if (unlikely(ret != 0))
  1430. return ret;
  1431. if (unlikely(!dev_priv->has_mob))
  1432. return 0;
  1433. size = cmd->header.size - sizeof(cmd->body);
  1434. ret = vmw_compat_shader_add(dev_priv,
  1435. vmw_context_res_man(val->res),
  1436. cmd->body.shid, cmd + 1,
  1437. cmd->body.type, size,
  1438. &sw_context->staged_cmd_res);
  1439. if (unlikely(ret != 0))
  1440. return ret;
  1441. return vmw_resource_relocation_add(&sw_context->res_relocations,
  1442. NULL, &cmd->header.id -
  1443. sw_context->buf_start);
  1444. return 0;
  1445. }
  1446. /**
  1447. * vmw_cmd_shader_destroy - Validate an SVGA_3D_CMD_SHADER_DESTROY
  1448. * command
  1449. *
  1450. * @dev_priv: Pointer to a device private struct.
  1451. * @sw_context: The software context being used for this batch.
  1452. * @header: Pointer to the command header in the command stream.
  1453. */
  1454. static int vmw_cmd_shader_destroy(struct vmw_private *dev_priv,
  1455. struct vmw_sw_context *sw_context,
  1456. SVGA3dCmdHeader *header)
  1457. {
  1458. struct vmw_shader_destroy_cmd {
  1459. SVGA3dCmdHeader header;
  1460. SVGA3dCmdDestroyShader body;
  1461. } *cmd;
  1462. int ret;
  1463. struct vmw_resource_val_node *val;
  1464. cmd = container_of(header, struct vmw_shader_destroy_cmd,
  1465. header);
  1466. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  1467. user_context_converter, &cmd->body.cid,
  1468. &val);
  1469. if (unlikely(ret != 0))
  1470. return ret;
  1471. if (unlikely(!dev_priv->has_mob))
  1472. return 0;
  1473. ret = vmw_compat_shader_remove(vmw_context_res_man(val->res),
  1474. cmd->body.shid,
  1475. cmd->body.type,
  1476. &sw_context->staged_cmd_res);
  1477. if (unlikely(ret != 0))
  1478. return ret;
  1479. return vmw_resource_relocation_add(&sw_context->res_relocations,
  1480. NULL, &cmd->header.id -
  1481. sw_context->buf_start);
  1482. return 0;
  1483. }
  1484. /**
  1485. * vmw_cmd_set_shader - Validate an SVGA_3D_CMD_SET_SHADER
  1486. * command
  1487. *
  1488. * @dev_priv: Pointer to a device private struct.
  1489. * @sw_context: The software context being used for this batch.
  1490. * @header: Pointer to the command header in the command stream.
  1491. */
  1492. static int vmw_cmd_set_shader(struct vmw_private *dev_priv,
  1493. struct vmw_sw_context *sw_context,
  1494. SVGA3dCmdHeader *header)
  1495. {
  1496. struct vmw_set_shader_cmd {
  1497. SVGA3dCmdHeader header;
  1498. SVGA3dCmdSetShader body;
  1499. } *cmd;
  1500. struct vmw_resource_val_node *ctx_node, *res_node = NULL;
  1501. struct vmw_ctx_bindinfo bi;
  1502. struct vmw_resource *res = NULL;
  1503. int ret;
  1504. cmd = container_of(header, struct vmw_set_shader_cmd,
  1505. header);
  1506. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  1507. user_context_converter, &cmd->body.cid,
  1508. &ctx_node);
  1509. if (unlikely(ret != 0))
  1510. return ret;
  1511. if (!dev_priv->has_mob)
  1512. return 0;
  1513. if (cmd->body.shid != SVGA3D_INVALID_ID) {
  1514. res = vmw_compat_shader_lookup
  1515. (vmw_context_res_man(ctx_node->res),
  1516. cmd->body.shid,
  1517. cmd->body.type);
  1518. if (!IS_ERR(res)) {
  1519. ret = vmw_cmd_res_reloc_add(dev_priv, sw_context,
  1520. vmw_res_shader,
  1521. &cmd->body.shid, res,
  1522. &res_node);
  1523. vmw_resource_unreference(&res);
  1524. if (unlikely(ret != 0))
  1525. return ret;
  1526. }
  1527. }
  1528. if (!res_node) {
  1529. ret = vmw_cmd_res_check(dev_priv, sw_context,
  1530. vmw_res_shader,
  1531. user_shader_converter,
  1532. &cmd->body.shid, &res_node);
  1533. if (unlikely(ret != 0))
  1534. return ret;
  1535. }
  1536. bi.ctx = ctx_node->res;
  1537. bi.res = res_node ? res_node->res : NULL;
  1538. bi.bt = vmw_ctx_binding_shader;
  1539. bi.i1.shader_type = cmd->body.type;
  1540. return vmw_context_binding_add(ctx_node->staged_bindings, &bi);
  1541. }
  1542. /**
  1543. * vmw_cmd_set_shader_const - Validate an SVGA_3D_CMD_SET_SHADER_CONST
  1544. * command
  1545. *
  1546. * @dev_priv: Pointer to a device private struct.
  1547. * @sw_context: The software context being used for this batch.
  1548. * @header: Pointer to the command header in the command stream.
  1549. */
  1550. static int vmw_cmd_set_shader_const(struct vmw_private *dev_priv,
  1551. struct vmw_sw_context *sw_context,
  1552. SVGA3dCmdHeader *header)
  1553. {
  1554. struct vmw_set_shader_const_cmd {
  1555. SVGA3dCmdHeader header;
  1556. SVGA3dCmdSetShaderConst body;
  1557. } *cmd;
  1558. int ret;
  1559. cmd = container_of(header, struct vmw_set_shader_const_cmd,
  1560. header);
  1561. ret = vmw_cmd_res_check(dev_priv, sw_context, vmw_res_context,
  1562. user_context_converter, &cmd->body.cid,
  1563. NULL);
  1564. if (unlikely(ret != 0))
  1565. return ret;
  1566. if (dev_priv->has_mob)
  1567. header->id = SVGA_3D_CMD_SET_GB_SHADERCONSTS_INLINE;
  1568. return 0;
  1569. }
  1570. /**
  1571. * vmw_cmd_bind_gb_shader - Validate an SVGA_3D_CMD_BIND_GB_SHADER
  1572. * command
  1573. *
  1574. * @dev_priv: Pointer to a device private struct.
  1575. * @sw_context: The software context being used for this batch.
  1576. * @header: Pointer to the command header in the command stream.
  1577. */
  1578. static int vmw_cmd_bind_gb_shader(struct vmw_private *dev_priv,
  1579. struct vmw_sw_context *sw_context,
  1580. SVGA3dCmdHeader *header)
  1581. {
  1582. struct vmw_bind_gb_shader_cmd {
  1583. SVGA3dCmdHeader header;
  1584. SVGA3dCmdBindGBShader body;
  1585. } *cmd;
  1586. cmd = container_of(header, struct vmw_bind_gb_shader_cmd,
  1587. header);
  1588. return vmw_cmd_switch_backup(dev_priv, sw_context, vmw_res_shader,
  1589. user_shader_converter,
  1590. &cmd->body.shid, &cmd->body.mobid,
  1591. cmd->body.offsetInBytes);
  1592. }
  1593. static int vmw_cmd_check_not_3d(struct vmw_private *dev_priv,
  1594. struct vmw_sw_context *sw_context,
  1595. void *buf, uint32_t *size)
  1596. {
  1597. uint32_t size_remaining = *size;
  1598. uint32_t cmd_id;
  1599. cmd_id = le32_to_cpu(((uint32_t *)buf)[0]);
  1600. switch (cmd_id) {
  1601. case SVGA_CMD_UPDATE:
  1602. *size = sizeof(uint32_t) + sizeof(SVGAFifoCmdUpdate);
  1603. break;
  1604. case SVGA_CMD_DEFINE_GMRFB:
  1605. *size = sizeof(uint32_t) + sizeof(SVGAFifoCmdDefineGMRFB);
  1606. break;
  1607. case SVGA_CMD_BLIT_GMRFB_TO_SCREEN:
  1608. *size = sizeof(uint32_t) + sizeof(SVGAFifoCmdBlitGMRFBToScreen);
  1609. break;
  1610. case SVGA_CMD_BLIT_SCREEN_TO_GMRFB:
  1611. *size = sizeof(uint32_t) + sizeof(SVGAFifoCmdBlitGMRFBToScreen);
  1612. break;
  1613. default:
  1614. DRM_ERROR("Unsupported SVGA command: %u.\n", cmd_id);
  1615. return -EINVAL;
  1616. }
  1617. if (*size > size_remaining) {
  1618. DRM_ERROR("Invalid SVGA command (size mismatch):"
  1619. " %u.\n", cmd_id);
  1620. return -EINVAL;
  1621. }
  1622. if (unlikely(!sw_context->kernel)) {
  1623. DRM_ERROR("Kernel only SVGA command: %u.\n", cmd_id);
  1624. return -EPERM;
  1625. }
  1626. if (cmd_id == SVGA_CMD_DEFINE_GMRFB)
  1627. return vmw_cmd_check_define_gmrfb(dev_priv, sw_context, buf);
  1628. return 0;
  1629. }
  1630. static const struct vmw_cmd_entry vmw_cmd_entries[SVGA_3D_CMD_MAX] = {
  1631. VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DEFINE, &vmw_cmd_invalid,
  1632. false, false, false),
  1633. VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DESTROY, &vmw_cmd_invalid,
  1634. false, false, false),
  1635. VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_COPY, &vmw_cmd_surface_copy_check,
  1636. true, false, false),
  1637. VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_STRETCHBLT, &vmw_cmd_stretch_blt_check,
  1638. true, false, false),
  1639. VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DMA, &vmw_cmd_dma,
  1640. true, false, false),
  1641. VMW_CMD_DEF(SVGA_3D_CMD_CONTEXT_DEFINE, &vmw_cmd_invalid,
  1642. false, false, false),
  1643. VMW_CMD_DEF(SVGA_3D_CMD_CONTEXT_DESTROY, &vmw_cmd_invalid,
  1644. false, false, false),
  1645. VMW_CMD_DEF(SVGA_3D_CMD_SETTRANSFORM, &vmw_cmd_cid_check,
  1646. true, false, false),
  1647. VMW_CMD_DEF(SVGA_3D_CMD_SETZRANGE, &vmw_cmd_cid_check,
  1648. true, false, false),
  1649. VMW_CMD_DEF(SVGA_3D_CMD_SETRENDERSTATE, &vmw_cmd_cid_check,
  1650. true, false, false),
  1651. VMW_CMD_DEF(SVGA_3D_CMD_SETRENDERTARGET,
  1652. &vmw_cmd_set_render_target_check, true, false, false),
  1653. VMW_CMD_DEF(SVGA_3D_CMD_SETTEXTURESTATE, &vmw_cmd_tex_state,
  1654. true, false, false),
  1655. VMW_CMD_DEF(SVGA_3D_CMD_SETMATERIAL, &vmw_cmd_cid_check,
  1656. true, false, false),
  1657. VMW_CMD_DEF(SVGA_3D_CMD_SETLIGHTDATA, &vmw_cmd_cid_check,
  1658. true, false, false),
  1659. VMW_CMD_DEF(SVGA_3D_CMD_SETLIGHTENABLED, &vmw_cmd_cid_check,
  1660. true, false, false),
  1661. VMW_CMD_DEF(SVGA_3D_CMD_SETVIEWPORT, &vmw_cmd_cid_check,
  1662. true, false, false),
  1663. VMW_CMD_DEF(SVGA_3D_CMD_SETCLIPPLANE, &vmw_cmd_cid_check,
  1664. true, false, false),
  1665. VMW_CMD_DEF(SVGA_3D_CMD_CLEAR, &vmw_cmd_cid_check,
  1666. true, false, false),
  1667. VMW_CMD_DEF(SVGA_3D_CMD_PRESENT, &vmw_cmd_present_check,
  1668. false, false, false),
  1669. VMW_CMD_DEF(SVGA_3D_CMD_SHADER_DEFINE, &vmw_cmd_shader_define,
  1670. true, false, false),
  1671. VMW_CMD_DEF(SVGA_3D_CMD_SHADER_DESTROY, &vmw_cmd_shader_destroy,
  1672. true, false, false),
  1673. VMW_CMD_DEF(SVGA_3D_CMD_SET_SHADER, &vmw_cmd_set_shader,
  1674. true, false, false),
  1675. VMW_CMD_DEF(SVGA_3D_CMD_SET_SHADER_CONST, &vmw_cmd_set_shader_const,
  1676. true, false, false),
  1677. VMW_CMD_DEF(SVGA_3D_CMD_DRAW_PRIMITIVES, &vmw_cmd_draw,
  1678. true, false, false),
  1679. VMW_CMD_DEF(SVGA_3D_CMD_SETSCISSORRECT, &vmw_cmd_cid_check,
  1680. true, false, false),
  1681. VMW_CMD_DEF(SVGA_3D_CMD_BEGIN_QUERY, &vmw_cmd_begin_query,
  1682. true, false, false),
  1683. VMW_CMD_DEF(SVGA_3D_CMD_END_QUERY, &vmw_cmd_end_query,
  1684. true, false, false),
  1685. VMW_CMD_DEF(SVGA_3D_CMD_WAIT_FOR_QUERY, &vmw_cmd_wait_query,
  1686. true, false, false),
  1687. VMW_CMD_DEF(SVGA_3D_CMD_PRESENT_READBACK, &vmw_cmd_ok,
  1688. true, false, false),
  1689. VMW_CMD_DEF(SVGA_3D_CMD_BLIT_SURFACE_TO_SCREEN,
  1690. &vmw_cmd_blt_surf_screen_check, false, false, false),
  1691. VMW_CMD_DEF(SVGA_3D_CMD_SURFACE_DEFINE_V2, &vmw_cmd_invalid,
  1692. false, false, false),
  1693. VMW_CMD_DEF(SVGA_3D_CMD_GENERATE_MIPMAPS, &vmw_cmd_invalid,
  1694. false, false, false),
  1695. VMW_CMD_DEF(SVGA_3D_CMD_ACTIVATE_SURFACE, &vmw_cmd_invalid,
  1696. false, false, false),
  1697. VMW_CMD_DEF(SVGA_3D_CMD_DEACTIVATE_SURFACE, &vmw_cmd_invalid,
  1698. false, false, false),
  1699. VMW_CMD_DEF(SVGA_3D_CMD_SCREEN_DMA, &vmw_cmd_invalid,
  1700. false, false, false),
  1701. VMW_CMD_DEF(SVGA_3D_CMD_SET_UNITY_SURFACE_COOKIE, &vmw_cmd_invalid,
  1702. false, false, false),
  1703. VMW_CMD_DEF(SVGA_3D_CMD_OPEN_CONTEXT_SURFACE, &vmw_cmd_invalid,
  1704. false, false, false),
  1705. VMW_CMD_DEF(SVGA_3D_CMD_LOGICOPS_BITBLT, &vmw_cmd_invalid,
  1706. false, false, false),
  1707. VMW_CMD_DEF(SVGA_3D_CMD_LOGICOPS_TRANSBLT, &vmw_cmd_invalid,
  1708. false, false, false),
  1709. VMW_CMD_DEF(SVGA_3D_CMD_LOGICOPS_STRETCHBLT, &vmw_cmd_invalid,
  1710. false, false, false),
  1711. VMW_CMD_DEF(SVGA_3D_CMD_LOGICOPS_COLORFILL, &vmw_cmd_invalid,
  1712. false, false, false),
  1713. VMW_CMD_DEF(SVGA_3D_CMD_LOGICOPS_ALPHABLEND, &vmw_cmd_invalid,
  1714. false, false, false),
  1715. VMW_CMD_DEF(SVGA_3D_CMD_LOGICOPS_CLEARTYPEBLEND, &vmw_cmd_invalid,
  1716. false, false, false),
  1717. VMW_CMD_DEF(SVGA_3D_CMD_SET_OTABLE_BASE, &vmw_cmd_invalid,
  1718. false, false, true),
  1719. VMW_CMD_DEF(SVGA_3D_CMD_READBACK_OTABLE, &vmw_cmd_invalid,
  1720. false, false, true),
  1721. VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_MOB, &vmw_cmd_invalid,
  1722. false, false, true),
  1723. VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_MOB, &vmw_cmd_invalid,
  1724. false, false, true),
  1725. VMW_CMD_DEF(SVGA_3D_CMD_REDEFINE_GB_MOB, &vmw_cmd_invalid,
  1726. false, false, true),
  1727. VMW_CMD_DEF(SVGA_3D_CMD_UPDATE_GB_MOB_MAPPING, &vmw_cmd_invalid,
  1728. false, false, true),
  1729. VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_SURFACE, &vmw_cmd_invalid,
  1730. false, false, true),
  1731. VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_SURFACE, &vmw_cmd_invalid,
  1732. false, false, true),
  1733. VMW_CMD_DEF(SVGA_3D_CMD_BIND_GB_SURFACE, &vmw_cmd_bind_gb_surface,
  1734. true, false, true),
  1735. VMW_CMD_DEF(SVGA_3D_CMD_COND_BIND_GB_SURFACE, &vmw_cmd_invalid,
  1736. false, false, true),
  1737. VMW_CMD_DEF(SVGA_3D_CMD_UPDATE_GB_IMAGE, &vmw_cmd_update_gb_image,
  1738. true, false, true),
  1739. VMW_CMD_DEF(SVGA_3D_CMD_UPDATE_GB_SURFACE,
  1740. &vmw_cmd_update_gb_surface, true, false, true),
  1741. VMW_CMD_DEF(SVGA_3D_CMD_READBACK_GB_IMAGE,
  1742. &vmw_cmd_readback_gb_image, true, false, true),
  1743. VMW_CMD_DEF(SVGA_3D_CMD_READBACK_GB_SURFACE,
  1744. &vmw_cmd_readback_gb_surface, true, false, true),
  1745. VMW_CMD_DEF(SVGA_3D_CMD_INVALIDATE_GB_IMAGE,
  1746. &vmw_cmd_invalidate_gb_image, true, false, true),
  1747. VMW_CMD_DEF(SVGA_3D_CMD_INVALIDATE_GB_SURFACE,
  1748. &vmw_cmd_invalidate_gb_surface, true, false, true),
  1749. VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_CONTEXT, &vmw_cmd_invalid,
  1750. false, false, true),
  1751. VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_CONTEXT, &vmw_cmd_invalid,
  1752. false, false, true),
  1753. VMW_CMD_DEF(SVGA_3D_CMD_BIND_GB_CONTEXT, &vmw_cmd_invalid,
  1754. false, false, true),
  1755. VMW_CMD_DEF(SVGA_3D_CMD_READBACK_GB_CONTEXT, &vmw_cmd_invalid,
  1756. false, false, true),
  1757. VMW_CMD_DEF(SVGA_3D_CMD_INVALIDATE_GB_CONTEXT, &vmw_cmd_invalid,
  1758. false, false, true),
  1759. VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_SHADER, &vmw_cmd_invalid,
  1760. false, false, true),
  1761. VMW_CMD_DEF(SVGA_3D_CMD_BIND_GB_SHADER, &vmw_cmd_bind_gb_shader,
  1762. true, false, true),
  1763. VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_SHADER, &vmw_cmd_invalid,
  1764. false, false, true),
  1765. VMW_CMD_DEF(SVGA_3D_CMD_SET_OTABLE_BASE64, &vmw_cmd_invalid,
  1766. false, false, false),
  1767. VMW_CMD_DEF(SVGA_3D_CMD_BEGIN_GB_QUERY, &vmw_cmd_begin_gb_query,
  1768. true, false, true),
  1769. VMW_CMD_DEF(SVGA_3D_CMD_END_GB_QUERY, &vmw_cmd_end_gb_query,
  1770. true, false, true),
  1771. VMW_CMD_DEF(SVGA_3D_CMD_WAIT_FOR_GB_QUERY, &vmw_cmd_wait_gb_query,
  1772. true, false, true),
  1773. VMW_CMD_DEF(SVGA_3D_CMD_NOP, &vmw_cmd_ok,
  1774. true, false, true),
  1775. VMW_CMD_DEF(SVGA_3D_CMD_ENABLE_GART, &vmw_cmd_invalid,
  1776. false, false, true),
  1777. VMW_CMD_DEF(SVGA_3D_CMD_DISABLE_GART, &vmw_cmd_invalid,
  1778. false, false, true),
  1779. VMW_CMD_DEF(SVGA_3D_CMD_MAP_MOB_INTO_GART, &vmw_cmd_invalid,
  1780. false, false, true),
  1781. VMW_CMD_DEF(SVGA_3D_CMD_UNMAP_GART_RANGE, &vmw_cmd_invalid,
  1782. false, false, true),
  1783. VMW_CMD_DEF(SVGA_3D_CMD_DEFINE_GB_SCREENTARGET, &vmw_cmd_invalid,
  1784. false, false, true),
  1785. VMW_CMD_DEF(SVGA_3D_CMD_DESTROY_GB_SCREENTARGET, &vmw_cmd_invalid,
  1786. false, false, true),
  1787. VMW_CMD_DEF(SVGA_3D_CMD_BIND_GB_SCREENTARGET, &vmw_cmd_invalid,
  1788. false, false, true),
  1789. VMW_CMD_DEF(SVGA_3D_CMD_UPDATE_GB_SCREENTARGET, &vmw_cmd_invalid,
  1790. false, false, true),
  1791. VMW_CMD_DEF(SVGA_3D_CMD_READBACK_GB_IMAGE_PARTIAL, &vmw_cmd_invalid,
  1792. false, false, true),
  1793. VMW_CMD_DEF(SVGA_3D_CMD_INVALIDATE_GB_IMAGE_PARTIAL, &vmw_cmd_invalid,
  1794. false, false, true),
  1795. VMW_CMD_DEF(SVGA_3D_CMD_SET_GB_SHADERCONSTS_INLINE, &vmw_cmd_cid_check,
  1796. true, false, true)
  1797. };
  1798. static int vmw_cmd_check(struct vmw_private *dev_priv,
  1799. struct vmw_sw_context *sw_context,
  1800. void *buf, uint32_t *size)
  1801. {
  1802. uint32_t cmd_id;
  1803. uint32_t size_remaining = *size;
  1804. SVGA3dCmdHeader *header = (SVGA3dCmdHeader *) buf;
  1805. int ret;
  1806. const struct vmw_cmd_entry *entry;
  1807. bool gb = dev_priv->capabilities & SVGA_CAP_GBOBJECTS;
  1808. cmd_id = le32_to_cpu(((uint32_t *)buf)[0]);
  1809. /* Handle any none 3D commands */
  1810. if (unlikely(cmd_id < SVGA_CMD_MAX))
  1811. return vmw_cmd_check_not_3d(dev_priv, sw_context, buf, size);
  1812. cmd_id = le32_to_cpu(header->id);
  1813. *size = le32_to_cpu(header->size) + sizeof(SVGA3dCmdHeader);
  1814. cmd_id -= SVGA_3D_CMD_BASE;
  1815. if (unlikely(*size > size_remaining))
  1816. goto out_invalid;
  1817. if (unlikely(cmd_id >= SVGA_3D_CMD_MAX - SVGA_3D_CMD_BASE))
  1818. goto out_invalid;
  1819. entry = &vmw_cmd_entries[cmd_id];
  1820. if (unlikely(!entry->func))
  1821. goto out_invalid;
  1822. if (unlikely(!entry->user_allow && !sw_context->kernel))
  1823. goto out_privileged;
  1824. if (unlikely(entry->gb_disable && gb))
  1825. goto out_old;
  1826. if (unlikely(entry->gb_enable && !gb))
  1827. goto out_new;
  1828. ret = entry->func(dev_priv, sw_context, header);
  1829. if (unlikely(ret != 0))
  1830. goto out_invalid;
  1831. return 0;
  1832. out_invalid:
  1833. DRM_ERROR("Invalid SVGA3D command: %d\n",
  1834. cmd_id + SVGA_3D_CMD_BASE);
  1835. return -EINVAL;
  1836. out_privileged:
  1837. DRM_ERROR("Privileged SVGA3D command: %d\n",
  1838. cmd_id + SVGA_3D_CMD_BASE);
  1839. return -EPERM;
  1840. out_old:
  1841. DRM_ERROR("Deprecated (disallowed) SVGA3D command: %d\n",
  1842. cmd_id + SVGA_3D_CMD_BASE);
  1843. return -EINVAL;
  1844. out_new:
  1845. DRM_ERROR("SVGA3D command: %d not supported by virtual hardware.\n",
  1846. cmd_id + SVGA_3D_CMD_BASE);
  1847. return -EINVAL;
  1848. }
  1849. static int vmw_cmd_check_all(struct vmw_private *dev_priv,
  1850. struct vmw_sw_context *sw_context,
  1851. void *buf,
  1852. uint32_t size)
  1853. {
  1854. int32_t cur_size = size;
  1855. int ret;
  1856. sw_context->buf_start = buf;
  1857. while (cur_size > 0) {
  1858. size = cur_size;
  1859. ret = vmw_cmd_check(dev_priv, sw_context, buf, &size);
  1860. if (unlikely(ret != 0))
  1861. return ret;
  1862. buf = (void *)((unsigned long) buf + size);
  1863. cur_size -= size;
  1864. }
  1865. if (unlikely(cur_size != 0)) {
  1866. DRM_ERROR("Command verifier out of sync.\n");
  1867. return -EINVAL;
  1868. }
  1869. return 0;
  1870. }
  1871. static void vmw_free_relocations(struct vmw_sw_context *sw_context)
  1872. {
  1873. sw_context->cur_reloc = 0;
  1874. }
  1875. static void vmw_apply_relocations(struct vmw_sw_context *sw_context)
  1876. {
  1877. uint32_t i;
  1878. struct vmw_relocation *reloc;
  1879. struct ttm_validate_buffer *validate;
  1880. struct ttm_buffer_object *bo;
  1881. for (i = 0; i < sw_context->cur_reloc; ++i) {
  1882. reloc = &sw_context->relocs[i];
  1883. validate = &sw_context->val_bufs[reloc->index].base;
  1884. bo = validate->bo;
  1885. switch (bo->mem.mem_type) {
  1886. case TTM_PL_VRAM:
  1887. reloc->location->offset += bo->offset;
  1888. reloc->location->gmrId = SVGA_GMR_FRAMEBUFFER;
  1889. break;
  1890. case VMW_PL_GMR:
  1891. reloc->location->gmrId = bo->mem.start;
  1892. break;
  1893. case VMW_PL_MOB:
  1894. *reloc->mob_loc = bo->mem.start;
  1895. break;
  1896. default:
  1897. BUG();
  1898. }
  1899. }
  1900. vmw_free_relocations(sw_context);
  1901. }
  1902. /**
  1903. * vmw_resource_list_unrefererence - Free up a resource list and unreference
  1904. * all resources referenced by it.
  1905. *
  1906. * @list: The resource list.
  1907. */
  1908. static void vmw_resource_list_unreference(struct list_head *list)
  1909. {
  1910. struct vmw_resource_val_node *val, *val_next;
  1911. /*
  1912. * Drop references to resources held during command submission.
  1913. */
  1914. list_for_each_entry_safe(val, val_next, list, head) {
  1915. list_del_init(&val->head);
  1916. vmw_resource_unreference(&val->res);
  1917. if (unlikely(val->staged_bindings))
  1918. kfree(val->staged_bindings);
  1919. kfree(val);
  1920. }
  1921. }
  1922. static void vmw_clear_validations(struct vmw_sw_context *sw_context)
  1923. {
  1924. struct vmw_validate_buffer *entry, *next;
  1925. struct vmw_resource_val_node *val;
  1926. /*
  1927. * Drop references to DMA buffers held during command submission.
  1928. */
  1929. list_for_each_entry_safe(entry, next, &sw_context->validate_nodes,
  1930. base.head) {
  1931. list_del(&entry->base.head);
  1932. ttm_bo_unref(&entry->base.bo);
  1933. (void) drm_ht_remove_item(&sw_context->res_ht, &entry->hash);
  1934. sw_context->cur_val_buf--;
  1935. }
  1936. BUG_ON(sw_context->cur_val_buf != 0);
  1937. list_for_each_entry(val, &sw_context->resource_list, head)
  1938. (void) drm_ht_remove_item(&sw_context->res_ht, &val->hash);
  1939. }
  1940. static int vmw_validate_single_buffer(struct vmw_private *dev_priv,
  1941. struct ttm_buffer_object *bo,
  1942. bool validate_as_mob)
  1943. {
  1944. int ret;
  1945. /*
  1946. * Don't validate pinned buffers.
  1947. */
  1948. if (bo == dev_priv->pinned_bo ||
  1949. (bo == dev_priv->dummy_query_bo &&
  1950. dev_priv->dummy_query_bo_pinned))
  1951. return 0;
  1952. if (validate_as_mob)
  1953. return ttm_bo_validate(bo, &vmw_mob_placement, true, false);
  1954. /**
  1955. * Put BO in VRAM if there is space, otherwise as a GMR.
  1956. * If there is no space in VRAM and GMR ids are all used up,
  1957. * start evicting GMRs to make room. If the DMA buffer can't be
  1958. * used as a GMR, this will return -ENOMEM.
  1959. */
  1960. ret = ttm_bo_validate(bo, &vmw_vram_gmr_placement, true, false);
  1961. if (likely(ret == 0 || ret == -ERESTARTSYS))
  1962. return ret;
  1963. /**
  1964. * If that failed, try VRAM again, this time evicting
  1965. * previous contents.
  1966. */
  1967. DRM_INFO("Falling through to VRAM.\n");
  1968. ret = ttm_bo_validate(bo, &vmw_vram_placement, true, false);
  1969. return ret;
  1970. }
  1971. static int vmw_validate_buffers(struct vmw_private *dev_priv,
  1972. struct vmw_sw_context *sw_context)
  1973. {
  1974. struct vmw_validate_buffer *entry;
  1975. int ret;
  1976. list_for_each_entry(entry, &sw_context->validate_nodes, base.head) {
  1977. ret = vmw_validate_single_buffer(dev_priv, entry->base.bo,
  1978. entry->validate_as_mob);
  1979. if (unlikely(ret != 0))
  1980. return ret;
  1981. }
  1982. return 0;
  1983. }
  1984. static int vmw_resize_cmd_bounce(struct vmw_sw_context *sw_context,
  1985. uint32_t size)
  1986. {
  1987. if (likely(sw_context->cmd_bounce_size >= size))
  1988. return 0;
  1989. if (sw_context->cmd_bounce_size == 0)
  1990. sw_context->cmd_bounce_size = VMWGFX_CMD_BOUNCE_INIT_SIZE;
  1991. while (sw_context->cmd_bounce_size < size) {
  1992. sw_context->cmd_bounce_size =
  1993. PAGE_ALIGN(sw_context->cmd_bounce_size +
  1994. (sw_context->cmd_bounce_size >> 1));
  1995. }
  1996. if (sw_context->cmd_bounce != NULL)
  1997. vfree(sw_context->cmd_bounce);
  1998. sw_context->cmd_bounce = vmalloc(sw_context->cmd_bounce_size);
  1999. if (sw_context->cmd_bounce == NULL) {
  2000. DRM_ERROR("Failed to allocate command bounce buffer.\n");
  2001. sw_context->cmd_bounce_size = 0;
  2002. return -ENOMEM;
  2003. }
  2004. return 0;
  2005. }
  2006. /**
  2007. * vmw_execbuf_fence_commands - create and submit a command stream fence
  2008. *
  2009. * Creates a fence object and submits a command stream marker.
  2010. * If this fails for some reason, We sync the fifo and return NULL.
  2011. * It is then safe to fence buffers with a NULL pointer.
  2012. *
  2013. * If @p_handle is not NULL @file_priv must also not be NULL. Creates
  2014. * a userspace handle if @p_handle is not NULL, otherwise not.
  2015. */
  2016. int vmw_execbuf_fence_commands(struct drm_file *file_priv,
  2017. struct vmw_private *dev_priv,
  2018. struct vmw_fence_obj **p_fence,
  2019. uint32_t *p_handle)
  2020. {
  2021. uint32_t sequence;
  2022. int ret;
  2023. bool synced = false;
  2024. /* p_handle implies file_priv. */
  2025. BUG_ON(p_handle != NULL && file_priv == NULL);
  2026. ret = vmw_fifo_send_fence(dev_priv, &sequence);
  2027. if (unlikely(ret != 0)) {
  2028. DRM_ERROR("Fence submission error. Syncing.\n");
  2029. synced = true;
  2030. }
  2031. if (p_handle != NULL)
  2032. ret = vmw_user_fence_create(file_priv, dev_priv->fman,
  2033. sequence, p_fence, p_handle);
  2034. else
  2035. ret = vmw_fence_create(dev_priv->fman, sequence, p_fence);
  2036. if (unlikely(ret != 0 && !synced)) {
  2037. (void) vmw_fallback_wait(dev_priv, false, false,
  2038. sequence, false,
  2039. VMW_FENCE_WAIT_TIMEOUT);
  2040. *p_fence = NULL;
  2041. }
  2042. return 0;
  2043. }
  2044. /**
  2045. * vmw_execbuf_copy_fence_user - copy fence object information to
  2046. * user-space.
  2047. *
  2048. * @dev_priv: Pointer to a vmw_private struct.
  2049. * @vmw_fp: Pointer to the struct vmw_fpriv representing the calling file.
  2050. * @ret: Return value from fence object creation.
  2051. * @user_fence_rep: User space address of a struct drm_vmw_fence_rep to
  2052. * which the information should be copied.
  2053. * @fence: Pointer to the fenc object.
  2054. * @fence_handle: User-space fence handle.
  2055. *
  2056. * This function copies fence information to user-space. If copying fails,
  2057. * The user-space struct drm_vmw_fence_rep::error member is hopefully
  2058. * left untouched, and if it's preloaded with an -EFAULT by user-space,
  2059. * the error will hopefully be detected.
  2060. * Also if copying fails, user-space will be unable to signal the fence
  2061. * object so we wait for it immediately, and then unreference the
  2062. * user-space reference.
  2063. */
  2064. void
  2065. vmw_execbuf_copy_fence_user(struct vmw_private *dev_priv,
  2066. struct vmw_fpriv *vmw_fp,
  2067. int ret,
  2068. struct drm_vmw_fence_rep __user *user_fence_rep,
  2069. struct vmw_fence_obj *fence,
  2070. uint32_t fence_handle)
  2071. {
  2072. struct drm_vmw_fence_rep fence_rep;
  2073. if (user_fence_rep == NULL)
  2074. return;
  2075. memset(&fence_rep, 0, sizeof(fence_rep));
  2076. fence_rep.error = ret;
  2077. if (ret == 0) {
  2078. BUG_ON(fence == NULL);
  2079. fence_rep.handle = fence_handle;
  2080. fence_rep.seqno = fence->base.seqno;
  2081. vmw_update_seqno(dev_priv, &dev_priv->fifo);
  2082. fence_rep.passed_seqno = dev_priv->last_read_seqno;
  2083. }
  2084. /*
  2085. * copy_to_user errors will be detected by user space not
  2086. * seeing fence_rep::error filled in. Typically
  2087. * user-space would have pre-set that member to -EFAULT.
  2088. */
  2089. ret = copy_to_user(user_fence_rep, &fence_rep,
  2090. sizeof(fence_rep));
  2091. /*
  2092. * User-space lost the fence object. We need to sync
  2093. * and unreference the handle.
  2094. */
  2095. if (unlikely(ret != 0) && (fence_rep.error == 0)) {
  2096. ttm_ref_object_base_unref(vmw_fp->tfile,
  2097. fence_handle, TTM_REF_USAGE);
  2098. DRM_ERROR("Fence copy error. Syncing.\n");
  2099. (void) vmw_fence_obj_wait(fence, false, false,
  2100. VMW_FENCE_WAIT_TIMEOUT);
  2101. }
  2102. }
  2103. int vmw_execbuf_process(struct drm_file *file_priv,
  2104. struct vmw_private *dev_priv,
  2105. void __user *user_commands,
  2106. void *kernel_commands,
  2107. uint32_t command_size,
  2108. uint64_t throttle_us,
  2109. struct drm_vmw_fence_rep __user *user_fence_rep,
  2110. struct vmw_fence_obj **out_fence)
  2111. {
  2112. struct vmw_sw_context *sw_context = &dev_priv->ctx;
  2113. struct vmw_fence_obj *fence = NULL;
  2114. struct vmw_resource *error_resource;
  2115. struct list_head resource_list;
  2116. struct ww_acquire_ctx ticket;
  2117. uint32_t handle;
  2118. void *cmd;
  2119. int ret;
  2120. ret = mutex_lock_interruptible(&dev_priv->cmdbuf_mutex);
  2121. if (unlikely(ret != 0))
  2122. return -ERESTARTSYS;
  2123. if (kernel_commands == NULL) {
  2124. sw_context->kernel = false;
  2125. ret = vmw_resize_cmd_bounce(sw_context, command_size);
  2126. if (unlikely(ret != 0))
  2127. goto out_unlock;
  2128. ret = copy_from_user(sw_context->cmd_bounce,
  2129. user_commands, command_size);
  2130. if (unlikely(ret != 0)) {
  2131. ret = -EFAULT;
  2132. DRM_ERROR("Failed copying commands.\n");
  2133. goto out_unlock;
  2134. }
  2135. kernel_commands = sw_context->cmd_bounce;
  2136. } else
  2137. sw_context->kernel = true;
  2138. sw_context->fp = vmw_fpriv(file_priv);
  2139. sw_context->cur_reloc = 0;
  2140. sw_context->cur_val_buf = 0;
  2141. INIT_LIST_HEAD(&sw_context->resource_list);
  2142. sw_context->cur_query_bo = dev_priv->pinned_bo;
  2143. sw_context->last_query_ctx = NULL;
  2144. sw_context->needs_post_query_barrier = false;
  2145. memset(sw_context->res_cache, 0, sizeof(sw_context->res_cache));
  2146. INIT_LIST_HEAD(&sw_context->validate_nodes);
  2147. INIT_LIST_HEAD(&sw_context->res_relocations);
  2148. if (!sw_context->res_ht_initialized) {
  2149. ret = drm_ht_create(&sw_context->res_ht, VMW_RES_HT_ORDER);
  2150. if (unlikely(ret != 0))
  2151. goto out_unlock;
  2152. sw_context->res_ht_initialized = true;
  2153. }
  2154. INIT_LIST_HEAD(&sw_context->staged_cmd_res);
  2155. INIT_LIST_HEAD(&resource_list);
  2156. ret = vmw_cmd_check_all(dev_priv, sw_context, kernel_commands,
  2157. command_size);
  2158. if (unlikely(ret != 0))
  2159. goto out_err_nores;
  2160. ret = vmw_resources_reserve(sw_context);
  2161. if (unlikely(ret != 0))
  2162. goto out_err_nores;
  2163. ret = ttm_eu_reserve_buffers(&ticket, &sw_context->validate_nodes,
  2164. true, NULL);
  2165. if (unlikely(ret != 0))
  2166. goto out_err;
  2167. ret = vmw_validate_buffers(dev_priv, sw_context);
  2168. if (unlikely(ret != 0))
  2169. goto out_err;
  2170. ret = vmw_resources_validate(sw_context);
  2171. if (unlikely(ret != 0))
  2172. goto out_err;
  2173. if (throttle_us) {
  2174. ret = vmw_wait_lag(dev_priv, &dev_priv->fifo.marker_queue,
  2175. throttle_us);
  2176. if (unlikely(ret != 0))
  2177. goto out_err;
  2178. }
  2179. ret = mutex_lock_interruptible(&dev_priv->binding_mutex);
  2180. if (unlikely(ret != 0)) {
  2181. ret = -ERESTARTSYS;
  2182. goto out_err;
  2183. }
  2184. if (dev_priv->has_mob) {
  2185. ret = vmw_rebind_contexts(sw_context);
  2186. if (unlikely(ret != 0))
  2187. goto out_unlock_binding;
  2188. }
  2189. cmd = vmw_fifo_reserve(dev_priv, command_size);
  2190. if (unlikely(cmd == NULL)) {
  2191. DRM_ERROR("Failed reserving fifo space for commands.\n");
  2192. ret = -ENOMEM;
  2193. goto out_unlock_binding;
  2194. }
  2195. vmw_apply_relocations(sw_context);
  2196. memcpy(cmd, kernel_commands, command_size);
  2197. vmw_resource_relocations_apply(cmd, &sw_context->res_relocations);
  2198. vmw_resource_relocations_free(&sw_context->res_relocations);
  2199. vmw_fifo_commit(dev_priv, command_size);
  2200. vmw_query_bo_switch_commit(dev_priv, sw_context);
  2201. ret = vmw_execbuf_fence_commands(file_priv, dev_priv,
  2202. &fence,
  2203. (user_fence_rep) ? &handle : NULL);
  2204. /*
  2205. * This error is harmless, because if fence submission fails,
  2206. * vmw_fifo_send_fence will sync. The error will be propagated to
  2207. * user-space in @fence_rep
  2208. */
  2209. if (ret != 0)
  2210. DRM_ERROR("Fence submission error. Syncing.\n");
  2211. vmw_resource_list_unreserve(&sw_context->resource_list, false);
  2212. mutex_unlock(&dev_priv->binding_mutex);
  2213. ttm_eu_fence_buffer_objects(&ticket, &sw_context->validate_nodes,
  2214. (void *) fence);
  2215. if (unlikely(dev_priv->pinned_bo != NULL &&
  2216. !dev_priv->query_cid_valid))
  2217. __vmw_execbuf_release_pinned_bo(dev_priv, fence);
  2218. vmw_clear_validations(sw_context);
  2219. vmw_execbuf_copy_fence_user(dev_priv, vmw_fpriv(file_priv), ret,
  2220. user_fence_rep, fence, handle);
  2221. /* Don't unreference when handing fence out */
  2222. if (unlikely(out_fence != NULL)) {
  2223. *out_fence = fence;
  2224. fence = NULL;
  2225. } else if (likely(fence != NULL)) {
  2226. vmw_fence_obj_unreference(&fence);
  2227. }
  2228. list_splice_init(&sw_context->resource_list, &resource_list);
  2229. vmw_cmdbuf_res_commit(&sw_context->staged_cmd_res);
  2230. mutex_unlock(&dev_priv->cmdbuf_mutex);
  2231. /*
  2232. * Unreference resources outside of the cmdbuf_mutex to
  2233. * avoid deadlocks in resource destruction paths.
  2234. */
  2235. vmw_resource_list_unreference(&resource_list);
  2236. return 0;
  2237. out_unlock_binding:
  2238. mutex_unlock(&dev_priv->binding_mutex);
  2239. out_err:
  2240. ttm_eu_backoff_reservation(&ticket, &sw_context->validate_nodes);
  2241. out_err_nores:
  2242. vmw_resource_list_unreserve(&sw_context->resource_list, true);
  2243. vmw_resource_relocations_free(&sw_context->res_relocations);
  2244. vmw_free_relocations(sw_context);
  2245. vmw_clear_validations(sw_context);
  2246. if (unlikely(dev_priv->pinned_bo != NULL &&
  2247. !dev_priv->query_cid_valid))
  2248. __vmw_execbuf_release_pinned_bo(dev_priv, NULL);
  2249. out_unlock:
  2250. list_splice_init(&sw_context->resource_list, &resource_list);
  2251. error_resource = sw_context->error_resource;
  2252. sw_context->error_resource = NULL;
  2253. vmw_cmdbuf_res_revert(&sw_context->staged_cmd_res);
  2254. mutex_unlock(&dev_priv->cmdbuf_mutex);
  2255. /*
  2256. * Unreference resources outside of the cmdbuf_mutex to
  2257. * avoid deadlocks in resource destruction paths.
  2258. */
  2259. vmw_resource_list_unreference(&resource_list);
  2260. if (unlikely(error_resource != NULL))
  2261. vmw_resource_unreference(&error_resource);
  2262. return ret;
  2263. }
  2264. /**
  2265. * vmw_execbuf_unpin_panic - Idle the fifo and unpin the query buffer.
  2266. *
  2267. * @dev_priv: The device private structure.
  2268. *
  2269. * This function is called to idle the fifo and unpin the query buffer
  2270. * if the normal way to do this hits an error, which should typically be
  2271. * extremely rare.
  2272. */
  2273. static void vmw_execbuf_unpin_panic(struct vmw_private *dev_priv)
  2274. {
  2275. DRM_ERROR("Can't unpin query buffer. Trying to recover.\n");
  2276. (void) vmw_fallback_wait(dev_priv, false, true, 0, false, 10*HZ);
  2277. vmw_bo_pin(dev_priv->pinned_bo, false);
  2278. vmw_bo_pin(dev_priv->dummy_query_bo, false);
  2279. dev_priv->dummy_query_bo_pinned = false;
  2280. }
  2281. /**
  2282. * __vmw_execbuf_release_pinned_bo - Flush queries and unpin the pinned
  2283. * query bo.
  2284. *
  2285. * @dev_priv: The device private structure.
  2286. * @fence: If non-NULL should point to a struct vmw_fence_obj issued
  2287. * _after_ a query barrier that flushes all queries touching the current
  2288. * buffer pointed to by @dev_priv->pinned_bo
  2289. *
  2290. * This function should be used to unpin the pinned query bo, or
  2291. * as a query barrier when we need to make sure that all queries have
  2292. * finished before the next fifo command. (For example on hardware
  2293. * context destructions where the hardware may otherwise leak unfinished
  2294. * queries).
  2295. *
  2296. * This function does not return any failure codes, but make attempts
  2297. * to do safe unpinning in case of errors.
  2298. *
  2299. * The function will synchronize on the previous query barrier, and will
  2300. * thus not finish until that barrier has executed.
  2301. *
  2302. * the @dev_priv->cmdbuf_mutex needs to be held by the current thread
  2303. * before calling this function.
  2304. */
  2305. void __vmw_execbuf_release_pinned_bo(struct vmw_private *dev_priv,
  2306. struct vmw_fence_obj *fence)
  2307. {
  2308. int ret = 0;
  2309. struct list_head validate_list;
  2310. struct ttm_validate_buffer pinned_val, query_val;
  2311. struct vmw_fence_obj *lfence = NULL;
  2312. struct ww_acquire_ctx ticket;
  2313. if (dev_priv->pinned_bo == NULL)
  2314. goto out_unlock;
  2315. INIT_LIST_HEAD(&validate_list);
  2316. pinned_val.bo = ttm_bo_reference(dev_priv->pinned_bo);
  2317. pinned_val.shared = false;
  2318. list_add_tail(&pinned_val.head, &validate_list);
  2319. query_val.bo = ttm_bo_reference(dev_priv->dummy_query_bo);
  2320. query_val.shared = false;
  2321. list_add_tail(&query_val.head, &validate_list);
  2322. ret = ttm_eu_reserve_buffers(&ticket, &validate_list,
  2323. false, NULL);
  2324. if (unlikely(ret != 0)) {
  2325. vmw_execbuf_unpin_panic(dev_priv);
  2326. goto out_no_reserve;
  2327. }
  2328. if (dev_priv->query_cid_valid) {
  2329. BUG_ON(fence != NULL);
  2330. ret = vmw_fifo_emit_dummy_query(dev_priv, dev_priv->query_cid);
  2331. if (unlikely(ret != 0)) {
  2332. vmw_execbuf_unpin_panic(dev_priv);
  2333. goto out_no_emit;
  2334. }
  2335. dev_priv->query_cid_valid = false;
  2336. }
  2337. vmw_bo_pin(dev_priv->pinned_bo, false);
  2338. vmw_bo_pin(dev_priv->dummy_query_bo, false);
  2339. dev_priv->dummy_query_bo_pinned = false;
  2340. if (fence == NULL) {
  2341. (void) vmw_execbuf_fence_commands(NULL, dev_priv, &lfence,
  2342. NULL);
  2343. fence = lfence;
  2344. }
  2345. ttm_eu_fence_buffer_objects(&ticket, &validate_list, (void *) fence);
  2346. if (lfence != NULL)
  2347. vmw_fence_obj_unreference(&lfence);
  2348. ttm_bo_unref(&query_val.bo);
  2349. ttm_bo_unref(&pinned_val.bo);
  2350. ttm_bo_unref(&dev_priv->pinned_bo);
  2351. out_unlock:
  2352. return;
  2353. out_no_emit:
  2354. ttm_eu_backoff_reservation(&ticket, &validate_list);
  2355. out_no_reserve:
  2356. ttm_bo_unref(&query_val.bo);
  2357. ttm_bo_unref(&pinned_val.bo);
  2358. ttm_bo_unref(&dev_priv->pinned_bo);
  2359. }
  2360. /**
  2361. * vmw_execbuf_release_pinned_bo - Flush queries and unpin the pinned
  2362. * query bo.
  2363. *
  2364. * @dev_priv: The device private structure.
  2365. *
  2366. * This function should be used to unpin the pinned query bo, or
  2367. * as a query barrier when we need to make sure that all queries have
  2368. * finished before the next fifo command. (For example on hardware
  2369. * context destructions where the hardware may otherwise leak unfinished
  2370. * queries).
  2371. *
  2372. * This function does not return any failure codes, but make attempts
  2373. * to do safe unpinning in case of errors.
  2374. *
  2375. * The function will synchronize on the previous query barrier, and will
  2376. * thus not finish until that barrier has executed.
  2377. */
  2378. void vmw_execbuf_release_pinned_bo(struct vmw_private *dev_priv)
  2379. {
  2380. mutex_lock(&dev_priv->cmdbuf_mutex);
  2381. if (dev_priv->query_cid_valid)
  2382. __vmw_execbuf_release_pinned_bo(dev_priv, NULL);
  2383. mutex_unlock(&dev_priv->cmdbuf_mutex);
  2384. }
  2385. int vmw_execbuf_ioctl(struct drm_device *dev, void *data,
  2386. struct drm_file *file_priv)
  2387. {
  2388. struct vmw_private *dev_priv = vmw_priv(dev);
  2389. struct drm_vmw_execbuf_arg *arg = (struct drm_vmw_execbuf_arg *)data;
  2390. int ret;
  2391. /*
  2392. * This will allow us to extend the ioctl argument while
  2393. * maintaining backwards compatibility:
  2394. * We take different code paths depending on the value of
  2395. * arg->version.
  2396. */
  2397. if (unlikely(arg->version != DRM_VMW_EXECBUF_VERSION)) {
  2398. DRM_ERROR("Incorrect execbuf version.\n");
  2399. DRM_ERROR("You're running outdated experimental "
  2400. "vmwgfx user-space drivers.");
  2401. return -EINVAL;
  2402. }
  2403. ret = ttm_read_lock(&dev_priv->reservation_sem, true);
  2404. if (unlikely(ret != 0))
  2405. return ret;
  2406. ret = vmw_execbuf_process(file_priv, dev_priv,
  2407. (void __user *)(unsigned long)arg->commands,
  2408. NULL, arg->command_size, arg->throttle_us,
  2409. (void __user *)(unsigned long)arg->fence_rep,
  2410. NULL);
  2411. if (unlikely(ret != 0))
  2412. goto out_unlock;
  2413. vmw_kms_cursor_post_execbuf(dev_priv);
  2414. out_unlock:
  2415. ttm_read_unlock(&dev_priv->reservation_sem);
  2416. return ret;
  2417. }