nouveau_ttm.c 11 KB

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  1. /*
  2. * Copyright (c) 2007-2008 Tungsten Graphics, Inc., Cedar Park, TX., USA,
  3. * All Rights Reserved.
  4. * Copyright (c) 2009 VMware, Inc., Palo Alto, CA., USA,
  5. * All Rights Reserved.
  6. *
  7. * Permission is hereby granted, free of charge, to any person obtaining a
  8. * copy of this software and associated documentation files (the "Software"),
  9. * to deal in the Software without restriction, including without limitation
  10. * the rights to use, copy, modify, merge, publish, distribute, sub license,
  11. * and/or sell copies of the Software, and to permit persons to whom the
  12. * Software is furnished to do so, subject to the following conditions:
  13. *
  14. * The above copyright notice and this permission notice (including the
  15. * next paragraph) shall be included in all copies or substantial portions
  16. * of the Software.
  17. *
  18. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  19. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  20. * FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL
  21. * THE COPYRIGHT HOLDERS, AUTHORS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM,
  22. * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
  23. * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE
  24. * USE OR OTHER DEALINGS IN THE SOFTWARE.
  25. */
  26. #include "nouveau_drm.h"
  27. #include "nouveau_ttm.h"
  28. #include "nouveau_gem.h"
  29. #include "drm_legacy.h"
  30. static int
  31. nouveau_vram_manager_init(struct ttm_mem_type_manager *man, unsigned long psize)
  32. {
  33. struct nouveau_drm *drm = nouveau_bdev(man->bdev);
  34. struct nouveau_fb *pfb = nvkm_fb(&drm->device);
  35. man->priv = pfb;
  36. return 0;
  37. }
  38. static int
  39. nouveau_vram_manager_fini(struct ttm_mem_type_manager *man)
  40. {
  41. man->priv = NULL;
  42. return 0;
  43. }
  44. static inline void
  45. nouveau_mem_node_cleanup(struct nouveau_mem *node)
  46. {
  47. if (node->vma[0].node) {
  48. nouveau_vm_unmap(&node->vma[0]);
  49. nouveau_vm_put(&node->vma[0]);
  50. }
  51. if (node->vma[1].node) {
  52. nouveau_vm_unmap(&node->vma[1]);
  53. nouveau_vm_put(&node->vma[1]);
  54. }
  55. }
  56. static void
  57. nouveau_vram_manager_del(struct ttm_mem_type_manager *man,
  58. struct ttm_mem_reg *mem)
  59. {
  60. struct nouveau_drm *drm = nouveau_bdev(man->bdev);
  61. struct nouveau_fb *pfb = nvkm_fb(&drm->device);
  62. nouveau_mem_node_cleanup(mem->mm_node);
  63. pfb->ram->put(pfb, (struct nouveau_mem **)&mem->mm_node);
  64. }
  65. static int
  66. nouveau_vram_manager_new(struct ttm_mem_type_manager *man,
  67. struct ttm_buffer_object *bo,
  68. const struct ttm_place *place,
  69. struct ttm_mem_reg *mem)
  70. {
  71. struct nouveau_drm *drm = nouveau_bdev(man->bdev);
  72. struct nouveau_fb *pfb = nvkm_fb(&drm->device);
  73. struct nouveau_bo *nvbo = nouveau_bo(bo);
  74. struct nouveau_mem *node;
  75. u32 size_nc = 0;
  76. int ret;
  77. if (nvbo->tile_flags & NOUVEAU_GEM_TILE_NONCONTIG)
  78. size_nc = 1 << nvbo->page_shift;
  79. ret = pfb->ram->get(pfb, mem->num_pages << PAGE_SHIFT,
  80. mem->page_alignment << PAGE_SHIFT, size_nc,
  81. (nvbo->tile_flags >> 8) & 0x3ff, &node);
  82. if (ret) {
  83. mem->mm_node = NULL;
  84. return (ret == -ENOSPC) ? 0 : ret;
  85. }
  86. node->page_shift = nvbo->page_shift;
  87. mem->mm_node = node;
  88. mem->start = node->offset >> PAGE_SHIFT;
  89. return 0;
  90. }
  91. static void
  92. nouveau_vram_manager_debug(struct ttm_mem_type_manager *man, const char *prefix)
  93. {
  94. struct nouveau_fb *pfb = man->priv;
  95. struct nouveau_mm *mm = &pfb->vram;
  96. struct nouveau_mm_node *r;
  97. u32 total = 0, free = 0;
  98. mutex_lock(&nv_subdev(pfb)->mutex);
  99. list_for_each_entry(r, &mm->nodes, nl_entry) {
  100. printk(KERN_DEBUG "%s %d: 0x%010llx 0x%010llx\n",
  101. prefix, r->type, ((u64)r->offset << 12),
  102. (((u64)r->offset + r->length) << 12));
  103. total += r->length;
  104. if (!r->type)
  105. free += r->length;
  106. }
  107. mutex_unlock(&nv_subdev(pfb)->mutex);
  108. printk(KERN_DEBUG "%s total: 0x%010llx free: 0x%010llx\n",
  109. prefix, (u64)total << 12, (u64)free << 12);
  110. printk(KERN_DEBUG "%s block: 0x%08x\n",
  111. prefix, mm->block_size << 12);
  112. }
  113. const struct ttm_mem_type_manager_func nouveau_vram_manager = {
  114. nouveau_vram_manager_init,
  115. nouveau_vram_manager_fini,
  116. nouveau_vram_manager_new,
  117. nouveau_vram_manager_del,
  118. nouveau_vram_manager_debug
  119. };
  120. static int
  121. nouveau_gart_manager_init(struct ttm_mem_type_manager *man, unsigned long psize)
  122. {
  123. return 0;
  124. }
  125. static int
  126. nouveau_gart_manager_fini(struct ttm_mem_type_manager *man)
  127. {
  128. return 0;
  129. }
  130. static void
  131. nouveau_gart_manager_del(struct ttm_mem_type_manager *man,
  132. struct ttm_mem_reg *mem)
  133. {
  134. nouveau_mem_node_cleanup(mem->mm_node);
  135. kfree(mem->mm_node);
  136. mem->mm_node = NULL;
  137. }
  138. static int
  139. nouveau_gart_manager_new(struct ttm_mem_type_manager *man,
  140. struct ttm_buffer_object *bo,
  141. const struct ttm_place *place,
  142. struct ttm_mem_reg *mem)
  143. {
  144. struct nouveau_drm *drm = nouveau_bdev(bo->bdev);
  145. struct nouveau_bo *nvbo = nouveau_bo(bo);
  146. struct nouveau_mem *node;
  147. node = kzalloc(sizeof(*node), GFP_KERNEL);
  148. if (!node)
  149. return -ENOMEM;
  150. node->page_shift = 12;
  151. switch (drm->device.info.family) {
  152. case NV_DEVICE_INFO_V0_TESLA:
  153. if (drm->device.info.chipset != 0x50)
  154. node->memtype = (nvbo->tile_flags & 0x7f00) >> 8;
  155. break;
  156. case NV_DEVICE_INFO_V0_FERMI:
  157. case NV_DEVICE_INFO_V0_KEPLER:
  158. node->memtype = (nvbo->tile_flags & 0xff00) >> 8;
  159. break;
  160. default:
  161. break;
  162. }
  163. mem->mm_node = node;
  164. mem->start = 0;
  165. return 0;
  166. }
  167. static void
  168. nouveau_gart_manager_debug(struct ttm_mem_type_manager *man, const char *prefix)
  169. {
  170. }
  171. const struct ttm_mem_type_manager_func nouveau_gart_manager = {
  172. nouveau_gart_manager_init,
  173. nouveau_gart_manager_fini,
  174. nouveau_gart_manager_new,
  175. nouveau_gart_manager_del,
  176. nouveau_gart_manager_debug
  177. };
  178. /*XXX*/
  179. #include <core/subdev/vm/nv04.h>
  180. static int
  181. nv04_gart_manager_init(struct ttm_mem_type_manager *man, unsigned long psize)
  182. {
  183. struct nouveau_drm *drm = nouveau_bdev(man->bdev);
  184. struct nouveau_vmmgr *vmm = nvkm_vmmgr(&drm->device);
  185. struct nv04_vmmgr_priv *priv = (void *)vmm;
  186. struct nouveau_vm *vm = NULL;
  187. nouveau_vm_ref(priv->vm, &vm, NULL);
  188. man->priv = vm;
  189. return 0;
  190. }
  191. static int
  192. nv04_gart_manager_fini(struct ttm_mem_type_manager *man)
  193. {
  194. struct nouveau_vm *vm = man->priv;
  195. nouveau_vm_ref(NULL, &vm, NULL);
  196. man->priv = NULL;
  197. return 0;
  198. }
  199. static void
  200. nv04_gart_manager_del(struct ttm_mem_type_manager *man, struct ttm_mem_reg *mem)
  201. {
  202. struct nouveau_mem *node = mem->mm_node;
  203. if (node->vma[0].node)
  204. nouveau_vm_put(&node->vma[0]);
  205. kfree(mem->mm_node);
  206. mem->mm_node = NULL;
  207. }
  208. static int
  209. nv04_gart_manager_new(struct ttm_mem_type_manager *man,
  210. struct ttm_buffer_object *bo,
  211. const struct ttm_place *place,
  212. struct ttm_mem_reg *mem)
  213. {
  214. struct nouveau_mem *node;
  215. int ret;
  216. node = kzalloc(sizeof(*node), GFP_KERNEL);
  217. if (!node)
  218. return -ENOMEM;
  219. node->page_shift = 12;
  220. ret = nouveau_vm_get(man->priv, mem->num_pages << 12, node->page_shift,
  221. NV_MEM_ACCESS_RW, &node->vma[0]);
  222. if (ret) {
  223. kfree(node);
  224. return ret;
  225. }
  226. mem->mm_node = node;
  227. mem->start = node->vma[0].offset >> PAGE_SHIFT;
  228. return 0;
  229. }
  230. static void
  231. nv04_gart_manager_debug(struct ttm_mem_type_manager *man, const char *prefix)
  232. {
  233. }
  234. const struct ttm_mem_type_manager_func nv04_gart_manager = {
  235. nv04_gart_manager_init,
  236. nv04_gart_manager_fini,
  237. nv04_gart_manager_new,
  238. nv04_gart_manager_del,
  239. nv04_gart_manager_debug
  240. };
  241. int
  242. nouveau_ttm_mmap(struct file *filp, struct vm_area_struct *vma)
  243. {
  244. struct drm_file *file_priv = filp->private_data;
  245. struct nouveau_drm *drm = nouveau_drm(file_priv->minor->dev);
  246. if (unlikely(vma->vm_pgoff < DRM_FILE_PAGE_OFFSET))
  247. return drm_legacy_mmap(filp, vma);
  248. return ttm_bo_mmap(filp, vma, &drm->ttm.bdev);
  249. }
  250. static int
  251. nouveau_ttm_mem_global_init(struct drm_global_reference *ref)
  252. {
  253. return ttm_mem_global_init(ref->object);
  254. }
  255. static void
  256. nouveau_ttm_mem_global_release(struct drm_global_reference *ref)
  257. {
  258. ttm_mem_global_release(ref->object);
  259. }
  260. int
  261. nouveau_ttm_global_init(struct nouveau_drm *drm)
  262. {
  263. struct drm_global_reference *global_ref;
  264. int ret;
  265. global_ref = &drm->ttm.mem_global_ref;
  266. global_ref->global_type = DRM_GLOBAL_TTM_MEM;
  267. global_ref->size = sizeof(struct ttm_mem_global);
  268. global_ref->init = &nouveau_ttm_mem_global_init;
  269. global_ref->release = &nouveau_ttm_mem_global_release;
  270. ret = drm_global_item_ref(global_ref);
  271. if (unlikely(ret != 0)) {
  272. DRM_ERROR("Failed setting up TTM memory accounting\n");
  273. drm->ttm.mem_global_ref.release = NULL;
  274. return ret;
  275. }
  276. drm->ttm.bo_global_ref.mem_glob = global_ref->object;
  277. global_ref = &drm->ttm.bo_global_ref.ref;
  278. global_ref->global_type = DRM_GLOBAL_TTM_BO;
  279. global_ref->size = sizeof(struct ttm_bo_global);
  280. global_ref->init = &ttm_bo_global_init;
  281. global_ref->release = &ttm_bo_global_release;
  282. ret = drm_global_item_ref(global_ref);
  283. if (unlikely(ret != 0)) {
  284. DRM_ERROR("Failed setting up TTM BO subsystem\n");
  285. drm_global_item_unref(&drm->ttm.mem_global_ref);
  286. drm->ttm.mem_global_ref.release = NULL;
  287. return ret;
  288. }
  289. return 0;
  290. }
  291. void
  292. nouveau_ttm_global_release(struct nouveau_drm *drm)
  293. {
  294. if (drm->ttm.mem_global_ref.release == NULL)
  295. return;
  296. drm_global_item_unref(&drm->ttm.bo_global_ref.ref);
  297. drm_global_item_unref(&drm->ttm.mem_global_ref);
  298. drm->ttm.mem_global_ref.release = NULL;
  299. }
  300. int
  301. nouveau_ttm_init(struct nouveau_drm *drm)
  302. {
  303. struct drm_device *dev = drm->dev;
  304. u32 bits;
  305. int ret;
  306. bits = nvkm_vmmgr(&drm->device)->dma_bits;
  307. if (nv_device_is_pci(nvkm_device(&drm->device))) {
  308. if (drm->agp.stat == ENABLED ||
  309. !pci_dma_supported(dev->pdev, DMA_BIT_MASK(bits)))
  310. bits = 32;
  311. ret = pci_set_dma_mask(dev->pdev, DMA_BIT_MASK(bits));
  312. if (ret)
  313. return ret;
  314. ret = pci_set_consistent_dma_mask(dev->pdev,
  315. DMA_BIT_MASK(bits));
  316. if (ret)
  317. pci_set_consistent_dma_mask(dev->pdev,
  318. DMA_BIT_MASK(32));
  319. }
  320. ret = nouveau_ttm_global_init(drm);
  321. if (ret)
  322. return ret;
  323. ret = ttm_bo_device_init(&drm->ttm.bdev,
  324. drm->ttm.bo_global_ref.ref.object,
  325. &nouveau_bo_driver,
  326. dev->anon_inode->i_mapping,
  327. DRM_FILE_PAGE_OFFSET,
  328. bits <= 32 ? true : false);
  329. if (ret) {
  330. NV_ERROR(drm, "error initialising bo driver, %d\n", ret);
  331. return ret;
  332. }
  333. /* VRAM init */
  334. drm->gem.vram_available = drm->device.info.ram_user;
  335. ret = ttm_bo_init_mm(&drm->ttm.bdev, TTM_PL_VRAM,
  336. drm->gem.vram_available >> PAGE_SHIFT);
  337. if (ret) {
  338. NV_ERROR(drm, "VRAM mm init failed, %d\n", ret);
  339. return ret;
  340. }
  341. drm->ttm.mtrr = arch_phys_wc_add(nv_device_resource_start(nvkm_device(&drm->device), 1),
  342. nv_device_resource_len(nvkm_device(&drm->device), 1));
  343. /* GART init */
  344. if (drm->agp.stat != ENABLED) {
  345. drm->gem.gart_available = nvkm_vmmgr(&drm->device)->limit;
  346. } else {
  347. drm->gem.gart_available = drm->agp.size;
  348. }
  349. ret = ttm_bo_init_mm(&drm->ttm.bdev, TTM_PL_TT,
  350. drm->gem.gart_available >> PAGE_SHIFT);
  351. if (ret) {
  352. NV_ERROR(drm, "GART mm init failed, %d\n", ret);
  353. return ret;
  354. }
  355. NV_INFO(drm, "VRAM: %d MiB\n", (u32)(drm->gem.vram_available >> 20));
  356. NV_INFO(drm, "GART: %d MiB\n", (u32)(drm->gem.gart_available >> 20));
  357. return 0;
  358. }
  359. void
  360. nouveau_ttm_fini(struct nouveau_drm *drm)
  361. {
  362. mutex_lock(&drm->dev->struct_mutex);
  363. ttm_bo_clean_mm(&drm->ttm.bdev, TTM_PL_VRAM);
  364. ttm_bo_clean_mm(&drm->ttm.bdev, TTM_PL_TT);
  365. mutex_unlock(&drm->dev->struct_mutex);
  366. ttm_bo_device_release(&drm->ttm.bdev);
  367. nouveau_ttm_global_release(drm);
  368. arch_phys_wc_del(drm->ttm.mtrr);
  369. drm->ttm.mtrr = 0;
  370. }