nouveau_drm.c 29 KB

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  1. /*
  2. * Copyright 2012 Red Hat Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. * Authors: Ben Skeggs
  23. */
  24. #include <linux/console.h>
  25. #include <linux/module.h>
  26. #include <linux/pci.h>
  27. #include <linux/pm_runtime.h>
  28. #include <linux/vga_switcheroo.h>
  29. #include "drmP.h"
  30. #include "drm_crtc_helper.h"
  31. #include <core/device.h>
  32. #include <core/gpuobj.h>
  33. #include <core/option.h>
  34. #include "nouveau_drm.h"
  35. #include "nouveau_dma.h"
  36. #include "nouveau_ttm.h"
  37. #include "nouveau_gem.h"
  38. #include "nouveau_agp.h"
  39. #include "nouveau_vga.h"
  40. #include "nouveau_sysfs.h"
  41. #include "nouveau_hwmon.h"
  42. #include "nouveau_acpi.h"
  43. #include "nouveau_bios.h"
  44. #include "nouveau_ioctl.h"
  45. #include "nouveau_abi16.h"
  46. #include "nouveau_fbcon.h"
  47. #include "nouveau_fence.h"
  48. #include "nouveau_debugfs.h"
  49. #include "nouveau_usif.h"
  50. #include "nouveau_connector.h"
  51. MODULE_PARM_DESC(config, "option string to pass to driver core");
  52. static char *nouveau_config;
  53. module_param_named(config, nouveau_config, charp, 0400);
  54. MODULE_PARM_DESC(debug, "debug string to pass to driver core");
  55. static char *nouveau_debug;
  56. module_param_named(debug, nouveau_debug, charp, 0400);
  57. MODULE_PARM_DESC(noaccel, "disable kernel/abi16 acceleration");
  58. static int nouveau_noaccel = 0;
  59. module_param_named(noaccel, nouveau_noaccel, int, 0400);
  60. MODULE_PARM_DESC(modeset, "enable driver (default: auto, "
  61. "0 = disabled, 1 = enabled, 2 = headless)");
  62. int nouveau_modeset = -1;
  63. module_param_named(modeset, nouveau_modeset, int, 0400);
  64. MODULE_PARM_DESC(runpm, "disable (0), force enable (1), optimus only default (-1)");
  65. int nouveau_runtime_pm = -1;
  66. module_param_named(runpm, nouveau_runtime_pm, int, 0400);
  67. static struct drm_driver driver_stub;
  68. static struct drm_driver driver_pci;
  69. static struct drm_driver driver_platform;
  70. static u64
  71. nouveau_pci_name(struct pci_dev *pdev)
  72. {
  73. u64 name = (u64)pci_domain_nr(pdev->bus) << 32;
  74. name |= pdev->bus->number << 16;
  75. name |= PCI_SLOT(pdev->devfn) << 8;
  76. return name | PCI_FUNC(pdev->devfn);
  77. }
  78. static u64
  79. nouveau_platform_name(struct platform_device *platformdev)
  80. {
  81. return platformdev->id;
  82. }
  83. static u64
  84. nouveau_name(struct drm_device *dev)
  85. {
  86. if (dev->pdev)
  87. return nouveau_pci_name(dev->pdev);
  88. else
  89. return nouveau_platform_name(dev->platformdev);
  90. }
  91. static int
  92. nouveau_cli_create(u64 name, const char *sname,
  93. int size, void **pcli)
  94. {
  95. struct nouveau_cli *cli = *pcli = kzalloc(size, GFP_KERNEL);
  96. if (cli) {
  97. int ret = nvif_client_init(NULL, NULL, sname, name,
  98. nouveau_config, nouveau_debug,
  99. &cli->base);
  100. if (ret == 0) {
  101. mutex_init(&cli->mutex);
  102. usif_client_init(cli);
  103. }
  104. return ret;
  105. }
  106. return -ENOMEM;
  107. }
  108. static void
  109. nouveau_cli_destroy(struct nouveau_cli *cli)
  110. {
  111. nouveau_vm_ref(NULL, &nvkm_client(&cli->base)->vm, NULL);
  112. nvif_client_fini(&cli->base);
  113. usif_client_fini(cli);
  114. }
  115. static void
  116. nouveau_accel_fini(struct nouveau_drm *drm)
  117. {
  118. nouveau_channel_del(&drm->channel);
  119. nvif_object_fini(&drm->ntfy);
  120. nouveau_gpuobj_ref(NULL, &drm->notify);
  121. nvif_object_fini(&drm->nvsw);
  122. nouveau_channel_del(&drm->cechan);
  123. nvif_object_fini(&drm->ttm.copy);
  124. if (drm->fence)
  125. nouveau_fence(drm)->dtor(drm);
  126. }
  127. static void
  128. nouveau_accel_init(struct nouveau_drm *drm)
  129. {
  130. struct nvif_device *device = &drm->device;
  131. u32 arg0, arg1;
  132. u32 sclass[16];
  133. int ret, i;
  134. if (nouveau_noaccel)
  135. return;
  136. /* initialise synchronisation routines */
  137. /*XXX: this is crap, but the fence/channel stuff is a little
  138. * backwards in some places. this will be fixed.
  139. */
  140. ret = nvif_object_sclass(&device->base, sclass, ARRAY_SIZE(sclass));
  141. if (ret < 0)
  142. return;
  143. for (ret = -ENOSYS, i = 0; ret && i < ARRAY_SIZE(sclass); i++) {
  144. switch (sclass[i]) {
  145. case NV03_CHANNEL_DMA:
  146. ret = nv04_fence_create(drm);
  147. break;
  148. case NV10_CHANNEL_DMA:
  149. ret = nv10_fence_create(drm);
  150. break;
  151. case NV17_CHANNEL_DMA:
  152. case NV40_CHANNEL_DMA:
  153. ret = nv17_fence_create(drm);
  154. break;
  155. case NV50_CHANNEL_GPFIFO:
  156. ret = nv50_fence_create(drm);
  157. break;
  158. case G82_CHANNEL_GPFIFO:
  159. ret = nv84_fence_create(drm);
  160. break;
  161. case FERMI_CHANNEL_GPFIFO:
  162. case KEPLER_CHANNEL_GPFIFO_A:
  163. ret = nvc0_fence_create(drm);
  164. break;
  165. default:
  166. break;
  167. }
  168. }
  169. if (ret) {
  170. NV_ERROR(drm, "failed to initialise sync subsystem, %d\n", ret);
  171. nouveau_accel_fini(drm);
  172. return;
  173. }
  174. if (device->info.family >= NV_DEVICE_INFO_V0_KEPLER) {
  175. ret = nouveau_channel_new(drm, &drm->device, NVDRM_CHAN + 1,
  176. KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_CE0|
  177. KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_CE1,
  178. 0, &drm->cechan);
  179. if (ret)
  180. NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
  181. arg0 = KEPLER_CHANNEL_GPFIFO_A_V0_ENGINE_GR;
  182. arg1 = 1;
  183. } else
  184. if (device->info.chipset >= 0xa3 &&
  185. device->info.chipset != 0xaa &&
  186. device->info.chipset != 0xac) {
  187. ret = nouveau_channel_new(drm, &drm->device, NVDRM_CHAN + 1,
  188. NvDmaFB, NvDmaTT, &drm->cechan);
  189. if (ret)
  190. NV_ERROR(drm, "failed to create ce channel, %d\n", ret);
  191. arg0 = NvDmaFB;
  192. arg1 = NvDmaTT;
  193. } else {
  194. arg0 = NvDmaFB;
  195. arg1 = NvDmaTT;
  196. }
  197. ret = nouveau_channel_new(drm, &drm->device, NVDRM_CHAN, arg0, arg1,
  198. &drm->channel);
  199. if (ret) {
  200. NV_ERROR(drm, "failed to create kernel channel, %d\n", ret);
  201. nouveau_accel_fini(drm);
  202. return;
  203. }
  204. ret = nvif_object_init(drm->channel->object, NULL, NVDRM_NVSW,
  205. nouveau_abi16_swclass(drm), NULL, 0, &drm->nvsw);
  206. if (ret == 0) {
  207. struct nouveau_software_chan *swch;
  208. ret = RING_SPACE(drm->channel, 2);
  209. if (ret == 0) {
  210. if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
  211. BEGIN_NV04(drm->channel, NvSubSw, 0, 1);
  212. OUT_RING (drm->channel, NVDRM_NVSW);
  213. } else
  214. if (device->info.family < NV_DEVICE_INFO_V0_KEPLER) {
  215. BEGIN_NVC0(drm->channel, FermiSw, 0, 1);
  216. OUT_RING (drm->channel, 0x001f0000);
  217. }
  218. }
  219. swch = (void *)nvkm_object(&drm->nvsw)->parent;
  220. swch->flip = nouveau_flip_complete;
  221. swch->flip_data = drm->channel;
  222. }
  223. if (ret) {
  224. NV_ERROR(drm, "failed to allocate software object, %d\n", ret);
  225. nouveau_accel_fini(drm);
  226. return;
  227. }
  228. if (device->info.family < NV_DEVICE_INFO_V0_FERMI) {
  229. ret = nouveau_gpuobj_new(nvkm_object(&drm->device), NULL, 32,
  230. 0, 0, &drm->notify);
  231. if (ret) {
  232. NV_ERROR(drm, "failed to allocate notifier, %d\n", ret);
  233. nouveau_accel_fini(drm);
  234. return;
  235. }
  236. ret = nvif_object_init(drm->channel->object, NULL, NvNotify0,
  237. NV_DMA_IN_MEMORY,
  238. &(struct nv_dma_v0) {
  239. .target = NV_DMA_V0_TARGET_VRAM,
  240. .access = NV_DMA_V0_ACCESS_RDWR,
  241. .start = drm->notify->addr,
  242. .limit = drm->notify->addr + 31
  243. }, sizeof(struct nv_dma_v0),
  244. &drm->ntfy);
  245. if (ret) {
  246. nouveau_accel_fini(drm);
  247. return;
  248. }
  249. }
  250. nouveau_bo_move_init(drm);
  251. }
  252. static int nouveau_drm_probe(struct pci_dev *pdev,
  253. const struct pci_device_id *pent)
  254. {
  255. struct nouveau_device *device;
  256. struct apertures_struct *aper;
  257. bool boot = false;
  258. int ret;
  259. /* remove conflicting drivers (vesafb, efifb etc) */
  260. aper = alloc_apertures(3);
  261. if (!aper)
  262. return -ENOMEM;
  263. aper->ranges[0].base = pci_resource_start(pdev, 1);
  264. aper->ranges[0].size = pci_resource_len(pdev, 1);
  265. aper->count = 1;
  266. if (pci_resource_len(pdev, 2)) {
  267. aper->ranges[aper->count].base = pci_resource_start(pdev, 2);
  268. aper->ranges[aper->count].size = pci_resource_len(pdev, 2);
  269. aper->count++;
  270. }
  271. if (pci_resource_len(pdev, 3)) {
  272. aper->ranges[aper->count].base = pci_resource_start(pdev, 3);
  273. aper->ranges[aper->count].size = pci_resource_len(pdev, 3);
  274. aper->count++;
  275. }
  276. #ifdef CONFIG_X86
  277. boot = pdev->resource[PCI_ROM_RESOURCE].flags & IORESOURCE_ROM_SHADOW;
  278. #endif
  279. if (nouveau_modeset != 2)
  280. remove_conflicting_framebuffers(aper, "nouveaufb", boot);
  281. kfree(aper);
  282. ret = nouveau_device_create(pdev, NOUVEAU_BUS_PCI,
  283. nouveau_pci_name(pdev), pci_name(pdev),
  284. nouveau_config, nouveau_debug, &device);
  285. if (ret)
  286. return ret;
  287. pci_set_master(pdev);
  288. ret = drm_get_pci_dev(pdev, pent, &driver_pci);
  289. if (ret) {
  290. nouveau_object_ref(NULL, (struct nouveau_object **)&device);
  291. return ret;
  292. }
  293. return 0;
  294. }
  295. #define PCI_CLASS_MULTIMEDIA_HD_AUDIO 0x0403
  296. static void
  297. nouveau_get_hdmi_dev(struct nouveau_drm *drm)
  298. {
  299. struct pci_dev *pdev = drm->dev->pdev;
  300. if (!pdev) {
  301. DRM_INFO("not a PCI device; no HDMI\n");
  302. drm->hdmi_device = NULL;
  303. return;
  304. }
  305. /* subfunction one is a hdmi audio device? */
  306. drm->hdmi_device = pci_get_bus_and_slot((unsigned int)pdev->bus->number,
  307. PCI_DEVFN(PCI_SLOT(pdev->devfn), 1));
  308. if (!drm->hdmi_device) {
  309. NV_DEBUG(drm, "hdmi device not found %d %d %d\n", pdev->bus->number, PCI_SLOT(pdev->devfn), 1);
  310. return;
  311. }
  312. if ((drm->hdmi_device->class >> 8) != PCI_CLASS_MULTIMEDIA_HD_AUDIO) {
  313. NV_DEBUG(drm, "possible hdmi device not audio %d\n", drm->hdmi_device->class);
  314. pci_dev_put(drm->hdmi_device);
  315. drm->hdmi_device = NULL;
  316. return;
  317. }
  318. }
  319. static int
  320. nouveau_drm_load(struct drm_device *dev, unsigned long flags)
  321. {
  322. struct pci_dev *pdev = dev->pdev;
  323. struct nouveau_drm *drm;
  324. int ret;
  325. ret = nouveau_cli_create(nouveau_name(dev), "DRM", sizeof(*drm),
  326. (void **)&drm);
  327. if (ret)
  328. return ret;
  329. dev->dev_private = drm;
  330. drm->dev = dev;
  331. nvkm_client(&drm->client.base)->debug =
  332. nouveau_dbgopt(nouveau_debug, "DRM");
  333. INIT_LIST_HEAD(&drm->clients);
  334. spin_lock_init(&drm->tile.lock);
  335. nouveau_get_hdmi_dev(drm);
  336. /* make sure AGP controller is in a consistent state before we
  337. * (possibly) execute vbios init tables (see nouveau_agp.h)
  338. */
  339. if (pdev && drm_pci_device_is_agp(dev) && dev->agp) {
  340. const u64 enables = NV_DEVICE_V0_DISABLE_IDENTIFY |
  341. NV_DEVICE_V0_DISABLE_MMIO;
  342. /* dummy device object, doesn't init anything, but allows
  343. * agp code access to registers
  344. */
  345. ret = nvif_device_init(&drm->client.base.base, NULL,
  346. NVDRM_DEVICE, NV_DEVICE,
  347. &(struct nv_device_v0) {
  348. .device = ~0,
  349. .disable = ~enables,
  350. .debug0 = ~0,
  351. }, sizeof(struct nv_device_v0),
  352. &drm->device);
  353. if (ret)
  354. goto fail_device;
  355. nouveau_agp_reset(drm);
  356. nvif_device_fini(&drm->device);
  357. }
  358. ret = nvif_device_init(&drm->client.base.base, NULL, NVDRM_DEVICE,
  359. NV_DEVICE,
  360. &(struct nv_device_v0) {
  361. .device = ~0,
  362. .disable = 0,
  363. .debug0 = 0,
  364. }, sizeof(struct nv_device_v0),
  365. &drm->device);
  366. if (ret)
  367. goto fail_device;
  368. dev->irq_enabled = true;
  369. /* workaround an odd issue on nvc1 by disabling the device's
  370. * nosnoop capability. hopefully won't cause issues until a
  371. * better fix is found - assuming there is one...
  372. */
  373. if (drm->device.info.chipset == 0xc1)
  374. nvif_mask(&drm->device, 0x00088080, 0x00000800, 0x00000000);
  375. nouveau_vga_init(drm);
  376. nouveau_agp_init(drm);
  377. if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
  378. ret = nouveau_vm_new(nvkm_device(&drm->device), 0, (1ULL << 40),
  379. 0x1000, &drm->client.vm);
  380. if (ret)
  381. goto fail_device;
  382. nvkm_client(&drm->client.base)->vm = drm->client.vm;
  383. }
  384. ret = nouveau_ttm_init(drm);
  385. if (ret)
  386. goto fail_ttm;
  387. ret = nouveau_bios_init(dev);
  388. if (ret)
  389. goto fail_bios;
  390. ret = nouveau_display_create(dev);
  391. if (ret)
  392. goto fail_dispctor;
  393. if (dev->mode_config.num_crtc) {
  394. ret = nouveau_display_init(dev);
  395. if (ret)
  396. goto fail_dispinit;
  397. }
  398. nouveau_sysfs_init(dev);
  399. nouveau_hwmon_init(dev);
  400. nouveau_accel_init(drm);
  401. nouveau_fbcon_init(dev);
  402. if (nouveau_runtime_pm != 0) {
  403. pm_runtime_use_autosuspend(dev->dev);
  404. pm_runtime_set_autosuspend_delay(dev->dev, 5000);
  405. pm_runtime_set_active(dev->dev);
  406. pm_runtime_allow(dev->dev);
  407. pm_runtime_mark_last_busy(dev->dev);
  408. pm_runtime_put(dev->dev);
  409. }
  410. return 0;
  411. fail_dispinit:
  412. nouveau_display_destroy(dev);
  413. fail_dispctor:
  414. nouveau_bios_takedown(dev);
  415. fail_bios:
  416. nouveau_ttm_fini(drm);
  417. fail_ttm:
  418. nouveau_agp_fini(drm);
  419. nouveau_vga_fini(drm);
  420. fail_device:
  421. nvif_device_fini(&drm->device);
  422. nouveau_cli_destroy(&drm->client);
  423. return ret;
  424. }
  425. static int
  426. nouveau_drm_unload(struct drm_device *dev)
  427. {
  428. struct nouveau_drm *drm = nouveau_drm(dev);
  429. pm_runtime_get_sync(dev->dev);
  430. nouveau_fbcon_fini(dev);
  431. nouveau_accel_fini(drm);
  432. nouveau_hwmon_fini(dev);
  433. nouveau_sysfs_fini(dev);
  434. if (dev->mode_config.num_crtc)
  435. nouveau_display_fini(dev);
  436. nouveau_display_destroy(dev);
  437. nouveau_bios_takedown(dev);
  438. nouveau_ttm_fini(drm);
  439. nouveau_agp_fini(drm);
  440. nouveau_vga_fini(drm);
  441. nvif_device_fini(&drm->device);
  442. if (drm->hdmi_device)
  443. pci_dev_put(drm->hdmi_device);
  444. nouveau_cli_destroy(&drm->client);
  445. return 0;
  446. }
  447. void
  448. nouveau_drm_device_remove(struct drm_device *dev)
  449. {
  450. struct nouveau_drm *drm = nouveau_drm(dev);
  451. struct nouveau_client *client;
  452. struct nouveau_object *device;
  453. dev->irq_enabled = false;
  454. client = nvkm_client(&drm->client.base);
  455. device = client->device;
  456. drm_put_dev(dev);
  457. nouveau_object_ref(NULL, &device);
  458. nouveau_object_debug();
  459. }
  460. EXPORT_SYMBOL(nouveau_drm_device_remove);
  461. static void
  462. nouveau_drm_remove(struct pci_dev *pdev)
  463. {
  464. struct drm_device *dev = pci_get_drvdata(pdev);
  465. nouveau_drm_device_remove(dev);
  466. }
  467. static int
  468. nouveau_do_suspend(struct drm_device *dev, bool runtime)
  469. {
  470. struct nouveau_drm *drm = nouveau_drm(dev);
  471. struct nouveau_cli *cli;
  472. int ret;
  473. if (dev->mode_config.num_crtc) {
  474. NV_INFO(drm, "suspending console...\n");
  475. nouveau_fbcon_set_suspend(dev, 1);
  476. NV_INFO(drm, "suspending display...\n");
  477. ret = nouveau_display_suspend(dev, runtime);
  478. if (ret)
  479. return ret;
  480. }
  481. NV_INFO(drm, "evicting buffers...\n");
  482. ttm_bo_evict_mm(&drm->ttm.bdev, TTM_PL_VRAM);
  483. NV_INFO(drm, "waiting for kernel channels to go idle...\n");
  484. if (drm->cechan) {
  485. ret = nouveau_channel_idle(drm->cechan);
  486. if (ret)
  487. goto fail_display;
  488. }
  489. if (drm->channel) {
  490. ret = nouveau_channel_idle(drm->channel);
  491. if (ret)
  492. goto fail_display;
  493. }
  494. NV_INFO(drm, "suspending client object trees...\n");
  495. if (drm->fence && nouveau_fence(drm)->suspend) {
  496. if (!nouveau_fence(drm)->suspend(drm)) {
  497. ret = -ENOMEM;
  498. goto fail_display;
  499. }
  500. }
  501. list_for_each_entry(cli, &drm->clients, head) {
  502. ret = nvif_client_suspend(&cli->base);
  503. if (ret)
  504. goto fail_client;
  505. }
  506. NV_INFO(drm, "suspending kernel object tree...\n");
  507. ret = nvif_client_suspend(&drm->client.base);
  508. if (ret)
  509. goto fail_client;
  510. nouveau_agp_fini(drm);
  511. return 0;
  512. fail_client:
  513. list_for_each_entry_continue_reverse(cli, &drm->clients, head) {
  514. nvif_client_resume(&cli->base);
  515. }
  516. if (drm->fence && nouveau_fence(drm)->resume)
  517. nouveau_fence(drm)->resume(drm);
  518. fail_display:
  519. if (dev->mode_config.num_crtc) {
  520. NV_INFO(drm, "resuming display...\n");
  521. nouveau_display_resume(dev, runtime);
  522. }
  523. return ret;
  524. }
  525. static int
  526. nouveau_do_resume(struct drm_device *dev, bool runtime)
  527. {
  528. struct nouveau_drm *drm = nouveau_drm(dev);
  529. struct nouveau_cli *cli;
  530. NV_INFO(drm, "re-enabling device...\n");
  531. nouveau_agp_reset(drm);
  532. NV_INFO(drm, "resuming kernel object tree...\n");
  533. nvif_client_resume(&drm->client.base);
  534. nouveau_agp_init(drm);
  535. NV_INFO(drm, "resuming client object trees...\n");
  536. if (drm->fence && nouveau_fence(drm)->resume)
  537. nouveau_fence(drm)->resume(drm);
  538. list_for_each_entry(cli, &drm->clients, head) {
  539. nvif_client_resume(&cli->base);
  540. }
  541. nouveau_run_vbios_init(dev);
  542. if (dev->mode_config.num_crtc) {
  543. NV_INFO(drm, "resuming display...\n");
  544. nouveau_display_resume(dev, runtime);
  545. NV_INFO(drm, "resuming console...\n");
  546. nouveau_fbcon_set_suspend(dev, 0);
  547. }
  548. return 0;
  549. }
  550. int
  551. nouveau_pmops_suspend(struct device *dev)
  552. {
  553. struct pci_dev *pdev = to_pci_dev(dev);
  554. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  555. int ret;
  556. if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
  557. drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
  558. return 0;
  559. ret = nouveau_do_suspend(drm_dev, false);
  560. if (ret)
  561. return ret;
  562. pci_save_state(pdev);
  563. pci_disable_device(pdev);
  564. pci_set_power_state(pdev, PCI_D3hot);
  565. return 0;
  566. }
  567. int
  568. nouveau_pmops_resume(struct device *dev)
  569. {
  570. struct pci_dev *pdev = to_pci_dev(dev);
  571. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  572. int ret;
  573. if (drm_dev->switch_power_state == DRM_SWITCH_POWER_OFF ||
  574. drm_dev->switch_power_state == DRM_SWITCH_POWER_DYNAMIC_OFF)
  575. return 0;
  576. pci_set_power_state(pdev, PCI_D0);
  577. pci_restore_state(pdev);
  578. ret = pci_enable_device(pdev);
  579. if (ret)
  580. return ret;
  581. pci_set_master(pdev);
  582. return nouveau_do_resume(drm_dev, false);
  583. }
  584. static int
  585. nouveau_pmops_freeze(struct device *dev)
  586. {
  587. struct pci_dev *pdev = to_pci_dev(dev);
  588. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  589. return nouveau_do_suspend(drm_dev, false);
  590. }
  591. static int
  592. nouveau_pmops_thaw(struct device *dev)
  593. {
  594. struct pci_dev *pdev = to_pci_dev(dev);
  595. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  596. return nouveau_do_resume(drm_dev, false);
  597. }
  598. static int
  599. nouveau_pmops_runtime_suspend(struct device *dev)
  600. {
  601. struct pci_dev *pdev = to_pci_dev(dev);
  602. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  603. int ret;
  604. if (nouveau_runtime_pm == 0) {
  605. pm_runtime_forbid(dev);
  606. return -EBUSY;
  607. }
  608. /* are we optimus enabled? */
  609. if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) {
  610. DRM_DEBUG_DRIVER("failing to power off - not optimus\n");
  611. pm_runtime_forbid(dev);
  612. return -EBUSY;
  613. }
  614. nv_debug_level(SILENT);
  615. drm_kms_helper_poll_disable(drm_dev);
  616. vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_OFF);
  617. nouveau_switcheroo_optimus_dsm();
  618. ret = nouveau_do_suspend(drm_dev, true);
  619. pci_save_state(pdev);
  620. pci_disable_device(pdev);
  621. pci_ignore_hotplug(pdev);
  622. pci_set_power_state(pdev, PCI_D3cold);
  623. drm_dev->switch_power_state = DRM_SWITCH_POWER_DYNAMIC_OFF;
  624. return ret;
  625. }
  626. static int
  627. nouveau_pmops_runtime_resume(struct device *dev)
  628. {
  629. struct pci_dev *pdev = to_pci_dev(dev);
  630. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  631. struct nvif_device *device = &nouveau_drm(drm_dev)->device;
  632. int ret;
  633. if (nouveau_runtime_pm == 0)
  634. return -EINVAL;
  635. pci_set_power_state(pdev, PCI_D0);
  636. pci_restore_state(pdev);
  637. ret = pci_enable_device(pdev);
  638. if (ret)
  639. return ret;
  640. pci_set_master(pdev);
  641. ret = nouveau_do_resume(drm_dev, true);
  642. drm_kms_helper_poll_enable(drm_dev);
  643. /* do magic */
  644. nvif_mask(device, 0x88488, (1 << 25), (1 << 25));
  645. vga_switcheroo_set_dynamic_switch(pdev, VGA_SWITCHEROO_ON);
  646. drm_dev->switch_power_state = DRM_SWITCH_POWER_ON;
  647. nv_debug_level(NORMAL);
  648. return ret;
  649. }
  650. static int
  651. nouveau_pmops_runtime_idle(struct device *dev)
  652. {
  653. struct pci_dev *pdev = to_pci_dev(dev);
  654. struct drm_device *drm_dev = pci_get_drvdata(pdev);
  655. struct nouveau_drm *drm = nouveau_drm(drm_dev);
  656. struct drm_crtc *crtc;
  657. if (nouveau_runtime_pm == 0) {
  658. pm_runtime_forbid(dev);
  659. return -EBUSY;
  660. }
  661. /* are we optimus enabled? */
  662. if (nouveau_runtime_pm == -1 && !nouveau_is_optimus() && !nouveau_is_v1_dsm()) {
  663. DRM_DEBUG_DRIVER("failing to power off - not optimus\n");
  664. pm_runtime_forbid(dev);
  665. return -EBUSY;
  666. }
  667. /* if we have a hdmi audio device - make sure it has a driver loaded */
  668. if (drm->hdmi_device) {
  669. if (!drm->hdmi_device->driver) {
  670. DRM_DEBUG_DRIVER("failing to power off - no HDMI audio driver loaded\n");
  671. pm_runtime_mark_last_busy(dev);
  672. return -EBUSY;
  673. }
  674. }
  675. list_for_each_entry(crtc, &drm->dev->mode_config.crtc_list, head) {
  676. if (crtc->enabled) {
  677. DRM_DEBUG_DRIVER("failing to power off - crtc active\n");
  678. return -EBUSY;
  679. }
  680. }
  681. pm_runtime_mark_last_busy(dev);
  682. pm_runtime_autosuspend(dev);
  683. /* we don't want the main rpm_idle to call suspend - we want to autosuspend */
  684. return 1;
  685. }
  686. static int
  687. nouveau_drm_open(struct drm_device *dev, struct drm_file *fpriv)
  688. {
  689. struct nouveau_drm *drm = nouveau_drm(dev);
  690. struct nouveau_cli *cli;
  691. char name[32], tmpname[TASK_COMM_LEN];
  692. int ret;
  693. /* need to bring up power immediately if opening device */
  694. ret = pm_runtime_get_sync(dev->dev);
  695. if (ret < 0 && ret != -EACCES)
  696. return ret;
  697. get_task_comm(tmpname, current);
  698. snprintf(name, sizeof(name), "%s[%d]", tmpname, pid_nr(fpriv->pid));
  699. ret = nouveau_cli_create(nouveau_name(dev), name, sizeof(*cli),
  700. (void **)&cli);
  701. if (ret)
  702. goto out_suspend;
  703. cli->base.super = false;
  704. if (drm->device.info.family >= NV_DEVICE_INFO_V0_TESLA) {
  705. ret = nouveau_vm_new(nvkm_device(&drm->device), 0, (1ULL << 40),
  706. 0x1000, &cli->vm);
  707. if (ret) {
  708. nouveau_cli_destroy(cli);
  709. goto out_suspend;
  710. }
  711. nvkm_client(&cli->base)->vm = cli->vm;
  712. }
  713. fpriv->driver_priv = cli;
  714. mutex_lock(&drm->client.mutex);
  715. list_add(&cli->head, &drm->clients);
  716. mutex_unlock(&drm->client.mutex);
  717. out_suspend:
  718. pm_runtime_mark_last_busy(dev->dev);
  719. pm_runtime_put_autosuspend(dev->dev);
  720. return ret;
  721. }
  722. static void
  723. nouveau_drm_preclose(struct drm_device *dev, struct drm_file *fpriv)
  724. {
  725. struct nouveau_cli *cli = nouveau_cli(fpriv);
  726. struct nouveau_drm *drm = nouveau_drm(dev);
  727. pm_runtime_get_sync(dev->dev);
  728. if (cli->abi16)
  729. nouveau_abi16_fini(cli->abi16);
  730. mutex_lock(&drm->client.mutex);
  731. list_del(&cli->head);
  732. mutex_unlock(&drm->client.mutex);
  733. }
  734. static void
  735. nouveau_drm_postclose(struct drm_device *dev, struct drm_file *fpriv)
  736. {
  737. struct nouveau_cli *cli = nouveau_cli(fpriv);
  738. nouveau_cli_destroy(cli);
  739. pm_runtime_mark_last_busy(dev->dev);
  740. pm_runtime_put_autosuspend(dev->dev);
  741. }
  742. static const struct drm_ioctl_desc
  743. nouveau_ioctls[] = {
  744. DRM_IOCTL_DEF_DRV(NOUVEAU_GETPARAM, nouveau_abi16_ioctl_getparam, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  745. DRM_IOCTL_DEF_DRV(NOUVEAU_SETPARAM, nouveau_abi16_ioctl_setparam, DRM_UNLOCKED|DRM_AUTH|DRM_MASTER|DRM_ROOT_ONLY),
  746. DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_ALLOC, nouveau_abi16_ioctl_channel_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  747. DRM_IOCTL_DEF_DRV(NOUVEAU_CHANNEL_FREE, nouveau_abi16_ioctl_channel_free, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  748. DRM_IOCTL_DEF_DRV(NOUVEAU_GROBJ_ALLOC, nouveau_abi16_ioctl_grobj_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  749. DRM_IOCTL_DEF_DRV(NOUVEAU_NOTIFIEROBJ_ALLOC, nouveau_abi16_ioctl_notifierobj_alloc, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  750. DRM_IOCTL_DEF_DRV(NOUVEAU_GPUOBJ_FREE, nouveau_abi16_ioctl_gpuobj_free, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  751. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_NEW, nouveau_gem_ioctl_new, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  752. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_PUSHBUF, nouveau_gem_ioctl_pushbuf, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  753. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_PREP, nouveau_gem_ioctl_cpu_prep, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  754. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_CPU_FINI, nouveau_gem_ioctl_cpu_fini, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  755. DRM_IOCTL_DEF_DRV(NOUVEAU_GEM_INFO, nouveau_gem_ioctl_info, DRM_UNLOCKED|DRM_AUTH|DRM_RENDER_ALLOW),
  756. };
  757. long
  758. nouveau_drm_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
  759. {
  760. struct drm_file *filp = file->private_data;
  761. struct drm_device *dev = filp->minor->dev;
  762. long ret;
  763. ret = pm_runtime_get_sync(dev->dev);
  764. if (ret < 0 && ret != -EACCES)
  765. return ret;
  766. switch (_IOC_NR(cmd) - DRM_COMMAND_BASE) {
  767. case DRM_NOUVEAU_NVIF:
  768. ret = usif_ioctl(filp, (void __user *)arg, _IOC_SIZE(cmd));
  769. break;
  770. default:
  771. ret = drm_ioctl(file, cmd, arg);
  772. break;
  773. }
  774. pm_runtime_mark_last_busy(dev->dev);
  775. pm_runtime_put_autosuspend(dev->dev);
  776. return ret;
  777. }
  778. static const struct file_operations
  779. nouveau_driver_fops = {
  780. .owner = THIS_MODULE,
  781. .open = drm_open,
  782. .release = drm_release,
  783. .unlocked_ioctl = nouveau_drm_ioctl,
  784. .mmap = nouveau_ttm_mmap,
  785. .poll = drm_poll,
  786. .read = drm_read,
  787. #if defined(CONFIG_COMPAT)
  788. .compat_ioctl = nouveau_compat_ioctl,
  789. #endif
  790. .llseek = noop_llseek,
  791. };
  792. static struct drm_driver
  793. driver_stub = {
  794. .driver_features =
  795. DRIVER_USE_AGP |
  796. DRIVER_GEM | DRIVER_MODESET | DRIVER_PRIME | DRIVER_RENDER,
  797. .load = nouveau_drm_load,
  798. .unload = nouveau_drm_unload,
  799. .open = nouveau_drm_open,
  800. .preclose = nouveau_drm_preclose,
  801. .postclose = nouveau_drm_postclose,
  802. .lastclose = nouveau_vga_lastclose,
  803. #if defined(CONFIG_DEBUG_FS)
  804. .debugfs_init = nouveau_debugfs_init,
  805. .debugfs_cleanup = nouveau_debugfs_takedown,
  806. #endif
  807. .get_vblank_counter = drm_vblank_count,
  808. .enable_vblank = nouveau_display_vblank_enable,
  809. .disable_vblank = nouveau_display_vblank_disable,
  810. .get_scanout_position = nouveau_display_scanoutpos,
  811. .get_vblank_timestamp = nouveau_display_vblstamp,
  812. .ioctls = nouveau_ioctls,
  813. .num_ioctls = ARRAY_SIZE(nouveau_ioctls),
  814. .fops = &nouveau_driver_fops,
  815. .prime_handle_to_fd = drm_gem_prime_handle_to_fd,
  816. .prime_fd_to_handle = drm_gem_prime_fd_to_handle,
  817. .gem_prime_export = drm_gem_prime_export,
  818. .gem_prime_import = drm_gem_prime_import,
  819. .gem_prime_pin = nouveau_gem_prime_pin,
  820. .gem_prime_res_obj = nouveau_gem_prime_res_obj,
  821. .gem_prime_unpin = nouveau_gem_prime_unpin,
  822. .gem_prime_get_sg_table = nouveau_gem_prime_get_sg_table,
  823. .gem_prime_import_sg_table = nouveau_gem_prime_import_sg_table,
  824. .gem_prime_vmap = nouveau_gem_prime_vmap,
  825. .gem_prime_vunmap = nouveau_gem_prime_vunmap,
  826. .gem_free_object = nouveau_gem_object_del,
  827. .gem_open_object = nouveau_gem_object_open,
  828. .gem_close_object = nouveau_gem_object_close,
  829. .dumb_create = nouveau_display_dumb_create,
  830. .dumb_map_offset = nouveau_display_dumb_map_offset,
  831. .dumb_destroy = drm_gem_dumb_destroy,
  832. .name = DRIVER_NAME,
  833. .desc = DRIVER_DESC,
  834. #ifdef GIT_REVISION
  835. .date = GIT_REVISION,
  836. #else
  837. .date = DRIVER_DATE,
  838. #endif
  839. .major = DRIVER_MAJOR,
  840. .minor = DRIVER_MINOR,
  841. .patchlevel = DRIVER_PATCHLEVEL,
  842. };
  843. static struct pci_device_id
  844. nouveau_drm_pci_table[] = {
  845. {
  846. PCI_DEVICE(PCI_VENDOR_ID_NVIDIA, PCI_ANY_ID),
  847. .class = PCI_BASE_CLASS_DISPLAY << 16,
  848. .class_mask = 0xff << 16,
  849. },
  850. {
  851. PCI_DEVICE(PCI_VENDOR_ID_NVIDIA_SGS, PCI_ANY_ID),
  852. .class = PCI_BASE_CLASS_DISPLAY << 16,
  853. .class_mask = 0xff << 16,
  854. },
  855. {}
  856. };
  857. static void nouveau_display_options(void)
  858. {
  859. DRM_DEBUG_DRIVER("Loading Nouveau with parameters:\n");
  860. DRM_DEBUG_DRIVER("... tv_disable : %d\n", nouveau_tv_disable);
  861. DRM_DEBUG_DRIVER("... ignorelid : %d\n", nouveau_ignorelid);
  862. DRM_DEBUG_DRIVER("... duallink : %d\n", nouveau_duallink);
  863. DRM_DEBUG_DRIVER("... nofbaccel : %d\n", nouveau_nofbaccel);
  864. DRM_DEBUG_DRIVER("... config : %s\n", nouveau_config);
  865. DRM_DEBUG_DRIVER("... debug : %s\n", nouveau_debug);
  866. DRM_DEBUG_DRIVER("... noaccel : %d\n", nouveau_noaccel);
  867. DRM_DEBUG_DRIVER("... modeset : %d\n", nouveau_modeset);
  868. DRM_DEBUG_DRIVER("... runpm : %d\n", nouveau_runtime_pm);
  869. DRM_DEBUG_DRIVER("... vram_pushbuf : %d\n", nouveau_vram_pushbuf);
  870. DRM_DEBUG_DRIVER("... pstate : %d\n", nouveau_pstate);
  871. }
  872. static const struct dev_pm_ops nouveau_pm_ops = {
  873. .suspend = nouveau_pmops_suspend,
  874. .resume = nouveau_pmops_resume,
  875. .freeze = nouveau_pmops_freeze,
  876. .thaw = nouveau_pmops_thaw,
  877. .poweroff = nouveau_pmops_freeze,
  878. .restore = nouveau_pmops_resume,
  879. .runtime_suspend = nouveau_pmops_runtime_suspend,
  880. .runtime_resume = nouveau_pmops_runtime_resume,
  881. .runtime_idle = nouveau_pmops_runtime_idle,
  882. };
  883. static struct pci_driver
  884. nouveau_drm_pci_driver = {
  885. .name = "nouveau",
  886. .id_table = nouveau_drm_pci_table,
  887. .probe = nouveau_drm_probe,
  888. .remove = nouveau_drm_remove,
  889. .driver.pm = &nouveau_pm_ops,
  890. };
  891. struct drm_device *
  892. nouveau_platform_device_create_(struct platform_device *pdev, int size,
  893. void **pobject)
  894. {
  895. struct drm_device *drm;
  896. int err;
  897. err = nouveau_device_create_(pdev, NOUVEAU_BUS_PLATFORM,
  898. nouveau_platform_name(pdev),
  899. dev_name(&pdev->dev), nouveau_config,
  900. nouveau_debug, size, pobject);
  901. if (err)
  902. return ERR_PTR(err);
  903. drm = drm_dev_alloc(&driver_platform, &pdev->dev);
  904. if (!drm) {
  905. err = -ENOMEM;
  906. goto err_free;
  907. }
  908. err = drm_dev_set_unique(drm, "%s", dev_name(&pdev->dev));
  909. if (err < 0)
  910. goto err_free;
  911. drm->platformdev = pdev;
  912. platform_set_drvdata(pdev, drm);
  913. return drm;
  914. err_free:
  915. nouveau_object_ref(NULL, (struct nouveau_object **)pobject);
  916. return ERR_PTR(err);
  917. }
  918. EXPORT_SYMBOL(nouveau_platform_device_create_);
  919. static int __init
  920. nouveau_drm_init(void)
  921. {
  922. driver_pci = driver_stub;
  923. driver_pci.set_busid = drm_pci_set_busid;
  924. driver_platform = driver_stub;
  925. driver_platform.set_busid = drm_platform_set_busid;
  926. nouveau_display_options();
  927. if (nouveau_modeset == -1) {
  928. #ifdef CONFIG_VGA_CONSOLE
  929. if (vgacon_text_force())
  930. nouveau_modeset = 0;
  931. #endif
  932. }
  933. if (!nouveau_modeset)
  934. return 0;
  935. nouveau_register_dsm_handler();
  936. return drm_pci_init(&driver_pci, &nouveau_drm_pci_driver);
  937. }
  938. static void __exit
  939. nouveau_drm_exit(void)
  940. {
  941. if (!nouveau_modeset)
  942. return;
  943. drm_pci_exit(&driver_pci, &nouveau_drm_pci_driver);
  944. nouveau_unregister_dsm_handler();
  945. }
  946. module_init(nouveau_drm_init);
  947. module_exit(nouveau_drm_exit);
  948. MODULE_DEVICE_TABLE(pci, nouveau_drm_pci_table);
  949. MODULE_AUTHOR(DRIVER_AUTHOR);
  950. MODULE_DESCRIPTION(DRIVER_DESC);
  951. MODULE_LICENSE("GPL and additional rights");