hdmi_bridge.c 6.1 KB

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  1. /*
  2. * Copyright (C) 2013 Red Hat
  3. * Author: Rob Clark <robdclark@gmail.com>
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms of the GNU General Public License version 2 as published by
  7. * the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope that it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. *
  14. * You should have received a copy of the GNU General Public License along with
  15. * this program. If not, see <http://www.gnu.org/licenses/>.
  16. */
  17. #include "hdmi.h"
  18. struct hdmi_bridge {
  19. struct drm_bridge base;
  20. struct hdmi *hdmi;
  21. };
  22. #define to_hdmi_bridge(x) container_of(x, struct hdmi_bridge, base)
  23. static void hdmi_bridge_destroy(struct drm_bridge *bridge)
  24. {
  25. struct hdmi_bridge *hdmi_bridge = to_hdmi_bridge(bridge);
  26. drm_bridge_cleanup(bridge);
  27. kfree(hdmi_bridge);
  28. }
  29. static void power_on(struct drm_bridge *bridge)
  30. {
  31. struct drm_device *dev = bridge->dev;
  32. struct hdmi_bridge *hdmi_bridge = to_hdmi_bridge(bridge);
  33. struct hdmi *hdmi = hdmi_bridge->hdmi;
  34. const struct hdmi_platform_config *config = hdmi->config;
  35. int i, ret;
  36. for (i = 0; i < config->pwr_reg_cnt; i++) {
  37. ret = regulator_enable(hdmi->pwr_regs[i]);
  38. if (ret) {
  39. dev_err(dev->dev, "failed to enable pwr regulator: %s (%d)\n",
  40. config->pwr_reg_names[i], ret);
  41. }
  42. }
  43. if (config->pwr_clk_cnt > 0) {
  44. DBG("pixclock: %lu", hdmi->pixclock);
  45. ret = clk_set_rate(hdmi->pwr_clks[0], hdmi->pixclock);
  46. if (ret) {
  47. dev_err(dev->dev, "failed to set pixel clk: %s (%d)\n",
  48. config->pwr_clk_names[0], ret);
  49. }
  50. }
  51. for (i = 0; i < config->pwr_clk_cnt; i++) {
  52. ret = clk_prepare_enable(hdmi->pwr_clks[i]);
  53. if (ret) {
  54. dev_err(dev->dev, "failed to enable pwr clk: %s (%d)\n",
  55. config->pwr_clk_names[i], ret);
  56. }
  57. }
  58. }
  59. static void power_off(struct drm_bridge *bridge)
  60. {
  61. struct drm_device *dev = bridge->dev;
  62. struct hdmi_bridge *hdmi_bridge = to_hdmi_bridge(bridge);
  63. struct hdmi *hdmi = hdmi_bridge->hdmi;
  64. const struct hdmi_platform_config *config = hdmi->config;
  65. int i, ret;
  66. /* TODO do we need to wait for final vblank somewhere before
  67. * cutting the clocks?
  68. */
  69. mdelay(16 + 4);
  70. for (i = 0; i < config->pwr_clk_cnt; i++)
  71. clk_disable_unprepare(hdmi->pwr_clks[i]);
  72. for (i = 0; i < config->pwr_reg_cnt; i++) {
  73. ret = regulator_disable(hdmi->pwr_regs[i]);
  74. if (ret) {
  75. dev_err(dev->dev, "failed to disable pwr regulator: %s (%d)\n",
  76. config->pwr_reg_names[i], ret);
  77. }
  78. }
  79. }
  80. static void hdmi_bridge_pre_enable(struct drm_bridge *bridge)
  81. {
  82. struct hdmi_bridge *hdmi_bridge = to_hdmi_bridge(bridge);
  83. struct hdmi *hdmi = hdmi_bridge->hdmi;
  84. struct hdmi_phy *phy = hdmi->phy;
  85. DBG("power up");
  86. if (!hdmi->power_on) {
  87. power_on(bridge);
  88. hdmi->power_on = true;
  89. hdmi_audio_update(hdmi);
  90. }
  91. phy->funcs->powerup(phy, hdmi->pixclock);
  92. hdmi_set_mode(hdmi, true);
  93. }
  94. static void hdmi_bridge_enable(struct drm_bridge *bridge)
  95. {
  96. }
  97. static void hdmi_bridge_disable(struct drm_bridge *bridge)
  98. {
  99. }
  100. static void hdmi_bridge_post_disable(struct drm_bridge *bridge)
  101. {
  102. struct hdmi_bridge *hdmi_bridge = to_hdmi_bridge(bridge);
  103. struct hdmi *hdmi = hdmi_bridge->hdmi;
  104. struct hdmi_phy *phy = hdmi->phy;
  105. DBG("power down");
  106. hdmi_set_mode(hdmi, false);
  107. phy->funcs->powerdown(phy);
  108. if (hdmi->power_on) {
  109. power_off(bridge);
  110. hdmi->power_on = false;
  111. hdmi_audio_update(hdmi);
  112. }
  113. }
  114. static void hdmi_bridge_mode_set(struct drm_bridge *bridge,
  115. struct drm_display_mode *mode,
  116. struct drm_display_mode *adjusted_mode)
  117. {
  118. struct hdmi_bridge *hdmi_bridge = to_hdmi_bridge(bridge);
  119. struct hdmi *hdmi = hdmi_bridge->hdmi;
  120. int hstart, hend, vstart, vend;
  121. uint32_t frame_ctrl;
  122. mode = adjusted_mode;
  123. hdmi->pixclock = mode->clock * 1000;
  124. hdmi->hdmi_mode = drm_match_cea_mode(mode) > 1;
  125. hstart = mode->htotal - mode->hsync_start;
  126. hend = mode->htotal - mode->hsync_start + mode->hdisplay;
  127. vstart = mode->vtotal - mode->vsync_start - 1;
  128. vend = mode->vtotal - mode->vsync_start + mode->vdisplay - 1;
  129. DBG("htotal=%d, vtotal=%d, hstart=%d, hend=%d, vstart=%d, vend=%d",
  130. mode->htotal, mode->vtotal, hstart, hend, vstart, vend);
  131. hdmi_write(hdmi, REG_HDMI_TOTAL,
  132. HDMI_TOTAL_H_TOTAL(mode->htotal - 1) |
  133. HDMI_TOTAL_V_TOTAL(mode->vtotal - 1));
  134. hdmi_write(hdmi, REG_HDMI_ACTIVE_HSYNC,
  135. HDMI_ACTIVE_HSYNC_START(hstart) |
  136. HDMI_ACTIVE_HSYNC_END(hend));
  137. hdmi_write(hdmi, REG_HDMI_ACTIVE_VSYNC,
  138. HDMI_ACTIVE_VSYNC_START(vstart) |
  139. HDMI_ACTIVE_VSYNC_END(vend));
  140. if (mode->flags & DRM_MODE_FLAG_INTERLACE) {
  141. hdmi_write(hdmi, REG_HDMI_VSYNC_TOTAL_F2,
  142. HDMI_VSYNC_TOTAL_F2_V_TOTAL(mode->vtotal));
  143. hdmi_write(hdmi, REG_HDMI_VSYNC_ACTIVE_F2,
  144. HDMI_VSYNC_ACTIVE_F2_START(vstart + 1) |
  145. HDMI_VSYNC_ACTIVE_F2_END(vend + 1));
  146. } else {
  147. hdmi_write(hdmi, REG_HDMI_VSYNC_TOTAL_F2,
  148. HDMI_VSYNC_TOTAL_F2_V_TOTAL(0));
  149. hdmi_write(hdmi, REG_HDMI_VSYNC_ACTIVE_F2,
  150. HDMI_VSYNC_ACTIVE_F2_START(0) |
  151. HDMI_VSYNC_ACTIVE_F2_END(0));
  152. }
  153. frame_ctrl = 0;
  154. if (mode->flags & DRM_MODE_FLAG_NHSYNC)
  155. frame_ctrl |= HDMI_FRAME_CTRL_HSYNC_LOW;
  156. if (mode->flags & DRM_MODE_FLAG_NVSYNC)
  157. frame_ctrl |= HDMI_FRAME_CTRL_VSYNC_LOW;
  158. if (mode->flags & DRM_MODE_FLAG_INTERLACE)
  159. frame_ctrl |= HDMI_FRAME_CTRL_INTERLACED_EN;
  160. DBG("frame_ctrl=%08x", frame_ctrl);
  161. hdmi_write(hdmi, REG_HDMI_FRAME_CTRL, frame_ctrl);
  162. hdmi_audio_update(hdmi);
  163. }
  164. static const struct drm_bridge_funcs hdmi_bridge_funcs = {
  165. .pre_enable = hdmi_bridge_pre_enable,
  166. .enable = hdmi_bridge_enable,
  167. .disable = hdmi_bridge_disable,
  168. .post_disable = hdmi_bridge_post_disable,
  169. .mode_set = hdmi_bridge_mode_set,
  170. .destroy = hdmi_bridge_destroy,
  171. };
  172. /* initialize bridge */
  173. struct drm_bridge *hdmi_bridge_init(struct hdmi *hdmi)
  174. {
  175. struct drm_bridge *bridge = NULL;
  176. struct hdmi_bridge *hdmi_bridge;
  177. int ret;
  178. hdmi_bridge = kzalloc(sizeof(*hdmi_bridge), GFP_KERNEL);
  179. if (!hdmi_bridge) {
  180. ret = -ENOMEM;
  181. goto fail;
  182. }
  183. hdmi_bridge->hdmi = hdmi;
  184. bridge = &hdmi_bridge->base;
  185. drm_bridge_init(hdmi->dev, bridge, &hdmi_bridge_funcs);
  186. return bridge;
  187. fail:
  188. if (bridge)
  189. hdmi_bridge_destroy(bridge);
  190. return ERR_PTR(ret);
  191. }