intel_bios.c 35 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800801802803804805806807808809810811812813814815816817818819820821822823824825826827828829830831832833834835836837838839840841842843844845846847848849850851852853854855856857858859860861862863864865866867868869870871872873874875876877878879880881882883884885886887888889890891892893894895896897898899900901902903904905906907908909910911912913914915916917918919920921922923924925926927928929930931932933934935936937938939940941942943944945946947948949950951952953954955956957958959960961962963964965966967968969970971972973974975976977978979980981982983984985986987988989990991992993994995996997998999100010011002100310041005100610071008100910101011101210131014101510161017101810191020102110221023102410251026102710281029103010311032103310341035103610371038103910401041104210431044104510461047104810491050105110521053105410551056105710581059106010611062106310641065106610671068106910701071107210731074107510761077107810791080108110821083108410851086108710881089109010911092109310941095109610971098109911001101110211031104110511061107110811091110111111121113111411151116111711181119112011211122112311241125112611271128112911301131113211331134113511361137113811391140114111421143114411451146114711481149115011511152115311541155115611571158115911601161116211631164116511661167116811691170117111721173117411751176117711781179118011811182118311841185118611871188118911901191119211931194119511961197119811991200120112021203120412051206120712081209121012111212121312141215121612171218121912201221122212231224122512261227122812291230123112321233123412351236123712381239124012411242124312441245124612471248124912501251125212531254125512561257125812591260126112621263126412651266126712681269
  1. /*
  2. * Copyright © 2006 Intel Corporation
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice (including the next
  12. * paragraph) shall be included in all copies or substantial portions of the
  13. * Software.
  14. *
  15. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  16. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  17. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  18. * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
  19. * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
  20. * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  21. * SOFTWARE.
  22. *
  23. * Authors:
  24. * Eric Anholt <eric@anholt.net>
  25. *
  26. */
  27. #include <linux/dmi.h>
  28. #include <drm/drm_dp_helper.h>
  29. #include <drm/drmP.h>
  30. #include <drm/i915_drm.h>
  31. #include "i915_drv.h"
  32. #include "intel_bios.h"
  33. #define SLAVE_ADDR1 0x70
  34. #define SLAVE_ADDR2 0x72
  35. static int panel_type;
  36. static void *
  37. find_section(struct bdb_header *bdb, int section_id)
  38. {
  39. u8 *base = (u8 *)bdb;
  40. int index = 0;
  41. u16 total, current_size;
  42. u8 current_id;
  43. /* skip to first section */
  44. index += bdb->header_size;
  45. total = bdb->bdb_size;
  46. /* walk the sections looking for section_id */
  47. while (index + 3 < total) {
  48. current_id = *(base + index);
  49. index++;
  50. current_size = *((u16 *)(base + index));
  51. index += 2;
  52. if (index + current_size > total)
  53. return NULL;
  54. if (current_id == section_id)
  55. return base + index;
  56. index += current_size;
  57. }
  58. return NULL;
  59. }
  60. static u16
  61. get_blocksize(void *p)
  62. {
  63. u16 *block_ptr, block_size;
  64. block_ptr = (u16 *)((char *)p - 2);
  65. block_size = *block_ptr;
  66. return block_size;
  67. }
  68. static void
  69. fill_detail_timing_data(struct drm_display_mode *panel_fixed_mode,
  70. const struct lvds_dvo_timing *dvo_timing)
  71. {
  72. panel_fixed_mode->hdisplay = (dvo_timing->hactive_hi << 8) |
  73. dvo_timing->hactive_lo;
  74. panel_fixed_mode->hsync_start = panel_fixed_mode->hdisplay +
  75. ((dvo_timing->hsync_off_hi << 8) | dvo_timing->hsync_off_lo);
  76. panel_fixed_mode->hsync_end = panel_fixed_mode->hsync_start +
  77. dvo_timing->hsync_pulse_width;
  78. panel_fixed_mode->htotal = panel_fixed_mode->hdisplay +
  79. ((dvo_timing->hblank_hi << 8) | dvo_timing->hblank_lo);
  80. panel_fixed_mode->vdisplay = (dvo_timing->vactive_hi << 8) |
  81. dvo_timing->vactive_lo;
  82. panel_fixed_mode->vsync_start = panel_fixed_mode->vdisplay +
  83. dvo_timing->vsync_off;
  84. panel_fixed_mode->vsync_end = panel_fixed_mode->vsync_start +
  85. dvo_timing->vsync_pulse_width;
  86. panel_fixed_mode->vtotal = panel_fixed_mode->vdisplay +
  87. ((dvo_timing->vblank_hi << 8) | dvo_timing->vblank_lo);
  88. panel_fixed_mode->clock = dvo_timing->clock * 10;
  89. panel_fixed_mode->type = DRM_MODE_TYPE_PREFERRED;
  90. if (dvo_timing->hsync_positive)
  91. panel_fixed_mode->flags |= DRM_MODE_FLAG_PHSYNC;
  92. else
  93. panel_fixed_mode->flags |= DRM_MODE_FLAG_NHSYNC;
  94. if (dvo_timing->vsync_positive)
  95. panel_fixed_mode->flags |= DRM_MODE_FLAG_PVSYNC;
  96. else
  97. panel_fixed_mode->flags |= DRM_MODE_FLAG_NVSYNC;
  98. /* Some VBTs have bogus h/vtotal values */
  99. if (panel_fixed_mode->hsync_end > panel_fixed_mode->htotal)
  100. panel_fixed_mode->htotal = panel_fixed_mode->hsync_end + 1;
  101. if (panel_fixed_mode->vsync_end > panel_fixed_mode->vtotal)
  102. panel_fixed_mode->vtotal = panel_fixed_mode->vsync_end + 1;
  103. drm_mode_set_name(panel_fixed_mode);
  104. }
  105. static bool
  106. lvds_dvo_timing_equal_size(const struct lvds_dvo_timing *a,
  107. const struct lvds_dvo_timing *b)
  108. {
  109. if (a->hactive_hi != b->hactive_hi ||
  110. a->hactive_lo != b->hactive_lo)
  111. return false;
  112. if (a->hsync_off_hi != b->hsync_off_hi ||
  113. a->hsync_off_lo != b->hsync_off_lo)
  114. return false;
  115. if (a->hsync_pulse_width != b->hsync_pulse_width)
  116. return false;
  117. if (a->hblank_hi != b->hblank_hi ||
  118. a->hblank_lo != b->hblank_lo)
  119. return false;
  120. if (a->vactive_hi != b->vactive_hi ||
  121. a->vactive_lo != b->vactive_lo)
  122. return false;
  123. if (a->vsync_off != b->vsync_off)
  124. return false;
  125. if (a->vsync_pulse_width != b->vsync_pulse_width)
  126. return false;
  127. if (a->vblank_hi != b->vblank_hi ||
  128. a->vblank_lo != b->vblank_lo)
  129. return false;
  130. return true;
  131. }
  132. static const struct lvds_dvo_timing *
  133. get_lvds_dvo_timing(const struct bdb_lvds_lfp_data *lvds_lfp_data,
  134. const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs,
  135. int index)
  136. {
  137. /*
  138. * the size of fp_timing varies on the different platform.
  139. * So calculate the DVO timing relative offset in LVDS data
  140. * entry to get the DVO timing entry
  141. */
  142. int lfp_data_size =
  143. lvds_lfp_data_ptrs->ptr[1].dvo_timing_offset -
  144. lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset;
  145. int dvo_timing_offset =
  146. lvds_lfp_data_ptrs->ptr[0].dvo_timing_offset -
  147. lvds_lfp_data_ptrs->ptr[0].fp_timing_offset;
  148. char *entry = (char *)lvds_lfp_data->data + lfp_data_size * index;
  149. return (struct lvds_dvo_timing *)(entry + dvo_timing_offset);
  150. }
  151. /* get lvds_fp_timing entry
  152. * this function may return NULL if the corresponding entry is invalid
  153. */
  154. static const struct lvds_fp_timing *
  155. get_lvds_fp_timing(const struct bdb_header *bdb,
  156. const struct bdb_lvds_lfp_data *data,
  157. const struct bdb_lvds_lfp_data_ptrs *ptrs,
  158. int index)
  159. {
  160. size_t data_ofs = (const u8 *)data - (const u8 *)bdb;
  161. u16 data_size = ((const u16 *)data)[-1]; /* stored in header */
  162. size_t ofs;
  163. if (index >= ARRAY_SIZE(ptrs->ptr))
  164. return NULL;
  165. ofs = ptrs->ptr[index].fp_timing_offset;
  166. if (ofs < data_ofs ||
  167. ofs + sizeof(struct lvds_fp_timing) > data_ofs + data_size)
  168. return NULL;
  169. return (const struct lvds_fp_timing *)((const u8 *)bdb + ofs);
  170. }
  171. /* Try to find integrated panel data */
  172. static void
  173. parse_lfp_panel_data(struct drm_i915_private *dev_priv,
  174. struct bdb_header *bdb)
  175. {
  176. const struct bdb_lvds_options *lvds_options;
  177. const struct bdb_lvds_lfp_data *lvds_lfp_data;
  178. const struct bdb_lvds_lfp_data_ptrs *lvds_lfp_data_ptrs;
  179. const struct lvds_dvo_timing *panel_dvo_timing;
  180. const struct lvds_fp_timing *fp_timing;
  181. struct drm_display_mode *panel_fixed_mode;
  182. int i, downclock, drrs_mode;
  183. lvds_options = find_section(bdb, BDB_LVDS_OPTIONS);
  184. if (!lvds_options)
  185. return;
  186. dev_priv->vbt.lvds_dither = lvds_options->pixel_dither;
  187. if (lvds_options->panel_type == 0xff)
  188. return;
  189. panel_type = lvds_options->panel_type;
  190. drrs_mode = (lvds_options->dps_panel_type_bits
  191. >> (panel_type * 2)) & MODE_MASK;
  192. /*
  193. * VBT has static DRRS = 0 and seamless DRRS = 2.
  194. * The below piece of code is required to adjust vbt.drrs_type
  195. * to match the enum drrs_support_type.
  196. */
  197. switch (drrs_mode) {
  198. case 0:
  199. dev_priv->vbt.drrs_type = STATIC_DRRS_SUPPORT;
  200. DRM_DEBUG_KMS("DRRS supported mode is static\n");
  201. break;
  202. case 2:
  203. dev_priv->vbt.drrs_type = SEAMLESS_DRRS_SUPPORT;
  204. DRM_DEBUG_KMS("DRRS supported mode is seamless\n");
  205. break;
  206. default:
  207. dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
  208. DRM_DEBUG_KMS("DRRS not supported (VBT input)\n");
  209. break;
  210. }
  211. lvds_lfp_data = find_section(bdb, BDB_LVDS_LFP_DATA);
  212. if (!lvds_lfp_data)
  213. return;
  214. lvds_lfp_data_ptrs = find_section(bdb, BDB_LVDS_LFP_DATA_PTRS);
  215. if (!lvds_lfp_data_ptrs)
  216. return;
  217. dev_priv->vbt.lvds_vbt = 1;
  218. panel_dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
  219. lvds_lfp_data_ptrs,
  220. lvds_options->panel_type);
  221. panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
  222. if (!panel_fixed_mode)
  223. return;
  224. fill_detail_timing_data(panel_fixed_mode, panel_dvo_timing);
  225. dev_priv->vbt.lfp_lvds_vbt_mode = panel_fixed_mode;
  226. DRM_DEBUG_KMS("Found panel mode in BIOS VBT tables:\n");
  227. drm_mode_debug_printmodeline(panel_fixed_mode);
  228. /*
  229. * Iterate over the LVDS panel timing info to find the lowest clock
  230. * for the native resolution.
  231. */
  232. downclock = panel_dvo_timing->clock;
  233. for (i = 0; i < 16; i++) {
  234. const struct lvds_dvo_timing *dvo_timing;
  235. dvo_timing = get_lvds_dvo_timing(lvds_lfp_data,
  236. lvds_lfp_data_ptrs,
  237. i);
  238. if (lvds_dvo_timing_equal_size(dvo_timing, panel_dvo_timing) &&
  239. dvo_timing->clock < downclock)
  240. downclock = dvo_timing->clock;
  241. }
  242. if (downclock < panel_dvo_timing->clock && i915.lvds_downclock) {
  243. dev_priv->lvds_downclock_avail = 1;
  244. dev_priv->lvds_downclock = downclock * 10;
  245. DRM_DEBUG_KMS("LVDS downclock is found in VBT. "
  246. "Normal Clock %dKHz, downclock %dKHz\n",
  247. panel_fixed_mode->clock, 10*downclock);
  248. }
  249. fp_timing = get_lvds_fp_timing(bdb, lvds_lfp_data,
  250. lvds_lfp_data_ptrs,
  251. lvds_options->panel_type);
  252. if (fp_timing) {
  253. /* check the resolution, just to be sure */
  254. if (fp_timing->x_res == panel_fixed_mode->hdisplay &&
  255. fp_timing->y_res == panel_fixed_mode->vdisplay) {
  256. dev_priv->vbt.bios_lvds_val = fp_timing->lvds_reg_val;
  257. DRM_DEBUG_KMS("VBT initial LVDS value %x\n",
  258. dev_priv->vbt.bios_lvds_val);
  259. }
  260. }
  261. }
  262. static void
  263. parse_lfp_backlight(struct drm_i915_private *dev_priv, struct bdb_header *bdb)
  264. {
  265. const struct bdb_lfp_backlight_data *backlight_data;
  266. const struct bdb_lfp_backlight_data_entry *entry;
  267. backlight_data = find_section(bdb, BDB_LVDS_BACKLIGHT);
  268. if (!backlight_data)
  269. return;
  270. if (backlight_data->entry_size != sizeof(backlight_data->data[0])) {
  271. DRM_DEBUG_KMS("Unsupported backlight data entry size %u\n",
  272. backlight_data->entry_size);
  273. return;
  274. }
  275. entry = &backlight_data->data[panel_type];
  276. dev_priv->vbt.backlight.present = entry->type == BDB_BACKLIGHT_TYPE_PWM;
  277. if (!dev_priv->vbt.backlight.present) {
  278. DRM_DEBUG_KMS("PWM backlight not present in VBT (type %u)\n",
  279. entry->type);
  280. return;
  281. }
  282. dev_priv->vbt.backlight.pwm_freq_hz = entry->pwm_freq_hz;
  283. dev_priv->vbt.backlight.active_low_pwm = entry->active_low_pwm;
  284. dev_priv->vbt.backlight.min_brightness = entry->min_brightness;
  285. DRM_DEBUG_KMS("VBT backlight PWM modulation frequency %u Hz, "
  286. "active %s, min brightness %u, level %u\n",
  287. dev_priv->vbt.backlight.pwm_freq_hz,
  288. dev_priv->vbt.backlight.active_low_pwm ? "low" : "high",
  289. dev_priv->vbt.backlight.min_brightness,
  290. backlight_data->level[panel_type]);
  291. }
  292. /* Try to find sdvo panel data */
  293. static void
  294. parse_sdvo_panel_data(struct drm_i915_private *dev_priv,
  295. struct bdb_header *bdb)
  296. {
  297. struct lvds_dvo_timing *dvo_timing;
  298. struct drm_display_mode *panel_fixed_mode;
  299. int index;
  300. index = i915.vbt_sdvo_panel_type;
  301. if (index == -2) {
  302. DRM_DEBUG_KMS("Ignore SDVO panel mode from BIOS VBT tables.\n");
  303. return;
  304. }
  305. if (index == -1) {
  306. struct bdb_sdvo_lvds_options *sdvo_lvds_options;
  307. sdvo_lvds_options = find_section(bdb, BDB_SDVO_LVDS_OPTIONS);
  308. if (!sdvo_lvds_options)
  309. return;
  310. index = sdvo_lvds_options->panel_type;
  311. }
  312. dvo_timing = find_section(bdb, BDB_SDVO_PANEL_DTDS);
  313. if (!dvo_timing)
  314. return;
  315. panel_fixed_mode = kzalloc(sizeof(*panel_fixed_mode), GFP_KERNEL);
  316. if (!panel_fixed_mode)
  317. return;
  318. fill_detail_timing_data(panel_fixed_mode, dvo_timing + index);
  319. dev_priv->vbt.sdvo_lvds_vbt_mode = panel_fixed_mode;
  320. DRM_DEBUG_KMS("Found SDVO panel mode in BIOS VBT tables:\n");
  321. drm_mode_debug_printmodeline(panel_fixed_mode);
  322. }
  323. static int intel_bios_ssc_frequency(struct drm_device *dev,
  324. bool alternate)
  325. {
  326. switch (INTEL_INFO(dev)->gen) {
  327. case 2:
  328. return alternate ? 66667 : 48000;
  329. case 3:
  330. case 4:
  331. return alternate ? 100000 : 96000;
  332. default:
  333. return alternate ? 100000 : 120000;
  334. }
  335. }
  336. static void
  337. parse_general_features(struct drm_i915_private *dev_priv,
  338. struct bdb_header *bdb)
  339. {
  340. struct drm_device *dev = dev_priv->dev;
  341. struct bdb_general_features *general;
  342. general = find_section(bdb, BDB_GENERAL_FEATURES);
  343. if (general) {
  344. dev_priv->vbt.int_tv_support = general->int_tv_support;
  345. dev_priv->vbt.int_crt_support = general->int_crt_support;
  346. dev_priv->vbt.lvds_use_ssc = general->enable_ssc;
  347. dev_priv->vbt.lvds_ssc_freq =
  348. intel_bios_ssc_frequency(dev, general->ssc_freq);
  349. dev_priv->vbt.display_clock_mode = general->display_clock_mode;
  350. dev_priv->vbt.fdi_rx_polarity_inverted = general->fdi_rx_polarity_inverted;
  351. DRM_DEBUG_KMS("BDB_GENERAL_FEATURES int_tv_support %d int_crt_support %d lvds_use_ssc %d lvds_ssc_freq %d display_clock_mode %d fdi_rx_polarity_inverted %d\n",
  352. dev_priv->vbt.int_tv_support,
  353. dev_priv->vbt.int_crt_support,
  354. dev_priv->vbt.lvds_use_ssc,
  355. dev_priv->vbt.lvds_ssc_freq,
  356. dev_priv->vbt.display_clock_mode,
  357. dev_priv->vbt.fdi_rx_polarity_inverted);
  358. }
  359. }
  360. static void
  361. parse_general_definitions(struct drm_i915_private *dev_priv,
  362. struct bdb_header *bdb)
  363. {
  364. struct bdb_general_definitions *general;
  365. general = find_section(bdb, BDB_GENERAL_DEFINITIONS);
  366. if (general) {
  367. u16 block_size = get_blocksize(general);
  368. if (block_size >= sizeof(*general)) {
  369. int bus_pin = general->crt_ddc_gmbus_pin;
  370. DRM_DEBUG_KMS("crt_ddc_bus_pin: %d\n", bus_pin);
  371. if (intel_gmbus_is_port_valid(bus_pin))
  372. dev_priv->vbt.crt_ddc_pin = bus_pin;
  373. } else {
  374. DRM_DEBUG_KMS("BDB_GD too small (%d). Invalid.\n",
  375. block_size);
  376. }
  377. }
  378. }
  379. static void
  380. parse_sdvo_device_mapping(struct drm_i915_private *dev_priv,
  381. struct bdb_header *bdb)
  382. {
  383. struct sdvo_device_mapping *p_mapping;
  384. struct bdb_general_definitions *p_defs;
  385. union child_device_config *p_child;
  386. int i, child_device_num, count;
  387. u16 block_size;
  388. p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
  389. if (!p_defs) {
  390. DRM_DEBUG_KMS("No general definition block is found, unable to construct sdvo mapping.\n");
  391. return;
  392. }
  393. /* judge whether the size of child device meets the requirements.
  394. * If the child device size obtained from general definition block
  395. * is different with sizeof(struct child_device_config), skip the
  396. * parsing of sdvo device info
  397. */
  398. if (p_defs->child_dev_size != sizeof(*p_child)) {
  399. /* different child dev size . Ignore it */
  400. DRM_DEBUG_KMS("different child size is found. Invalid.\n");
  401. return;
  402. }
  403. /* get the block size of general definitions */
  404. block_size = get_blocksize(p_defs);
  405. /* get the number of child device */
  406. child_device_num = (block_size - sizeof(*p_defs)) /
  407. sizeof(*p_child);
  408. count = 0;
  409. for (i = 0; i < child_device_num; i++) {
  410. p_child = &(p_defs->devices[i]);
  411. if (!p_child->old.device_type) {
  412. /* skip the device block if device type is invalid */
  413. continue;
  414. }
  415. if (p_child->old.slave_addr != SLAVE_ADDR1 &&
  416. p_child->old.slave_addr != SLAVE_ADDR2) {
  417. /*
  418. * If the slave address is neither 0x70 nor 0x72,
  419. * it is not a SDVO device. Skip it.
  420. */
  421. continue;
  422. }
  423. if (p_child->old.dvo_port != DEVICE_PORT_DVOB &&
  424. p_child->old.dvo_port != DEVICE_PORT_DVOC) {
  425. /* skip the incorrect SDVO port */
  426. DRM_DEBUG_KMS("Incorrect SDVO port. Skip it\n");
  427. continue;
  428. }
  429. DRM_DEBUG_KMS("the SDVO device with slave addr %2x is found on"
  430. " %s port\n",
  431. p_child->old.slave_addr,
  432. (p_child->old.dvo_port == DEVICE_PORT_DVOB) ?
  433. "SDVOB" : "SDVOC");
  434. p_mapping = &(dev_priv->sdvo_mappings[p_child->old.dvo_port - 1]);
  435. if (!p_mapping->initialized) {
  436. p_mapping->dvo_port = p_child->old.dvo_port;
  437. p_mapping->slave_addr = p_child->old.slave_addr;
  438. p_mapping->dvo_wiring = p_child->old.dvo_wiring;
  439. p_mapping->ddc_pin = p_child->old.ddc_pin;
  440. p_mapping->i2c_pin = p_child->old.i2c_pin;
  441. p_mapping->initialized = 1;
  442. DRM_DEBUG_KMS("SDVO device: dvo=%x, addr=%x, wiring=%d, ddc_pin=%d, i2c_pin=%d\n",
  443. p_mapping->dvo_port,
  444. p_mapping->slave_addr,
  445. p_mapping->dvo_wiring,
  446. p_mapping->ddc_pin,
  447. p_mapping->i2c_pin);
  448. } else {
  449. DRM_DEBUG_KMS("Maybe one SDVO port is shared by "
  450. "two SDVO device.\n");
  451. }
  452. if (p_child->old.slave2_addr) {
  453. /* Maybe this is a SDVO device with multiple inputs */
  454. /* And the mapping info is not added */
  455. DRM_DEBUG_KMS("there exists the slave2_addr. Maybe this"
  456. " is a SDVO device with multiple inputs.\n");
  457. }
  458. count++;
  459. }
  460. if (!count) {
  461. /* No SDVO device info is found */
  462. DRM_DEBUG_KMS("No SDVO device info is found in VBT\n");
  463. }
  464. return;
  465. }
  466. static void
  467. parse_driver_features(struct drm_i915_private *dev_priv,
  468. struct bdb_header *bdb)
  469. {
  470. struct bdb_driver_features *driver;
  471. driver = find_section(bdb, BDB_DRIVER_FEATURES);
  472. if (!driver)
  473. return;
  474. if (driver->lvds_config == BDB_DRIVER_FEATURE_EDP)
  475. dev_priv->vbt.edp_support = 1;
  476. if (driver->dual_frequency)
  477. dev_priv->render_reclock_avail = true;
  478. DRM_DEBUG_KMS("DRRS State Enabled:%d\n", driver->drrs_enabled);
  479. /*
  480. * If DRRS is not supported, drrs_type has to be set to 0.
  481. * This is because, VBT is configured in such a way that
  482. * static DRRS is 0 and DRRS not supported is represented by
  483. * driver->drrs_enabled=false
  484. */
  485. if (!driver->drrs_enabled)
  486. dev_priv->vbt.drrs_type = DRRS_NOT_SUPPORTED;
  487. }
  488. static void
  489. parse_edp(struct drm_i915_private *dev_priv, struct bdb_header *bdb)
  490. {
  491. struct bdb_edp *edp;
  492. struct edp_power_seq *edp_pps;
  493. struct edp_link_params *edp_link_params;
  494. edp = find_section(bdb, BDB_EDP);
  495. if (!edp) {
  496. if (dev_priv->vbt.edp_support)
  497. DRM_DEBUG_KMS("No eDP BDB found but eDP panel supported.\n");
  498. return;
  499. }
  500. switch ((edp->color_depth >> (panel_type * 2)) & 3) {
  501. case EDP_18BPP:
  502. dev_priv->vbt.edp_bpp = 18;
  503. break;
  504. case EDP_24BPP:
  505. dev_priv->vbt.edp_bpp = 24;
  506. break;
  507. case EDP_30BPP:
  508. dev_priv->vbt.edp_bpp = 30;
  509. break;
  510. }
  511. /* Get the eDP sequencing and link info */
  512. edp_pps = &edp->power_seqs[panel_type];
  513. edp_link_params = &edp->link_params[panel_type];
  514. dev_priv->vbt.edp_pps = *edp_pps;
  515. switch (edp_link_params->rate) {
  516. case EDP_RATE_1_62:
  517. dev_priv->vbt.edp_rate = DP_LINK_BW_1_62;
  518. break;
  519. case EDP_RATE_2_7:
  520. dev_priv->vbt.edp_rate = DP_LINK_BW_2_7;
  521. break;
  522. default:
  523. DRM_DEBUG_KMS("VBT has unknown eDP link rate value %u\n",
  524. edp_link_params->rate);
  525. break;
  526. }
  527. switch (edp_link_params->lanes) {
  528. case EDP_LANE_1:
  529. dev_priv->vbt.edp_lanes = 1;
  530. break;
  531. case EDP_LANE_2:
  532. dev_priv->vbt.edp_lanes = 2;
  533. break;
  534. case EDP_LANE_4:
  535. dev_priv->vbt.edp_lanes = 4;
  536. break;
  537. default:
  538. DRM_DEBUG_KMS("VBT has unknown eDP lane count value %u\n",
  539. edp_link_params->lanes);
  540. break;
  541. }
  542. switch (edp_link_params->preemphasis) {
  543. case EDP_PREEMPHASIS_NONE:
  544. dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_0;
  545. break;
  546. case EDP_PREEMPHASIS_3_5dB:
  547. dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_1;
  548. break;
  549. case EDP_PREEMPHASIS_6dB:
  550. dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_2;
  551. break;
  552. case EDP_PREEMPHASIS_9_5dB:
  553. dev_priv->vbt.edp_preemphasis = DP_TRAIN_PRE_EMPH_LEVEL_3;
  554. break;
  555. default:
  556. DRM_DEBUG_KMS("VBT has unknown eDP pre-emphasis value %u\n",
  557. edp_link_params->preemphasis);
  558. break;
  559. }
  560. switch (edp_link_params->vswing) {
  561. case EDP_VSWING_0_4V:
  562. dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_0;
  563. break;
  564. case EDP_VSWING_0_6V:
  565. dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_1;
  566. break;
  567. case EDP_VSWING_0_8V:
  568. dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_2;
  569. break;
  570. case EDP_VSWING_1_2V:
  571. dev_priv->vbt.edp_vswing = DP_TRAIN_VOLTAGE_SWING_LEVEL_3;
  572. break;
  573. default:
  574. DRM_DEBUG_KMS("VBT has unknown eDP voltage swing value %u\n",
  575. edp_link_params->vswing);
  576. break;
  577. }
  578. }
  579. static u8 *goto_next_sequence(u8 *data, int *size)
  580. {
  581. u16 len;
  582. int tmp = *size;
  583. if (--tmp < 0)
  584. return NULL;
  585. /* goto first element */
  586. data++;
  587. while (1) {
  588. switch (*data) {
  589. case MIPI_SEQ_ELEM_SEND_PKT:
  590. /*
  591. * skip by this element payload size
  592. * skip elem id, command flag and data type
  593. */
  594. tmp -= 5;
  595. if (tmp < 0)
  596. return NULL;
  597. data += 3;
  598. len = *((u16 *)data);
  599. tmp -= len;
  600. if (tmp < 0)
  601. return NULL;
  602. /* skip by len */
  603. data = data + 2 + len;
  604. break;
  605. case MIPI_SEQ_ELEM_DELAY:
  606. /* skip by elem id, and delay is 4 bytes */
  607. tmp -= 5;
  608. if (tmp < 0)
  609. return NULL;
  610. data += 5;
  611. break;
  612. case MIPI_SEQ_ELEM_GPIO:
  613. tmp -= 3;
  614. if (tmp < 0)
  615. return NULL;
  616. data += 3;
  617. break;
  618. default:
  619. DRM_ERROR("Unknown element\n");
  620. return NULL;
  621. }
  622. /* end of sequence ? */
  623. if (*data == 0)
  624. break;
  625. }
  626. /* goto next sequence or end of block byte */
  627. if (--tmp < 0)
  628. return NULL;
  629. data++;
  630. /* update amount of data left for the sequence block to be parsed */
  631. *size = tmp;
  632. return data;
  633. }
  634. static void
  635. parse_mipi(struct drm_i915_private *dev_priv, struct bdb_header *bdb)
  636. {
  637. struct bdb_mipi_config *start;
  638. struct bdb_mipi_sequence *sequence;
  639. struct mipi_config *config;
  640. struct mipi_pps_data *pps;
  641. u8 *data, *seq_data;
  642. int i, panel_id, seq_size;
  643. u16 block_size;
  644. /* parse MIPI blocks only if LFP type is MIPI */
  645. if (!dev_priv->vbt.has_mipi)
  646. return;
  647. /* Initialize this to undefined indicating no generic MIPI support */
  648. dev_priv->vbt.dsi.panel_id = MIPI_DSI_UNDEFINED_PANEL_ID;
  649. /* Block #40 is already parsed and panel_fixed_mode is
  650. * stored in dev_priv->lfp_lvds_vbt_mode
  651. * resuse this when needed
  652. */
  653. /* Parse #52 for panel index used from panel_type already
  654. * parsed
  655. */
  656. start = find_section(bdb, BDB_MIPI_CONFIG);
  657. if (!start) {
  658. DRM_DEBUG_KMS("No MIPI config BDB found");
  659. return;
  660. }
  661. DRM_DEBUG_DRIVER("Found MIPI Config block, panel index = %d\n",
  662. panel_type);
  663. /*
  664. * get hold of the correct configuration block and pps data as per
  665. * the panel_type as index
  666. */
  667. config = &start->config[panel_type];
  668. pps = &start->pps[panel_type];
  669. /* store as of now full data. Trim when we realise all is not needed */
  670. dev_priv->vbt.dsi.config = kmemdup(config, sizeof(struct mipi_config), GFP_KERNEL);
  671. if (!dev_priv->vbt.dsi.config)
  672. return;
  673. dev_priv->vbt.dsi.pps = kmemdup(pps, sizeof(struct mipi_pps_data), GFP_KERNEL);
  674. if (!dev_priv->vbt.dsi.pps) {
  675. kfree(dev_priv->vbt.dsi.config);
  676. return;
  677. }
  678. /* We have mandatory mipi config blocks. Initialize as generic panel */
  679. dev_priv->vbt.dsi.panel_id = MIPI_DSI_GENERIC_PANEL_ID;
  680. /* Check if we have sequence block as well */
  681. sequence = find_section(bdb, BDB_MIPI_SEQUENCE);
  682. if (!sequence) {
  683. DRM_DEBUG_KMS("No MIPI Sequence found, parsing complete\n");
  684. return;
  685. }
  686. DRM_DEBUG_DRIVER("Found MIPI sequence block\n");
  687. block_size = get_blocksize(sequence);
  688. /*
  689. * parse the sequence block for individual sequences
  690. */
  691. dev_priv->vbt.dsi.seq_version = sequence->version;
  692. seq_data = &sequence->data[0];
  693. /*
  694. * sequence block is variable length and hence we need to parse and
  695. * get the sequence data for specific panel id
  696. */
  697. for (i = 0; i < MAX_MIPI_CONFIGURATIONS; i++) {
  698. panel_id = *seq_data;
  699. seq_size = *((u16 *) (seq_data + 1));
  700. if (panel_id == panel_type)
  701. break;
  702. /* skip the sequence including seq header of 3 bytes */
  703. seq_data = seq_data + 3 + seq_size;
  704. if ((seq_data - &sequence->data[0]) > block_size) {
  705. DRM_ERROR("Sequence start is beyond sequence block size, corrupted sequence block\n");
  706. return;
  707. }
  708. }
  709. if (i == MAX_MIPI_CONFIGURATIONS) {
  710. DRM_ERROR("Sequence block detected but no valid configuration\n");
  711. return;
  712. }
  713. /* check if found sequence is completely within the sequence block
  714. * just being paranoid */
  715. if (seq_size > block_size) {
  716. DRM_ERROR("Corrupted sequence/size, bailing out\n");
  717. return;
  718. }
  719. /* skip the panel id(1 byte) and seq size(2 bytes) */
  720. dev_priv->vbt.dsi.data = kmemdup(seq_data + 3, seq_size, GFP_KERNEL);
  721. if (!dev_priv->vbt.dsi.data)
  722. return;
  723. /*
  724. * loop into the sequence data and split into multiple sequneces
  725. * There are only 5 types of sequences as of now
  726. */
  727. data = dev_priv->vbt.dsi.data;
  728. dev_priv->vbt.dsi.size = seq_size;
  729. /* two consecutive 0x00 indicate end of all sequences */
  730. while (1) {
  731. int seq_id = *data;
  732. if (MIPI_SEQ_MAX > seq_id && seq_id > MIPI_SEQ_UNDEFINED) {
  733. dev_priv->vbt.dsi.sequence[seq_id] = data;
  734. DRM_DEBUG_DRIVER("Found mipi sequence - %d\n", seq_id);
  735. } else {
  736. DRM_ERROR("undefined sequence\n");
  737. goto err;
  738. }
  739. /* partial parsing to skip elements */
  740. data = goto_next_sequence(data, &seq_size);
  741. if (data == NULL) {
  742. DRM_ERROR("Sequence elements going beyond block itself. Sequence block parsing failed\n");
  743. goto err;
  744. }
  745. if (*data == 0)
  746. break; /* end of sequence reached */
  747. }
  748. DRM_DEBUG_DRIVER("MIPI related vbt parsing complete\n");
  749. return;
  750. err:
  751. kfree(dev_priv->vbt.dsi.data);
  752. dev_priv->vbt.dsi.data = NULL;
  753. /* error during parsing so set all pointers to null
  754. * because of partial parsing */
  755. memset(dev_priv->vbt.dsi.sequence, 0, sizeof(dev_priv->vbt.dsi.sequence));
  756. }
  757. static void parse_ddi_port(struct drm_i915_private *dev_priv, enum port port,
  758. struct bdb_header *bdb)
  759. {
  760. union child_device_config *it, *child = NULL;
  761. struct ddi_vbt_port_info *info = &dev_priv->vbt.ddi_port_info[port];
  762. uint8_t hdmi_level_shift;
  763. int i, j;
  764. bool is_dvi, is_hdmi, is_dp, is_edp, is_crt;
  765. uint8_t aux_channel;
  766. /* Each DDI port can have more than one value on the "DVO Port" field,
  767. * so look for all the possible values for each port and abort if more
  768. * than one is found. */
  769. int dvo_ports[][2] = {
  770. {DVO_PORT_HDMIA, DVO_PORT_DPA},
  771. {DVO_PORT_HDMIB, DVO_PORT_DPB},
  772. {DVO_PORT_HDMIC, DVO_PORT_DPC},
  773. {DVO_PORT_HDMID, DVO_PORT_DPD},
  774. {DVO_PORT_CRT, -1 /* Port E can only be DVO_PORT_CRT */ },
  775. };
  776. /* Find the child device to use, abort if more than one found. */
  777. for (i = 0; i < dev_priv->vbt.child_dev_num; i++) {
  778. it = dev_priv->vbt.child_dev + i;
  779. for (j = 0; j < 2; j++) {
  780. if (dvo_ports[port][j] == -1)
  781. break;
  782. if (it->common.dvo_port == dvo_ports[port][j]) {
  783. if (child) {
  784. DRM_DEBUG_KMS("More than one child device for port %c in VBT.\n",
  785. port_name(port));
  786. return;
  787. }
  788. child = it;
  789. }
  790. }
  791. }
  792. if (!child)
  793. return;
  794. aux_channel = child->raw[25];
  795. is_dvi = child->common.device_type & DEVICE_TYPE_TMDS_DVI_SIGNALING;
  796. is_dp = child->common.device_type & DEVICE_TYPE_DISPLAYPORT_OUTPUT;
  797. is_crt = child->common.device_type & DEVICE_TYPE_ANALOG_OUTPUT;
  798. is_hdmi = is_dvi && (child->common.device_type & DEVICE_TYPE_NOT_HDMI_OUTPUT) == 0;
  799. is_edp = is_dp && (child->common.device_type & DEVICE_TYPE_INTERNAL_CONNECTOR);
  800. info->supports_dvi = is_dvi;
  801. info->supports_hdmi = is_hdmi;
  802. info->supports_dp = is_dp;
  803. DRM_DEBUG_KMS("Port %c VBT info: DP:%d HDMI:%d DVI:%d EDP:%d CRT:%d\n",
  804. port_name(port), is_dp, is_hdmi, is_dvi, is_edp, is_crt);
  805. if (is_edp && is_dvi)
  806. DRM_DEBUG_KMS("Internal DP port %c is TMDS compatible\n",
  807. port_name(port));
  808. if (is_crt && port != PORT_E)
  809. DRM_DEBUG_KMS("Port %c is analog\n", port_name(port));
  810. if (is_crt && (is_dvi || is_dp))
  811. DRM_DEBUG_KMS("Analog port %c is also DP or TMDS compatible\n",
  812. port_name(port));
  813. if (is_dvi && (port == PORT_A || port == PORT_E))
  814. DRM_DEBUG_KMS("Port %c is TMDS compatible\n", port_name(port));
  815. if (!is_dvi && !is_dp && !is_crt)
  816. DRM_DEBUG_KMS("Port %c is not DP/TMDS/CRT compatible\n",
  817. port_name(port));
  818. if (is_edp && (port == PORT_B || port == PORT_C || port == PORT_E))
  819. DRM_DEBUG_KMS("Port %c is internal DP\n", port_name(port));
  820. if (is_dvi) {
  821. if (child->common.ddc_pin == 0x05 && port != PORT_B)
  822. DRM_DEBUG_KMS("Unexpected DDC pin for port B\n");
  823. if (child->common.ddc_pin == 0x04 && port != PORT_C)
  824. DRM_DEBUG_KMS("Unexpected DDC pin for port C\n");
  825. if (child->common.ddc_pin == 0x06 && port != PORT_D)
  826. DRM_DEBUG_KMS("Unexpected DDC pin for port D\n");
  827. }
  828. if (is_dp) {
  829. if (aux_channel == 0x40 && port != PORT_A)
  830. DRM_DEBUG_KMS("Unexpected AUX channel for port A\n");
  831. if (aux_channel == 0x10 && port != PORT_B)
  832. DRM_DEBUG_KMS("Unexpected AUX channel for port B\n");
  833. if (aux_channel == 0x20 && port != PORT_C)
  834. DRM_DEBUG_KMS("Unexpected AUX channel for port C\n");
  835. if (aux_channel == 0x30 && port != PORT_D)
  836. DRM_DEBUG_KMS("Unexpected AUX channel for port D\n");
  837. }
  838. if (bdb->version >= 158) {
  839. /* The VBT HDMI level shift values match the table we have. */
  840. hdmi_level_shift = child->raw[7] & 0xF;
  841. DRM_DEBUG_KMS("VBT HDMI level shift for port %c: %d\n",
  842. port_name(port),
  843. hdmi_level_shift);
  844. info->hdmi_level_shift = hdmi_level_shift;
  845. }
  846. }
  847. static void parse_ddi_ports(struct drm_i915_private *dev_priv,
  848. struct bdb_header *bdb)
  849. {
  850. struct drm_device *dev = dev_priv->dev;
  851. enum port port;
  852. if (!HAS_DDI(dev))
  853. return;
  854. if (!dev_priv->vbt.child_dev_num)
  855. return;
  856. if (bdb->version < 155)
  857. return;
  858. for (port = PORT_A; port < I915_MAX_PORTS; port++)
  859. parse_ddi_port(dev_priv, port, bdb);
  860. }
  861. static void
  862. parse_device_mapping(struct drm_i915_private *dev_priv,
  863. struct bdb_header *bdb)
  864. {
  865. struct bdb_general_definitions *p_defs;
  866. union child_device_config *p_child, *child_dev_ptr;
  867. int i, child_device_num, count;
  868. u16 block_size;
  869. p_defs = find_section(bdb, BDB_GENERAL_DEFINITIONS);
  870. if (!p_defs) {
  871. DRM_DEBUG_KMS("No general definition block is found, no devices defined.\n");
  872. return;
  873. }
  874. /* judge whether the size of child device meets the requirements.
  875. * If the child device size obtained from general definition block
  876. * is different with sizeof(struct child_device_config), skip the
  877. * parsing of sdvo device info
  878. */
  879. if (p_defs->child_dev_size != sizeof(*p_child)) {
  880. /* different child dev size . Ignore it */
  881. DRM_DEBUG_KMS("different child size is found. Invalid.\n");
  882. return;
  883. }
  884. /* get the block size of general definitions */
  885. block_size = get_blocksize(p_defs);
  886. /* get the number of child device */
  887. child_device_num = (block_size - sizeof(*p_defs)) /
  888. sizeof(*p_child);
  889. count = 0;
  890. /* get the number of child device that is present */
  891. for (i = 0; i < child_device_num; i++) {
  892. p_child = &(p_defs->devices[i]);
  893. if (!p_child->common.device_type) {
  894. /* skip the device block if device type is invalid */
  895. continue;
  896. }
  897. count++;
  898. }
  899. if (!count) {
  900. DRM_DEBUG_KMS("no child dev is parsed from VBT\n");
  901. return;
  902. }
  903. dev_priv->vbt.child_dev = kcalloc(count, sizeof(*p_child), GFP_KERNEL);
  904. if (!dev_priv->vbt.child_dev) {
  905. DRM_DEBUG_KMS("No memory space for child device\n");
  906. return;
  907. }
  908. dev_priv->vbt.child_dev_num = count;
  909. count = 0;
  910. for (i = 0; i < child_device_num; i++) {
  911. p_child = &(p_defs->devices[i]);
  912. if (!p_child->common.device_type) {
  913. /* skip the device block if device type is invalid */
  914. continue;
  915. }
  916. if (p_child->common.dvo_port >= DVO_PORT_MIPIA
  917. && p_child->common.dvo_port <= DVO_PORT_MIPID
  918. &&p_child->common.device_type & DEVICE_TYPE_MIPI_OUTPUT) {
  919. DRM_DEBUG_KMS("Found MIPI as LFP\n");
  920. dev_priv->vbt.has_mipi = 1;
  921. dev_priv->vbt.dsi.port = p_child->common.dvo_port;
  922. }
  923. child_dev_ptr = dev_priv->vbt.child_dev + count;
  924. count++;
  925. memcpy((void *)child_dev_ptr, (void *)p_child,
  926. sizeof(*p_child));
  927. }
  928. return;
  929. }
  930. static void
  931. init_vbt_defaults(struct drm_i915_private *dev_priv)
  932. {
  933. struct drm_device *dev = dev_priv->dev;
  934. enum port port;
  935. dev_priv->vbt.crt_ddc_pin = GMBUS_PORT_VGADDC;
  936. /* Default to having backlight */
  937. dev_priv->vbt.backlight.present = true;
  938. /* LFP panel data */
  939. dev_priv->vbt.lvds_dither = 1;
  940. dev_priv->vbt.lvds_vbt = 0;
  941. /* SDVO panel data */
  942. dev_priv->vbt.sdvo_lvds_vbt_mode = NULL;
  943. /* general features */
  944. dev_priv->vbt.int_tv_support = 1;
  945. dev_priv->vbt.int_crt_support = 1;
  946. /* Default to using SSC */
  947. dev_priv->vbt.lvds_use_ssc = 1;
  948. /*
  949. * Core/SandyBridge/IvyBridge use alternative (120MHz) reference
  950. * clock for LVDS.
  951. */
  952. dev_priv->vbt.lvds_ssc_freq = intel_bios_ssc_frequency(dev,
  953. !HAS_PCH_SPLIT(dev));
  954. DRM_DEBUG_KMS("Set default to SSC at %d kHz\n", dev_priv->vbt.lvds_ssc_freq);
  955. for (port = PORT_A; port < I915_MAX_PORTS; port++) {
  956. struct ddi_vbt_port_info *info =
  957. &dev_priv->vbt.ddi_port_info[port];
  958. info->hdmi_level_shift = HDMI_LEVEL_SHIFT_UNKNOWN;
  959. info->supports_dvi = (port != PORT_A && port != PORT_E);
  960. info->supports_hdmi = info->supports_dvi;
  961. info->supports_dp = (port != PORT_E);
  962. }
  963. }
  964. static int intel_no_opregion_vbt_callback(const struct dmi_system_id *id)
  965. {
  966. DRM_DEBUG_KMS("Falling back to manually reading VBT from "
  967. "VBIOS ROM for %s\n",
  968. id->ident);
  969. return 1;
  970. }
  971. static const struct dmi_system_id intel_no_opregion_vbt[] = {
  972. {
  973. .callback = intel_no_opregion_vbt_callback,
  974. .ident = "ThinkCentre A57",
  975. .matches = {
  976. DMI_MATCH(DMI_SYS_VENDOR, "LENOVO"),
  977. DMI_MATCH(DMI_PRODUCT_NAME, "97027RG"),
  978. },
  979. },
  980. { }
  981. };
  982. static struct bdb_header *validate_vbt(char *base, size_t size,
  983. struct vbt_header *vbt,
  984. const char *source)
  985. {
  986. size_t offset;
  987. struct bdb_header *bdb;
  988. if (vbt == NULL) {
  989. DRM_DEBUG_DRIVER("VBT signature missing\n");
  990. return NULL;
  991. }
  992. offset = (char *)vbt - base;
  993. if (offset + sizeof(struct vbt_header) > size) {
  994. DRM_DEBUG_DRIVER("VBT header incomplete\n");
  995. return NULL;
  996. }
  997. if (memcmp(vbt->signature, "$VBT", 4)) {
  998. DRM_DEBUG_DRIVER("VBT invalid signature\n");
  999. return NULL;
  1000. }
  1001. offset += vbt->bdb_offset;
  1002. if (offset + sizeof(struct bdb_header) > size) {
  1003. DRM_DEBUG_DRIVER("BDB header incomplete\n");
  1004. return NULL;
  1005. }
  1006. bdb = (struct bdb_header *)(base + offset);
  1007. if (offset + bdb->bdb_size > size) {
  1008. DRM_DEBUG_DRIVER("BDB incomplete\n");
  1009. return NULL;
  1010. }
  1011. DRM_DEBUG_KMS("Using VBT from %s: %20s\n",
  1012. source, vbt->signature);
  1013. return bdb;
  1014. }
  1015. /**
  1016. * intel_parse_bios - find VBT and initialize settings from the BIOS
  1017. * @dev: DRM device
  1018. *
  1019. * Loads the Video BIOS and checks that the VBT exists. Sets scratch registers
  1020. * to appropriate values.
  1021. *
  1022. * Returns 0 on success, nonzero on failure.
  1023. */
  1024. int
  1025. intel_parse_bios(struct drm_device *dev)
  1026. {
  1027. struct drm_i915_private *dev_priv = dev->dev_private;
  1028. struct pci_dev *pdev = dev->pdev;
  1029. struct bdb_header *bdb = NULL;
  1030. u8 __iomem *bios = NULL;
  1031. if (HAS_PCH_NOP(dev))
  1032. return -ENODEV;
  1033. init_vbt_defaults(dev_priv);
  1034. /* XXX Should this validation be moved to intel_opregion.c? */
  1035. if (!dmi_check_system(intel_no_opregion_vbt) && dev_priv->opregion.vbt)
  1036. bdb = validate_vbt((char *)dev_priv->opregion.header, OPREGION_SIZE,
  1037. (struct vbt_header *)dev_priv->opregion.vbt,
  1038. "OpRegion");
  1039. if (bdb == NULL) {
  1040. size_t i, size;
  1041. bios = pci_map_rom(pdev, &size);
  1042. if (!bios)
  1043. return -1;
  1044. /* Scour memory looking for the VBT signature */
  1045. for (i = 0; i + 4 < size; i++) {
  1046. if (memcmp(bios + i, "$VBT", 4) == 0) {
  1047. bdb = validate_vbt(bios, size,
  1048. (struct vbt_header *)(bios + i),
  1049. "PCI ROM");
  1050. break;
  1051. }
  1052. }
  1053. if (!bdb) {
  1054. pci_unmap_rom(pdev, bios);
  1055. return -1;
  1056. }
  1057. }
  1058. /* Grab useful general definitions */
  1059. parse_general_features(dev_priv, bdb);
  1060. parse_general_definitions(dev_priv, bdb);
  1061. parse_lfp_panel_data(dev_priv, bdb);
  1062. parse_lfp_backlight(dev_priv, bdb);
  1063. parse_sdvo_panel_data(dev_priv, bdb);
  1064. parse_sdvo_device_mapping(dev_priv, bdb);
  1065. parse_device_mapping(dev_priv, bdb);
  1066. parse_driver_features(dev_priv, bdb);
  1067. parse_edp(dev_priv, bdb);
  1068. parse_mipi(dev_priv, bdb);
  1069. parse_ddi_ports(dev_priv, bdb);
  1070. if (bios)
  1071. pci_unmap_rom(pdev, bios);
  1072. return 0;
  1073. }
  1074. /* Ensure that vital registers have been initialised, even if the BIOS
  1075. * is absent or just failing to do its job.
  1076. */
  1077. void intel_setup_bios(struct drm_device *dev)
  1078. {
  1079. struct drm_i915_private *dev_priv = dev->dev_private;
  1080. /* Set the Panel Power On/Off timings if uninitialized. */
  1081. if (!HAS_PCH_SPLIT(dev) &&
  1082. I915_READ(PP_ON_DELAYS) == 0 && I915_READ(PP_OFF_DELAYS) == 0) {
  1083. /* Set T2 to 40ms and T5 to 200ms */
  1084. I915_WRITE(PP_ON_DELAYS, 0x019007d0);
  1085. /* Set T3 to 35ms and Tx to 200ms */
  1086. I915_WRITE(PP_OFF_DELAYS, 0x015e07d0);
  1087. }
  1088. }