exynos_drm_crtc.c 14 KB

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  1. /* exynos_drm_crtc.c
  2. *
  3. * Copyright (c) 2011 Samsung Electronics Co., Ltd.
  4. * Authors:
  5. * Inki Dae <inki.dae@samsung.com>
  6. * Joonyoung Shim <jy0922.shim@samsung.com>
  7. * Seung-Woo Kim <sw0312.kim@samsung.com>
  8. *
  9. * This program is free software; you can redistribute it and/or modify it
  10. * under the terms of the GNU General Public License as published by the
  11. * Free Software Foundation; either version 2 of the License, or (at your
  12. * option) any later version.
  13. */
  14. #include <drm/drmP.h>
  15. #include <drm/drm_crtc_helper.h>
  16. #include "exynos_drm_crtc.h"
  17. #include "exynos_drm_drv.h"
  18. #include "exynos_drm_encoder.h"
  19. #include "exynos_drm_plane.h"
  20. #define to_exynos_crtc(x) container_of(x, struct exynos_drm_crtc,\
  21. drm_crtc)
  22. enum exynos_crtc_mode {
  23. CRTC_MODE_NORMAL, /* normal mode */
  24. CRTC_MODE_BLANK, /* The private plane of crtc is blank */
  25. };
  26. /*
  27. * Exynos specific crtc structure.
  28. *
  29. * @drm_crtc: crtc object.
  30. * @manager: the manager associated with this crtc
  31. * @pipe: a crtc index created at load() with a new crtc object creation
  32. * and the crtc object would be set to private->crtc array
  33. * to get a crtc object corresponding to this pipe from private->crtc
  34. * array when irq interrupt occurred. the reason of using this pipe is that
  35. * drm framework doesn't support multiple irq yet.
  36. * we can refer to the crtc to current hardware interrupt occurred through
  37. * this pipe value.
  38. * @dpms: store the crtc dpms value
  39. * @mode: store the crtc mode value
  40. */
  41. struct exynos_drm_crtc {
  42. struct drm_crtc drm_crtc;
  43. struct exynos_drm_manager *manager;
  44. unsigned int pipe;
  45. unsigned int dpms;
  46. enum exynos_crtc_mode mode;
  47. wait_queue_head_t pending_flip_queue;
  48. atomic_t pending_flip;
  49. };
  50. static void exynos_drm_crtc_dpms(struct drm_crtc *crtc, int mode)
  51. {
  52. struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
  53. struct exynos_drm_manager *manager = exynos_crtc->manager;
  54. DRM_DEBUG_KMS("crtc[%d] mode[%d]\n", crtc->base.id, mode);
  55. if (exynos_crtc->dpms == mode) {
  56. DRM_DEBUG_KMS("desired dpms mode is same as previous one.\n");
  57. return;
  58. }
  59. if (mode > DRM_MODE_DPMS_ON) {
  60. /* wait for the completion of page flip. */
  61. if (!wait_event_timeout(exynos_crtc->pending_flip_queue,
  62. !atomic_read(&exynos_crtc->pending_flip),
  63. HZ/20))
  64. atomic_set(&exynos_crtc->pending_flip, 0);
  65. drm_crtc_vblank_off(crtc);
  66. }
  67. if (manager->ops->dpms)
  68. manager->ops->dpms(manager, mode);
  69. exynos_crtc->dpms = mode;
  70. if (mode == DRM_MODE_DPMS_ON)
  71. drm_crtc_vblank_on(crtc);
  72. }
  73. static void exynos_drm_crtc_prepare(struct drm_crtc *crtc)
  74. {
  75. /* drm framework doesn't check NULL. */
  76. }
  77. static void exynos_drm_crtc_commit(struct drm_crtc *crtc)
  78. {
  79. struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
  80. struct exynos_drm_manager *manager = exynos_crtc->manager;
  81. exynos_drm_crtc_dpms(crtc, DRM_MODE_DPMS_ON);
  82. exynos_plane_commit(crtc->primary);
  83. if (manager->ops->commit)
  84. manager->ops->commit(manager);
  85. exynos_plane_dpms(crtc->primary, DRM_MODE_DPMS_ON);
  86. }
  87. static bool
  88. exynos_drm_crtc_mode_fixup(struct drm_crtc *crtc,
  89. const struct drm_display_mode *mode,
  90. struct drm_display_mode *adjusted_mode)
  91. {
  92. struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
  93. struct exynos_drm_manager *manager = exynos_crtc->manager;
  94. if (manager->ops->mode_fixup)
  95. return manager->ops->mode_fixup(manager, mode, adjusted_mode);
  96. return true;
  97. }
  98. static int
  99. exynos_drm_crtc_mode_set(struct drm_crtc *crtc, struct drm_display_mode *mode,
  100. struct drm_display_mode *adjusted_mode, int x, int y,
  101. struct drm_framebuffer *old_fb)
  102. {
  103. struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
  104. struct exynos_drm_manager *manager = exynos_crtc->manager;
  105. struct drm_framebuffer *fb = crtc->primary->fb;
  106. unsigned int crtc_w;
  107. unsigned int crtc_h;
  108. /*
  109. * copy the mode data adjusted by mode_fixup() into crtc->mode
  110. * so that hardware can be seet to proper mode.
  111. */
  112. memcpy(&crtc->mode, adjusted_mode, sizeof(*adjusted_mode));
  113. crtc_w = fb->width - x;
  114. crtc_h = fb->height - y;
  115. if (manager->ops->mode_set)
  116. manager->ops->mode_set(manager, &crtc->mode);
  117. return exynos_plane_mode_set(crtc->primary, crtc, fb, 0, 0,
  118. crtc_w, crtc_h, x, y, crtc_w, crtc_h);
  119. }
  120. static int exynos_drm_crtc_mode_set_commit(struct drm_crtc *crtc, int x, int y,
  121. struct drm_framebuffer *old_fb)
  122. {
  123. struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
  124. struct drm_framebuffer *fb = crtc->primary->fb;
  125. unsigned int crtc_w;
  126. unsigned int crtc_h;
  127. int ret;
  128. /* when framebuffer changing is requested, crtc's dpms should be on */
  129. if (exynos_crtc->dpms > DRM_MODE_DPMS_ON) {
  130. DRM_ERROR("failed framebuffer changing request.\n");
  131. return -EPERM;
  132. }
  133. crtc_w = fb->width - x;
  134. crtc_h = fb->height - y;
  135. ret = exynos_plane_mode_set(crtc->primary, crtc, fb, 0, 0,
  136. crtc_w, crtc_h, x, y, crtc_w, crtc_h);
  137. if (ret)
  138. return ret;
  139. exynos_drm_crtc_commit(crtc);
  140. return 0;
  141. }
  142. static int exynos_drm_crtc_mode_set_base(struct drm_crtc *crtc, int x, int y,
  143. struct drm_framebuffer *old_fb)
  144. {
  145. return exynos_drm_crtc_mode_set_commit(crtc, x, y, old_fb);
  146. }
  147. static void exynos_drm_crtc_disable(struct drm_crtc *crtc)
  148. {
  149. struct drm_plane *plane;
  150. int ret;
  151. exynos_drm_crtc_dpms(crtc, DRM_MODE_DPMS_OFF);
  152. drm_for_each_legacy_plane(plane, &crtc->dev->mode_config.plane_list) {
  153. if (plane->crtc != crtc)
  154. continue;
  155. ret = plane->funcs->disable_plane(plane);
  156. if (ret)
  157. DRM_ERROR("Failed to disable plane %d\n", ret);
  158. }
  159. }
  160. static struct drm_crtc_helper_funcs exynos_crtc_helper_funcs = {
  161. .dpms = exynos_drm_crtc_dpms,
  162. .prepare = exynos_drm_crtc_prepare,
  163. .commit = exynos_drm_crtc_commit,
  164. .mode_fixup = exynos_drm_crtc_mode_fixup,
  165. .mode_set = exynos_drm_crtc_mode_set,
  166. .mode_set_base = exynos_drm_crtc_mode_set_base,
  167. .disable = exynos_drm_crtc_disable,
  168. };
  169. static int exynos_drm_crtc_page_flip(struct drm_crtc *crtc,
  170. struct drm_framebuffer *fb,
  171. struct drm_pending_vblank_event *event,
  172. uint32_t page_flip_flags)
  173. {
  174. struct drm_device *dev = crtc->dev;
  175. struct exynos_drm_private *dev_priv = dev->dev_private;
  176. struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
  177. struct drm_framebuffer *old_fb = crtc->primary->fb;
  178. int ret = -EINVAL;
  179. /* when the page flip is requested, crtc's dpms should be on */
  180. if (exynos_crtc->dpms > DRM_MODE_DPMS_ON) {
  181. DRM_ERROR("failed page flip request.\n");
  182. return -EINVAL;
  183. }
  184. mutex_lock(&dev->struct_mutex);
  185. if (event) {
  186. /*
  187. * the pipe from user always is 0 so we can set pipe number
  188. * of current owner to event.
  189. */
  190. event->pipe = exynos_crtc->pipe;
  191. ret = drm_vblank_get(dev, exynos_crtc->pipe);
  192. if (ret) {
  193. DRM_DEBUG("failed to acquire vblank counter\n");
  194. goto out;
  195. }
  196. spin_lock_irq(&dev->event_lock);
  197. list_add_tail(&event->base.link,
  198. &dev_priv->pageflip_event_list);
  199. atomic_set(&exynos_crtc->pending_flip, 1);
  200. spin_unlock_irq(&dev->event_lock);
  201. crtc->primary->fb = fb;
  202. ret = exynos_drm_crtc_mode_set_commit(crtc, crtc->x, crtc->y,
  203. NULL);
  204. if (ret) {
  205. crtc->primary->fb = old_fb;
  206. spin_lock_irq(&dev->event_lock);
  207. drm_vblank_put(dev, exynos_crtc->pipe);
  208. list_del(&event->base.link);
  209. atomic_set(&exynos_crtc->pending_flip, 0);
  210. spin_unlock_irq(&dev->event_lock);
  211. goto out;
  212. }
  213. }
  214. out:
  215. mutex_unlock(&dev->struct_mutex);
  216. return ret;
  217. }
  218. static void exynos_drm_crtc_destroy(struct drm_crtc *crtc)
  219. {
  220. struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
  221. struct exynos_drm_private *private = crtc->dev->dev_private;
  222. private->crtc[exynos_crtc->pipe] = NULL;
  223. drm_crtc_cleanup(crtc);
  224. kfree(exynos_crtc);
  225. }
  226. static int exynos_drm_crtc_set_property(struct drm_crtc *crtc,
  227. struct drm_property *property,
  228. uint64_t val)
  229. {
  230. struct drm_device *dev = crtc->dev;
  231. struct exynos_drm_private *dev_priv = dev->dev_private;
  232. struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(crtc);
  233. if (property == dev_priv->crtc_mode_property) {
  234. enum exynos_crtc_mode mode = val;
  235. if (mode == exynos_crtc->mode)
  236. return 0;
  237. exynos_crtc->mode = mode;
  238. switch (mode) {
  239. case CRTC_MODE_NORMAL:
  240. exynos_drm_crtc_commit(crtc);
  241. break;
  242. case CRTC_MODE_BLANK:
  243. exynos_plane_dpms(crtc->primary, DRM_MODE_DPMS_OFF);
  244. break;
  245. default:
  246. break;
  247. }
  248. return 0;
  249. }
  250. return -EINVAL;
  251. }
  252. static struct drm_crtc_funcs exynos_crtc_funcs = {
  253. .set_config = drm_crtc_helper_set_config,
  254. .page_flip = exynos_drm_crtc_page_flip,
  255. .destroy = exynos_drm_crtc_destroy,
  256. .set_property = exynos_drm_crtc_set_property,
  257. };
  258. static const struct drm_prop_enum_list mode_names[] = {
  259. { CRTC_MODE_NORMAL, "normal" },
  260. { CRTC_MODE_BLANK, "blank" },
  261. };
  262. static void exynos_drm_crtc_attach_mode_property(struct drm_crtc *crtc)
  263. {
  264. struct drm_device *dev = crtc->dev;
  265. struct exynos_drm_private *dev_priv = dev->dev_private;
  266. struct drm_property *prop;
  267. prop = dev_priv->crtc_mode_property;
  268. if (!prop) {
  269. prop = drm_property_create_enum(dev, 0, "mode", mode_names,
  270. ARRAY_SIZE(mode_names));
  271. if (!prop)
  272. return;
  273. dev_priv->crtc_mode_property = prop;
  274. }
  275. drm_object_attach_property(&crtc->base, prop, 0);
  276. }
  277. int exynos_drm_crtc_create(struct exynos_drm_manager *manager)
  278. {
  279. struct exynos_drm_crtc *exynos_crtc;
  280. struct drm_plane *plane;
  281. struct exynos_drm_private *private = manager->drm_dev->dev_private;
  282. struct drm_crtc *crtc;
  283. int ret;
  284. exynos_crtc = kzalloc(sizeof(*exynos_crtc), GFP_KERNEL);
  285. if (!exynos_crtc)
  286. return -ENOMEM;
  287. init_waitqueue_head(&exynos_crtc->pending_flip_queue);
  288. atomic_set(&exynos_crtc->pending_flip, 0);
  289. exynos_crtc->dpms = DRM_MODE_DPMS_OFF;
  290. exynos_crtc->manager = manager;
  291. exynos_crtc->pipe = manager->pipe;
  292. plane = exynos_plane_init(manager->drm_dev, 1 << manager->pipe,
  293. DRM_PLANE_TYPE_PRIMARY);
  294. if (IS_ERR(plane)) {
  295. ret = PTR_ERR(plane);
  296. goto err_plane;
  297. }
  298. manager->crtc = &exynos_crtc->drm_crtc;
  299. crtc = &exynos_crtc->drm_crtc;
  300. private->crtc[manager->pipe] = crtc;
  301. ret = drm_crtc_init_with_planes(manager->drm_dev, crtc, plane, NULL,
  302. &exynos_crtc_funcs);
  303. if (ret < 0)
  304. goto err_crtc;
  305. drm_crtc_helper_add(crtc, &exynos_crtc_helper_funcs);
  306. exynos_drm_crtc_attach_mode_property(crtc);
  307. return 0;
  308. err_crtc:
  309. plane->funcs->destroy(plane);
  310. err_plane:
  311. kfree(exynos_crtc);
  312. return ret;
  313. }
  314. int exynos_drm_crtc_enable_vblank(struct drm_device *dev, int pipe)
  315. {
  316. struct exynos_drm_private *private = dev->dev_private;
  317. struct exynos_drm_crtc *exynos_crtc =
  318. to_exynos_crtc(private->crtc[pipe]);
  319. struct exynos_drm_manager *manager = exynos_crtc->manager;
  320. if (exynos_crtc->dpms != DRM_MODE_DPMS_ON)
  321. return -EPERM;
  322. if (manager->ops->enable_vblank)
  323. manager->ops->enable_vblank(manager);
  324. return 0;
  325. }
  326. void exynos_drm_crtc_disable_vblank(struct drm_device *dev, int pipe)
  327. {
  328. struct exynos_drm_private *private = dev->dev_private;
  329. struct exynos_drm_crtc *exynos_crtc =
  330. to_exynos_crtc(private->crtc[pipe]);
  331. struct exynos_drm_manager *manager = exynos_crtc->manager;
  332. if (exynos_crtc->dpms != DRM_MODE_DPMS_ON)
  333. return;
  334. if (manager->ops->disable_vblank)
  335. manager->ops->disable_vblank(manager);
  336. }
  337. void exynos_drm_crtc_finish_pageflip(struct drm_device *dev, int pipe)
  338. {
  339. struct exynos_drm_private *dev_priv = dev->dev_private;
  340. struct drm_pending_vblank_event *e, *t;
  341. struct drm_crtc *drm_crtc = dev_priv->crtc[pipe];
  342. struct exynos_drm_crtc *exynos_crtc = to_exynos_crtc(drm_crtc);
  343. unsigned long flags;
  344. spin_lock_irqsave(&dev->event_lock, flags);
  345. list_for_each_entry_safe(e, t, &dev_priv->pageflip_event_list,
  346. base.link) {
  347. /* if event's pipe isn't same as crtc then ignore it. */
  348. if (pipe != e->pipe)
  349. continue;
  350. list_del(&e->base.link);
  351. drm_send_vblank_event(dev, -1, e);
  352. drm_vblank_put(dev, pipe);
  353. atomic_set(&exynos_crtc->pending_flip, 0);
  354. wake_up(&exynos_crtc->pending_flip_queue);
  355. }
  356. spin_unlock_irqrestore(&dev->event_lock, flags);
  357. }
  358. void exynos_drm_crtc_plane_mode_set(struct drm_crtc *crtc,
  359. struct exynos_drm_overlay *overlay)
  360. {
  361. struct exynos_drm_manager *manager = to_exynos_crtc(crtc)->manager;
  362. if (manager->ops->win_mode_set)
  363. manager->ops->win_mode_set(manager, overlay);
  364. }
  365. void exynos_drm_crtc_plane_commit(struct drm_crtc *crtc, int zpos)
  366. {
  367. struct exynos_drm_manager *manager = to_exynos_crtc(crtc)->manager;
  368. if (manager->ops->win_commit)
  369. manager->ops->win_commit(manager, zpos);
  370. }
  371. void exynos_drm_crtc_plane_enable(struct drm_crtc *crtc, int zpos)
  372. {
  373. struct exynos_drm_manager *manager = to_exynos_crtc(crtc)->manager;
  374. if (manager->ops->win_enable)
  375. manager->ops->win_enable(manager, zpos);
  376. }
  377. void exynos_drm_crtc_plane_disable(struct drm_crtc *crtc, int zpos)
  378. {
  379. struct exynos_drm_manager *manager = to_exynos_crtc(crtc)->manager;
  380. if (manager->ops->win_disable)
  381. manager->ops->win_disable(manager, zpos);
  382. }
  383. void exynos_drm_crtc_complete_scanout(struct drm_framebuffer *fb)
  384. {
  385. struct exynos_drm_manager *manager;
  386. struct drm_device *dev = fb->dev;
  387. struct drm_crtc *crtc;
  388. /*
  389. * make sure that overlay data are updated to real hardware
  390. * for all encoders.
  391. */
  392. list_for_each_entry(crtc, &dev->mode_config.crtc_list, head) {
  393. manager = to_exynos_crtc(crtc)->manager;
  394. /*
  395. * wait for vblank interrupt
  396. * - this makes sure that overlay data are updated to
  397. * real hardware.
  398. */
  399. if (manager->ops->wait_for_vblank)
  400. manager->ops->wait_for_vblank(manager);
  401. }
  402. }
  403. int exynos_drm_crtc_get_pipe_from_type(struct drm_device *drm_dev,
  404. unsigned int out_type)
  405. {
  406. struct drm_crtc *crtc;
  407. list_for_each_entry(crtc, &drm_dev->mode_config.crtc_list, head) {
  408. struct exynos_drm_crtc *exynos_crtc;
  409. exynos_crtc = to_exynos_crtc(crtc);
  410. if (exynos_crtc->manager->type == out_type)
  411. return exynos_crtc->manager->pipe;
  412. }
  413. return -EPERM;
  414. }
  415. void exynos_drm_crtc_te_handler(struct drm_crtc *crtc)
  416. {
  417. struct exynos_drm_manager *manager = to_exynos_crtc(crtc)->manager;
  418. if (manager->ops->te_handler)
  419. manager->ops->te_handler(manager);
  420. }