gpu_scheduler.c 22 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457458459460461462463464465466467468469470471472473474475476477478479480481482483484485486487488489490491492493494495496497498499500501502503504505506507508509510511512513514515516517518519520521522523524525526527528529530531532533534535536537538539540541542543544545546547548549550551552553554555556557558559560561562563564565566567568569570571572573574575576577578579580581582583584585586587588589590591592593594595596597598599600601602603604605606607608609610611612613614615616617618619620621622623624625626627628629630631632633634635636637638639640641642643644645646647648649650651652653654655656657658659660661662663664665666667668669670671672673674675676677678679680681682683684685686687688689690691692693694695696697698699700701702703704705706707708709710711712713714715716717718719720721722723724725726727728729730731732733734735736737738739740741742743744745746747748749750751752753754755756757758759760761762763764765766767768769770771772773774775776777778779780781782783784785786787788789790791792793794795796797798799800
  1. /*
  2. * Copyright 2015 Advanced Micro Devices, Inc.
  3. *
  4. * Permission is hereby granted, free of charge, to any person obtaining a
  5. * copy of this software and associated documentation files (the "Software"),
  6. * to deal in the Software without restriction, including without limitation
  7. * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  8. * and/or sell copies of the Software, and to permit persons to whom the
  9. * Software is furnished to do so, subject to the following conditions:
  10. *
  11. * The above copyright notice and this permission notice shall be included in
  12. * all copies or substantial portions of the Software.
  13. *
  14. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  15. * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  16. * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL
  17. * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR
  18. * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  19. * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  20. * OTHER DEALINGS IN THE SOFTWARE.
  21. *
  22. */
  23. #include <linux/kthread.h>
  24. #include <linux/wait.h>
  25. #include <linux/sched.h>
  26. #include <uapi/linux/sched/types.h>
  27. #include <drm/drmP.h>
  28. #include <drm/gpu_scheduler.h>
  29. #include <drm/spsc_queue.h>
  30. #define CREATE_TRACE_POINTS
  31. #include "gpu_scheduler_trace.h"
  32. #define to_drm_sched_job(sched_job) \
  33. container_of((sched_job), struct drm_sched_job, queue_node)
  34. static bool drm_sched_entity_is_ready(struct drm_sched_entity *entity);
  35. static void drm_sched_wakeup(struct drm_gpu_scheduler *sched);
  36. static void drm_sched_process_job(struct dma_fence *f, struct dma_fence_cb *cb);
  37. /* Initialize a given run queue struct */
  38. static void drm_sched_rq_init(struct drm_sched_rq *rq)
  39. {
  40. spin_lock_init(&rq->lock);
  41. INIT_LIST_HEAD(&rq->entities);
  42. rq->current_entity = NULL;
  43. }
  44. static void drm_sched_rq_add_entity(struct drm_sched_rq *rq,
  45. struct drm_sched_entity *entity)
  46. {
  47. if (!list_empty(&entity->list))
  48. return;
  49. spin_lock(&rq->lock);
  50. list_add_tail(&entity->list, &rq->entities);
  51. spin_unlock(&rq->lock);
  52. }
  53. static void drm_sched_rq_remove_entity(struct drm_sched_rq *rq,
  54. struct drm_sched_entity *entity)
  55. {
  56. if (list_empty(&entity->list))
  57. return;
  58. spin_lock(&rq->lock);
  59. list_del_init(&entity->list);
  60. if (rq->current_entity == entity)
  61. rq->current_entity = NULL;
  62. spin_unlock(&rq->lock);
  63. }
  64. /**
  65. * Select an entity which could provide a job to run
  66. *
  67. * @rq The run queue to check.
  68. *
  69. * Try to find a ready entity, returns NULL if none found.
  70. */
  71. static struct drm_sched_entity *
  72. drm_sched_rq_select_entity(struct drm_sched_rq *rq)
  73. {
  74. struct drm_sched_entity *entity;
  75. spin_lock(&rq->lock);
  76. entity = rq->current_entity;
  77. if (entity) {
  78. list_for_each_entry_continue(entity, &rq->entities, list) {
  79. if (drm_sched_entity_is_ready(entity)) {
  80. rq->current_entity = entity;
  81. spin_unlock(&rq->lock);
  82. return entity;
  83. }
  84. }
  85. }
  86. list_for_each_entry(entity, &rq->entities, list) {
  87. if (drm_sched_entity_is_ready(entity)) {
  88. rq->current_entity = entity;
  89. spin_unlock(&rq->lock);
  90. return entity;
  91. }
  92. if (entity == rq->current_entity)
  93. break;
  94. }
  95. spin_unlock(&rq->lock);
  96. return NULL;
  97. }
  98. /**
  99. * Init a context entity used by scheduler when submit to HW ring.
  100. *
  101. * @sched The pointer to the scheduler
  102. * @entity The pointer to a valid drm_sched_entity
  103. * @rq The run queue this entity belongs
  104. * @guilty atomic_t set to 1 when a job on this queue
  105. * is found to be guilty causing a timeout
  106. *
  107. * return 0 if succeed. negative error code on failure
  108. */
  109. int drm_sched_entity_init(struct drm_gpu_scheduler *sched,
  110. struct drm_sched_entity *entity,
  111. struct drm_sched_rq *rq,
  112. atomic_t *guilty)
  113. {
  114. if (!(sched && entity && rq))
  115. return -EINVAL;
  116. memset(entity, 0, sizeof(struct drm_sched_entity));
  117. INIT_LIST_HEAD(&entity->list);
  118. entity->rq = rq;
  119. entity->sched = sched;
  120. entity->guilty = guilty;
  121. entity->fini_status = 0;
  122. entity->last_scheduled = NULL;
  123. spin_lock_init(&entity->rq_lock);
  124. spsc_queue_init(&entity->job_queue);
  125. atomic_set(&entity->fence_seq, 0);
  126. entity->fence_context = dma_fence_context_alloc(2);
  127. return 0;
  128. }
  129. EXPORT_SYMBOL(drm_sched_entity_init);
  130. /**
  131. * Query if entity is initialized
  132. *
  133. * @sched Pointer to scheduler instance
  134. * @entity The pointer to a valid scheduler entity
  135. *
  136. * return true if entity is initialized, false otherwise
  137. */
  138. static bool drm_sched_entity_is_initialized(struct drm_gpu_scheduler *sched,
  139. struct drm_sched_entity *entity)
  140. {
  141. return entity->sched == sched &&
  142. entity->rq != NULL;
  143. }
  144. /**
  145. * Check if entity is idle
  146. *
  147. * @entity The pointer to a valid scheduler entity
  148. *
  149. * Return true if entity don't has any unscheduled jobs.
  150. */
  151. static bool drm_sched_entity_is_idle(struct drm_sched_entity *entity)
  152. {
  153. rmb();
  154. if (spsc_queue_peek(&entity->job_queue) == NULL)
  155. return true;
  156. return false;
  157. }
  158. /**
  159. * Check if entity is ready
  160. *
  161. * @entity The pointer to a valid scheduler entity
  162. *
  163. * Return true if entity could provide a job.
  164. */
  165. static bool drm_sched_entity_is_ready(struct drm_sched_entity *entity)
  166. {
  167. if (spsc_queue_peek(&entity->job_queue) == NULL)
  168. return false;
  169. if (READ_ONCE(entity->dependency))
  170. return false;
  171. return true;
  172. }
  173. static void drm_sched_entity_kill_jobs_cb(struct dma_fence *f,
  174. struct dma_fence_cb *cb)
  175. {
  176. struct drm_sched_job *job = container_of(cb, struct drm_sched_job,
  177. finish_cb);
  178. drm_sched_fence_finished(job->s_fence);
  179. WARN_ON(job->s_fence->parent);
  180. dma_fence_put(&job->s_fence->finished);
  181. job->sched->ops->free_job(job);
  182. }
  183. /**
  184. * Destroy a context entity
  185. *
  186. * @sched Pointer to scheduler instance
  187. * @entity The pointer to a valid scheduler entity
  188. *
  189. * Splitting drm_sched_entity_fini() into two functions, The first one is does the waiting,
  190. * removes the entity from the runqueue and returns an error when the process was killed.
  191. */
  192. void drm_sched_entity_do_release(struct drm_gpu_scheduler *sched,
  193. struct drm_sched_entity *entity)
  194. {
  195. if (!drm_sched_entity_is_initialized(sched, entity))
  196. return;
  197. /**
  198. * The client will not queue more IBs during this fini, consume existing
  199. * queued IBs or discard them on SIGKILL
  200. */
  201. if ((current->flags & PF_SIGNALED) && current->exit_code == SIGKILL)
  202. entity->fini_status = -ERESTARTSYS;
  203. else
  204. entity->fini_status = wait_event_killable(sched->job_scheduled,
  205. drm_sched_entity_is_idle(entity));
  206. drm_sched_entity_set_rq(entity, NULL);
  207. }
  208. EXPORT_SYMBOL(drm_sched_entity_do_release);
  209. /**
  210. * Destroy a context entity
  211. *
  212. * @sched Pointer to scheduler instance
  213. * @entity The pointer to a valid scheduler entity
  214. *
  215. * The second one then goes over the entity and signals all jobs with an error code.
  216. */
  217. void drm_sched_entity_cleanup(struct drm_gpu_scheduler *sched,
  218. struct drm_sched_entity *entity)
  219. {
  220. if (entity->fini_status) {
  221. struct drm_sched_job *job;
  222. int r;
  223. /* Park the kernel for a moment to make sure it isn't processing
  224. * our enity.
  225. */
  226. kthread_park(sched->thread);
  227. kthread_unpark(sched->thread);
  228. if (entity->dependency) {
  229. dma_fence_remove_callback(entity->dependency,
  230. &entity->cb);
  231. dma_fence_put(entity->dependency);
  232. entity->dependency = NULL;
  233. }
  234. while ((job = to_drm_sched_job(spsc_queue_pop(&entity->job_queue)))) {
  235. struct drm_sched_fence *s_fence = job->s_fence;
  236. drm_sched_fence_scheduled(s_fence);
  237. dma_fence_set_error(&s_fence->finished, -ESRCH);
  238. r = dma_fence_add_callback(entity->last_scheduled, &job->finish_cb,
  239. drm_sched_entity_kill_jobs_cb);
  240. if (r == -ENOENT)
  241. drm_sched_entity_kill_jobs_cb(NULL, &job->finish_cb);
  242. else if (r)
  243. DRM_ERROR("fence add callback failed (%d)\n", r);
  244. }
  245. }
  246. dma_fence_put(entity->last_scheduled);
  247. entity->last_scheduled = NULL;
  248. }
  249. EXPORT_SYMBOL(drm_sched_entity_cleanup);
  250. void drm_sched_entity_fini(struct drm_gpu_scheduler *sched,
  251. struct drm_sched_entity *entity)
  252. {
  253. drm_sched_entity_do_release(sched, entity);
  254. drm_sched_entity_cleanup(sched, entity);
  255. }
  256. EXPORT_SYMBOL(drm_sched_entity_fini);
  257. static void drm_sched_entity_wakeup(struct dma_fence *f, struct dma_fence_cb *cb)
  258. {
  259. struct drm_sched_entity *entity =
  260. container_of(cb, struct drm_sched_entity, cb);
  261. entity->dependency = NULL;
  262. dma_fence_put(f);
  263. drm_sched_wakeup(entity->sched);
  264. }
  265. static void drm_sched_entity_clear_dep(struct dma_fence *f, struct dma_fence_cb *cb)
  266. {
  267. struct drm_sched_entity *entity =
  268. container_of(cb, struct drm_sched_entity, cb);
  269. entity->dependency = NULL;
  270. dma_fence_put(f);
  271. }
  272. void drm_sched_entity_set_rq(struct drm_sched_entity *entity,
  273. struct drm_sched_rq *rq)
  274. {
  275. if (entity->rq == rq)
  276. return;
  277. spin_lock(&entity->rq_lock);
  278. if (entity->rq)
  279. drm_sched_rq_remove_entity(entity->rq, entity);
  280. entity->rq = rq;
  281. if (rq)
  282. drm_sched_rq_add_entity(rq, entity);
  283. spin_unlock(&entity->rq_lock);
  284. }
  285. EXPORT_SYMBOL(drm_sched_entity_set_rq);
  286. bool drm_sched_dependency_optimized(struct dma_fence* fence,
  287. struct drm_sched_entity *entity)
  288. {
  289. struct drm_gpu_scheduler *sched = entity->sched;
  290. struct drm_sched_fence *s_fence;
  291. if (!fence || dma_fence_is_signaled(fence))
  292. return false;
  293. if (fence->context == entity->fence_context)
  294. return true;
  295. s_fence = to_drm_sched_fence(fence);
  296. if (s_fence && s_fence->sched == sched)
  297. return true;
  298. return false;
  299. }
  300. EXPORT_SYMBOL(drm_sched_dependency_optimized);
  301. static bool drm_sched_entity_add_dependency_cb(struct drm_sched_entity *entity)
  302. {
  303. struct drm_gpu_scheduler *sched = entity->sched;
  304. struct dma_fence * fence = entity->dependency;
  305. struct drm_sched_fence *s_fence;
  306. if (fence->context == entity->fence_context ||
  307. fence->context == entity->fence_context + 1) {
  308. /*
  309. * Fence is a scheduled/finished fence from a job
  310. * which belongs to the same entity, we can ignore
  311. * fences from ourself
  312. */
  313. dma_fence_put(entity->dependency);
  314. return false;
  315. }
  316. s_fence = to_drm_sched_fence(fence);
  317. if (s_fence && s_fence->sched == sched) {
  318. /*
  319. * Fence is from the same scheduler, only need to wait for
  320. * it to be scheduled
  321. */
  322. fence = dma_fence_get(&s_fence->scheduled);
  323. dma_fence_put(entity->dependency);
  324. entity->dependency = fence;
  325. if (!dma_fence_add_callback(fence, &entity->cb,
  326. drm_sched_entity_clear_dep))
  327. return true;
  328. /* Ignore it when it is already scheduled */
  329. dma_fence_put(fence);
  330. return false;
  331. }
  332. if (!dma_fence_add_callback(entity->dependency, &entity->cb,
  333. drm_sched_entity_wakeup))
  334. return true;
  335. dma_fence_put(entity->dependency);
  336. return false;
  337. }
  338. static struct drm_sched_job *
  339. drm_sched_entity_pop_job(struct drm_sched_entity *entity)
  340. {
  341. struct drm_gpu_scheduler *sched = entity->sched;
  342. struct drm_sched_job *sched_job = to_drm_sched_job(
  343. spsc_queue_peek(&entity->job_queue));
  344. if (!sched_job)
  345. return NULL;
  346. while ((entity->dependency = sched->ops->dependency(sched_job, entity)))
  347. if (drm_sched_entity_add_dependency_cb(entity))
  348. return NULL;
  349. /* skip jobs from entity that marked guilty */
  350. if (entity->guilty && atomic_read(entity->guilty))
  351. dma_fence_set_error(&sched_job->s_fence->finished, -ECANCELED);
  352. dma_fence_put(entity->last_scheduled);
  353. entity->last_scheduled = dma_fence_get(&sched_job->s_fence->finished);
  354. spsc_queue_pop(&entity->job_queue);
  355. return sched_job;
  356. }
  357. /**
  358. * Submit a job to the job queue
  359. *
  360. * @sched_job The pointer to job required to submit
  361. *
  362. * Note: To guarantee that the order of insertion to queue matches
  363. * the job's fence sequence number this function should be
  364. * called with drm_sched_job_init under common lock.
  365. *
  366. * Returns 0 for success, negative error code otherwise.
  367. */
  368. void drm_sched_entity_push_job(struct drm_sched_job *sched_job,
  369. struct drm_sched_entity *entity)
  370. {
  371. struct drm_gpu_scheduler *sched = sched_job->sched;
  372. bool first = false;
  373. trace_drm_sched_job(sched_job, entity);
  374. first = spsc_queue_push(&entity->job_queue, &sched_job->queue_node);
  375. /* first job wakes up scheduler */
  376. if (first) {
  377. /* Add the entity to the run queue */
  378. spin_lock(&entity->rq_lock);
  379. drm_sched_rq_add_entity(entity->rq, entity);
  380. spin_unlock(&entity->rq_lock);
  381. drm_sched_wakeup(sched);
  382. }
  383. }
  384. EXPORT_SYMBOL(drm_sched_entity_push_job);
  385. /* job_finish is called after hw fence signaled
  386. */
  387. static void drm_sched_job_finish(struct work_struct *work)
  388. {
  389. struct drm_sched_job *s_job = container_of(work, struct drm_sched_job,
  390. finish_work);
  391. struct drm_gpu_scheduler *sched = s_job->sched;
  392. /* remove job from ring_mirror_list */
  393. spin_lock(&sched->job_list_lock);
  394. list_del_init(&s_job->node);
  395. if (sched->timeout != MAX_SCHEDULE_TIMEOUT) {
  396. struct drm_sched_job *next;
  397. spin_unlock(&sched->job_list_lock);
  398. cancel_delayed_work_sync(&s_job->work_tdr);
  399. spin_lock(&sched->job_list_lock);
  400. /* queue TDR for next job */
  401. next = list_first_entry_or_null(&sched->ring_mirror_list,
  402. struct drm_sched_job, node);
  403. if (next)
  404. schedule_delayed_work(&next->work_tdr, sched->timeout);
  405. }
  406. spin_unlock(&sched->job_list_lock);
  407. dma_fence_put(&s_job->s_fence->finished);
  408. sched->ops->free_job(s_job);
  409. }
  410. static void drm_sched_job_finish_cb(struct dma_fence *f,
  411. struct dma_fence_cb *cb)
  412. {
  413. struct drm_sched_job *job = container_of(cb, struct drm_sched_job,
  414. finish_cb);
  415. schedule_work(&job->finish_work);
  416. }
  417. static void drm_sched_job_begin(struct drm_sched_job *s_job)
  418. {
  419. struct drm_gpu_scheduler *sched = s_job->sched;
  420. dma_fence_add_callback(&s_job->s_fence->finished, &s_job->finish_cb,
  421. drm_sched_job_finish_cb);
  422. spin_lock(&sched->job_list_lock);
  423. list_add_tail(&s_job->node, &sched->ring_mirror_list);
  424. if (sched->timeout != MAX_SCHEDULE_TIMEOUT &&
  425. list_first_entry_or_null(&sched->ring_mirror_list,
  426. struct drm_sched_job, node) == s_job)
  427. schedule_delayed_work(&s_job->work_tdr, sched->timeout);
  428. spin_unlock(&sched->job_list_lock);
  429. }
  430. static void drm_sched_job_timedout(struct work_struct *work)
  431. {
  432. struct drm_sched_job *job = container_of(work, struct drm_sched_job,
  433. work_tdr.work);
  434. job->sched->ops->timedout_job(job);
  435. }
  436. void drm_sched_hw_job_reset(struct drm_gpu_scheduler *sched, struct drm_sched_job *bad)
  437. {
  438. struct drm_sched_job *s_job;
  439. struct drm_sched_entity *entity, *tmp;
  440. int i;
  441. spin_lock(&sched->job_list_lock);
  442. list_for_each_entry_reverse(s_job, &sched->ring_mirror_list, node) {
  443. if (s_job->s_fence->parent &&
  444. dma_fence_remove_callback(s_job->s_fence->parent,
  445. &s_job->s_fence->cb)) {
  446. dma_fence_put(s_job->s_fence->parent);
  447. s_job->s_fence->parent = NULL;
  448. atomic_dec(&sched->hw_rq_count);
  449. }
  450. }
  451. spin_unlock(&sched->job_list_lock);
  452. if (bad && bad->s_priority != DRM_SCHED_PRIORITY_KERNEL) {
  453. atomic_inc(&bad->karma);
  454. /* don't increase @bad's karma if it's from KERNEL RQ,
  455. * becuase sometimes GPU hang would cause kernel jobs (like VM updating jobs)
  456. * corrupt but keep in mind that kernel jobs always considered good.
  457. */
  458. for (i = DRM_SCHED_PRIORITY_MIN; i < DRM_SCHED_PRIORITY_KERNEL; i++ ) {
  459. struct drm_sched_rq *rq = &sched->sched_rq[i];
  460. spin_lock(&rq->lock);
  461. list_for_each_entry_safe(entity, tmp, &rq->entities, list) {
  462. if (bad->s_fence->scheduled.context == entity->fence_context) {
  463. if (atomic_read(&bad->karma) > bad->sched->hang_limit)
  464. if (entity->guilty)
  465. atomic_set(entity->guilty, 1);
  466. break;
  467. }
  468. }
  469. spin_unlock(&rq->lock);
  470. if (&entity->list != &rq->entities)
  471. break;
  472. }
  473. }
  474. }
  475. EXPORT_SYMBOL(drm_sched_hw_job_reset);
  476. void drm_sched_job_recovery(struct drm_gpu_scheduler *sched)
  477. {
  478. struct drm_sched_job *s_job, *tmp;
  479. bool found_guilty = false;
  480. int r;
  481. spin_lock(&sched->job_list_lock);
  482. s_job = list_first_entry_or_null(&sched->ring_mirror_list,
  483. struct drm_sched_job, node);
  484. if (s_job && sched->timeout != MAX_SCHEDULE_TIMEOUT)
  485. schedule_delayed_work(&s_job->work_tdr, sched->timeout);
  486. list_for_each_entry_safe(s_job, tmp, &sched->ring_mirror_list, node) {
  487. struct drm_sched_fence *s_fence = s_job->s_fence;
  488. struct dma_fence *fence;
  489. uint64_t guilty_context;
  490. if (!found_guilty && atomic_read(&s_job->karma) > sched->hang_limit) {
  491. found_guilty = true;
  492. guilty_context = s_job->s_fence->scheduled.context;
  493. }
  494. if (found_guilty && s_job->s_fence->scheduled.context == guilty_context)
  495. dma_fence_set_error(&s_fence->finished, -ECANCELED);
  496. spin_unlock(&sched->job_list_lock);
  497. fence = sched->ops->run_job(s_job);
  498. atomic_inc(&sched->hw_rq_count);
  499. if (fence) {
  500. s_fence->parent = dma_fence_get(fence);
  501. r = dma_fence_add_callback(fence, &s_fence->cb,
  502. drm_sched_process_job);
  503. if (r == -ENOENT)
  504. drm_sched_process_job(fence, &s_fence->cb);
  505. else if (r)
  506. DRM_ERROR("fence add callback failed (%d)\n",
  507. r);
  508. dma_fence_put(fence);
  509. } else {
  510. drm_sched_process_job(NULL, &s_fence->cb);
  511. }
  512. spin_lock(&sched->job_list_lock);
  513. }
  514. spin_unlock(&sched->job_list_lock);
  515. }
  516. EXPORT_SYMBOL(drm_sched_job_recovery);
  517. /**
  518. * Init a sched_job with basic field
  519. *
  520. * Note: Refer to drm_sched_entity_push_job documentation
  521. * for locking considerations.
  522. */
  523. int drm_sched_job_init(struct drm_sched_job *job,
  524. struct drm_gpu_scheduler *sched,
  525. struct drm_sched_entity *entity,
  526. void *owner)
  527. {
  528. job->sched = sched;
  529. job->entity = entity;
  530. job->s_priority = entity->rq - sched->sched_rq;
  531. job->s_fence = drm_sched_fence_create(entity, owner);
  532. if (!job->s_fence)
  533. return -ENOMEM;
  534. job->id = atomic64_inc_return(&sched->job_id_count);
  535. INIT_WORK(&job->finish_work, drm_sched_job_finish);
  536. INIT_LIST_HEAD(&job->node);
  537. INIT_DELAYED_WORK(&job->work_tdr, drm_sched_job_timedout);
  538. return 0;
  539. }
  540. EXPORT_SYMBOL(drm_sched_job_init);
  541. /**
  542. * Return ture if we can push more jobs to the hw.
  543. */
  544. static bool drm_sched_ready(struct drm_gpu_scheduler *sched)
  545. {
  546. return atomic_read(&sched->hw_rq_count) <
  547. sched->hw_submission_limit;
  548. }
  549. /**
  550. * Wake up the scheduler when it is ready
  551. */
  552. static void drm_sched_wakeup(struct drm_gpu_scheduler *sched)
  553. {
  554. if (drm_sched_ready(sched))
  555. wake_up_interruptible(&sched->wake_up_worker);
  556. }
  557. /**
  558. * Select next entity to process
  559. */
  560. static struct drm_sched_entity *
  561. drm_sched_select_entity(struct drm_gpu_scheduler *sched)
  562. {
  563. struct drm_sched_entity *entity;
  564. int i;
  565. if (!drm_sched_ready(sched))
  566. return NULL;
  567. /* Kernel run queue has higher priority than normal run queue*/
  568. for (i = DRM_SCHED_PRIORITY_MAX - 1; i >= DRM_SCHED_PRIORITY_MIN; i--) {
  569. entity = drm_sched_rq_select_entity(&sched->sched_rq[i]);
  570. if (entity)
  571. break;
  572. }
  573. return entity;
  574. }
  575. static void drm_sched_process_job(struct dma_fence *f, struct dma_fence_cb *cb)
  576. {
  577. struct drm_sched_fence *s_fence =
  578. container_of(cb, struct drm_sched_fence, cb);
  579. struct drm_gpu_scheduler *sched = s_fence->sched;
  580. dma_fence_get(&s_fence->finished);
  581. atomic_dec(&sched->hw_rq_count);
  582. drm_sched_fence_finished(s_fence);
  583. trace_drm_sched_process_job(s_fence);
  584. dma_fence_put(&s_fence->finished);
  585. wake_up_interruptible(&sched->wake_up_worker);
  586. }
  587. static bool drm_sched_blocked(struct drm_gpu_scheduler *sched)
  588. {
  589. if (kthread_should_park()) {
  590. kthread_parkme();
  591. return true;
  592. }
  593. return false;
  594. }
  595. static int drm_sched_main(void *param)
  596. {
  597. struct sched_param sparam = {.sched_priority = 1};
  598. struct drm_gpu_scheduler *sched = (struct drm_gpu_scheduler *)param;
  599. int r;
  600. sched_setscheduler(current, SCHED_FIFO, &sparam);
  601. while (!kthread_should_stop()) {
  602. struct drm_sched_entity *entity = NULL;
  603. struct drm_sched_fence *s_fence;
  604. struct drm_sched_job *sched_job;
  605. struct dma_fence *fence;
  606. wait_event_interruptible(sched->wake_up_worker,
  607. (!drm_sched_blocked(sched) &&
  608. (entity = drm_sched_select_entity(sched))) ||
  609. kthread_should_stop());
  610. if (!entity)
  611. continue;
  612. sched_job = drm_sched_entity_pop_job(entity);
  613. if (!sched_job)
  614. continue;
  615. s_fence = sched_job->s_fence;
  616. atomic_inc(&sched->hw_rq_count);
  617. drm_sched_job_begin(sched_job);
  618. fence = sched->ops->run_job(sched_job);
  619. drm_sched_fence_scheduled(s_fence);
  620. if (fence) {
  621. s_fence->parent = dma_fence_get(fence);
  622. r = dma_fence_add_callback(fence, &s_fence->cb,
  623. drm_sched_process_job);
  624. if (r == -ENOENT)
  625. drm_sched_process_job(fence, &s_fence->cb);
  626. else if (r)
  627. DRM_ERROR("fence add callback failed (%d)\n",
  628. r);
  629. dma_fence_put(fence);
  630. } else {
  631. drm_sched_process_job(NULL, &s_fence->cb);
  632. }
  633. wake_up(&sched->job_scheduled);
  634. }
  635. return 0;
  636. }
  637. /**
  638. * Init a gpu scheduler instance
  639. *
  640. * @sched The pointer to the scheduler
  641. * @ops The backend operations for this scheduler.
  642. * @hw_submissions Number of hw submissions to do.
  643. * @name Name used for debugging
  644. *
  645. * Return 0 on success, otherwise error code.
  646. */
  647. int drm_sched_init(struct drm_gpu_scheduler *sched,
  648. const struct drm_sched_backend_ops *ops,
  649. unsigned hw_submission,
  650. unsigned hang_limit,
  651. long timeout,
  652. const char *name)
  653. {
  654. int i;
  655. sched->ops = ops;
  656. sched->hw_submission_limit = hw_submission;
  657. sched->name = name;
  658. sched->timeout = timeout;
  659. sched->hang_limit = hang_limit;
  660. for (i = DRM_SCHED_PRIORITY_MIN; i < DRM_SCHED_PRIORITY_MAX; i++)
  661. drm_sched_rq_init(&sched->sched_rq[i]);
  662. init_waitqueue_head(&sched->wake_up_worker);
  663. init_waitqueue_head(&sched->job_scheduled);
  664. INIT_LIST_HEAD(&sched->ring_mirror_list);
  665. spin_lock_init(&sched->job_list_lock);
  666. atomic_set(&sched->hw_rq_count, 0);
  667. atomic64_set(&sched->job_id_count, 0);
  668. /* Each scheduler will run on a seperate kernel thread */
  669. sched->thread = kthread_run(drm_sched_main, sched, sched->name);
  670. if (IS_ERR(sched->thread)) {
  671. DRM_ERROR("Failed to create scheduler for %s.\n", name);
  672. return PTR_ERR(sched->thread);
  673. }
  674. return 0;
  675. }
  676. EXPORT_SYMBOL(drm_sched_init);
  677. /**
  678. * Destroy a gpu scheduler
  679. *
  680. * @sched The pointer to the scheduler
  681. */
  682. void drm_sched_fini(struct drm_gpu_scheduler *sched)
  683. {
  684. if (sched->thread)
  685. kthread_stop(sched->thread);
  686. }
  687. EXPORT_SYMBOL(drm_sched_fini);