utils.c 39 KB

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  1. /******************************************************************************
  2. *
  3. * This file is provided under a dual BSD/GPLv2 license. When using or
  4. * redistributing this file, you may do so under either license.
  5. *
  6. * GPL LICENSE SUMMARY
  7. *
  8. * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
  9. * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
  10. * Copyright (C) 2015 Intel Deutschland GmbH
  11. *
  12. * This program is free software; you can redistribute it and/or modify
  13. * it under the terms of version 2 of the GNU General Public License as
  14. * published by the Free Software Foundation.
  15. *
  16. * This program is distributed in the hope that it will be useful, but
  17. * WITHOUT ANY WARRANTY; without even the implied warranty of
  18. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  19. * General Public License for more details.
  20. *
  21. * You should have received a copy of the GNU General Public License
  22. * along with this program; if not, write to the Free Software
  23. * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110,
  24. * USA
  25. *
  26. * The full GNU General Public License is included in this distribution
  27. * in the file called COPYING.
  28. *
  29. * Contact Information:
  30. * Intel Linux Wireless <linuxwifi@intel.com>
  31. * Intel Corporation, 5200 N.E. Elam Young Parkway, Hillsboro, OR 97124-6497
  32. *
  33. * BSD LICENSE
  34. *
  35. * Copyright(c) 2012 - 2014 Intel Corporation. All rights reserved.
  36. * Copyright(c) 2013 - 2014 Intel Mobile Communications GmbH
  37. * All rights reserved.
  38. *
  39. * Redistribution and use in source and binary forms, with or without
  40. * modification, are permitted provided that the following conditions
  41. * are met:
  42. *
  43. * * Redistributions of source code must retain the above copyright
  44. * notice, this list of conditions and the following disclaimer.
  45. * * Redistributions in binary form must reproduce the above copyright
  46. * notice, this list of conditions and the following disclaimer in
  47. * the documentation and/or other materials provided with the
  48. * distribution.
  49. * * Neither the name Intel Corporation nor the names of its
  50. * contributors may be used to endorse or promote products derived
  51. * from this software without specific prior written permission.
  52. *
  53. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS
  54. * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT
  55. * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR
  56. * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT
  57. * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL,
  58. * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT
  59. * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE,
  60. * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY
  61. * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  62. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE
  63. * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  64. *
  65. *****************************************************************************/
  66. #include <net/mac80211.h>
  67. #include "iwl-debug.h"
  68. #include "iwl-io.h"
  69. #include "iwl-prph.h"
  70. #include "fw-dbg.h"
  71. #include "mvm.h"
  72. #include "fw-api-rs.h"
  73. /*
  74. * Will return 0 even if the cmd failed when RFKILL is asserted unless
  75. * CMD_WANT_SKB is set in cmd->flags.
  76. */
  77. int iwl_mvm_send_cmd(struct iwl_mvm *mvm, struct iwl_host_cmd *cmd)
  78. {
  79. int ret;
  80. #if defined(CONFIG_IWLWIFI_DEBUGFS) && defined(CONFIG_PM_SLEEP)
  81. if (WARN_ON(mvm->d3_test_active))
  82. return -EIO;
  83. #endif
  84. /*
  85. * Synchronous commands from this op-mode must hold
  86. * the mutex, this ensures we don't try to send two
  87. * (or more) synchronous commands at a time.
  88. */
  89. if (!(cmd->flags & CMD_ASYNC)) {
  90. lockdep_assert_held(&mvm->mutex);
  91. if (!(cmd->flags & CMD_SEND_IN_IDLE))
  92. iwl_mvm_ref(mvm, IWL_MVM_REF_SENDING_CMD);
  93. }
  94. ret = iwl_trans_send_cmd(mvm->trans, cmd);
  95. if (!(cmd->flags & (CMD_ASYNC | CMD_SEND_IN_IDLE)))
  96. iwl_mvm_unref(mvm, IWL_MVM_REF_SENDING_CMD);
  97. /*
  98. * If the caller wants the SKB, then don't hide any problems, the
  99. * caller might access the response buffer which will be NULL if
  100. * the command failed.
  101. */
  102. if (cmd->flags & CMD_WANT_SKB)
  103. return ret;
  104. /* Silently ignore failures if RFKILL is asserted */
  105. if (!ret || ret == -ERFKILL)
  106. return 0;
  107. return ret;
  108. }
  109. int iwl_mvm_send_cmd_pdu(struct iwl_mvm *mvm, u32 id,
  110. u32 flags, u16 len, const void *data)
  111. {
  112. struct iwl_host_cmd cmd = {
  113. .id = id,
  114. .len = { len, },
  115. .data = { data, },
  116. .flags = flags,
  117. };
  118. return iwl_mvm_send_cmd(mvm, &cmd);
  119. }
  120. /*
  121. * We assume that the caller set the status to the success value
  122. */
  123. int iwl_mvm_send_cmd_status(struct iwl_mvm *mvm, struct iwl_host_cmd *cmd,
  124. u32 *status)
  125. {
  126. struct iwl_rx_packet *pkt;
  127. struct iwl_cmd_response *resp;
  128. int ret, resp_len;
  129. lockdep_assert_held(&mvm->mutex);
  130. #if defined(CONFIG_IWLWIFI_DEBUGFS) && defined(CONFIG_PM_SLEEP)
  131. if (WARN_ON(mvm->d3_test_active))
  132. return -EIO;
  133. #endif
  134. /*
  135. * Only synchronous commands can wait for status,
  136. * we use WANT_SKB so the caller can't.
  137. */
  138. if (WARN_ONCE(cmd->flags & (CMD_ASYNC | CMD_WANT_SKB),
  139. "cmd flags %x", cmd->flags))
  140. return -EINVAL;
  141. cmd->flags |= CMD_WANT_SKB;
  142. ret = iwl_trans_send_cmd(mvm->trans, cmd);
  143. if (ret == -ERFKILL) {
  144. /*
  145. * The command failed because of RFKILL, don't update
  146. * the status, leave it as success and return 0.
  147. */
  148. return 0;
  149. } else if (ret) {
  150. return ret;
  151. }
  152. pkt = cmd->resp_pkt;
  153. /* Can happen if RFKILL is asserted */
  154. if (!pkt) {
  155. ret = 0;
  156. goto out_free_resp;
  157. }
  158. resp_len = iwl_rx_packet_payload_len(pkt);
  159. if (WARN_ON_ONCE(resp_len != sizeof(*resp))) {
  160. ret = -EIO;
  161. goto out_free_resp;
  162. }
  163. resp = (void *)pkt->data;
  164. *status = le32_to_cpu(resp->status);
  165. out_free_resp:
  166. iwl_free_resp(cmd);
  167. return ret;
  168. }
  169. /*
  170. * We assume that the caller set the status to the sucess value
  171. */
  172. int iwl_mvm_send_cmd_pdu_status(struct iwl_mvm *mvm, u32 id, u16 len,
  173. const void *data, u32 *status)
  174. {
  175. struct iwl_host_cmd cmd = {
  176. .id = id,
  177. .len = { len, },
  178. .data = { data, },
  179. };
  180. return iwl_mvm_send_cmd_status(mvm, &cmd, status);
  181. }
  182. #define IWL_DECLARE_RATE_INFO(r) \
  183. [IWL_RATE_##r##M_INDEX] = IWL_RATE_##r##M_PLCP
  184. /*
  185. * Translate from fw_rate_index (IWL_RATE_XXM_INDEX) to PLCP
  186. */
  187. static const u8 fw_rate_idx_to_plcp[IWL_RATE_COUNT] = {
  188. IWL_DECLARE_RATE_INFO(1),
  189. IWL_DECLARE_RATE_INFO(2),
  190. IWL_DECLARE_RATE_INFO(5),
  191. IWL_DECLARE_RATE_INFO(11),
  192. IWL_DECLARE_RATE_INFO(6),
  193. IWL_DECLARE_RATE_INFO(9),
  194. IWL_DECLARE_RATE_INFO(12),
  195. IWL_DECLARE_RATE_INFO(18),
  196. IWL_DECLARE_RATE_INFO(24),
  197. IWL_DECLARE_RATE_INFO(36),
  198. IWL_DECLARE_RATE_INFO(48),
  199. IWL_DECLARE_RATE_INFO(54),
  200. };
  201. int iwl_mvm_legacy_rate_to_mac80211_idx(u32 rate_n_flags,
  202. enum nl80211_band band)
  203. {
  204. int rate = rate_n_flags & RATE_LEGACY_RATE_MSK;
  205. int idx;
  206. int band_offset = 0;
  207. /* Legacy rate format, search for match in table */
  208. if (band == NL80211_BAND_5GHZ)
  209. band_offset = IWL_FIRST_OFDM_RATE;
  210. for (idx = band_offset; idx < IWL_RATE_COUNT_LEGACY; idx++)
  211. if (fw_rate_idx_to_plcp[idx] == rate)
  212. return idx - band_offset;
  213. return -1;
  214. }
  215. u8 iwl_mvm_mac80211_idx_to_hwrate(int rate_idx)
  216. {
  217. /* Get PLCP rate for tx_cmd->rate_n_flags */
  218. return fw_rate_idx_to_plcp[rate_idx];
  219. }
  220. void iwl_mvm_rx_fw_error(struct iwl_mvm *mvm, struct iwl_rx_cmd_buffer *rxb)
  221. {
  222. struct iwl_rx_packet *pkt = rxb_addr(rxb);
  223. struct iwl_error_resp *err_resp = (void *)pkt->data;
  224. IWL_ERR(mvm, "FW Error notification: type 0x%08X cmd_id 0x%02X\n",
  225. le32_to_cpu(err_resp->error_type), err_resp->cmd_id);
  226. IWL_ERR(mvm, "FW Error notification: seq 0x%04X service 0x%08X\n",
  227. le16_to_cpu(err_resp->bad_cmd_seq_num),
  228. le32_to_cpu(err_resp->error_service));
  229. IWL_ERR(mvm, "FW Error notification: timestamp 0x%16llX\n",
  230. le64_to_cpu(err_resp->timestamp));
  231. }
  232. /*
  233. * Returns the first antenna as ANT_[ABC], as defined in iwl-config.h.
  234. * The parameter should also be a combination of ANT_[ABC].
  235. */
  236. u8 first_antenna(u8 mask)
  237. {
  238. BUILD_BUG_ON(ANT_A != BIT(0)); /* using ffs is wrong if not */
  239. if (WARN_ON_ONCE(!mask)) /* ffs will return 0 if mask is zeroed */
  240. return BIT(0);
  241. return BIT(ffs(mask) - 1);
  242. }
  243. /*
  244. * Toggles between TX antennas to send the probe request on.
  245. * Receives the bitmask of valid TX antennas and the *index* used
  246. * for the last TX, and returns the next valid *index* to use.
  247. * In order to set it in the tx_cmd, must do BIT(idx).
  248. */
  249. u8 iwl_mvm_next_antenna(struct iwl_mvm *mvm, u8 valid, u8 last_idx)
  250. {
  251. u8 ind = last_idx;
  252. int i;
  253. for (i = 0; i < RATE_MCS_ANT_NUM; i++) {
  254. ind = (ind + 1) % RATE_MCS_ANT_NUM;
  255. if (valid & BIT(ind))
  256. return ind;
  257. }
  258. WARN_ONCE(1, "Failed to toggle between antennas 0x%x", valid);
  259. return last_idx;
  260. }
  261. static const struct {
  262. const char *name;
  263. u8 num;
  264. } advanced_lookup[] = {
  265. { "NMI_INTERRUPT_WDG", 0x34 },
  266. { "SYSASSERT", 0x35 },
  267. { "UCODE_VERSION_MISMATCH", 0x37 },
  268. { "BAD_COMMAND", 0x38 },
  269. { "NMI_INTERRUPT_DATA_ACTION_PT", 0x3C },
  270. { "FATAL_ERROR", 0x3D },
  271. { "NMI_TRM_HW_ERR", 0x46 },
  272. { "NMI_INTERRUPT_TRM", 0x4C },
  273. { "NMI_INTERRUPT_BREAK_POINT", 0x54 },
  274. { "NMI_INTERRUPT_WDG_RXF_FULL", 0x5C },
  275. { "NMI_INTERRUPT_WDG_NO_RBD_RXF_FULL", 0x64 },
  276. { "NMI_INTERRUPT_HOST", 0x66 },
  277. { "NMI_INTERRUPT_ACTION_PT", 0x7C },
  278. { "NMI_INTERRUPT_UNKNOWN", 0x84 },
  279. { "NMI_INTERRUPT_INST_ACTION_PT", 0x86 },
  280. { "ADVANCED_SYSASSERT", 0 },
  281. };
  282. static const char *desc_lookup(u32 num)
  283. {
  284. int i;
  285. for (i = 0; i < ARRAY_SIZE(advanced_lookup) - 1; i++)
  286. if (advanced_lookup[i].num == num)
  287. return advanced_lookup[i].name;
  288. /* No entry matches 'num', so it is the last: ADVANCED_SYSASSERT */
  289. return advanced_lookup[i].name;
  290. }
  291. /*
  292. * Note: This structure is read from the device with IO accesses,
  293. * and the reading already does the endian conversion. As it is
  294. * read with u32-sized accesses, any members with a different size
  295. * need to be ordered correctly though!
  296. */
  297. struct iwl_error_event_table_v1 {
  298. u32 valid; /* (nonzero) valid, (0) log is empty */
  299. u32 error_id; /* type of error */
  300. u32 pc; /* program counter */
  301. u32 blink1; /* branch link */
  302. u32 blink2; /* branch link */
  303. u32 ilink1; /* interrupt link */
  304. u32 ilink2; /* interrupt link */
  305. u32 data1; /* error-specific data */
  306. u32 data2; /* error-specific data */
  307. u32 data3; /* error-specific data */
  308. u32 bcon_time; /* beacon timer */
  309. u32 tsf_low; /* network timestamp function timer */
  310. u32 tsf_hi; /* network timestamp function timer */
  311. u32 gp1; /* GP1 timer register */
  312. u32 gp2; /* GP2 timer register */
  313. u32 gp3; /* GP3 timer register */
  314. u32 ucode_ver; /* uCode version */
  315. u32 hw_ver; /* HW Silicon version */
  316. u32 brd_ver; /* HW board version */
  317. u32 log_pc; /* log program counter */
  318. u32 frame_ptr; /* frame pointer */
  319. u32 stack_ptr; /* stack pointer */
  320. u32 hcmd; /* last host command header */
  321. u32 isr0; /* isr status register LMPM_NIC_ISR0:
  322. * rxtx_flag */
  323. u32 isr1; /* isr status register LMPM_NIC_ISR1:
  324. * host_flag */
  325. u32 isr2; /* isr status register LMPM_NIC_ISR2:
  326. * enc_flag */
  327. u32 isr3; /* isr status register LMPM_NIC_ISR3:
  328. * time_flag */
  329. u32 isr4; /* isr status register LMPM_NIC_ISR4:
  330. * wico interrupt */
  331. u32 isr_pref; /* isr status register LMPM_NIC_PREF_STAT */
  332. u32 wait_event; /* wait event() caller address */
  333. u32 l2p_control; /* L2pControlField */
  334. u32 l2p_duration; /* L2pDurationField */
  335. u32 l2p_mhvalid; /* L2pMhValidBits */
  336. u32 l2p_addr_match; /* L2pAddrMatchStat */
  337. u32 lmpm_pmg_sel; /* indicate which clocks are turned on
  338. * (LMPM_PMG_SEL) */
  339. u32 u_timestamp; /* indicate when the date and time of the
  340. * compilation */
  341. u32 flow_handler; /* FH read/write pointers, RX credit */
  342. } __packed /* LOG_ERROR_TABLE_API_S_VER_1 */;
  343. struct iwl_error_event_table {
  344. u32 valid; /* (nonzero) valid, (0) log is empty */
  345. u32 error_id; /* type of error */
  346. u32 trm_hw_status0; /* TRM HW status */
  347. u32 trm_hw_status1; /* TRM HW status */
  348. u32 blink2; /* branch link */
  349. u32 ilink1; /* interrupt link */
  350. u32 ilink2; /* interrupt link */
  351. u32 data1; /* error-specific data */
  352. u32 data2; /* error-specific data */
  353. u32 data3; /* error-specific data */
  354. u32 bcon_time; /* beacon timer */
  355. u32 tsf_low; /* network timestamp function timer */
  356. u32 tsf_hi; /* network timestamp function timer */
  357. u32 gp1; /* GP1 timer register */
  358. u32 gp2; /* GP2 timer register */
  359. u32 fw_rev_type; /* firmware revision type */
  360. u32 major; /* uCode version major */
  361. u32 minor; /* uCode version minor */
  362. u32 hw_ver; /* HW Silicon version */
  363. u32 brd_ver; /* HW board version */
  364. u32 log_pc; /* log program counter */
  365. u32 frame_ptr; /* frame pointer */
  366. u32 stack_ptr; /* stack pointer */
  367. u32 hcmd; /* last host command header */
  368. u32 isr0; /* isr status register LMPM_NIC_ISR0:
  369. * rxtx_flag */
  370. u32 isr1; /* isr status register LMPM_NIC_ISR1:
  371. * host_flag */
  372. u32 isr2; /* isr status register LMPM_NIC_ISR2:
  373. * enc_flag */
  374. u32 isr3; /* isr status register LMPM_NIC_ISR3:
  375. * time_flag */
  376. u32 isr4; /* isr status register LMPM_NIC_ISR4:
  377. * wico interrupt */
  378. u32 last_cmd_id; /* last HCMD id handled by the firmware */
  379. u32 wait_event; /* wait event() caller address */
  380. u32 l2p_control; /* L2pControlField */
  381. u32 l2p_duration; /* L2pDurationField */
  382. u32 l2p_mhvalid; /* L2pMhValidBits */
  383. u32 l2p_addr_match; /* L2pAddrMatchStat */
  384. u32 lmpm_pmg_sel; /* indicate which clocks are turned on
  385. * (LMPM_PMG_SEL) */
  386. u32 u_timestamp; /* indicate when the date and time of the
  387. * compilation */
  388. u32 flow_handler; /* FH read/write pointers, RX credit */
  389. } __packed /* LOG_ERROR_TABLE_API_S_VER_3 */;
  390. /*
  391. * UMAC error struct - relevant starting from family 8000 chip.
  392. * Note: This structure is read from the device with IO accesses,
  393. * and the reading already does the endian conversion. As it is
  394. * read with u32-sized accesses, any members with a different size
  395. * need to be ordered correctly though!
  396. */
  397. struct iwl_umac_error_event_table {
  398. u32 valid; /* (nonzero) valid, (0) log is empty */
  399. u32 error_id; /* type of error */
  400. u32 blink1; /* branch link */
  401. u32 blink2; /* branch link */
  402. u32 ilink1; /* interrupt link */
  403. u32 ilink2; /* interrupt link */
  404. u32 data1; /* error-specific data */
  405. u32 data2; /* error-specific data */
  406. u32 data3; /* error-specific data */
  407. u32 umac_major;
  408. u32 umac_minor;
  409. u32 frame_pointer; /* core register 27*/
  410. u32 stack_pointer; /* core register 28 */
  411. u32 cmd_header; /* latest host cmd sent to UMAC */
  412. u32 nic_isr_pref; /* ISR status register */
  413. } __packed;
  414. #define ERROR_START_OFFSET (1 * sizeof(u32))
  415. #define ERROR_ELEM_SIZE (7 * sizeof(u32))
  416. static void iwl_mvm_dump_umac_error_log(struct iwl_mvm *mvm)
  417. {
  418. struct iwl_trans *trans = mvm->trans;
  419. struct iwl_umac_error_event_table table;
  420. u32 base;
  421. base = mvm->umac_error_event_table;
  422. if (base < 0x800000) {
  423. IWL_ERR(mvm,
  424. "Not valid error log pointer 0x%08X for %s uCode\n",
  425. base,
  426. (mvm->cur_ucode == IWL_UCODE_INIT)
  427. ? "Init" : "RT");
  428. return;
  429. }
  430. iwl_trans_read_mem_bytes(trans, base, &table, sizeof(table));
  431. if (ERROR_START_OFFSET <= table.valid * ERROR_ELEM_SIZE) {
  432. IWL_ERR(trans, "Start IWL Error Log Dump:\n");
  433. IWL_ERR(trans, "Status: 0x%08lX, count: %d\n",
  434. mvm->status, table.valid);
  435. }
  436. IWL_ERR(mvm, "0x%08X | %s\n", table.error_id,
  437. desc_lookup(table.error_id));
  438. IWL_ERR(mvm, "0x%08X | umac branchlink1\n", table.blink1);
  439. IWL_ERR(mvm, "0x%08X | umac branchlink2\n", table.blink2);
  440. IWL_ERR(mvm, "0x%08X | umac interruptlink1\n", table.ilink1);
  441. IWL_ERR(mvm, "0x%08X | umac interruptlink2\n", table.ilink2);
  442. IWL_ERR(mvm, "0x%08X | umac data1\n", table.data1);
  443. IWL_ERR(mvm, "0x%08X | umac data2\n", table.data2);
  444. IWL_ERR(mvm, "0x%08X | umac data3\n", table.data3);
  445. IWL_ERR(mvm, "0x%08X | umac major\n", table.umac_major);
  446. IWL_ERR(mvm, "0x%08X | umac minor\n", table.umac_minor);
  447. IWL_ERR(mvm, "0x%08X | frame pointer\n", table.frame_pointer);
  448. IWL_ERR(mvm, "0x%08X | stack pointer\n", table.stack_pointer);
  449. IWL_ERR(mvm, "0x%08X | last host cmd\n", table.cmd_header);
  450. IWL_ERR(mvm, "0x%08X | isr status reg\n", table.nic_isr_pref);
  451. }
  452. static void iwl_mvm_dump_lmac_error_log(struct iwl_mvm *mvm, u32 base)
  453. {
  454. struct iwl_trans *trans = mvm->trans;
  455. struct iwl_error_event_table table;
  456. if (mvm->cur_ucode == IWL_UCODE_INIT) {
  457. if (!base)
  458. base = mvm->fw->init_errlog_ptr;
  459. } else {
  460. if (!base)
  461. base = mvm->fw->inst_errlog_ptr;
  462. }
  463. if (base < 0x400000) {
  464. IWL_ERR(mvm,
  465. "Not valid error log pointer 0x%08X for %s uCode\n",
  466. base,
  467. (mvm->cur_ucode == IWL_UCODE_INIT)
  468. ? "Init" : "RT");
  469. return;
  470. }
  471. iwl_trans_read_mem_bytes(trans, base, &table, sizeof(table));
  472. if (ERROR_START_OFFSET <= table.valid * ERROR_ELEM_SIZE) {
  473. IWL_ERR(trans, "Start IWL Error Log Dump:\n");
  474. IWL_ERR(trans, "Status: 0x%08lX, count: %d\n",
  475. mvm->status, table.valid);
  476. }
  477. /* Do not change this output - scripts rely on it */
  478. IWL_ERR(mvm, "Loaded firmware version: %s\n", mvm->fw->fw_version);
  479. trace_iwlwifi_dev_ucode_error(trans->dev, table.error_id, table.tsf_low,
  480. table.data1, table.data2, table.data3,
  481. table.blink2, table.ilink1,
  482. table.ilink2, table.bcon_time, table.gp1,
  483. table.gp2, table.fw_rev_type, table.major,
  484. table.minor, table.hw_ver, table.brd_ver);
  485. IWL_ERR(mvm, "0x%08X | %-28s\n", table.error_id,
  486. desc_lookup(table.error_id));
  487. IWL_ERR(mvm, "0x%08X | trm_hw_status0\n", table.trm_hw_status0);
  488. IWL_ERR(mvm, "0x%08X | trm_hw_status1\n", table.trm_hw_status1);
  489. IWL_ERR(mvm, "0x%08X | branchlink2\n", table.blink2);
  490. IWL_ERR(mvm, "0x%08X | interruptlink1\n", table.ilink1);
  491. IWL_ERR(mvm, "0x%08X | interruptlink2\n", table.ilink2);
  492. IWL_ERR(mvm, "0x%08X | data1\n", table.data1);
  493. IWL_ERR(mvm, "0x%08X | data2\n", table.data2);
  494. IWL_ERR(mvm, "0x%08X | data3\n", table.data3);
  495. IWL_ERR(mvm, "0x%08X | beacon time\n", table.bcon_time);
  496. IWL_ERR(mvm, "0x%08X | tsf low\n", table.tsf_low);
  497. IWL_ERR(mvm, "0x%08X | tsf hi\n", table.tsf_hi);
  498. IWL_ERR(mvm, "0x%08X | time gp1\n", table.gp1);
  499. IWL_ERR(mvm, "0x%08X | time gp2\n", table.gp2);
  500. IWL_ERR(mvm, "0x%08X | uCode revision type\n", table.fw_rev_type);
  501. IWL_ERR(mvm, "0x%08X | uCode version major\n", table.major);
  502. IWL_ERR(mvm, "0x%08X | uCode version minor\n", table.minor);
  503. IWL_ERR(mvm, "0x%08X | hw version\n", table.hw_ver);
  504. IWL_ERR(mvm, "0x%08X | board version\n", table.brd_ver);
  505. IWL_ERR(mvm, "0x%08X | hcmd\n", table.hcmd);
  506. IWL_ERR(mvm, "0x%08X | isr0\n", table.isr0);
  507. IWL_ERR(mvm, "0x%08X | isr1\n", table.isr1);
  508. IWL_ERR(mvm, "0x%08X | isr2\n", table.isr2);
  509. IWL_ERR(mvm, "0x%08X | isr3\n", table.isr3);
  510. IWL_ERR(mvm, "0x%08X | isr4\n", table.isr4);
  511. IWL_ERR(mvm, "0x%08X | last cmd Id\n", table.last_cmd_id);
  512. IWL_ERR(mvm, "0x%08X | wait_event\n", table.wait_event);
  513. IWL_ERR(mvm, "0x%08X | l2p_control\n", table.l2p_control);
  514. IWL_ERR(mvm, "0x%08X | l2p_duration\n", table.l2p_duration);
  515. IWL_ERR(mvm, "0x%08X | l2p_mhvalid\n", table.l2p_mhvalid);
  516. IWL_ERR(mvm, "0x%08X | l2p_addr_match\n", table.l2p_addr_match);
  517. IWL_ERR(mvm, "0x%08X | lmpm_pmg_sel\n", table.lmpm_pmg_sel);
  518. IWL_ERR(mvm, "0x%08X | timestamp\n", table.u_timestamp);
  519. IWL_ERR(mvm, "0x%08X | flow_handler\n", table.flow_handler);
  520. }
  521. void iwl_mvm_dump_nic_error_log(struct iwl_mvm *mvm)
  522. {
  523. iwl_mvm_dump_lmac_error_log(mvm, mvm->error_event_table[0]);
  524. if (mvm->error_event_table[1])
  525. iwl_mvm_dump_lmac_error_log(mvm, mvm->error_event_table[1]);
  526. if (mvm->support_umac_log)
  527. iwl_mvm_dump_umac_error_log(mvm);
  528. }
  529. int iwl_mvm_find_free_queue(struct iwl_mvm *mvm, u8 sta_id, u8 minq, u8 maxq)
  530. {
  531. int i;
  532. lockdep_assert_held(&mvm->queue_info_lock);
  533. /* Start by looking for a free queue */
  534. for (i = minq; i <= maxq; i++)
  535. if (mvm->queue_info[i].hw_queue_refcount == 0 &&
  536. mvm->queue_info[i].status == IWL_MVM_QUEUE_FREE)
  537. return i;
  538. /*
  539. * If no free queue found - settle for an inactive one to reconfigure
  540. * Make sure that the inactive queue either already belongs to this STA,
  541. * or that if it belongs to another one - it isn't the reserved queue
  542. */
  543. for (i = minq; i <= maxq; i++)
  544. if (mvm->queue_info[i].status == IWL_MVM_QUEUE_INACTIVE &&
  545. (sta_id == mvm->queue_info[i].ra_sta_id ||
  546. !mvm->queue_info[i].reserved))
  547. return i;
  548. return -ENOSPC;
  549. }
  550. int iwl_mvm_reconfig_scd(struct iwl_mvm *mvm, int queue, int fifo, int sta_id,
  551. int tid, int frame_limit, u16 ssn)
  552. {
  553. struct iwl_scd_txq_cfg_cmd cmd = {
  554. .scd_queue = queue,
  555. .action = SCD_CFG_ENABLE_QUEUE,
  556. .window = frame_limit,
  557. .sta_id = sta_id,
  558. .ssn = cpu_to_le16(ssn),
  559. .tx_fifo = fifo,
  560. .aggregate = (queue >= IWL_MVM_DQA_MIN_DATA_QUEUE ||
  561. queue == IWL_MVM_DQA_BSS_CLIENT_QUEUE),
  562. .tid = tid,
  563. };
  564. int ret;
  565. spin_lock_bh(&mvm->queue_info_lock);
  566. if (WARN(mvm->queue_info[queue].hw_queue_refcount == 0,
  567. "Trying to reconfig unallocated queue %d\n", queue)) {
  568. spin_unlock_bh(&mvm->queue_info_lock);
  569. return -ENXIO;
  570. }
  571. spin_unlock_bh(&mvm->queue_info_lock);
  572. IWL_DEBUG_TX_QUEUES(mvm, "Reconfig SCD for TXQ #%d\n", queue);
  573. ret = iwl_mvm_send_cmd_pdu(mvm, SCD_QUEUE_CFG, 0, sizeof(cmd), &cmd);
  574. WARN_ONCE(ret, "Failed to re-configure queue %d on FIFO %d, ret=%d\n",
  575. queue, fifo, ret);
  576. return ret;
  577. }
  578. void iwl_mvm_enable_txq(struct iwl_mvm *mvm, int queue, int mac80211_queue,
  579. u16 ssn, const struct iwl_trans_txq_scd_cfg *cfg,
  580. unsigned int wdg_timeout)
  581. {
  582. bool enable_queue = true;
  583. spin_lock_bh(&mvm->queue_info_lock);
  584. /* Make sure this TID isn't already enabled */
  585. if (mvm->queue_info[queue].tid_bitmap & BIT(cfg->tid)) {
  586. spin_unlock_bh(&mvm->queue_info_lock);
  587. IWL_ERR(mvm, "Trying to enable TXQ %d with existing TID %d\n",
  588. queue, cfg->tid);
  589. return;
  590. }
  591. /* Update mappings and refcounts */
  592. if (mvm->queue_info[queue].hw_queue_refcount > 0)
  593. enable_queue = false;
  594. mvm->queue_info[queue].hw_queue_to_mac80211 |= BIT(mac80211_queue);
  595. mvm->queue_info[queue].hw_queue_refcount++;
  596. mvm->queue_info[queue].tid_bitmap |= BIT(cfg->tid);
  597. mvm->queue_info[queue].ra_sta_id = cfg->sta_id;
  598. if (enable_queue) {
  599. if (cfg->tid != IWL_MAX_TID_COUNT)
  600. mvm->queue_info[queue].mac80211_ac =
  601. tid_to_mac80211_ac[cfg->tid];
  602. else
  603. mvm->queue_info[queue].mac80211_ac = IEEE80211_AC_VO;
  604. mvm->queue_info[queue].txq_tid = cfg->tid;
  605. }
  606. IWL_DEBUG_TX_QUEUES(mvm,
  607. "Enabling TXQ #%d refcount=%d (mac80211 map:0x%x)\n",
  608. queue, mvm->queue_info[queue].hw_queue_refcount,
  609. mvm->queue_info[queue].hw_queue_to_mac80211);
  610. spin_unlock_bh(&mvm->queue_info_lock);
  611. /* Send the enabling command if we need to */
  612. if (enable_queue) {
  613. struct iwl_scd_txq_cfg_cmd cmd = {
  614. .scd_queue = queue,
  615. .action = SCD_CFG_ENABLE_QUEUE,
  616. .window = cfg->frame_limit,
  617. .sta_id = cfg->sta_id,
  618. .ssn = cpu_to_le16(ssn),
  619. .tx_fifo = cfg->fifo,
  620. .aggregate = cfg->aggregate,
  621. .tid = cfg->tid,
  622. };
  623. iwl_trans_txq_enable_cfg(mvm->trans, queue, ssn, NULL,
  624. wdg_timeout);
  625. WARN(iwl_mvm_send_cmd_pdu(mvm, SCD_QUEUE_CFG, 0, sizeof(cmd),
  626. &cmd),
  627. "Failed to configure queue %d on FIFO %d\n", queue,
  628. cfg->fifo);
  629. }
  630. }
  631. int iwl_mvm_disable_txq(struct iwl_mvm *mvm, int queue, int mac80211_queue,
  632. u8 tid, u8 flags)
  633. {
  634. struct iwl_scd_txq_cfg_cmd cmd = {
  635. .scd_queue = queue,
  636. .action = SCD_CFG_DISABLE_QUEUE,
  637. };
  638. bool remove_mac_queue = true;
  639. int ret;
  640. spin_lock_bh(&mvm->queue_info_lock);
  641. if (WARN_ON(mvm->queue_info[queue].hw_queue_refcount == 0)) {
  642. spin_unlock_bh(&mvm->queue_info_lock);
  643. return 0;
  644. }
  645. mvm->queue_info[queue].tid_bitmap &= ~BIT(tid);
  646. /*
  647. * If there is another TID with the same AC - don't remove the MAC queue
  648. * from the mapping
  649. */
  650. if (tid < IWL_MAX_TID_COUNT) {
  651. unsigned long tid_bitmap =
  652. mvm->queue_info[queue].tid_bitmap;
  653. int ac = tid_to_mac80211_ac[tid];
  654. int i;
  655. for_each_set_bit(i, &tid_bitmap, IWL_MAX_TID_COUNT) {
  656. if (tid_to_mac80211_ac[i] == ac)
  657. remove_mac_queue = false;
  658. }
  659. }
  660. if (remove_mac_queue)
  661. mvm->queue_info[queue].hw_queue_to_mac80211 &=
  662. ~BIT(mac80211_queue);
  663. mvm->queue_info[queue].hw_queue_refcount--;
  664. cmd.action = mvm->queue_info[queue].hw_queue_refcount ?
  665. SCD_CFG_ENABLE_QUEUE : SCD_CFG_DISABLE_QUEUE;
  666. if (cmd.action == SCD_CFG_DISABLE_QUEUE)
  667. mvm->queue_info[queue].status = IWL_MVM_QUEUE_FREE;
  668. IWL_DEBUG_TX_QUEUES(mvm,
  669. "Disabling TXQ #%d refcount=%d (mac80211 map:0x%x)\n",
  670. queue,
  671. mvm->queue_info[queue].hw_queue_refcount,
  672. mvm->queue_info[queue].hw_queue_to_mac80211);
  673. /* If the queue is still enabled - nothing left to do in this func */
  674. if (cmd.action == SCD_CFG_ENABLE_QUEUE) {
  675. spin_unlock_bh(&mvm->queue_info_lock);
  676. return 0;
  677. }
  678. cmd.sta_id = mvm->queue_info[queue].ra_sta_id;
  679. cmd.tid = mvm->queue_info[queue].txq_tid;
  680. /* Make sure queue info is correct even though we overwrite it */
  681. WARN(mvm->queue_info[queue].hw_queue_refcount ||
  682. mvm->queue_info[queue].tid_bitmap ||
  683. mvm->queue_info[queue].hw_queue_to_mac80211,
  684. "TXQ #%d info out-of-sync - refcount=%d, mac map=0x%x, tid=0x%x\n",
  685. queue, mvm->queue_info[queue].hw_queue_refcount,
  686. mvm->queue_info[queue].hw_queue_to_mac80211,
  687. mvm->queue_info[queue].tid_bitmap);
  688. /* If we are here - the queue is freed and we can zero out these vals */
  689. mvm->queue_info[queue].hw_queue_refcount = 0;
  690. mvm->queue_info[queue].tid_bitmap = 0;
  691. mvm->queue_info[queue].hw_queue_to_mac80211 = 0;
  692. /* Regardless if this is a reserved TXQ for a STA - mark it as false */
  693. mvm->queue_info[queue].reserved = false;
  694. spin_unlock_bh(&mvm->queue_info_lock);
  695. iwl_trans_txq_disable(mvm->trans, queue, false);
  696. ret = iwl_mvm_send_cmd_pdu(mvm, SCD_QUEUE_CFG, flags,
  697. sizeof(cmd), &cmd);
  698. if (ret)
  699. IWL_ERR(mvm, "Failed to disable queue %d (ret=%d)\n",
  700. queue, ret);
  701. return ret;
  702. }
  703. /**
  704. * iwl_mvm_send_lq_cmd() - Send link quality command
  705. * @init: This command is sent as part of station initialization right
  706. * after station has been added.
  707. *
  708. * The link quality command is sent as the last step of station creation.
  709. * This is the special case in which init is set and we call a callback in
  710. * this case to clear the state indicating that station creation is in
  711. * progress.
  712. */
  713. int iwl_mvm_send_lq_cmd(struct iwl_mvm *mvm, struct iwl_lq_cmd *lq, bool init)
  714. {
  715. struct iwl_host_cmd cmd = {
  716. .id = LQ_CMD,
  717. .len = { sizeof(struct iwl_lq_cmd), },
  718. .flags = init ? 0 : CMD_ASYNC,
  719. .data = { lq, },
  720. };
  721. if (WARN_ON(lq->sta_id == IWL_MVM_STATION_COUNT))
  722. return -EINVAL;
  723. return iwl_mvm_send_cmd(mvm, &cmd);
  724. }
  725. /**
  726. * iwl_mvm_update_smps - Get a request to change the SMPS mode
  727. * @req_type: The part of the driver who call for a change.
  728. * @smps_requests: The request to change the SMPS mode.
  729. *
  730. * Get a requst to change the SMPS mode,
  731. * and change it according to all other requests in the driver.
  732. */
  733. void iwl_mvm_update_smps(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
  734. enum iwl_mvm_smps_type_request req_type,
  735. enum ieee80211_smps_mode smps_request)
  736. {
  737. struct iwl_mvm_vif *mvmvif;
  738. enum ieee80211_smps_mode smps_mode;
  739. int i;
  740. lockdep_assert_held(&mvm->mutex);
  741. /* SMPS is irrelevant for NICs that don't have at least 2 RX antenna */
  742. if (num_of_ant(iwl_mvm_get_valid_rx_ant(mvm)) == 1)
  743. return;
  744. if (vif->type == NL80211_IFTYPE_AP)
  745. smps_mode = IEEE80211_SMPS_OFF;
  746. else
  747. smps_mode = IEEE80211_SMPS_AUTOMATIC;
  748. mvmvif = iwl_mvm_vif_from_mac80211(vif);
  749. mvmvif->smps_requests[req_type] = smps_request;
  750. for (i = 0; i < NUM_IWL_MVM_SMPS_REQ; i++) {
  751. if (mvmvif->smps_requests[i] == IEEE80211_SMPS_STATIC) {
  752. smps_mode = IEEE80211_SMPS_STATIC;
  753. break;
  754. }
  755. if (mvmvif->smps_requests[i] == IEEE80211_SMPS_DYNAMIC)
  756. smps_mode = IEEE80211_SMPS_DYNAMIC;
  757. }
  758. ieee80211_request_smps(vif, smps_mode);
  759. }
  760. int iwl_mvm_request_statistics(struct iwl_mvm *mvm, bool clear)
  761. {
  762. struct iwl_statistics_cmd scmd = {
  763. .flags = clear ? cpu_to_le32(IWL_STATISTICS_FLG_CLEAR) : 0,
  764. };
  765. struct iwl_host_cmd cmd = {
  766. .id = STATISTICS_CMD,
  767. .len[0] = sizeof(scmd),
  768. .data[0] = &scmd,
  769. .flags = CMD_WANT_SKB,
  770. };
  771. int ret;
  772. ret = iwl_mvm_send_cmd(mvm, &cmd);
  773. if (ret)
  774. return ret;
  775. iwl_mvm_handle_rx_statistics(mvm, cmd.resp_pkt);
  776. iwl_free_resp(&cmd);
  777. if (clear)
  778. iwl_mvm_accu_radio_stats(mvm);
  779. return 0;
  780. }
  781. void iwl_mvm_accu_radio_stats(struct iwl_mvm *mvm)
  782. {
  783. mvm->accu_radio_stats.rx_time += mvm->radio_stats.rx_time;
  784. mvm->accu_radio_stats.tx_time += mvm->radio_stats.tx_time;
  785. mvm->accu_radio_stats.on_time_rf += mvm->radio_stats.on_time_rf;
  786. mvm->accu_radio_stats.on_time_scan += mvm->radio_stats.on_time_scan;
  787. }
  788. static void iwl_mvm_diversity_iter(void *_data, u8 *mac,
  789. struct ieee80211_vif *vif)
  790. {
  791. struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
  792. bool *result = _data;
  793. int i;
  794. for (i = 0; i < NUM_IWL_MVM_SMPS_REQ; i++) {
  795. if (mvmvif->smps_requests[i] == IEEE80211_SMPS_STATIC ||
  796. mvmvif->smps_requests[i] == IEEE80211_SMPS_DYNAMIC)
  797. *result = false;
  798. }
  799. }
  800. bool iwl_mvm_rx_diversity_allowed(struct iwl_mvm *mvm)
  801. {
  802. bool result = true;
  803. lockdep_assert_held(&mvm->mutex);
  804. if (num_of_ant(iwl_mvm_get_valid_rx_ant(mvm)) == 1)
  805. return false;
  806. if (mvm->cfg->rx_with_siso_diversity)
  807. return false;
  808. ieee80211_iterate_active_interfaces_atomic(
  809. mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
  810. iwl_mvm_diversity_iter, &result);
  811. return result;
  812. }
  813. int iwl_mvm_update_low_latency(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
  814. bool prev)
  815. {
  816. struct iwl_mvm_vif *mvmvif = iwl_mvm_vif_from_mac80211(vif);
  817. int res;
  818. lockdep_assert_held(&mvm->mutex);
  819. if (iwl_mvm_vif_low_latency(mvmvif) == prev)
  820. return 0;
  821. res = iwl_mvm_update_quotas(mvm, false, NULL);
  822. if (res)
  823. return res;
  824. iwl_mvm_bt_coex_vif_change(mvm);
  825. return iwl_mvm_power_update_mac(mvm);
  826. }
  827. static void iwl_mvm_ll_iter(void *_data, u8 *mac, struct ieee80211_vif *vif)
  828. {
  829. bool *result = _data;
  830. if (iwl_mvm_vif_low_latency(iwl_mvm_vif_from_mac80211(vif)))
  831. *result = true;
  832. }
  833. bool iwl_mvm_low_latency(struct iwl_mvm *mvm)
  834. {
  835. bool result = false;
  836. ieee80211_iterate_active_interfaces_atomic(
  837. mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
  838. iwl_mvm_ll_iter, &result);
  839. return result;
  840. }
  841. struct iwl_bss_iter_data {
  842. struct ieee80211_vif *vif;
  843. bool error;
  844. };
  845. static void iwl_mvm_bss_iface_iterator(void *_data, u8 *mac,
  846. struct ieee80211_vif *vif)
  847. {
  848. struct iwl_bss_iter_data *data = _data;
  849. if (vif->type != NL80211_IFTYPE_STATION || vif->p2p)
  850. return;
  851. if (data->vif) {
  852. data->error = true;
  853. return;
  854. }
  855. data->vif = vif;
  856. }
  857. struct ieee80211_vif *iwl_mvm_get_bss_vif(struct iwl_mvm *mvm)
  858. {
  859. struct iwl_bss_iter_data bss_iter_data = {};
  860. ieee80211_iterate_active_interfaces_atomic(
  861. mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
  862. iwl_mvm_bss_iface_iterator, &bss_iter_data);
  863. if (bss_iter_data.error) {
  864. IWL_ERR(mvm, "More than one managed interface active!\n");
  865. return ERR_PTR(-EINVAL);
  866. }
  867. return bss_iter_data.vif;
  868. }
  869. unsigned int iwl_mvm_get_wd_timeout(struct iwl_mvm *mvm,
  870. struct ieee80211_vif *vif,
  871. bool tdls, bool cmd_q)
  872. {
  873. struct iwl_fw_dbg_trigger_tlv *trigger;
  874. struct iwl_fw_dbg_trigger_txq_timer *txq_timer;
  875. unsigned int default_timeout =
  876. cmd_q ? IWL_DEF_WD_TIMEOUT : mvm->cfg->base_params->wd_timeout;
  877. if (!iwl_fw_dbg_trigger_enabled(mvm->fw, FW_DBG_TRIGGER_TXQ_TIMERS))
  878. return iwlmvm_mod_params.tfd_q_hang_detect ?
  879. default_timeout : IWL_WATCHDOG_DISABLED;
  880. trigger = iwl_fw_dbg_get_trigger(mvm->fw, FW_DBG_TRIGGER_TXQ_TIMERS);
  881. txq_timer = (void *)trigger->data;
  882. if (tdls)
  883. return le32_to_cpu(txq_timer->tdls);
  884. if (cmd_q)
  885. return le32_to_cpu(txq_timer->command_queue);
  886. if (WARN_ON(!vif))
  887. return default_timeout;
  888. switch (ieee80211_vif_type_p2p(vif)) {
  889. case NL80211_IFTYPE_ADHOC:
  890. return le32_to_cpu(txq_timer->ibss);
  891. case NL80211_IFTYPE_STATION:
  892. return le32_to_cpu(txq_timer->bss);
  893. case NL80211_IFTYPE_AP:
  894. return le32_to_cpu(txq_timer->softap);
  895. case NL80211_IFTYPE_P2P_CLIENT:
  896. return le32_to_cpu(txq_timer->p2p_client);
  897. case NL80211_IFTYPE_P2P_GO:
  898. return le32_to_cpu(txq_timer->p2p_go);
  899. case NL80211_IFTYPE_P2P_DEVICE:
  900. return le32_to_cpu(txq_timer->p2p_device);
  901. default:
  902. WARN_ON(1);
  903. return mvm->cfg->base_params->wd_timeout;
  904. }
  905. }
  906. void iwl_mvm_connection_loss(struct iwl_mvm *mvm, struct ieee80211_vif *vif,
  907. const char *errmsg)
  908. {
  909. struct iwl_fw_dbg_trigger_tlv *trig;
  910. struct iwl_fw_dbg_trigger_mlme *trig_mlme;
  911. if (!iwl_fw_dbg_trigger_enabled(mvm->fw, FW_DBG_TRIGGER_MLME))
  912. goto out;
  913. trig = iwl_fw_dbg_get_trigger(mvm->fw, FW_DBG_TRIGGER_MLME);
  914. trig_mlme = (void *)trig->data;
  915. if (!iwl_fw_dbg_trigger_check_stop(mvm, vif, trig))
  916. goto out;
  917. if (trig_mlme->stop_connection_loss &&
  918. --trig_mlme->stop_connection_loss)
  919. goto out;
  920. iwl_mvm_fw_dbg_collect_trig(mvm, trig, "%s", errmsg);
  921. out:
  922. ieee80211_connection_loss(vif);
  923. }
  924. /*
  925. * Remove inactive TIDs of a given queue.
  926. * If all queue TIDs are inactive - mark the queue as inactive
  927. * If only some the queue TIDs are inactive - unmap them from the queue
  928. */
  929. static void iwl_mvm_remove_inactive_tids(struct iwl_mvm *mvm,
  930. struct iwl_mvm_sta *mvmsta, int queue,
  931. unsigned long tid_bitmap)
  932. {
  933. int tid;
  934. lockdep_assert_held(&mvmsta->lock);
  935. lockdep_assert_held(&mvm->queue_info_lock);
  936. /* Go over all non-active TIDs, incl. IWL_MAX_TID_COUNT (for mgmt) */
  937. for_each_set_bit(tid, &tid_bitmap, IWL_MAX_TID_COUNT + 1) {
  938. /* If some TFDs are still queued - don't mark TID as inactive */
  939. if (iwl_mvm_tid_queued(&mvmsta->tid_data[tid]))
  940. tid_bitmap &= ~BIT(tid);
  941. }
  942. /* If all TIDs in the queue are inactive - mark queue as inactive. */
  943. if (tid_bitmap == mvm->queue_info[queue].tid_bitmap) {
  944. mvm->queue_info[queue].status = IWL_MVM_QUEUE_INACTIVE;
  945. for_each_set_bit(tid, &tid_bitmap, IWL_MAX_TID_COUNT + 1)
  946. mvmsta->tid_data[tid].is_tid_active = false;
  947. IWL_DEBUG_TX_QUEUES(mvm, "Queue %d marked as inactive\n",
  948. queue);
  949. return;
  950. }
  951. /*
  952. * If we are here, this is a shared queue and not all TIDs timed-out.
  953. * Remove the ones that did.
  954. */
  955. for_each_set_bit(tid, &tid_bitmap, IWL_MAX_TID_COUNT + 1) {
  956. int mac_queue = mvmsta->vif->hw_queue[tid_to_mac80211_ac[tid]];
  957. mvmsta->tid_data[tid].txq_id = IEEE80211_INVAL_HW_QUEUE;
  958. mvm->queue_info[queue].hw_queue_to_mac80211 &= ~BIT(mac_queue);
  959. mvm->queue_info[queue].hw_queue_refcount--;
  960. mvm->queue_info[queue].tid_bitmap &= ~BIT(tid);
  961. mvmsta->tid_data[tid].is_tid_active = false;
  962. IWL_DEBUG_TX_QUEUES(mvm,
  963. "Removing inactive TID %d from shared Q:%d\n",
  964. tid, queue);
  965. }
  966. IWL_DEBUG_TX_QUEUES(mvm,
  967. "TXQ #%d left with tid bitmap 0x%x\n", queue,
  968. mvm->queue_info[queue].tid_bitmap);
  969. /*
  970. * There may be different TIDs with the same mac queues, so make
  971. * sure all TIDs have existing corresponding mac queues enabled
  972. */
  973. tid_bitmap = mvm->queue_info[queue].tid_bitmap;
  974. for_each_set_bit(tid, &tid_bitmap, IWL_MAX_TID_COUNT + 1) {
  975. mvm->queue_info[queue].hw_queue_to_mac80211 |=
  976. BIT(mvmsta->vif->hw_queue[tid_to_mac80211_ac[tid]]);
  977. }
  978. /* If the queue is marked as shared - "unshare" it */
  979. if (mvm->queue_info[queue].hw_queue_refcount == 1 &&
  980. mvm->queue_info[queue].status == IWL_MVM_QUEUE_SHARED) {
  981. mvm->queue_info[queue].status = IWL_MVM_QUEUE_RECONFIGURING;
  982. IWL_DEBUG_TX_QUEUES(mvm, "Marking Q:%d for reconfig\n",
  983. queue);
  984. }
  985. }
  986. void iwl_mvm_inactivity_check(struct iwl_mvm *mvm)
  987. {
  988. unsigned long timeout_queues_map = 0;
  989. unsigned long now = jiffies;
  990. int i;
  991. spin_lock_bh(&mvm->queue_info_lock);
  992. for (i = 0; i < IWL_MAX_HW_QUEUES; i++)
  993. if (mvm->queue_info[i].hw_queue_refcount > 0)
  994. timeout_queues_map |= BIT(i);
  995. spin_unlock_bh(&mvm->queue_info_lock);
  996. rcu_read_lock();
  997. /*
  998. * If a queue time outs - mark it as INACTIVE (don't remove right away
  999. * if we don't have to.) This is an optimization in case traffic comes
  1000. * later, and we don't HAVE to use a currently-inactive queue
  1001. */
  1002. for_each_set_bit(i, &timeout_queues_map, IWL_MAX_HW_QUEUES) {
  1003. struct ieee80211_sta *sta;
  1004. struct iwl_mvm_sta *mvmsta;
  1005. u8 sta_id;
  1006. int tid;
  1007. unsigned long inactive_tid_bitmap = 0;
  1008. unsigned long queue_tid_bitmap;
  1009. spin_lock_bh(&mvm->queue_info_lock);
  1010. queue_tid_bitmap = mvm->queue_info[i].tid_bitmap;
  1011. /* If TXQ isn't in active use anyway - nothing to do here... */
  1012. if (mvm->queue_info[i].status != IWL_MVM_QUEUE_READY &&
  1013. mvm->queue_info[i].status != IWL_MVM_QUEUE_SHARED) {
  1014. spin_unlock_bh(&mvm->queue_info_lock);
  1015. continue;
  1016. }
  1017. /* Check to see if there are inactive TIDs on this queue */
  1018. for_each_set_bit(tid, &queue_tid_bitmap,
  1019. IWL_MAX_TID_COUNT + 1) {
  1020. if (time_after(mvm->queue_info[i].last_frame_time[tid] +
  1021. IWL_MVM_DQA_QUEUE_TIMEOUT, now))
  1022. continue;
  1023. inactive_tid_bitmap |= BIT(tid);
  1024. }
  1025. spin_unlock_bh(&mvm->queue_info_lock);
  1026. /* If all TIDs are active - finish check on this queue */
  1027. if (!inactive_tid_bitmap)
  1028. continue;
  1029. /*
  1030. * If we are here - the queue hadn't been served recently and is
  1031. * in use
  1032. */
  1033. sta_id = mvm->queue_info[i].ra_sta_id;
  1034. sta = rcu_dereference(mvm->fw_id_to_mac_id[sta_id]);
  1035. /*
  1036. * If the STA doesn't exist anymore, it isn't an error. It could
  1037. * be that it was removed since getting the queues, and in this
  1038. * case it should've inactivated its queues anyway.
  1039. */
  1040. if (IS_ERR_OR_NULL(sta))
  1041. continue;
  1042. mvmsta = iwl_mvm_sta_from_mac80211(sta);
  1043. spin_lock_bh(&mvmsta->lock);
  1044. spin_lock(&mvm->queue_info_lock);
  1045. iwl_mvm_remove_inactive_tids(mvm, mvmsta, i,
  1046. inactive_tid_bitmap);
  1047. spin_unlock(&mvm->queue_info_lock);
  1048. spin_unlock_bh(&mvmsta->lock);
  1049. }
  1050. rcu_read_unlock();
  1051. }
  1052. void iwl_mvm_get_sync_time(struct iwl_mvm *mvm, u32 *gp2, u64 *boottime)
  1053. {
  1054. bool ps_disabled;
  1055. lockdep_assert_held(&mvm->mutex);
  1056. /* Disable power save when reading GP2 */
  1057. ps_disabled = mvm->ps_disabled;
  1058. if (!ps_disabled) {
  1059. mvm->ps_disabled = true;
  1060. iwl_mvm_power_update_device(mvm);
  1061. }
  1062. *gp2 = iwl_read_prph(mvm->trans, DEVICE_SYSTEM_TIME_REG);
  1063. *boottime = ktime_get_boot_ns();
  1064. if (!ps_disabled) {
  1065. mvm->ps_disabled = ps_disabled;
  1066. iwl_mvm_power_update_device(mvm);
  1067. }
  1068. }
  1069. int iwl_mvm_send_lqm_cmd(struct ieee80211_vif *vif,
  1070. enum iwl_lqm_cmd_operatrions operation,
  1071. u32 duration, u32 timeout)
  1072. {
  1073. struct iwl_mvm_vif *mvm_vif = iwl_mvm_vif_from_mac80211(vif);
  1074. struct iwl_link_qual_msrmnt_cmd cmd = {
  1075. .cmd_operation = cpu_to_le32(operation),
  1076. .mac_id = cpu_to_le32(mvm_vif->id),
  1077. .measurement_time = cpu_to_le32(duration),
  1078. .timeout = cpu_to_le32(timeout),
  1079. };
  1080. u32 cmdid =
  1081. iwl_cmd_id(LINK_QUALITY_MEASUREMENT_CMD, MAC_CONF_GROUP, 0);
  1082. int ret;
  1083. if (!fw_has_capa(&mvm_vif->mvm->fw->ucode_capa,
  1084. IWL_UCODE_TLV_CAPA_LQM_SUPPORT))
  1085. return -EOPNOTSUPP;
  1086. if (vif->type != NL80211_IFTYPE_STATION || vif->p2p)
  1087. return -EINVAL;
  1088. switch (operation) {
  1089. case LQM_CMD_OPERATION_START_MEASUREMENT:
  1090. if (iwl_mvm_lqm_active(mvm_vif->mvm))
  1091. return -EBUSY;
  1092. if (!vif->bss_conf.assoc)
  1093. return -EINVAL;
  1094. mvm_vif->lqm_active = true;
  1095. break;
  1096. case LQM_CMD_OPERATION_STOP_MEASUREMENT:
  1097. if (!iwl_mvm_lqm_active(mvm_vif->mvm))
  1098. return -EINVAL;
  1099. break;
  1100. default:
  1101. return -EINVAL;
  1102. }
  1103. ret = iwl_mvm_send_cmd_pdu(mvm_vif->mvm, cmdid, 0, sizeof(cmd),
  1104. &cmd);
  1105. /* command failed - roll back lqm_active state */
  1106. if (ret) {
  1107. mvm_vif->lqm_active =
  1108. operation == LQM_CMD_OPERATION_STOP_MEASUREMENT;
  1109. }
  1110. return ret;
  1111. }
  1112. static void iwl_mvm_lqm_active_iterator(void *_data, u8 *mac,
  1113. struct ieee80211_vif *vif)
  1114. {
  1115. struct iwl_mvm_vif *mvm_vif = iwl_mvm_vif_from_mac80211(vif);
  1116. bool *lqm_active = _data;
  1117. *lqm_active = *lqm_active || mvm_vif->lqm_active;
  1118. }
  1119. bool iwl_mvm_lqm_active(struct iwl_mvm *mvm)
  1120. {
  1121. bool ret = false;
  1122. lockdep_assert_held(&mvm->mutex);
  1123. ieee80211_iterate_active_interfaces_atomic(
  1124. mvm->hw, IEEE80211_IFACE_ITER_NORMAL,
  1125. iwl_mvm_lqm_active_iterator, &ret);
  1126. return ret;
  1127. }