rdma.c 41 KB

1234567891011121314151617181920212223242526272829303132333435363738394041424344454647484950515253545556575859606162636465666768697071727374757677787980818283848586878889909192939495969798991001011021031041051061071081091101111121131141151161171181191201211221231241251261271281291301311321331341351361371381391401411421431441451461471481491501511521531541551561571581591601611621631641651661671681691701711721731741751761771781791801811821831841851861871881891901911921931941951961971981992002012022032042052062072082092102112122132142152162172182192202212222232242252262272282292302312322332342352362372382392402412422432442452462472482492502512522532542552562572582592602612622632642652662672682692702712722732742752762772782792802812822832842852862872882892902912922932942952962972982993003013023033043053063073083093103113123133143153163173183193203213223233243253263273283293303313323333343353363373383393403413423433443453463473483493503513523533543553563573583593603613623633643653663673683693703713723733743753763773783793803813823833843853863873883893903913923933943953963973983994004014024034044054064074084094104114124134144154164174184194204214224234244254264274284294304314324334344354364374384394404414424434444454464474484494504514524534544554564574584594604614624634644654664674684694704714724734744754764774784794804814824834844854864874884894904914924934944954964974984995005015025035045055065075085095105115125135145155165175185195205215225235245255265275285295305315325335345355365375385395405415425435445455465475485495505515525535545555565575585595605615625635645655665675685695705715725735745755765775785795805815825835845855865875885895905915925935945955965975985996006016026036046056066076086096106116126136146156166176186196206216226236246256266276286296306316326336346356366376386396406416426436446456466476486496506516526536546556566576586596606616626636646656666676686696706716726736746756766776786796806816826836846856866876886896906916926936946956966976986997007017027037047057067077087097107117127137147157167177187197207217227237247257267277287297307317327337347357367377387397407417427437447457467477487497507517527537547557567577587597607617627637647657667677687697707717727737747757767777787797807817827837847857867877887897907917927937947957967977987998008018028038048058068078088098108118128138148158168178188198208218228238248258268278288298308318328338348358368378388398408418428438448458468478488498508518528538548558568578588598608618628638648658668678688698708718728738748758768778788798808818828838848858868878888898908918928938948958968978988999009019029039049059069079089099109119129139149159169179189199209219229239249259269279289299309319329339349359369379389399409419429439449459469479489499509519529539549559569579589599609619629639649659669679689699709719729739749759769779789799809819829839849859869879889899909919929939949959969979989991000100110021003100410051006100710081009101010111012101310141015101610171018101910201021102210231024102510261027102810291030103110321033103410351036103710381039104010411042104310441045104610471048104910501051105210531054105510561057105810591060106110621063106410651066106710681069107010711072107310741075107610771078107910801081108210831084108510861087108810891090109110921093109410951096109710981099110011011102110311041105110611071108110911101111111211131114111511161117111811191120112111221123112411251126112711281129113011311132113311341135113611371138113911401141114211431144114511461147114811491150115111521153115411551156115711581159116011611162116311641165116611671168116911701171117211731174117511761177117811791180118111821183118411851186118711881189119011911192119311941195119611971198119912001201120212031204120512061207120812091210121112121213121412151216121712181219122012211222122312241225122612271228122912301231123212331234123512361237123812391240124112421243124412451246124712481249125012511252125312541255125612571258125912601261126212631264126512661267126812691270127112721273127412751276127712781279128012811282128312841285128612871288128912901291129212931294129512961297129812991300130113021303130413051306130713081309131013111312131313141315131613171318131913201321132213231324132513261327132813291330133113321333133413351336133713381339134013411342134313441345134613471348134913501351135213531354135513561357135813591360136113621363136413651366136713681369137013711372137313741375137613771378137913801381138213831384138513861387138813891390139113921393139413951396139713981399140014011402140314041405140614071408140914101411141214131414141514161417141814191420142114221423142414251426142714281429143014311432143314341435143614371438143914401441144214431444144514461447144814491450145114521453145414551456145714581459146014611462146314641465146614671468146914701471147214731474147514761477147814791480148114821483148414851486148714881489149014911492149314941495149614971498149915001501150215031504150515061507150815091510151115121513151415151516151715181519152015211522152315241525152615271528152915301531153215331534153515361537153815391540154115421543154415451546154715481549155015511552155315541555155615571558155915601561156215631564156515661567156815691570157115721573157415751576157715781579158015811582158315841585158615871588158915901591159215931594159515961597159815991600160116021603160416051606160716081609161016111612161316141615161616171618161916201621162216231624162516261627162816291630163116321633163416351636163716381639164016411642164316441645164616471648164916501651165216531654165516561657165816591660166116621663166416651666166716681669167016711672167316741675167616771678
  1. /*
  2. * NVMe over Fabrics RDMA target.
  3. * Copyright (c) 2015-2016 HGST, a Western Digital Company.
  4. *
  5. * This program is free software; you can redistribute it and/or modify it
  6. * under the terms and conditions of the GNU General Public License,
  7. * version 2, as published by the Free Software Foundation.
  8. *
  9. * This program is distributed in the hope it will be useful, but WITHOUT
  10. * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  11. * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
  12. * more details.
  13. */
  14. #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  15. #include <linux/atomic.h>
  16. #include <linux/ctype.h>
  17. #include <linux/delay.h>
  18. #include <linux/err.h>
  19. #include <linux/init.h>
  20. #include <linux/module.h>
  21. #include <linux/nvme.h>
  22. #include <linux/slab.h>
  23. #include <linux/string.h>
  24. #include <linux/wait.h>
  25. #include <linux/inet.h>
  26. #include <asm/unaligned.h>
  27. #include <rdma/ib_verbs.h>
  28. #include <rdma/rdma_cm.h>
  29. #include <rdma/rw.h>
  30. #include <linux/nvme-rdma.h>
  31. #include "nvmet.h"
  32. /*
  33. * We allow at least 1 page, up to 4 SGEs, and up to 16KB of inline data
  34. */
  35. #define NVMET_RDMA_DEFAULT_INLINE_DATA_SIZE PAGE_SIZE
  36. #define NVMET_RDMA_MAX_INLINE_SGE 4
  37. #define NVMET_RDMA_MAX_INLINE_DATA_SIZE max_t(int, SZ_16K, PAGE_SIZE)
  38. struct nvmet_rdma_cmd {
  39. struct ib_sge sge[NVMET_RDMA_MAX_INLINE_SGE + 1];
  40. struct ib_cqe cqe;
  41. struct ib_recv_wr wr;
  42. struct scatterlist inline_sg[NVMET_RDMA_MAX_INLINE_SGE];
  43. struct nvme_command *nvme_cmd;
  44. struct nvmet_rdma_queue *queue;
  45. };
  46. enum {
  47. NVMET_RDMA_REQ_INLINE_DATA = (1 << 0),
  48. NVMET_RDMA_REQ_INVALIDATE_RKEY = (1 << 1),
  49. };
  50. struct nvmet_rdma_rsp {
  51. struct ib_sge send_sge;
  52. struct ib_cqe send_cqe;
  53. struct ib_send_wr send_wr;
  54. struct nvmet_rdma_cmd *cmd;
  55. struct nvmet_rdma_queue *queue;
  56. struct ib_cqe read_cqe;
  57. struct rdma_rw_ctx rw;
  58. struct nvmet_req req;
  59. bool allocated;
  60. u8 n_rdma;
  61. u32 flags;
  62. u32 invalidate_rkey;
  63. struct list_head wait_list;
  64. struct list_head free_list;
  65. };
  66. enum nvmet_rdma_queue_state {
  67. NVMET_RDMA_Q_CONNECTING,
  68. NVMET_RDMA_Q_LIVE,
  69. NVMET_RDMA_Q_DISCONNECTING,
  70. };
  71. struct nvmet_rdma_queue {
  72. struct rdma_cm_id *cm_id;
  73. struct nvmet_port *port;
  74. struct ib_cq *cq;
  75. atomic_t sq_wr_avail;
  76. struct nvmet_rdma_device *dev;
  77. spinlock_t state_lock;
  78. enum nvmet_rdma_queue_state state;
  79. struct nvmet_cq nvme_cq;
  80. struct nvmet_sq nvme_sq;
  81. struct nvmet_rdma_rsp *rsps;
  82. struct list_head free_rsps;
  83. spinlock_t rsps_lock;
  84. struct nvmet_rdma_cmd *cmds;
  85. struct work_struct release_work;
  86. struct list_head rsp_wait_list;
  87. struct list_head rsp_wr_wait_list;
  88. spinlock_t rsp_wr_wait_lock;
  89. int idx;
  90. int host_qid;
  91. int recv_queue_size;
  92. int send_queue_size;
  93. struct list_head queue_list;
  94. };
  95. struct nvmet_rdma_device {
  96. struct ib_device *device;
  97. struct ib_pd *pd;
  98. struct ib_srq *srq;
  99. struct nvmet_rdma_cmd *srq_cmds;
  100. size_t srq_size;
  101. struct kref ref;
  102. struct list_head entry;
  103. int inline_data_size;
  104. int inline_page_count;
  105. };
  106. static bool nvmet_rdma_use_srq;
  107. module_param_named(use_srq, nvmet_rdma_use_srq, bool, 0444);
  108. MODULE_PARM_DESC(use_srq, "Use shared receive queue.");
  109. static DEFINE_IDA(nvmet_rdma_queue_ida);
  110. static LIST_HEAD(nvmet_rdma_queue_list);
  111. static DEFINE_MUTEX(nvmet_rdma_queue_mutex);
  112. static LIST_HEAD(device_list);
  113. static DEFINE_MUTEX(device_list_mutex);
  114. static bool nvmet_rdma_execute_command(struct nvmet_rdma_rsp *rsp);
  115. static void nvmet_rdma_send_done(struct ib_cq *cq, struct ib_wc *wc);
  116. static void nvmet_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc);
  117. static void nvmet_rdma_read_data_done(struct ib_cq *cq, struct ib_wc *wc);
  118. static void nvmet_rdma_qp_event(struct ib_event *event, void *priv);
  119. static void nvmet_rdma_queue_disconnect(struct nvmet_rdma_queue *queue);
  120. static const struct nvmet_fabrics_ops nvmet_rdma_ops;
  121. static int num_pages(int len)
  122. {
  123. return 1 + (((len - 1) & PAGE_MASK) >> PAGE_SHIFT);
  124. }
  125. /* XXX: really should move to a generic header sooner or later.. */
  126. static inline u32 get_unaligned_le24(const u8 *p)
  127. {
  128. return (u32)p[0] | (u32)p[1] << 8 | (u32)p[2] << 16;
  129. }
  130. static inline bool nvmet_rdma_need_data_in(struct nvmet_rdma_rsp *rsp)
  131. {
  132. return nvme_is_write(rsp->req.cmd) &&
  133. rsp->req.transfer_len &&
  134. !(rsp->flags & NVMET_RDMA_REQ_INLINE_DATA);
  135. }
  136. static inline bool nvmet_rdma_need_data_out(struct nvmet_rdma_rsp *rsp)
  137. {
  138. return !nvme_is_write(rsp->req.cmd) &&
  139. rsp->req.transfer_len &&
  140. !rsp->req.rsp->status &&
  141. !(rsp->flags & NVMET_RDMA_REQ_INLINE_DATA);
  142. }
  143. static inline struct nvmet_rdma_rsp *
  144. nvmet_rdma_get_rsp(struct nvmet_rdma_queue *queue)
  145. {
  146. struct nvmet_rdma_rsp *rsp;
  147. unsigned long flags;
  148. spin_lock_irqsave(&queue->rsps_lock, flags);
  149. rsp = list_first_entry_or_null(&queue->free_rsps,
  150. struct nvmet_rdma_rsp, free_list);
  151. if (likely(rsp))
  152. list_del(&rsp->free_list);
  153. spin_unlock_irqrestore(&queue->rsps_lock, flags);
  154. if (unlikely(!rsp)) {
  155. rsp = kmalloc(sizeof(*rsp), GFP_KERNEL);
  156. if (unlikely(!rsp))
  157. return NULL;
  158. rsp->allocated = true;
  159. }
  160. return rsp;
  161. }
  162. static inline void
  163. nvmet_rdma_put_rsp(struct nvmet_rdma_rsp *rsp)
  164. {
  165. unsigned long flags;
  166. if (rsp->allocated) {
  167. kfree(rsp);
  168. return;
  169. }
  170. spin_lock_irqsave(&rsp->queue->rsps_lock, flags);
  171. list_add_tail(&rsp->free_list, &rsp->queue->free_rsps);
  172. spin_unlock_irqrestore(&rsp->queue->rsps_lock, flags);
  173. }
  174. static void nvmet_rdma_free_inline_pages(struct nvmet_rdma_device *ndev,
  175. struct nvmet_rdma_cmd *c)
  176. {
  177. struct scatterlist *sg;
  178. struct ib_sge *sge;
  179. int i;
  180. if (!ndev->inline_data_size)
  181. return;
  182. sg = c->inline_sg;
  183. sge = &c->sge[1];
  184. for (i = 0; i < ndev->inline_page_count; i++, sg++, sge++) {
  185. if (sge->length)
  186. ib_dma_unmap_page(ndev->device, sge->addr,
  187. sge->length, DMA_FROM_DEVICE);
  188. if (sg_page(sg))
  189. __free_page(sg_page(sg));
  190. }
  191. }
  192. static int nvmet_rdma_alloc_inline_pages(struct nvmet_rdma_device *ndev,
  193. struct nvmet_rdma_cmd *c)
  194. {
  195. struct scatterlist *sg;
  196. struct ib_sge *sge;
  197. struct page *pg;
  198. int len;
  199. int i;
  200. if (!ndev->inline_data_size)
  201. return 0;
  202. sg = c->inline_sg;
  203. sg_init_table(sg, ndev->inline_page_count);
  204. sge = &c->sge[1];
  205. len = ndev->inline_data_size;
  206. for (i = 0; i < ndev->inline_page_count; i++, sg++, sge++) {
  207. pg = alloc_page(GFP_KERNEL);
  208. if (!pg)
  209. goto out_err;
  210. sg_assign_page(sg, pg);
  211. sge->addr = ib_dma_map_page(ndev->device,
  212. pg, 0, PAGE_SIZE, DMA_FROM_DEVICE);
  213. if (ib_dma_mapping_error(ndev->device, sge->addr))
  214. goto out_err;
  215. sge->length = min_t(int, len, PAGE_SIZE);
  216. sge->lkey = ndev->pd->local_dma_lkey;
  217. len -= sge->length;
  218. }
  219. return 0;
  220. out_err:
  221. for (; i >= 0; i--, sg--, sge--) {
  222. if (sge->length)
  223. ib_dma_unmap_page(ndev->device, sge->addr,
  224. sge->length, DMA_FROM_DEVICE);
  225. if (sg_page(sg))
  226. __free_page(sg_page(sg));
  227. }
  228. return -ENOMEM;
  229. }
  230. static int nvmet_rdma_alloc_cmd(struct nvmet_rdma_device *ndev,
  231. struct nvmet_rdma_cmd *c, bool admin)
  232. {
  233. /* NVMe command / RDMA RECV */
  234. c->nvme_cmd = kmalloc(sizeof(*c->nvme_cmd), GFP_KERNEL);
  235. if (!c->nvme_cmd)
  236. goto out;
  237. c->sge[0].addr = ib_dma_map_single(ndev->device, c->nvme_cmd,
  238. sizeof(*c->nvme_cmd), DMA_FROM_DEVICE);
  239. if (ib_dma_mapping_error(ndev->device, c->sge[0].addr))
  240. goto out_free_cmd;
  241. c->sge[0].length = sizeof(*c->nvme_cmd);
  242. c->sge[0].lkey = ndev->pd->local_dma_lkey;
  243. if (!admin && nvmet_rdma_alloc_inline_pages(ndev, c))
  244. goto out_unmap_cmd;
  245. c->cqe.done = nvmet_rdma_recv_done;
  246. c->wr.wr_cqe = &c->cqe;
  247. c->wr.sg_list = c->sge;
  248. c->wr.num_sge = admin ? 1 : ndev->inline_page_count + 1;
  249. return 0;
  250. out_unmap_cmd:
  251. ib_dma_unmap_single(ndev->device, c->sge[0].addr,
  252. sizeof(*c->nvme_cmd), DMA_FROM_DEVICE);
  253. out_free_cmd:
  254. kfree(c->nvme_cmd);
  255. out:
  256. return -ENOMEM;
  257. }
  258. static void nvmet_rdma_free_cmd(struct nvmet_rdma_device *ndev,
  259. struct nvmet_rdma_cmd *c, bool admin)
  260. {
  261. if (!admin)
  262. nvmet_rdma_free_inline_pages(ndev, c);
  263. ib_dma_unmap_single(ndev->device, c->sge[0].addr,
  264. sizeof(*c->nvme_cmd), DMA_FROM_DEVICE);
  265. kfree(c->nvme_cmd);
  266. }
  267. static struct nvmet_rdma_cmd *
  268. nvmet_rdma_alloc_cmds(struct nvmet_rdma_device *ndev,
  269. int nr_cmds, bool admin)
  270. {
  271. struct nvmet_rdma_cmd *cmds;
  272. int ret = -EINVAL, i;
  273. cmds = kcalloc(nr_cmds, sizeof(struct nvmet_rdma_cmd), GFP_KERNEL);
  274. if (!cmds)
  275. goto out;
  276. for (i = 0; i < nr_cmds; i++) {
  277. ret = nvmet_rdma_alloc_cmd(ndev, cmds + i, admin);
  278. if (ret)
  279. goto out_free;
  280. }
  281. return cmds;
  282. out_free:
  283. while (--i >= 0)
  284. nvmet_rdma_free_cmd(ndev, cmds + i, admin);
  285. kfree(cmds);
  286. out:
  287. return ERR_PTR(ret);
  288. }
  289. static void nvmet_rdma_free_cmds(struct nvmet_rdma_device *ndev,
  290. struct nvmet_rdma_cmd *cmds, int nr_cmds, bool admin)
  291. {
  292. int i;
  293. for (i = 0; i < nr_cmds; i++)
  294. nvmet_rdma_free_cmd(ndev, cmds + i, admin);
  295. kfree(cmds);
  296. }
  297. static int nvmet_rdma_alloc_rsp(struct nvmet_rdma_device *ndev,
  298. struct nvmet_rdma_rsp *r)
  299. {
  300. /* NVMe CQE / RDMA SEND */
  301. r->req.rsp = kmalloc(sizeof(*r->req.rsp), GFP_KERNEL);
  302. if (!r->req.rsp)
  303. goto out;
  304. r->send_sge.addr = ib_dma_map_single(ndev->device, r->req.rsp,
  305. sizeof(*r->req.rsp), DMA_TO_DEVICE);
  306. if (ib_dma_mapping_error(ndev->device, r->send_sge.addr))
  307. goto out_free_rsp;
  308. r->send_sge.length = sizeof(*r->req.rsp);
  309. r->send_sge.lkey = ndev->pd->local_dma_lkey;
  310. r->send_cqe.done = nvmet_rdma_send_done;
  311. r->send_wr.wr_cqe = &r->send_cqe;
  312. r->send_wr.sg_list = &r->send_sge;
  313. r->send_wr.num_sge = 1;
  314. r->send_wr.send_flags = IB_SEND_SIGNALED;
  315. /* Data In / RDMA READ */
  316. r->read_cqe.done = nvmet_rdma_read_data_done;
  317. return 0;
  318. out_free_rsp:
  319. kfree(r->req.rsp);
  320. out:
  321. return -ENOMEM;
  322. }
  323. static void nvmet_rdma_free_rsp(struct nvmet_rdma_device *ndev,
  324. struct nvmet_rdma_rsp *r)
  325. {
  326. ib_dma_unmap_single(ndev->device, r->send_sge.addr,
  327. sizeof(*r->req.rsp), DMA_TO_DEVICE);
  328. kfree(r->req.rsp);
  329. }
  330. static int
  331. nvmet_rdma_alloc_rsps(struct nvmet_rdma_queue *queue)
  332. {
  333. struct nvmet_rdma_device *ndev = queue->dev;
  334. int nr_rsps = queue->recv_queue_size * 2;
  335. int ret = -EINVAL, i;
  336. queue->rsps = kcalloc(nr_rsps, sizeof(struct nvmet_rdma_rsp),
  337. GFP_KERNEL);
  338. if (!queue->rsps)
  339. goto out;
  340. for (i = 0; i < nr_rsps; i++) {
  341. struct nvmet_rdma_rsp *rsp = &queue->rsps[i];
  342. ret = nvmet_rdma_alloc_rsp(ndev, rsp);
  343. if (ret)
  344. goto out_free;
  345. list_add_tail(&rsp->free_list, &queue->free_rsps);
  346. }
  347. return 0;
  348. out_free:
  349. while (--i >= 0) {
  350. struct nvmet_rdma_rsp *rsp = &queue->rsps[i];
  351. list_del(&rsp->free_list);
  352. nvmet_rdma_free_rsp(ndev, rsp);
  353. }
  354. kfree(queue->rsps);
  355. out:
  356. return ret;
  357. }
  358. static void nvmet_rdma_free_rsps(struct nvmet_rdma_queue *queue)
  359. {
  360. struct nvmet_rdma_device *ndev = queue->dev;
  361. int i, nr_rsps = queue->recv_queue_size * 2;
  362. for (i = 0; i < nr_rsps; i++) {
  363. struct nvmet_rdma_rsp *rsp = &queue->rsps[i];
  364. list_del(&rsp->free_list);
  365. nvmet_rdma_free_rsp(ndev, rsp);
  366. }
  367. kfree(queue->rsps);
  368. }
  369. static int nvmet_rdma_post_recv(struct nvmet_rdma_device *ndev,
  370. struct nvmet_rdma_cmd *cmd)
  371. {
  372. int ret;
  373. ib_dma_sync_single_for_device(ndev->device,
  374. cmd->sge[0].addr, cmd->sge[0].length,
  375. DMA_FROM_DEVICE);
  376. if (ndev->srq)
  377. ret = ib_post_srq_recv(ndev->srq, &cmd->wr, NULL);
  378. else
  379. ret = ib_post_recv(cmd->queue->cm_id->qp, &cmd->wr, NULL);
  380. if (unlikely(ret))
  381. pr_err("post_recv cmd failed\n");
  382. return ret;
  383. }
  384. static void nvmet_rdma_process_wr_wait_list(struct nvmet_rdma_queue *queue)
  385. {
  386. spin_lock(&queue->rsp_wr_wait_lock);
  387. while (!list_empty(&queue->rsp_wr_wait_list)) {
  388. struct nvmet_rdma_rsp *rsp;
  389. bool ret;
  390. rsp = list_entry(queue->rsp_wr_wait_list.next,
  391. struct nvmet_rdma_rsp, wait_list);
  392. list_del(&rsp->wait_list);
  393. spin_unlock(&queue->rsp_wr_wait_lock);
  394. ret = nvmet_rdma_execute_command(rsp);
  395. spin_lock(&queue->rsp_wr_wait_lock);
  396. if (!ret) {
  397. list_add(&rsp->wait_list, &queue->rsp_wr_wait_list);
  398. break;
  399. }
  400. }
  401. spin_unlock(&queue->rsp_wr_wait_lock);
  402. }
  403. static void nvmet_rdma_release_rsp(struct nvmet_rdma_rsp *rsp)
  404. {
  405. struct nvmet_rdma_queue *queue = rsp->queue;
  406. atomic_add(1 + rsp->n_rdma, &queue->sq_wr_avail);
  407. if (rsp->n_rdma) {
  408. rdma_rw_ctx_destroy(&rsp->rw, queue->cm_id->qp,
  409. queue->cm_id->port_num, rsp->req.sg,
  410. rsp->req.sg_cnt, nvmet_data_dir(&rsp->req));
  411. }
  412. if (rsp->req.sg != rsp->cmd->inline_sg)
  413. nvmet_req_free_sgl(&rsp->req);
  414. if (unlikely(!list_empty_careful(&queue->rsp_wr_wait_list)))
  415. nvmet_rdma_process_wr_wait_list(queue);
  416. nvmet_rdma_put_rsp(rsp);
  417. }
  418. static void nvmet_rdma_error_comp(struct nvmet_rdma_queue *queue)
  419. {
  420. if (queue->nvme_sq.ctrl) {
  421. nvmet_ctrl_fatal_error(queue->nvme_sq.ctrl);
  422. } else {
  423. /*
  424. * we didn't setup the controller yet in case
  425. * of admin connect error, just disconnect and
  426. * cleanup the queue
  427. */
  428. nvmet_rdma_queue_disconnect(queue);
  429. }
  430. }
  431. static void nvmet_rdma_send_done(struct ib_cq *cq, struct ib_wc *wc)
  432. {
  433. struct nvmet_rdma_rsp *rsp =
  434. container_of(wc->wr_cqe, struct nvmet_rdma_rsp, send_cqe);
  435. struct nvmet_rdma_queue *queue = cq->cq_context;
  436. nvmet_rdma_release_rsp(rsp);
  437. if (unlikely(wc->status != IB_WC_SUCCESS &&
  438. wc->status != IB_WC_WR_FLUSH_ERR)) {
  439. pr_err("SEND for CQE 0x%p failed with status %s (%d).\n",
  440. wc->wr_cqe, ib_wc_status_msg(wc->status), wc->status);
  441. nvmet_rdma_error_comp(queue);
  442. }
  443. }
  444. static void nvmet_rdma_queue_response(struct nvmet_req *req)
  445. {
  446. struct nvmet_rdma_rsp *rsp =
  447. container_of(req, struct nvmet_rdma_rsp, req);
  448. struct rdma_cm_id *cm_id = rsp->queue->cm_id;
  449. struct ib_send_wr *first_wr;
  450. if (rsp->flags & NVMET_RDMA_REQ_INVALIDATE_RKEY) {
  451. rsp->send_wr.opcode = IB_WR_SEND_WITH_INV;
  452. rsp->send_wr.ex.invalidate_rkey = rsp->invalidate_rkey;
  453. } else {
  454. rsp->send_wr.opcode = IB_WR_SEND;
  455. }
  456. if (nvmet_rdma_need_data_out(rsp))
  457. first_wr = rdma_rw_ctx_wrs(&rsp->rw, cm_id->qp,
  458. cm_id->port_num, NULL, &rsp->send_wr);
  459. else
  460. first_wr = &rsp->send_wr;
  461. nvmet_rdma_post_recv(rsp->queue->dev, rsp->cmd);
  462. ib_dma_sync_single_for_device(rsp->queue->dev->device,
  463. rsp->send_sge.addr, rsp->send_sge.length,
  464. DMA_TO_DEVICE);
  465. if (unlikely(ib_post_send(cm_id->qp, first_wr, NULL))) {
  466. pr_err("sending cmd response failed\n");
  467. nvmet_rdma_release_rsp(rsp);
  468. }
  469. }
  470. static void nvmet_rdma_read_data_done(struct ib_cq *cq, struct ib_wc *wc)
  471. {
  472. struct nvmet_rdma_rsp *rsp =
  473. container_of(wc->wr_cqe, struct nvmet_rdma_rsp, read_cqe);
  474. struct nvmet_rdma_queue *queue = cq->cq_context;
  475. WARN_ON(rsp->n_rdma <= 0);
  476. atomic_add(rsp->n_rdma, &queue->sq_wr_avail);
  477. rdma_rw_ctx_destroy(&rsp->rw, queue->cm_id->qp,
  478. queue->cm_id->port_num, rsp->req.sg,
  479. rsp->req.sg_cnt, nvmet_data_dir(&rsp->req));
  480. rsp->n_rdma = 0;
  481. if (unlikely(wc->status != IB_WC_SUCCESS)) {
  482. nvmet_req_uninit(&rsp->req);
  483. nvmet_rdma_release_rsp(rsp);
  484. if (wc->status != IB_WC_WR_FLUSH_ERR) {
  485. pr_info("RDMA READ for CQE 0x%p failed with status %s (%d).\n",
  486. wc->wr_cqe, ib_wc_status_msg(wc->status), wc->status);
  487. nvmet_rdma_error_comp(queue);
  488. }
  489. return;
  490. }
  491. nvmet_req_execute(&rsp->req);
  492. }
  493. static void nvmet_rdma_use_inline_sg(struct nvmet_rdma_rsp *rsp, u32 len,
  494. u64 off)
  495. {
  496. int sg_count = num_pages(len);
  497. struct scatterlist *sg;
  498. int i;
  499. sg = rsp->cmd->inline_sg;
  500. for (i = 0; i < sg_count; i++, sg++) {
  501. if (i < sg_count - 1)
  502. sg_unmark_end(sg);
  503. else
  504. sg_mark_end(sg);
  505. sg->offset = off;
  506. sg->length = min_t(int, len, PAGE_SIZE - off);
  507. len -= sg->length;
  508. if (!i)
  509. off = 0;
  510. }
  511. rsp->req.sg = rsp->cmd->inline_sg;
  512. rsp->req.sg_cnt = sg_count;
  513. }
  514. static u16 nvmet_rdma_map_sgl_inline(struct nvmet_rdma_rsp *rsp)
  515. {
  516. struct nvme_sgl_desc *sgl = &rsp->req.cmd->common.dptr.sgl;
  517. u64 off = le64_to_cpu(sgl->addr);
  518. u32 len = le32_to_cpu(sgl->length);
  519. if (!nvme_is_write(rsp->req.cmd))
  520. return NVME_SC_INVALID_FIELD | NVME_SC_DNR;
  521. if (off + len > rsp->queue->dev->inline_data_size) {
  522. pr_err("invalid inline data offset!\n");
  523. return NVME_SC_SGL_INVALID_OFFSET | NVME_SC_DNR;
  524. }
  525. /* no data command? */
  526. if (!len)
  527. return 0;
  528. nvmet_rdma_use_inline_sg(rsp, len, off);
  529. rsp->flags |= NVMET_RDMA_REQ_INLINE_DATA;
  530. rsp->req.transfer_len += len;
  531. return 0;
  532. }
  533. static u16 nvmet_rdma_map_sgl_keyed(struct nvmet_rdma_rsp *rsp,
  534. struct nvme_keyed_sgl_desc *sgl, bool invalidate)
  535. {
  536. struct rdma_cm_id *cm_id = rsp->queue->cm_id;
  537. u64 addr = le64_to_cpu(sgl->addr);
  538. u32 key = get_unaligned_le32(sgl->key);
  539. int ret;
  540. rsp->req.transfer_len = get_unaligned_le24(sgl->length);
  541. /* no data command? */
  542. if (!rsp->req.transfer_len)
  543. return 0;
  544. ret = nvmet_req_alloc_sgl(&rsp->req);
  545. if (ret < 0)
  546. goto error_out;
  547. ret = rdma_rw_ctx_init(&rsp->rw, cm_id->qp, cm_id->port_num,
  548. rsp->req.sg, rsp->req.sg_cnt, 0, addr, key,
  549. nvmet_data_dir(&rsp->req));
  550. if (ret < 0)
  551. goto error_out;
  552. rsp->n_rdma += ret;
  553. if (invalidate) {
  554. rsp->invalidate_rkey = key;
  555. rsp->flags |= NVMET_RDMA_REQ_INVALIDATE_RKEY;
  556. }
  557. return 0;
  558. error_out:
  559. rsp->req.transfer_len = 0;
  560. return NVME_SC_INTERNAL;
  561. }
  562. static u16 nvmet_rdma_map_sgl(struct nvmet_rdma_rsp *rsp)
  563. {
  564. struct nvme_keyed_sgl_desc *sgl = &rsp->req.cmd->common.dptr.ksgl;
  565. switch (sgl->type >> 4) {
  566. case NVME_SGL_FMT_DATA_DESC:
  567. switch (sgl->type & 0xf) {
  568. case NVME_SGL_FMT_OFFSET:
  569. return nvmet_rdma_map_sgl_inline(rsp);
  570. default:
  571. pr_err("invalid SGL subtype: %#x\n", sgl->type);
  572. return NVME_SC_INVALID_FIELD | NVME_SC_DNR;
  573. }
  574. case NVME_KEY_SGL_FMT_DATA_DESC:
  575. switch (sgl->type & 0xf) {
  576. case NVME_SGL_FMT_ADDRESS | NVME_SGL_FMT_INVALIDATE:
  577. return nvmet_rdma_map_sgl_keyed(rsp, sgl, true);
  578. case NVME_SGL_FMT_ADDRESS:
  579. return nvmet_rdma_map_sgl_keyed(rsp, sgl, false);
  580. default:
  581. pr_err("invalid SGL subtype: %#x\n", sgl->type);
  582. return NVME_SC_INVALID_FIELD | NVME_SC_DNR;
  583. }
  584. default:
  585. pr_err("invalid SGL type: %#x\n", sgl->type);
  586. return NVME_SC_SGL_INVALID_TYPE | NVME_SC_DNR;
  587. }
  588. }
  589. static bool nvmet_rdma_execute_command(struct nvmet_rdma_rsp *rsp)
  590. {
  591. struct nvmet_rdma_queue *queue = rsp->queue;
  592. if (unlikely(atomic_sub_return(1 + rsp->n_rdma,
  593. &queue->sq_wr_avail) < 0)) {
  594. pr_debug("IB send queue full (needed %d): queue %u cntlid %u\n",
  595. 1 + rsp->n_rdma, queue->idx,
  596. queue->nvme_sq.ctrl->cntlid);
  597. atomic_add(1 + rsp->n_rdma, &queue->sq_wr_avail);
  598. return false;
  599. }
  600. if (nvmet_rdma_need_data_in(rsp)) {
  601. if (rdma_rw_ctx_post(&rsp->rw, queue->cm_id->qp,
  602. queue->cm_id->port_num, &rsp->read_cqe, NULL))
  603. nvmet_req_complete(&rsp->req, NVME_SC_DATA_XFER_ERROR);
  604. } else {
  605. nvmet_req_execute(&rsp->req);
  606. }
  607. return true;
  608. }
  609. static void nvmet_rdma_handle_command(struct nvmet_rdma_queue *queue,
  610. struct nvmet_rdma_rsp *cmd)
  611. {
  612. u16 status;
  613. ib_dma_sync_single_for_cpu(queue->dev->device,
  614. cmd->cmd->sge[0].addr, cmd->cmd->sge[0].length,
  615. DMA_FROM_DEVICE);
  616. ib_dma_sync_single_for_cpu(queue->dev->device,
  617. cmd->send_sge.addr, cmd->send_sge.length,
  618. DMA_TO_DEVICE);
  619. cmd->req.p2p_client = &queue->dev->device->dev;
  620. if (!nvmet_req_init(&cmd->req, &queue->nvme_cq,
  621. &queue->nvme_sq, &nvmet_rdma_ops))
  622. return;
  623. status = nvmet_rdma_map_sgl(cmd);
  624. if (status)
  625. goto out_err;
  626. if (unlikely(!nvmet_rdma_execute_command(cmd))) {
  627. spin_lock(&queue->rsp_wr_wait_lock);
  628. list_add_tail(&cmd->wait_list, &queue->rsp_wr_wait_list);
  629. spin_unlock(&queue->rsp_wr_wait_lock);
  630. }
  631. return;
  632. out_err:
  633. nvmet_req_complete(&cmd->req, status);
  634. }
  635. static void nvmet_rdma_recv_done(struct ib_cq *cq, struct ib_wc *wc)
  636. {
  637. struct nvmet_rdma_cmd *cmd =
  638. container_of(wc->wr_cqe, struct nvmet_rdma_cmd, cqe);
  639. struct nvmet_rdma_queue *queue = cq->cq_context;
  640. struct nvmet_rdma_rsp *rsp;
  641. if (unlikely(wc->status != IB_WC_SUCCESS)) {
  642. if (wc->status != IB_WC_WR_FLUSH_ERR) {
  643. pr_err("RECV for CQE 0x%p failed with status %s (%d)\n",
  644. wc->wr_cqe, ib_wc_status_msg(wc->status),
  645. wc->status);
  646. nvmet_rdma_error_comp(queue);
  647. }
  648. return;
  649. }
  650. if (unlikely(wc->byte_len < sizeof(struct nvme_command))) {
  651. pr_err("Ctrl Fatal Error: capsule size less than 64 bytes\n");
  652. nvmet_rdma_error_comp(queue);
  653. return;
  654. }
  655. cmd->queue = queue;
  656. rsp = nvmet_rdma_get_rsp(queue);
  657. if (unlikely(!rsp)) {
  658. /*
  659. * we get here only under memory pressure,
  660. * silently drop and have the host retry
  661. * as we can't even fail it.
  662. */
  663. nvmet_rdma_post_recv(queue->dev, cmd);
  664. return;
  665. }
  666. rsp->queue = queue;
  667. rsp->cmd = cmd;
  668. rsp->flags = 0;
  669. rsp->req.cmd = cmd->nvme_cmd;
  670. rsp->req.port = queue->port;
  671. rsp->n_rdma = 0;
  672. if (unlikely(queue->state != NVMET_RDMA_Q_LIVE)) {
  673. unsigned long flags;
  674. spin_lock_irqsave(&queue->state_lock, flags);
  675. if (queue->state == NVMET_RDMA_Q_CONNECTING)
  676. list_add_tail(&rsp->wait_list, &queue->rsp_wait_list);
  677. else
  678. nvmet_rdma_put_rsp(rsp);
  679. spin_unlock_irqrestore(&queue->state_lock, flags);
  680. return;
  681. }
  682. nvmet_rdma_handle_command(queue, rsp);
  683. }
  684. static void nvmet_rdma_destroy_srq(struct nvmet_rdma_device *ndev)
  685. {
  686. if (!ndev->srq)
  687. return;
  688. nvmet_rdma_free_cmds(ndev, ndev->srq_cmds, ndev->srq_size, false);
  689. ib_destroy_srq(ndev->srq);
  690. }
  691. static int nvmet_rdma_init_srq(struct nvmet_rdma_device *ndev)
  692. {
  693. struct ib_srq_init_attr srq_attr = { NULL, };
  694. struct ib_srq *srq;
  695. size_t srq_size;
  696. int ret, i;
  697. srq_size = 4095; /* XXX: tune */
  698. srq_attr.attr.max_wr = srq_size;
  699. srq_attr.attr.max_sge = 1 + ndev->inline_page_count;
  700. srq_attr.attr.srq_limit = 0;
  701. srq_attr.srq_type = IB_SRQT_BASIC;
  702. srq = ib_create_srq(ndev->pd, &srq_attr);
  703. if (IS_ERR(srq)) {
  704. /*
  705. * If SRQs aren't supported we just go ahead and use normal
  706. * non-shared receive queues.
  707. */
  708. pr_info("SRQ requested but not supported.\n");
  709. return 0;
  710. }
  711. ndev->srq_cmds = nvmet_rdma_alloc_cmds(ndev, srq_size, false);
  712. if (IS_ERR(ndev->srq_cmds)) {
  713. ret = PTR_ERR(ndev->srq_cmds);
  714. goto out_destroy_srq;
  715. }
  716. ndev->srq = srq;
  717. ndev->srq_size = srq_size;
  718. for (i = 0; i < srq_size; i++) {
  719. ret = nvmet_rdma_post_recv(ndev, &ndev->srq_cmds[i]);
  720. if (ret)
  721. goto out_free_cmds;
  722. }
  723. return 0;
  724. out_free_cmds:
  725. nvmet_rdma_free_cmds(ndev, ndev->srq_cmds, ndev->srq_size, false);
  726. out_destroy_srq:
  727. ib_destroy_srq(srq);
  728. return ret;
  729. }
  730. static void nvmet_rdma_free_dev(struct kref *ref)
  731. {
  732. struct nvmet_rdma_device *ndev =
  733. container_of(ref, struct nvmet_rdma_device, ref);
  734. mutex_lock(&device_list_mutex);
  735. list_del(&ndev->entry);
  736. mutex_unlock(&device_list_mutex);
  737. nvmet_rdma_destroy_srq(ndev);
  738. ib_dealloc_pd(ndev->pd);
  739. kfree(ndev);
  740. }
  741. static struct nvmet_rdma_device *
  742. nvmet_rdma_find_get_device(struct rdma_cm_id *cm_id)
  743. {
  744. struct nvmet_port *port = cm_id->context;
  745. struct nvmet_rdma_device *ndev;
  746. int inline_page_count;
  747. int inline_sge_count;
  748. int ret;
  749. mutex_lock(&device_list_mutex);
  750. list_for_each_entry(ndev, &device_list, entry) {
  751. if (ndev->device->node_guid == cm_id->device->node_guid &&
  752. kref_get_unless_zero(&ndev->ref))
  753. goto out_unlock;
  754. }
  755. ndev = kzalloc(sizeof(*ndev), GFP_KERNEL);
  756. if (!ndev)
  757. goto out_err;
  758. inline_page_count = num_pages(port->inline_data_size);
  759. inline_sge_count = max(cm_id->device->attrs.max_sge_rd,
  760. cm_id->device->attrs.max_recv_sge) - 1;
  761. if (inline_page_count > inline_sge_count) {
  762. pr_warn("inline_data_size %d cannot be supported by device %s. Reducing to %lu.\n",
  763. port->inline_data_size, cm_id->device->name,
  764. inline_sge_count * PAGE_SIZE);
  765. port->inline_data_size = inline_sge_count * PAGE_SIZE;
  766. inline_page_count = inline_sge_count;
  767. }
  768. ndev->inline_data_size = port->inline_data_size;
  769. ndev->inline_page_count = inline_page_count;
  770. ndev->device = cm_id->device;
  771. kref_init(&ndev->ref);
  772. ndev->pd = ib_alloc_pd(ndev->device, 0);
  773. if (IS_ERR(ndev->pd))
  774. goto out_free_dev;
  775. if (nvmet_rdma_use_srq) {
  776. ret = nvmet_rdma_init_srq(ndev);
  777. if (ret)
  778. goto out_free_pd;
  779. }
  780. list_add(&ndev->entry, &device_list);
  781. out_unlock:
  782. mutex_unlock(&device_list_mutex);
  783. pr_debug("added %s.\n", ndev->device->name);
  784. return ndev;
  785. out_free_pd:
  786. ib_dealloc_pd(ndev->pd);
  787. out_free_dev:
  788. kfree(ndev);
  789. out_err:
  790. mutex_unlock(&device_list_mutex);
  791. return NULL;
  792. }
  793. static int nvmet_rdma_create_queue_ib(struct nvmet_rdma_queue *queue)
  794. {
  795. struct ib_qp_init_attr qp_attr;
  796. struct nvmet_rdma_device *ndev = queue->dev;
  797. int comp_vector, nr_cqe, ret, i;
  798. /*
  799. * Spread the io queues across completion vectors,
  800. * but still keep all admin queues on vector 0.
  801. */
  802. comp_vector = !queue->host_qid ? 0 :
  803. queue->idx % ndev->device->num_comp_vectors;
  804. /*
  805. * Reserve CQ slots for RECV + RDMA_READ/RDMA_WRITE + RDMA_SEND.
  806. */
  807. nr_cqe = queue->recv_queue_size + 2 * queue->send_queue_size;
  808. queue->cq = ib_alloc_cq(ndev->device, queue,
  809. nr_cqe + 1, comp_vector,
  810. IB_POLL_WORKQUEUE);
  811. if (IS_ERR(queue->cq)) {
  812. ret = PTR_ERR(queue->cq);
  813. pr_err("failed to create CQ cqe= %d ret= %d\n",
  814. nr_cqe + 1, ret);
  815. goto out;
  816. }
  817. memset(&qp_attr, 0, sizeof(qp_attr));
  818. qp_attr.qp_context = queue;
  819. qp_attr.event_handler = nvmet_rdma_qp_event;
  820. qp_attr.send_cq = queue->cq;
  821. qp_attr.recv_cq = queue->cq;
  822. qp_attr.sq_sig_type = IB_SIGNAL_REQ_WR;
  823. qp_attr.qp_type = IB_QPT_RC;
  824. /* +1 for drain */
  825. qp_attr.cap.max_send_wr = queue->send_queue_size + 1;
  826. qp_attr.cap.max_rdma_ctxs = queue->send_queue_size;
  827. qp_attr.cap.max_send_sge = max(ndev->device->attrs.max_sge_rd,
  828. ndev->device->attrs.max_send_sge);
  829. if (ndev->srq) {
  830. qp_attr.srq = ndev->srq;
  831. } else {
  832. /* +1 for drain */
  833. qp_attr.cap.max_recv_wr = 1 + queue->recv_queue_size;
  834. qp_attr.cap.max_recv_sge = 1 + ndev->inline_page_count;
  835. }
  836. ret = rdma_create_qp(queue->cm_id, ndev->pd, &qp_attr);
  837. if (ret) {
  838. pr_err("failed to create_qp ret= %d\n", ret);
  839. goto err_destroy_cq;
  840. }
  841. atomic_set(&queue->sq_wr_avail, qp_attr.cap.max_send_wr);
  842. pr_debug("%s: max_cqe= %d max_sge= %d sq_size = %d cm_id= %p\n",
  843. __func__, queue->cq->cqe, qp_attr.cap.max_send_sge,
  844. qp_attr.cap.max_send_wr, queue->cm_id);
  845. if (!ndev->srq) {
  846. for (i = 0; i < queue->recv_queue_size; i++) {
  847. queue->cmds[i].queue = queue;
  848. ret = nvmet_rdma_post_recv(ndev, &queue->cmds[i]);
  849. if (ret)
  850. goto err_destroy_qp;
  851. }
  852. }
  853. out:
  854. return ret;
  855. err_destroy_qp:
  856. rdma_destroy_qp(queue->cm_id);
  857. err_destroy_cq:
  858. ib_free_cq(queue->cq);
  859. goto out;
  860. }
  861. static void nvmet_rdma_destroy_queue_ib(struct nvmet_rdma_queue *queue)
  862. {
  863. struct ib_qp *qp = queue->cm_id->qp;
  864. ib_drain_qp(qp);
  865. rdma_destroy_id(queue->cm_id);
  866. ib_destroy_qp(qp);
  867. ib_free_cq(queue->cq);
  868. }
  869. static void nvmet_rdma_free_queue(struct nvmet_rdma_queue *queue)
  870. {
  871. pr_debug("freeing queue %d\n", queue->idx);
  872. nvmet_sq_destroy(&queue->nvme_sq);
  873. nvmet_rdma_destroy_queue_ib(queue);
  874. if (!queue->dev->srq) {
  875. nvmet_rdma_free_cmds(queue->dev, queue->cmds,
  876. queue->recv_queue_size,
  877. !queue->host_qid);
  878. }
  879. nvmet_rdma_free_rsps(queue);
  880. ida_simple_remove(&nvmet_rdma_queue_ida, queue->idx);
  881. kfree(queue);
  882. }
  883. static void nvmet_rdma_release_queue_work(struct work_struct *w)
  884. {
  885. struct nvmet_rdma_queue *queue =
  886. container_of(w, struct nvmet_rdma_queue, release_work);
  887. struct nvmet_rdma_device *dev = queue->dev;
  888. nvmet_rdma_free_queue(queue);
  889. kref_put(&dev->ref, nvmet_rdma_free_dev);
  890. }
  891. static int
  892. nvmet_rdma_parse_cm_connect_req(struct rdma_conn_param *conn,
  893. struct nvmet_rdma_queue *queue)
  894. {
  895. struct nvme_rdma_cm_req *req;
  896. req = (struct nvme_rdma_cm_req *)conn->private_data;
  897. if (!req || conn->private_data_len == 0)
  898. return NVME_RDMA_CM_INVALID_LEN;
  899. if (le16_to_cpu(req->recfmt) != NVME_RDMA_CM_FMT_1_0)
  900. return NVME_RDMA_CM_INVALID_RECFMT;
  901. queue->host_qid = le16_to_cpu(req->qid);
  902. /*
  903. * req->hsqsize corresponds to our recv queue size plus 1
  904. * req->hrqsize corresponds to our send queue size
  905. */
  906. queue->recv_queue_size = le16_to_cpu(req->hsqsize) + 1;
  907. queue->send_queue_size = le16_to_cpu(req->hrqsize);
  908. if (!queue->host_qid && queue->recv_queue_size > NVME_AQ_DEPTH)
  909. return NVME_RDMA_CM_INVALID_HSQSIZE;
  910. /* XXX: Should we enforce some kind of max for IO queues? */
  911. return 0;
  912. }
  913. static int nvmet_rdma_cm_reject(struct rdma_cm_id *cm_id,
  914. enum nvme_rdma_cm_status status)
  915. {
  916. struct nvme_rdma_cm_rej rej;
  917. pr_debug("rejecting connect request: status %d (%s)\n",
  918. status, nvme_rdma_cm_msg(status));
  919. rej.recfmt = cpu_to_le16(NVME_RDMA_CM_FMT_1_0);
  920. rej.sts = cpu_to_le16(status);
  921. return rdma_reject(cm_id, (void *)&rej, sizeof(rej));
  922. }
  923. static struct nvmet_rdma_queue *
  924. nvmet_rdma_alloc_queue(struct nvmet_rdma_device *ndev,
  925. struct rdma_cm_id *cm_id,
  926. struct rdma_cm_event *event)
  927. {
  928. struct nvmet_rdma_queue *queue;
  929. int ret;
  930. queue = kzalloc(sizeof(*queue), GFP_KERNEL);
  931. if (!queue) {
  932. ret = NVME_RDMA_CM_NO_RSC;
  933. goto out_reject;
  934. }
  935. ret = nvmet_sq_init(&queue->nvme_sq);
  936. if (ret) {
  937. ret = NVME_RDMA_CM_NO_RSC;
  938. goto out_free_queue;
  939. }
  940. ret = nvmet_rdma_parse_cm_connect_req(&event->param.conn, queue);
  941. if (ret)
  942. goto out_destroy_sq;
  943. /*
  944. * Schedules the actual release because calling rdma_destroy_id from
  945. * inside a CM callback would trigger a deadlock. (great API design..)
  946. */
  947. INIT_WORK(&queue->release_work, nvmet_rdma_release_queue_work);
  948. queue->dev = ndev;
  949. queue->cm_id = cm_id;
  950. spin_lock_init(&queue->state_lock);
  951. queue->state = NVMET_RDMA_Q_CONNECTING;
  952. INIT_LIST_HEAD(&queue->rsp_wait_list);
  953. INIT_LIST_HEAD(&queue->rsp_wr_wait_list);
  954. spin_lock_init(&queue->rsp_wr_wait_lock);
  955. INIT_LIST_HEAD(&queue->free_rsps);
  956. spin_lock_init(&queue->rsps_lock);
  957. INIT_LIST_HEAD(&queue->queue_list);
  958. queue->idx = ida_simple_get(&nvmet_rdma_queue_ida, 0, 0, GFP_KERNEL);
  959. if (queue->idx < 0) {
  960. ret = NVME_RDMA_CM_NO_RSC;
  961. goto out_destroy_sq;
  962. }
  963. ret = nvmet_rdma_alloc_rsps(queue);
  964. if (ret) {
  965. ret = NVME_RDMA_CM_NO_RSC;
  966. goto out_ida_remove;
  967. }
  968. if (!ndev->srq) {
  969. queue->cmds = nvmet_rdma_alloc_cmds(ndev,
  970. queue->recv_queue_size,
  971. !queue->host_qid);
  972. if (IS_ERR(queue->cmds)) {
  973. ret = NVME_RDMA_CM_NO_RSC;
  974. goto out_free_responses;
  975. }
  976. }
  977. ret = nvmet_rdma_create_queue_ib(queue);
  978. if (ret) {
  979. pr_err("%s: creating RDMA queue failed (%d).\n",
  980. __func__, ret);
  981. ret = NVME_RDMA_CM_NO_RSC;
  982. goto out_free_cmds;
  983. }
  984. return queue;
  985. out_free_cmds:
  986. if (!ndev->srq) {
  987. nvmet_rdma_free_cmds(queue->dev, queue->cmds,
  988. queue->recv_queue_size,
  989. !queue->host_qid);
  990. }
  991. out_free_responses:
  992. nvmet_rdma_free_rsps(queue);
  993. out_ida_remove:
  994. ida_simple_remove(&nvmet_rdma_queue_ida, queue->idx);
  995. out_destroy_sq:
  996. nvmet_sq_destroy(&queue->nvme_sq);
  997. out_free_queue:
  998. kfree(queue);
  999. out_reject:
  1000. nvmet_rdma_cm_reject(cm_id, ret);
  1001. return NULL;
  1002. }
  1003. static void nvmet_rdma_qp_event(struct ib_event *event, void *priv)
  1004. {
  1005. struct nvmet_rdma_queue *queue = priv;
  1006. switch (event->event) {
  1007. case IB_EVENT_COMM_EST:
  1008. rdma_notify(queue->cm_id, event->event);
  1009. break;
  1010. default:
  1011. pr_err("received IB QP event: %s (%d)\n",
  1012. ib_event_msg(event->event), event->event);
  1013. break;
  1014. }
  1015. }
  1016. static int nvmet_rdma_cm_accept(struct rdma_cm_id *cm_id,
  1017. struct nvmet_rdma_queue *queue,
  1018. struct rdma_conn_param *p)
  1019. {
  1020. struct rdma_conn_param param = { };
  1021. struct nvme_rdma_cm_rep priv = { };
  1022. int ret = -ENOMEM;
  1023. param.rnr_retry_count = 7;
  1024. param.flow_control = 1;
  1025. param.initiator_depth = min_t(u8, p->initiator_depth,
  1026. queue->dev->device->attrs.max_qp_init_rd_atom);
  1027. param.private_data = &priv;
  1028. param.private_data_len = sizeof(priv);
  1029. priv.recfmt = cpu_to_le16(NVME_RDMA_CM_FMT_1_0);
  1030. priv.crqsize = cpu_to_le16(queue->recv_queue_size);
  1031. ret = rdma_accept(cm_id, &param);
  1032. if (ret)
  1033. pr_err("rdma_accept failed (error code = %d)\n", ret);
  1034. return ret;
  1035. }
  1036. static int nvmet_rdma_queue_connect(struct rdma_cm_id *cm_id,
  1037. struct rdma_cm_event *event)
  1038. {
  1039. struct nvmet_rdma_device *ndev;
  1040. struct nvmet_rdma_queue *queue;
  1041. int ret = -EINVAL;
  1042. ndev = nvmet_rdma_find_get_device(cm_id);
  1043. if (!ndev) {
  1044. nvmet_rdma_cm_reject(cm_id, NVME_RDMA_CM_NO_RSC);
  1045. return -ECONNREFUSED;
  1046. }
  1047. queue = nvmet_rdma_alloc_queue(ndev, cm_id, event);
  1048. if (!queue) {
  1049. ret = -ENOMEM;
  1050. goto put_device;
  1051. }
  1052. queue->port = cm_id->context;
  1053. if (queue->host_qid == 0) {
  1054. /* Let inflight controller teardown complete */
  1055. flush_scheduled_work();
  1056. }
  1057. ret = nvmet_rdma_cm_accept(cm_id, queue, &event->param.conn);
  1058. if (ret) {
  1059. schedule_work(&queue->release_work);
  1060. /* Destroying rdma_cm id is not needed here */
  1061. return 0;
  1062. }
  1063. mutex_lock(&nvmet_rdma_queue_mutex);
  1064. list_add_tail(&queue->queue_list, &nvmet_rdma_queue_list);
  1065. mutex_unlock(&nvmet_rdma_queue_mutex);
  1066. return 0;
  1067. put_device:
  1068. kref_put(&ndev->ref, nvmet_rdma_free_dev);
  1069. return ret;
  1070. }
  1071. static void nvmet_rdma_queue_established(struct nvmet_rdma_queue *queue)
  1072. {
  1073. unsigned long flags;
  1074. spin_lock_irqsave(&queue->state_lock, flags);
  1075. if (queue->state != NVMET_RDMA_Q_CONNECTING) {
  1076. pr_warn("trying to establish a connected queue\n");
  1077. goto out_unlock;
  1078. }
  1079. queue->state = NVMET_RDMA_Q_LIVE;
  1080. while (!list_empty(&queue->rsp_wait_list)) {
  1081. struct nvmet_rdma_rsp *cmd;
  1082. cmd = list_first_entry(&queue->rsp_wait_list,
  1083. struct nvmet_rdma_rsp, wait_list);
  1084. list_del(&cmd->wait_list);
  1085. spin_unlock_irqrestore(&queue->state_lock, flags);
  1086. nvmet_rdma_handle_command(queue, cmd);
  1087. spin_lock_irqsave(&queue->state_lock, flags);
  1088. }
  1089. out_unlock:
  1090. spin_unlock_irqrestore(&queue->state_lock, flags);
  1091. }
  1092. static void __nvmet_rdma_queue_disconnect(struct nvmet_rdma_queue *queue)
  1093. {
  1094. bool disconnect = false;
  1095. unsigned long flags;
  1096. pr_debug("cm_id= %p queue->state= %d\n", queue->cm_id, queue->state);
  1097. spin_lock_irqsave(&queue->state_lock, flags);
  1098. switch (queue->state) {
  1099. case NVMET_RDMA_Q_CONNECTING:
  1100. case NVMET_RDMA_Q_LIVE:
  1101. queue->state = NVMET_RDMA_Q_DISCONNECTING;
  1102. disconnect = true;
  1103. break;
  1104. case NVMET_RDMA_Q_DISCONNECTING:
  1105. break;
  1106. }
  1107. spin_unlock_irqrestore(&queue->state_lock, flags);
  1108. if (disconnect) {
  1109. rdma_disconnect(queue->cm_id);
  1110. schedule_work(&queue->release_work);
  1111. }
  1112. }
  1113. static void nvmet_rdma_queue_disconnect(struct nvmet_rdma_queue *queue)
  1114. {
  1115. bool disconnect = false;
  1116. mutex_lock(&nvmet_rdma_queue_mutex);
  1117. if (!list_empty(&queue->queue_list)) {
  1118. list_del_init(&queue->queue_list);
  1119. disconnect = true;
  1120. }
  1121. mutex_unlock(&nvmet_rdma_queue_mutex);
  1122. if (disconnect)
  1123. __nvmet_rdma_queue_disconnect(queue);
  1124. }
  1125. static void nvmet_rdma_queue_connect_fail(struct rdma_cm_id *cm_id,
  1126. struct nvmet_rdma_queue *queue)
  1127. {
  1128. WARN_ON_ONCE(queue->state != NVMET_RDMA_Q_CONNECTING);
  1129. mutex_lock(&nvmet_rdma_queue_mutex);
  1130. if (!list_empty(&queue->queue_list))
  1131. list_del_init(&queue->queue_list);
  1132. mutex_unlock(&nvmet_rdma_queue_mutex);
  1133. pr_err("failed to connect queue %d\n", queue->idx);
  1134. schedule_work(&queue->release_work);
  1135. }
  1136. /**
  1137. * nvme_rdma_device_removal() - Handle RDMA device removal
  1138. * @cm_id: rdma_cm id, used for nvmet port
  1139. * @queue: nvmet rdma queue (cm id qp_context)
  1140. *
  1141. * DEVICE_REMOVAL event notifies us that the RDMA device is about
  1142. * to unplug. Note that this event can be generated on a normal
  1143. * queue cm_id and/or a device bound listener cm_id (where in this
  1144. * case queue will be null).
  1145. *
  1146. * We registered an ib_client to handle device removal for queues,
  1147. * so we only need to handle the listening port cm_ids. In this case
  1148. * we nullify the priv to prevent double cm_id destruction and destroying
  1149. * the cm_id implicitely by returning a non-zero rc to the callout.
  1150. */
  1151. static int nvmet_rdma_device_removal(struct rdma_cm_id *cm_id,
  1152. struct nvmet_rdma_queue *queue)
  1153. {
  1154. struct nvmet_port *port;
  1155. if (queue) {
  1156. /*
  1157. * This is a queue cm_id. we have registered
  1158. * an ib_client to handle queues removal
  1159. * so don't interfear and just return.
  1160. */
  1161. return 0;
  1162. }
  1163. port = cm_id->context;
  1164. /*
  1165. * This is a listener cm_id. Make sure that
  1166. * future remove_port won't invoke a double
  1167. * cm_id destroy. use atomic xchg to make sure
  1168. * we don't compete with remove_port.
  1169. */
  1170. if (xchg(&port->priv, NULL) != cm_id)
  1171. return 0;
  1172. /*
  1173. * We need to return 1 so that the core will destroy
  1174. * it's own ID. What a great API design..
  1175. */
  1176. return 1;
  1177. }
  1178. static int nvmet_rdma_cm_handler(struct rdma_cm_id *cm_id,
  1179. struct rdma_cm_event *event)
  1180. {
  1181. struct nvmet_rdma_queue *queue = NULL;
  1182. int ret = 0;
  1183. if (cm_id->qp)
  1184. queue = cm_id->qp->qp_context;
  1185. pr_debug("%s (%d): status %d id %p\n",
  1186. rdma_event_msg(event->event), event->event,
  1187. event->status, cm_id);
  1188. switch (event->event) {
  1189. case RDMA_CM_EVENT_CONNECT_REQUEST:
  1190. ret = nvmet_rdma_queue_connect(cm_id, event);
  1191. break;
  1192. case RDMA_CM_EVENT_ESTABLISHED:
  1193. nvmet_rdma_queue_established(queue);
  1194. break;
  1195. case RDMA_CM_EVENT_ADDR_CHANGE:
  1196. case RDMA_CM_EVENT_DISCONNECTED:
  1197. case RDMA_CM_EVENT_TIMEWAIT_EXIT:
  1198. nvmet_rdma_queue_disconnect(queue);
  1199. break;
  1200. case RDMA_CM_EVENT_DEVICE_REMOVAL:
  1201. ret = nvmet_rdma_device_removal(cm_id, queue);
  1202. break;
  1203. case RDMA_CM_EVENT_REJECTED:
  1204. pr_debug("Connection rejected: %s\n",
  1205. rdma_reject_msg(cm_id, event->status));
  1206. /* FALLTHROUGH */
  1207. case RDMA_CM_EVENT_UNREACHABLE:
  1208. case RDMA_CM_EVENT_CONNECT_ERROR:
  1209. nvmet_rdma_queue_connect_fail(cm_id, queue);
  1210. break;
  1211. default:
  1212. pr_err("received unrecognized RDMA CM event %d\n",
  1213. event->event);
  1214. break;
  1215. }
  1216. return ret;
  1217. }
  1218. static void nvmet_rdma_delete_ctrl(struct nvmet_ctrl *ctrl)
  1219. {
  1220. struct nvmet_rdma_queue *queue;
  1221. restart:
  1222. mutex_lock(&nvmet_rdma_queue_mutex);
  1223. list_for_each_entry(queue, &nvmet_rdma_queue_list, queue_list) {
  1224. if (queue->nvme_sq.ctrl == ctrl) {
  1225. list_del_init(&queue->queue_list);
  1226. mutex_unlock(&nvmet_rdma_queue_mutex);
  1227. __nvmet_rdma_queue_disconnect(queue);
  1228. goto restart;
  1229. }
  1230. }
  1231. mutex_unlock(&nvmet_rdma_queue_mutex);
  1232. }
  1233. static int nvmet_rdma_add_port(struct nvmet_port *port)
  1234. {
  1235. struct rdma_cm_id *cm_id;
  1236. struct sockaddr_storage addr = { };
  1237. __kernel_sa_family_t af;
  1238. int ret;
  1239. switch (port->disc_addr.adrfam) {
  1240. case NVMF_ADDR_FAMILY_IP4:
  1241. af = AF_INET;
  1242. break;
  1243. case NVMF_ADDR_FAMILY_IP6:
  1244. af = AF_INET6;
  1245. break;
  1246. default:
  1247. pr_err("address family %d not supported\n",
  1248. port->disc_addr.adrfam);
  1249. return -EINVAL;
  1250. }
  1251. if (port->inline_data_size < 0) {
  1252. port->inline_data_size = NVMET_RDMA_DEFAULT_INLINE_DATA_SIZE;
  1253. } else if (port->inline_data_size > NVMET_RDMA_MAX_INLINE_DATA_SIZE) {
  1254. pr_warn("inline_data_size %u is too large, reducing to %u\n",
  1255. port->inline_data_size,
  1256. NVMET_RDMA_MAX_INLINE_DATA_SIZE);
  1257. port->inline_data_size = NVMET_RDMA_MAX_INLINE_DATA_SIZE;
  1258. }
  1259. ret = inet_pton_with_scope(&init_net, af, port->disc_addr.traddr,
  1260. port->disc_addr.trsvcid, &addr);
  1261. if (ret) {
  1262. pr_err("malformed ip/port passed: %s:%s\n",
  1263. port->disc_addr.traddr, port->disc_addr.trsvcid);
  1264. return ret;
  1265. }
  1266. cm_id = rdma_create_id(&init_net, nvmet_rdma_cm_handler, port,
  1267. RDMA_PS_TCP, IB_QPT_RC);
  1268. if (IS_ERR(cm_id)) {
  1269. pr_err("CM ID creation failed\n");
  1270. return PTR_ERR(cm_id);
  1271. }
  1272. /*
  1273. * Allow both IPv4 and IPv6 sockets to bind a single port
  1274. * at the same time.
  1275. */
  1276. ret = rdma_set_afonly(cm_id, 1);
  1277. if (ret) {
  1278. pr_err("rdma_set_afonly failed (%d)\n", ret);
  1279. goto out_destroy_id;
  1280. }
  1281. ret = rdma_bind_addr(cm_id, (struct sockaddr *)&addr);
  1282. if (ret) {
  1283. pr_err("binding CM ID to %pISpcs failed (%d)\n",
  1284. (struct sockaddr *)&addr, ret);
  1285. goto out_destroy_id;
  1286. }
  1287. ret = rdma_listen(cm_id, 128);
  1288. if (ret) {
  1289. pr_err("listening to %pISpcs failed (%d)\n",
  1290. (struct sockaddr *)&addr, ret);
  1291. goto out_destroy_id;
  1292. }
  1293. pr_info("enabling port %d (%pISpcs)\n",
  1294. le16_to_cpu(port->disc_addr.portid), (struct sockaddr *)&addr);
  1295. port->priv = cm_id;
  1296. return 0;
  1297. out_destroy_id:
  1298. rdma_destroy_id(cm_id);
  1299. return ret;
  1300. }
  1301. static void nvmet_rdma_remove_port(struct nvmet_port *port)
  1302. {
  1303. struct rdma_cm_id *cm_id = xchg(&port->priv, NULL);
  1304. if (cm_id)
  1305. rdma_destroy_id(cm_id);
  1306. }
  1307. static void nvmet_rdma_disc_port_addr(struct nvmet_req *req,
  1308. struct nvmet_port *port, char *traddr)
  1309. {
  1310. struct rdma_cm_id *cm_id = port->priv;
  1311. if (inet_addr_is_any((struct sockaddr *)&cm_id->route.addr.src_addr)) {
  1312. struct nvmet_rdma_rsp *rsp =
  1313. container_of(req, struct nvmet_rdma_rsp, req);
  1314. struct rdma_cm_id *req_cm_id = rsp->queue->cm_id;
  1315. struct sockaddr *addr = (void *)&req_cm_id->route.addr.src_addr;
  1316. sprintf(traddr, "%pISc", addr);
  1317. } else {
  1318. memcpy(traddr, port->disc_addr.traddr, NVMF_TRADDR_SIZE);
  1319. }
  1320. }
  1321. static const struct nvmet_fabrics_ops nvmet_rdma_ops = {
  1322. .owner = THIS_MODULE,
  1323. .type = NVMF_TRTYPE_RDMA,
  1324. .msdbd = 1,
  1325. .has_keyed_sgls = 1,
  1326. .add_port = nvmet_rdma_add_port,
  1327. .remove_port = nvmet_rdma_remove_port,
  1328. .queue_response = nvmet_rdma_queue_response,
  1329. .delete_ctrl = nvmet_rdma_delete_ctrl,
  1330. .disc_traddr = nvmet_rdma_disc_port_addr,
  1331. };
  1332. static void nvmet_rdma_remove_one(struct ib_device *ib_device, void *client_data)
  1333. {
  1334. struct nvmet_rdma_queue *queue, *tmp;
  1335. struct nvmet_rdma_device *ndev;
  1336. bool found = false;
  1337. mutex_lock(&device_list_mutex);
  1338. list_for_each_entry(ndev, &device_list, entry) {
  1339. if (ndev->device == ib_device) {
  1340. found = true;
  1341. break;
  1342. }
  1343. }
  1344. mutex_unlock(&device_list_mutex);
  1345. if (!found)
  1346. return;
  1347. /*
  1348. * IB Device that is used by nvmet controllers is being removed,
  1349. * delete all queues using this device.
  1350. */
  1351. mutex_lock(&nvmet_rdma_queue_mutex);
  1352. list_for_each_entry_safe(queue, tmp, &nvmet_rdma_queue_list,
  1353. queue_list) {
  1354. if (queue->dev->device != ib_device)
  1355. continue;
  1356. pr_info("Removing queue %d\n", queue->idx);
  1357. list_del_init(&queue->queue_list);
  1358. __nvmet_rdma_queue_disconnect(queue);
  1359. }
  1360. mutex_unlock(&nvmet_rdma_queue_mutex);
  1361. flush_scheduled_work();
  1362. }
  1363. static struct ib_client nvmet_rdma_ib_client = {
  1364. .name = "nvmet_rdma",
  1365. .remove = nvmet_rdma_remove_one
  1366. };
  1367. static int __init nvmet_rdma_init(void)
  1368. {
  1369. int ret;
  1370. ret = ib_register_client(&nvmet_rdma_ib_client);
  1371. if (ret)
  1372. return ret;
  1373. ret = nvmet_register_transport(&nvmet_rdma_ops);
  1374. if (ret)
  1375. goto err_ib_client;
  1376. return 0;
  1377. err_ib_client:
  1378. ib_unregister_client(&nvmet_rdma_ib_client);
  1379. return ret;
  1380. }
  1381. static void __exit nvmet_rdma_exit(void)
  1382. {
  1383. nvmet_unregister_transport(&nvmet_rdma_ops);
  1384. ib_unregister_client(&nvmet_rdma_ib_client);
  1385. WARN_ON_ONCE(!list_empty(&nvmet_rdma_queue_list));
  1386. ida_destroy(&nvmet_rdma_queue_ida);
  1387. }
  1388. module_init(nvmet_rdma_init);
  1389. module_exit(nvmet_rdma_exit);
  1390. MODULE_LICENSE("GPL v2");
  1391. MODULE_ALIAS("nvmet-transport-1"); /* 1 == NVMF_TRTYPE_RDMA */