board-n8x0.c 12 KB

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  1. /*
  2. * linux/arch/arm/mach-omap2/board-n8x0.c
  3. *
  4. * Copyright (C) 2005-2009 Nokia Corporation
  5. * Author: Juha Yrjola <juha.yrjola@nokia.com>
  6. *
  7. * Modified from mach-omap2/board-generic.c
  8. *
  9. * This program is free software; you can redistribute it and/or modify
  10. * it under the terms of the GNU General Public License version 2 as
  11. * published by the Free Software Foundation.
  12. */
  13. #include <linux/clk.h>
  14. #include <linux/delay.h>
  15. #include <linux/gpio.h>
  16. #include <linux/init.h>
  17. #include <linux/io.h>
  18. #include <linux/stddef.h>
  19. #include <linux/i2c.h>
  20. #include <linux/spi/spi.h>
  21. #include <linux/usb/musb.h>
  22. #include <asm/mach/arch.h>
  23. #include <asm/mach-types.h>
  24. #include <plat/board.h>
  25. #include <plat/common.h>
  26. #include <plat/menelaus.h>
  27. #include <mach/irqs.h>
  28. #include <plat/mcspi.h>
  29. #include <plat/onenand.h>
  30. #include <plat/mmc.h>
  31. #include <plat/serial.h>
  32. static int slot1_cover_open;
  33. static int slot2_cover_open;
  34. static struct device *mmc_device;
  35. static struct omap2_mcspi_device_config p54spi_mcspi_config = {
  36. .turbo_mode = 0,
  37. .single_channel = 1,
  38. };
  39. static struct spi_board_info n800_spi_board_info[] __initdata = {
  40. {
  41. .modalias = "p54spi",
  42. .bus_num = 2,
  43. .chip_select = 0,
  44. .max_speed_hz = 48000000,
  45. .controller_data = &p54spi_mcspi_config,
  46. },
  47. };
  48. #if defined(CONFIG_MTD_ONENAND_OMAP2) || \
  49. defined(CONFIG_MTD_ONENAND_OMAP2_MODULE)
  50. static struct mtd_partition onenand_partitions[] = {
  51. {
  52. .name = "bootloader",
  53. .offset = 0,
  54. .size = 0x20000,
  55. .mask_flags = MTD_WRITEABLE, /* Force read-only */
  56. },
  57. {
  58. .name = "config",
  59. .offset = MTDPART_OFS_APPEND,
  60. .size = 0x60000,
  61. },
  62. {
  63. .name = "kernel",
  64. .offset = MTDPART_OFS_APPEND,
  65. .size = 0x200000,
  66. },
  67. {
  68. .name = "initfs",
  69. .offset = MTDPART_OFS_APPEND,
  70. .size = 0x400000,
  71. },
  72. {
  73. .name = "rootfs",
  74. .offset = MTDPART_OFS_APPEND,
  75. .size = MTDPART_SIZ_FULL,
  76. },
  77. };
  78. static struct omap_onenand_platform_data board_onenand_data = {
  79. .cs = 0,
  80. .gpio_irq = 26,
  81. .parts = onenand_partitions,
  82. .nr_parts = ARRAY_SIZE(onenand_partitions),
  83. .flags = ONENAND_SYNC_READ,
  84. };
  85. static void __init n8x0_onenand_init(void)
  86. {
  87. gpmc_onenand_init(&board_onenand_data);
  88. }
  89. #else
  90. static void __init n8x0_onenand_init(void) {}
  91. #endif
  92. #if defined(CONFIG_MENELAUS) && \
  93. (defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE))
  94. /*
  95. * On both N800 and N810, only the first of the two MMC controllers is in use.
  96. * The two MMC slots are multiplexed via Menelaus companion chip over I2C.
  97. * On N800, both slots are powered via Menelaus. On N810, only one of the
  98. * slots is powered via Menelaus. The N810 EMMC is powered via GPIO.
  99. *
  100. * VMMC slot 1 on both N800 and N810
  101. * VDCDC3_APE and VMCS2_APE slot 2 on N800
  102. * GPIO23 and GPIO9 slot 2 EMMC on N810
  103. *
  104. */
  105. #define N8X0_SLOT_SWITCH_GPIO 96
  106. #define N810_EMMC_VSD_GPIO 23
  107. #define NN810_EMMC_VIO_GPIO 9
  108. static int n8x0_mmc_switch_slot(struct device *dev, int slot)
  109. {
  110. #ifdef CONFIG_MMC_DEBUG
  111. dev_dbg(dev, "Choose slot %d\n", slot + 1);
  112. #endif
  113. gpio_set_value(N8X0_SLOT_SWITCH_GPIO, slot);
  114. return 0;
  115. }
  116. static int n8x0_mmc_set_power_menelaus(struct device *dev, int slot,
  117. int power_on, int vdd)
  118. {
  119. int mV;
  120. #ifdef CONFIG_MMC_DEBUG
  121. dev_dbg(dev, "Set slot %d power: %s (vdd %d)\n", slot + 1,
  122. power_on ? "on" : "off", vdd);
  123. #endif
  124. if (slot == 0) {
  125. if (!power_on)
  126. return menelaus_set_vmmc(0);
  127. switch (1 << vdd) {
  128. case MMC_VDD_33_34:
  129. case MMC_VDD_32_33:
  130. case MMC_VDD_31_32:
  131. mV = 3100;
  132. break;
  133. case MMC_VDD_30_31:
  134. mV = 3000;
  135. break;
  136. case MMC_VDD_28_29:
  137. mV = 2800;
  138. break;
  139. case MMC_VDD_165_195:
  140. mV = 1850;
  141. break;
  142. default:
  143. BUG();
  144. }
  145. return menelaus_set_vmmc(mV);
  146. } else {
  147. if (!power_on)
  148. return menelaus_set_vdcdc(3, 0);
  149. switch (1 << vdd) {
  150. case MMC_VDD_33_34:
  151. case MMC_VDD_32_33:
  152. mV = 3300;
  153. break;
  154. case MMC_VDD_30_31:
  155. case MMC_VDD_29_30:
  156. mV = 3000;
  157. break;
  158. case MMC_VDD_28_29:
  159. case MMC_VDD_27_28:
  160. mV = 2800;
  161. break;
  162. case MMC_VDD_24_25:
  163. case MMC_VDD_23_24:
  164. mV = 2400;
  165. break;
  166. case MMC_VDD_22_23:
  167. case MMC_VDD_21_22:
  168. mV = 2200;
  169. break;
  170. case MMC_VDD_20_21:
  171. mV = 2000;
  172. break;
  173. case MMC_VDD_165_195:
  174. mV = 1800;
  175. break;
  176. default:
  177. BUG();
  178. }
  179. return menelaus_set_vdcdc(3, mV);
  180. }
  181. return 0;
  182. }
  183. static void n810_set_power_emmc(struct device *dev,
  184. int power_on)
  185. {
  186. dev_dbg(dev, "Set EMMC power %s\n", power_on ? "on" : "off");
  187. if (power_on) {
  188. gpio_set_value(N810_EMMC_VSD_GPIO, 1);
  189. msleep(1);
  190. gpio_set_value(NN810_EMMC_VIO_GPIO, 1);
  191. msleep(1);
  192. } else {
  193. gpio_set_value(NN810_EMMC_VIO_GPIO, 0);
  194. msleep(50);
  195. gpio_set_value(N810_EMMC_VSD_GPIO, 0);
  196. msleep(50);
  197. }
  198. }
  199. static int n8x0_mmc_set_power(struct device *dev, int slot, int power_on,
  200. int vdd)
  201. {
  202. if (machine_is_nokia_n800() || slot == 0)
  203. return n8x0_mmc_set_power_menelaus(dev, slot, power_on, vdd);
  204. n810_set_power_emmc(dev, power_on);
  205. return 0;
  206. }
  207. static int n8x0_mmc_set_bus_mode(struct device *dev, int slot, int bus_mode)
  208. {
  209. int r;
  210. dev_dbg(dev, "Set slot %d bus mode %s\n", slot + 1,
  211. bus_mode == MMC_BUSMODE_OPENDRAIN ? "open-drain" : "push-pull");
  212. BUG_ON(slot != 0 && slot != 1);
  213. slot++;
  214. switch (bus_mode) {
  215. case MMC_BUSMODE_OPENDRAIN:
  216. r = menelaus_set_mmc_opendrain(slot, 1);
  217. break;
  218. case MMC_BUSMODE_PUSHPULL:
  219. r = menelaus_set_mmc_opendrain(slot, 0);
  220. break;
  221. default:
  222. BUG();
  223. }
  224. if (r != 0 && printk_ratelimit())
  225. dev_err(dev, "MMC: unable to set bus mode for slot %d\n",
  226. slot);
  227. return r;
  228. }
  229. static int n8x0_mmc_get_cover_state(struct device *dev, int slot)
  230. {
  231. slot++;
  232. BUG_ON(slot != 1 && slot != 2);
  233. if (slot == 1)
  234. return slot1_cover_open;
  235. else
  236. return slot2_cover_open;
  237. }
  238. static void n8x0_mmc_callback(void *data, u8 card_mask)
  239. {
  240. int bit, *openp, index;
  241. if (machine_is_nokia_n800()) {
  242. bit = 1 << 1;
  243. openp = &slot2_cover_open;
  244. index = 1;
  245. } else {
  246. bit = 1;
  247. openp = &slot1_cover_open;
  248. index = 0;
  249. }
  250. if (card_mask & bit)
  251. *openp = 1;
  252. else
  253. *openp = 0;
  254. omap_mmc_notify_cover_event(mmc_device, index, *openp);
  255. }
  256. void n8x0_mmc_slot1_cover_handler(void *arg, int closed_state)
  257. {
  258. if (mmc_device == NULL)
  259. return;
  260. slot1_cover_open = !closed_state;
  261. omap_mmc_notify_cover_event(mmc_device, 0, closed_state);
  262. }
  263. static int n8x0_mmc_late_init(struct device *dev)
  264. {
  265. int r, bit, *openp;
  266. int vs2sel;
  267. mmc_device = dev;
  268. r = menelaus_set_slot_sel(1);
  269. if (r < 0)
  270. return r;
  271. if (machine_is_nokia_n800())
  272. vs2sel = 0;
  273. else
  274. vs2sel = 2;
  275. r = menelaus_set_mmc_slot(2, 0, vs2sel, 1);
  276. if (r < 0)
  277. return r;
  278. n8x0_mmc_set_power(dev, 0, MMC_POWER_ON, 16); /* MMC_VDD_28_29 */
  279. n8x0_mmc_set_power(dev, 1, MMC_POWER_ON, 16);
  280. r = menelaus_set_mmc_slot(1, 1, 0, 1);
  281. if (r < 0)
  282. return r;
  283. r = menelaus_set_mmc_slot(2, 1, vs2sel, 1);
  284. if (r < 0)
  285. return r;
  286. r = menelaus_get_slot_pin_states();
  287. if (r < 0)
  288. return r;
  289. if (machine_is_nokia_n800()) {
  290. bit = 1 << 1;
  291. openp = &slot2_cover_open;
  292. } else {
  293. bit = 1;
  294. openp = &slot1_cover_open;
  295. slot2_cover_open = 0;
  296. }
  297. /* All slot pin bits seem to be inversed until first switch change */
  298. if (r == 0xf || r == (0xf & ~bit))
  299. r = ~r;
  300. if (r & bit)
  301. *openp = 1;
  302. else
  303. *openp = 0;
  304. r = menelaus_register_mmc_callback(n8x0_mmc_callback, NULL);
  305. return r;
  306. }
  307. static void n8x0_mmc_shutdown(struct device *dev)
  308. {
  309. int vs2sel;
  310. if (machine_is_nokia_n800())
  311. vs2sel = 0;
  312. else
  313. vs2sel = 2;
  314. menelaus_set_mmc_slot(1, 0, 0, 0);
  315. menelaus_set_mmc_slot(2, 0, vs2sel, 0);
  316. }
  317. static void n8x0_mmc_cleanup(struct device *dev)
  318. {
  319. menelaus_unregister_mmc_callback();
  320. gpio_free(N8X0_SLOT_SWITCH_GPIO);
  321. if (machine_is_nokia_n810()) {
  322. gpio_free(N810_EMMC_VSD_GPIO);
  323. gpio_free(NN810_EMMC_VIO_GPIO);
  324. }
  325. }
  326. /*
  327. * MMC controller1 has two slots that are multiplexed via I2C.
  328. * MMC controller2 is not in use.
  329. */
  330. static struct omap_mmc_platform_data mmc1_data = {
  331. .nr_slots = 2,
  332. .switch_slot = n8x0_mmc_switch_slot,
  333. .init = n8x0_mmc_late_init,
  334. .cleanup = n8x0_mmc_cleanup,
  335. .shutdown = n8x0_mmc_shutdown,
  336. .max_freq = 24000000,
  337. .dma_mask = 0xffffffff,
  338. .slots[0] = {
  339. .wires = 4,
  340. .set_power = n8x0_mmc_set_power,
  341. .set_bus_mode = n8x0_mmc_set_bus_mode,
  342. .get_cover_state = n8x0_mmc_get_cover_state,
  343. .ocr_mask = MMC_VDD_165_195 | MMC_VDD_30_31 |
  344. MMC_VDD_32_33 | MMC_VDD_33_34,
  345. .name = "internal",
  346. },
  347. .slots[1] = {
  348. .set_power = n8x0_mmc_set_power,
  349. .set_bus_mode = n8x0_mmc_set_bus_mode,
  350. .get_cover_state = n8x0_mmc_get_cover_state,
  351. .ocr_mask = MMC_VDD_165_195 | MMC_VDD_20_21 |
  352. MMC_VDD_21_22 | MMC_VDD_22_23 |
  353. MMC_VDD_23_24 | MMC_VDD_24_25 |
  354. MMC_VDD_27_28 | MMC_VDD_28_29 |
  355. MMC_VDD_29_30 | MMC_VDD_30_31 |
  356. MMC_VDD_32_33 | MMC_VDD_33_34,
  357. .name = "external",
  358. },
  359. };
  360. static struct omap_mmc_platform_data *mmc_data[OMAP24XX_NR_MMC];
  361. void __init n8x0_mmc_init(void)
  362. {
  363. int err;
  364. if (machine_is_nokia_n810()) {
  365. mmc1_data.slots[0].name = "external";
  366. /*
  367. * Some Samsung Movinand chips do not like open-ended
  368. * multi-block reads and fall to braind-dead state
  369. * while doing so. Reducing the number of blocks in
  370. * the transfer or delays in clock disable do not help
  371. */
  372. mmc1_data.slots[1].name = "internal";
  373. mmc1_data.slots[1].ban_openended = 1;
  374. }
  375. err = gpio_request(N8X0_SLOT_SWITCH_GPIO, "MMC slot switch");
  376. if (err)
  377. return err;
  378. gpio_direction_output(N8X0_SLOT_SWITCH_GPIO, 0);
  379. if (machine_is_nokia_n810()) {
  380. err = gpio_request(N810_EMMC_VSD_GPIO, "MMC slot 2 Vddf");
  381. if (err) {
  382. gpio_free(N8X0_SLOT_SWITCH_GPIO);
  383. return err;
  384. }
  385. gpio_direction_output(N810_EMMC_VSD_GPIO, 0);
  386. err = gpio_request(NN810_EMMC_VIO_GPIO, "MMC slot 2 Vdd");
  387. if (err) {
  388. gpio_free(N8X0_SLOT_SWITCH_GPIO);
  389. gpio_free(N810_EMMC_VSD_GPIO);
  390. return err;
  391. }
  392. gpio_direction_output(NN810_EMMC_VIO_GPIO, 0);
  393. }
  394. mmc_data[0] = &mmc1_data;
  395. omap2_init_mmc(mmc_data, OMAP24XX_NR_MMC);
  396. }
  397. #else
  398. void __init n8x0_mmc_init(void)
  399. {
  400. }
  401. void n8x0_mmc_slot1_cover_handler(void *arg, int state)
  402. {
  403. }
  404. #endif /* CONFIG_MMC_OMAP */
  405. #ifdef CONFIG_MENELAUS
  406. static int n8x0_auto_sleep_regulators(void)
  407. {
  408. u32 val;
  409. int ret;
  410. val = EN_VPLL_SLEEP | EN_VMMC_SLEEP \
  411. | EN_VAUX_SLEEP | EN_VIO_SLEEP \
  412. | EN_VMEM_SLEEP | EN_DC3_SLEEP \
  413. | EN_VC_SLEEP | EN_DC2_SLEEP;
  414. ret = menelaus_set_regulator_sleep(1, val);
  415. if (ret < 0) {
  416. printk(KERN_ERR "Could not set regulators to sleep on "
  417. "menelaus: %u\n", ret);
  418. return ret;
  419. }
  420. return 0;
  421. }
  422. static int n8x0_auto_voltage_scale(void)
  423. {
  424. int ret;
  425. ret = menelaus_set_vcore_hw(1400, 1050);
  426. if (ret < 0) {
  427. printk(KERN_ERR "Could not set VCORE voltage on "
  428. "menelaus: %u\n", ret);
  429. return ret;
  430. }
  431. return 0;
  432. }
  433. static int n8x0_menelaus_late_init(struct device *dev)
  434. {
  435. int ret;
  436. ret = n8x0_auto_voltage_scale();
  437. if (ret < 0)
  438. return ret;
  439. ret = n8x0_auto_sleep_regulators();
  440. if (ret < 0)
  441. return ret;
  442. return 0;
  443. }
  444. static struct i2c_board_info __initdata n8x0_i2c_board_info_1[] = {
  445. {
  446. I2C_BOARD_INFO("menelaus", 0x72),
  447. .irq = INT_24XX_SYS_NIRQ,
  448. },
  449. };
  450. static struct menelaus_platform_data n8x0_menelaus_platform_data = {
  451. .late_init = n8x0_menelaus_late_init,
  452. };
  453. static void __init n8x0_menelaus_init(void)
  454. {
  455. n8x0_i2c_board_info_1[0].platform_data = &n8x0_menelaus_platform_data;
  456. omap_register_i2c_bus(1, 400, n8x0_i2c_board_info_1,
  457. ARRAY_SIZE(n8x0_i2c_board_info_1));
  458. }
  459. #else
  460. static inline void __init n8x0_menelaus_init(void)
  461. {
  462. }
  463. #endif
  464. static void __init n8x0_map_io(void)
  465. {
  466. omap2_set_globals_242x();
  467. omap242x_map_common_io();
  468. }
  469. static void __init n8x0_init_irq(void)
  470. {
  471. omap2_init_common_hw(NULL, NULL);
  472. omap_init_irq();
  473. omap_gpio_init();
  474. }
  475. static void __init n8x0_init_machine(void)
  476. {
  477. /* FIXME: add n810 spi devices */
  478. spi_register_board_info(n800_spi_board_info,
  479. ARRAY_SIZE(n800_spi_board_info));
  480. omap_serial_init();
  481. n8x0_menelaus_init();
  482. n8x0_onenand_init();
  483. n8x0_mmc_init();
  484. }
  485. MACHINE_START(NOKIA_N800, "Nokia N800")
  486. .phys_io = 0x48000000,
  487. .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc,
  488. .boot_params = 0x80000100,
  489. .map_io = n8x0_map_io,
  490. .init_irq = n8x0_init_irq,
  491. .init_machine = n8x0_init_machine,
  492. .timer = &omap_timer,
  493. MACHINE_END
  494. MACHINE_START(NOKIA_N810, "Nokia N810")
  495. .phys_io = 0x48000000,
  496. .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc,
  497. .boot_params = 0x80000100,
  498. .map_io = n8x0_map_io,
  499. .init_irq = n8x0_init_irq,
  500. .init_machine = n8x0_init_machine,
  501. .timer = &omap_timer,
  502. MACHINE_END
  503. MACHINE_START(NOKIA_N810_WIMAX, "Nokia N810 WiMAX")
  504. .phys_io = 0x48000000,
  505. .io_pg_offst = ((0xfa000000) >> 18) & 0xfffc,
  506. .boot_params = 0x80000100,
  507. .map_io = n8x0_map_io,
  508. .init_irq = n8x0_init_irq,
  509. .init_machine = n8x0_init_machine,
  510. .timer = &omap_timer,
  511. MACHINE_END