ptrace-tm-vsx.c 3.3 KB

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  1. /*
  2. * Ptrace test for VMX/VSX registers in the TM context
  3. *
  4. * Copyright (C) 2015 Anshuman Khandual, IBM Corporation.
  5. *
  6. * This program is free software; you can redistribute it and/or
  7. * modify it under the terms of the GNU General Public License
  8. * as published by the Free Software Foundation; either version
  9. * 2 of the License, or (at your option) any later version.
  10. */
  11. #include "ptrace.h"
  12. #include "tm.h"
  13. #include "ptrace-vsx.h"
  14. int shm_id;
  15. unsigned long *cptr, *pptr;
  16. unsigned long fp_load[VEC_MAX];
  17. unsigned long fp_store[VEC_MAX];
  18. unsigned long fp_load_ckpt[VEC_MAX];
  19. unsigned long fp_load_ckpt_new[VEC_MAX];
  20. __attribute__((used)) void load_vsx(void)
  21. {
  22. loadvsx(fp_load, 0);
  23. }
  24. __attribute__((used)) void load_vsx_ckpt(void)
  25. {
  26. loadvsx(fp_load_ckpt, 0);
  27. }
  28. void tm_vsx(void)
  29. {
  30. unsigned long result, texasr;
  31. int ret;
  32. cptr = (unsigned long *)shmat(shm_id, NULL, 0);
  33. trans:
  34. cptr[1] = 0;
  35. asm __volatile__(
  36. "bl load_vsx_ckpt;"
  37. "1: ;"
  38. "tbegin.;"
  39. "beq 2f;"
  40. "bl load_vsx;"
  41. "tsuspend.;"
  42. "li 7, 1;"
  43. "stw 7, 0(%[cptr1]);"
  44. "tresume.;"
  45. "b .;"
  46. "tend.;"
  47. "li 0, 0;"
  48. "ori %[res], 0, 0;"
  49. "b 3f;"
  50. "2: ;"
  51. "li 0, 1;"
  52. "ori %[res], 0, 0;"
  53. "mfspr %[texasr], %[sprn_texasr];"
  54. "3: ;"
  55. : [res] "=r" (result), [texasr] "=r" (texasr)
  56. : [fp_load] "r" (fp_load), [fp_load_ckpt] "r" (fp_load_ckpt),
  57. [sprn_texasr] "i" (SPRN_TEXASR), [cptr1] "r" (&cptr[1])
  58. : "memory", "r0", "r1", "r2", "r3", "r4",
  59. "r7", "r8", "r9", "r10", "r11"
  60. );
  61. if (result) {
  62. if (!cptr[0])
  63. goto trans;
  64. shmdt((void *)cptr);
  65. storevsx(fp_store, 0);
  66. ret = compare_vsx_vmx(fp_store, fp_load_ckpt_new);
  67. if (ret)
  68. exit(1);
  69. exit(0);
  70. }
  71. shmdt((void *)cptr);
  72. exit(1);
  73. }
  74. int trace_tm_vsx(pid_t child)
  75. {
  76. unsigned long vsx[VSX_MAX];
  77. unsigned long vmx[VMX_MAX + 2][2];
  78. FAIL_IF(start_trace(child));
  79. FAIL_IF(show_vsx(child, vsx));
  80. FAIL_IF(validate_vsx(vsx, fp_load));
  81. FAIL_IF(show_vmx(child, vmx));
  82. FAIL_IF(validate_vmx(vmx, fp_load));
  83. FAIL_IF(show_vsx_ckpt(child, vsx));
  84. FAIL_IF(validate_vsx(vsx, fp_load_ckpt));
  85. FAIL_IF(show_vmx_ckpt(child, vmx));
  86. FAIL_IF(validate_vmx(vmx, fp_load_ckpt));
  87. memset(vsx, 0, sizeof(vsx));
  88. memset(vmx, 0, sizeof(vmx));
  89. load_vsx_vmx(fp_load_ckpt_new, vsx, vmx);
  90. FAIL_IF(write_vsx_ckpt(child, vsx));
  91. FAIL_IF(write_vmx_ckpt(child, vmx));
  92. pptr[0] = 1;
  93. FAIL_IF(stop_trace(child));
  94. return TEST_PASS;
  95. }
  96. int ptrace_tm_vsx(void)
  97. {
  98. pid_t pid;
  99. int ret, status, i;
  100. SKIP_IF(!have_htm());
  101. shm_id = shmget(IPC_PRIVATE, sizeof(int) * 2, 0777|IPC_CREAT);
  102. for (i = 0; i < 128; i++) {
  103. fp_load[i] = 1 + rand();
  104. fp_load_ckpt[i] = 1 + 2 * rand();
  105. fp_load_ckpt_new[i] = 1 + 3 * rand();
  106. }
  107. pid = fork();
  108. if (pid < 0) {
  109. perror("fork() failed");
  110. return TEST_FAIL;
  111. }
  112. if (pid == 0)
  113. tm_vsx();
  114. if (pid) {
  115. pptr = (unsigned long *)shmat(shm_id, NULL, 0);
  116. while (!pptr[1])
  117. asm volatile("" : : : "memory");
  118. ret = trace_tm_vsx(pid);
  119. if (ret) {
  120. kill(pid, SIGKILL);
  121. shmdt((void *)pptr);
  122. shmctl(shm_id, IPC_RMID, NULL);
  123. return TEST_FAIL;
  124. }
  125. shmdt((void *)pptr);
  126. ret = wait(&status);
  127. shmctl(shm_id, IPC_RMID, NULL);
  128. if (ret != pid) {
  129. printf("Child's exit status not captured\n");
  130. return TEST_FAIL;
  131. }
  132. return (WIFEXITED(status) && WEXITSTATUS(status)) ? TEST_FAIL :
  133. TEST_PASS;
  134. }
  135. return TEST_PASS;
  136. }
  137. int main(int argc, char *argv[])
  138. {
  139. return test_harness(ptrace_tm_vsx, "ptrace_tm_vsx");
  140. }