en_netdev.c 98 KB

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  1. /*
  2. * Copyright (c) 2007 Mellanox Technologies. All rights reserved.
  3. *
  4. * This software is available to you under a choice of one of two
  5. * licenses. You may choose to be licensed under the terms of the GNU
  6. * General Public License (GPL) Version 2, available from the file
  7. * COPYING in the main directory of this source tree, or the
  8. * OpenIB.org BSD license below:
  9. *
  10. * Redistribution and use in source and binary forms, with or
  11. * without modification, are permitted provided that the following
  12. * conditions are met:
  13. *
  14. * - Redistributions of source code must retain the above
  15. * copyright notice, this list of conditions and the following
  16. * disclaimer.
  17. *
  18. * - Redistributions in binary form must reproduce the above
  19. * copyright notice, this list of conditions and the following
  20. * disclaimer in the documentation and/or other materials
  21. * provided with the distribution.
  22. *
  23. * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  24. * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  25. * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  26. * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  27. * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  28. * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  29. * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  30. * SOFTWARE.
  31. *
  32. */
  33. #include <linux/bpf.h>
  34. #include <linux/etherdevice.h>
  35. #include <linux/tcp.h>
  36. #include <linux/if_vlan.h>
  37. #include <linux/delay.h>
  38. #include <linux/slab.h>
  39. #include <linux/hash.h>
  40. #include <net/ip.h>
  41. #include <net/vxlan.h>
  42. #include <net/devlink.h>
  43. #include <linux/mlx4/driver.h>
  44. #include <linux/mlx4/device.h>
  45. #include <linux/mlx4/cmd.h>
  46. #include <linux/mlx4/cq.h>
  47. #include "mlx4_en.h"
  48. #include "en_port.h"
  49. #define MLX4_EN_MAX_XDP_MTU ((int)(PAGE_SIZE - ETH_HLEN - (2 * VLAN_HLEN) - \
  50. XDP_PACKET_HEADROOM))
  51. int mlx4_en_setup_tc(struct net_device *dev, u8 up)
  52. {
  53. struct mlx4_en_priv *priv = netdev_priv(dev);
  54. int i;
  55. unsigned int offset = 0;
  56. if (up && up != MLX4_EN_NUM_UP_HIGH)
  57. return -EINVAL;
  58. netdev_set_num_tc(dev, up);
  59. netif_set_real_num_tx_queues(dev, priv->tx_ring_num[TX]);
  60. /* Partition Tx queues evenly amongst UP's */
  61. for (i = 0; i < up; i++) {
  62. netdev_set_tc_queue(dev, i, priv->num_tx_rings_p_up, offset);
  63. offset += priv->num_tx_rings_p_up;
  64. }
  65. #ifdef CONFIG_MLX4_EN_DCB
  66. if (!mlx4_is_slave(priv->mdev->dev)) {
  67. if (up) {
  68. if (priv->dcbx_cap)
  69. priv->flags |= MLX4_EN_FLAG_DCB_ENABLED;
  70. } else {
  71. priv->flags &= ~MLX4_EN_FLAG_DCB_ENABLED;
  72. priv->cee_config.pfc_state = false;
  73. }
  74. }
  75. #endif /* CONFIG_MLX4_EN_DCB */
  76. return 0;
  77. }
  78. int mlx4_en_alloc_tx_queue_per_tc(struct net_device *dev, u8 tc)
  79. {
  80. struct mlx4_en_priv *priv = netdev_priv(dev);
  81. struct mlx4_en_dev *mdev = priv->mdev;
  82. struct mlx4_en_port_profile new_prof;
  83. struct mlx4_en_priv *tmp;
  84. int port_up = 0;
  85. int err = 0;
  86. tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
  87. if (!tmp)
  88. return -ENOMEM;
  89. mutex_lock(&mdev->state_lock);
  90. memcpy(&new_prof, priv->prof, sizeof(struct mlx4_en_port_profile));
  91. new_prof.num_up = (tc == 0) ? MLX4_EN_NUM_UP_LOW :
  92. MLX4_EN_NUM_UP_HIGH;
  93. new_prof.tx_ring_num[TX] = new_prof.num_tx_rings_p_up *
  94. new_prof.num_up;
  95. err = mlx4_en_try_alloc_resources(priv, tmp, &new_prof, true);
  96. if (err)
  97. goto out;
  98. if (priv->port_up) {
  99. port_up = 1;
  100. mlx4_en_stop_port(dev, 1);
  101. }
  102. mlx4_en_safe_replace_resources(priv, tmp);
  103. if (port_up) {
  104. err = mlx4_en_start_port(dev);
  105. if (err) {
  106. en_err(priv, "Failed starting port for setup TC\n");
  107. goto out;
  108. }
  109. }
  110. err = mlx4_en_setup_tc(dev, tc);
  111. out:
  112. mutex_unlock(&mdev->state_lock);
  113. kfree(tmp);
  114. return err;
  115. }
  116. static int __mlx4_en_setup_tc(struct net_device *dev, enum tc_setup_type type,
  117. void *type_data)
  118. {
  119. struct tc_mqprio_qopt *mqprio = type_data;
  120. if (type != TC_SETUP_QDISC_MQPRIO)
  121. return -EOPNOTSUPP;
  122. if (mqprio->num_tc && mqprio->num_tc != MLX4_EN_NUM_UP_HIGH)
  123. return -EINVAL;
  124. mqprio->hw = TC_MQPRIO_HW_OFFLOAD_TCS;
  125. return mlx4_en_alloc_tx_queue_per_tc(dev, mqprio->num_tc);
  126. }
  127. #ifdef CONFIG_RFS_ACCEL
  128. struct mlx4_en_filter {
  129. struct list_head next;
  130. struct work_struct work;
  131. u8 ip_proto;
  132. __be32 src_ip;
  133. __be32 dst_ip;
  134. __be16 src_port;
  135. __be16 dst_port;
  136. int rxq_index;
  137. struct mlx4_en_priv *priv;
  138. u32 flow_id; /* RFS infrastructure id */
  139. int id; /* mlx4_en driver id */
  140. u64 reg_id; /* Flow steering API id */
  141. u8 activated; /* Used to prevent expiry before filter
  142. * is attached
  143. */
  144. struct hlist_node filter_chain;
  145. };
  146. static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv);
  147. static enum mlx4_net_trans_rule_id mlx4_ip_proto_to_trans_rule_id(u8 ip_proto)
  148. {
  149. switch (ip_proto) {
  150. case IPPROTO_UDP:
  151. return MLX4_NET_TRANS_RULE_ID_UDP;
  152. case IPPROTO_TCP:
  153. return MLX4_NET_TRANS_RULE_ID_TCP;
  154. default:
  155. return MLX4_NET_TRANS_RULE_NUM;
  156. }
  157. };
  158. /* Must not acquire state_lock, as its corresponding work_sync
  159. * is done under it.
  160. */
  161. static void mlx4_en_filter_work(struct work_struct *work)
  162. {
  163. struct mlx4_en_filter *filter = container_of(work,
  164. struct mlx4_en_filter,
  165. work);
  166. struct mlx4_en_priv *priv = filter->priv;
  167. struct mlx4_spec_list spec_tcp_udp = {
  168. .id = mlx4_ip_proto_to_trans_rule_id(filter->ip_proto),
  169. {
  170. .tcp_udp = {
  171. .dst_port = filter->dst_port,
  172. .dst_port_msk = (__force __be16)-1,
  173. .src_port = filter->src_port,
  174. .src_port_msk = (__force __be16)-1,
  175. },
  176. },
  177. };
  178. struct mlx4_spec_list spec_ip = {
  179. .id = MLX4_NET_TRANS_RULE_ID_IPV4,
  180. {
  181. .ipv4 = {
  182. .dst_ip = filter->dst_ip,
  183. .dst_ip_msk = (__force __be32)-1,
  184. .src_ip = filter->src_ip,
  185. .src_ip_msk = (__force __be32)-1,
  186. },
  187. },
  188. };
  189. struct mlx4_spec_list spec_eth = {
  190. .id = MLX4_NET_TRANS_RULE_ID_ETH,
  191. };
  192. struct mlx4_net_trans_rule rule = {
  193. .list = LIST_HEAD_INIT(rule.list),
  194. .queue_mode = MLX4_NET_TRANS_Q_LIFO,
  195. .exclusive = 1,
  196. .allow_loopback = 1,
  197. .promisc_mode = MLX4_FS_REGULAR,
  198. .port = priv->port,
  199. .priority = MLX4_DOMAIN_RFS,
  200. };
  201. int rc;
  202. __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);
  203. if (spec_tcp_udp.id >= MLX4_NET_TRANS_RULE_NUM) {
  204. en_warn(priv, "RFS: ignoring unsupported ip protocol (%d)\n",
  205. filter->ip_proto);
  206. goto ignore;
  207. }
  208. list_add_tail(&spec_eth.list, &rule.list);
  209. list_add_tail(&spec_ip.list, &rule.list);
  210. list_add_tail(&spec_tcp_udp.list, &rule.list);
  211. rule.qpn = priv->rss_map.qps[filter->rxq_index].qpn;
  212. memcpy(spec_eth.eth.dst_mac, priv->dev->dev_addr, ETH_ALEN);
  213. memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN);
  214. filter->activated = 0;
  215. if (filter->reg_id) {
  216. rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id);
  217. if (rc && rc != -ENOENT)
  218. en_err(priv, "Error detaching flow. rc = %d\n", rc);
  219. }
  220. rc = mlx4_flow_attach(priv->mdev->dev, &rule, &filter->reg_id);
  221. if (rc)
  222. en_err(priv, "Error attaching flow. err = %d\n", rc);
  223. ignore:
  224. mlx4_en_filter_rfs_expire(priv);
  225. filter->activated = 1;
  226. }
  227. static inline struct hlist_head *
  228. filter_hash_bucket(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip,
  229. __be16 src_port, __be16 dst_port)
  230. {
  231. unsigned long l;
  232. int bucket_idx;
  233. l = (__force unsigned long)src_port |
  234. ((__force unsigned long)dst_port << 2);
  235. l ^= (__force unsigned long)(src_ip ^ dst_ip);
  236. bucket_idx = hash_long(l, MLX4_EN_FILTER_HASH_SHIFT);
  237. return &priv->filter_hash[bucket_idx];
  238. }
  239. static struct mlx4_en_filter *
  240. mlx4_en_filter_alloc(struct mlx4_en_priv *priv, int rxq_index, __be32 src_ip,
  241. __be32 dst_ip, u8 ip_proto, __be16 src_port,
  242. __be16 dst_port, u32 flow_id)
  243. {
  244. struct mlx4_en_filter *filter = NULL;
  245. filter = kzalloc(sizeof(struct mlx4_en_filter), GFP_ATOMIC);
  246. if (!filter)
  247. return NULL;
  248. filter->priv = priv;
  249. filter->rxq_index = rxq_index;
  250. INIT_WORK(&filter->work, mlx4_en_filter_work);
  251. filter->src_ip = src_ip;
  252. filter->dst_ip = dst_ip;
  253. filter->ip_proto = ip_proto;
  254. filter->src_port = src_port;
  255. filter->dst_port = dst_port;
  256. filter->flow_id = flow_id;
  257. filter->id = priv->last_filter_id++ % RPS_NO_FILTER;
  258. list_add_tail(&filter->next, &priv->filters);
  259. hlist_add_head(&filter->filter_chain,
  260. filter_hash_bucket(priv, src_ip, dst_ip, src_port,
  261. dst_port));
  262. return filter;
  263. }
  264. static void mlx4_en_filter_free(struct mlx4_en_filter *filter)
  265. {
  266. struct mlx4_en_priv *priv = filter->priv;
  267. int rc;
  268. list_del(&filter->next);
  269. rc = mlx4_flow_detach(priv->mdev->dev, filter->reg_id);
  270. if (rc && rc != -ENOENT)
  271. en_err(priv, "Error detaching flow. rc = %d\n", rc);
  272. kfree(filter);
  273. }
  274. static inline struct mlx4_en_filter *
  275. mlx4_en_filter_find(struct mlx4_en_priv *priv, __be32 src_ip, __be32 dst_ip,
  276. u8 ip_proto, __be16 src_port, __be16 dst_port)
  277. {
  278. struct mlx4_en_filter *filter;
  279. struct mlx4_en_filter *ret = NULL;
  280. hlist_for_each_entry(filter,
  281. filter_hash_bucket(priv, src_ip, dst_ip,
  282. src_port, dst_port),
  283. filter_chain) {
  284. if (filter->src_ip == src_ip &&
  285. filter->dst_ip == dst_ip &&
  286. filter->ip_proto == ip_proto &&
  287. filter->src_port == src_port &&
  288. filter->dst_port == dst_port) {
  289. ret = filter;
  290. break;
  291. }
  292. }
  293. return ret;
  294. }
  295. static int
  296. mlx4_en_filter_rfs(struct net_device *net_dev, const struct sk_buff *skb,
  297. u16 rxq_index, u32 flow_id)
  298. {
  299. struct mlx4_en_priv *priv = netdev_priv(net_dev);
  300. struct mlx4_en_filter *filter;
  301. const struct iphdr *ip;
  302. const __be16 *ports;
  303. u8 ip_proto;
  304. __be32 src_ip;
  305. __be32 dst_ip;
  306. __be16 src_port;
  307. __be16 dst_port;
  308. int nhoff = skb_network_offset(skb);
  309. int ret = 0;
  310. if (skb->protocol != htons(ETH_P_IP))
  311. return -EPROTONOSUPPORT;
  312. ip = (const struct iphdr *)(skb->data + nhoff);
  313. if (ip_is_fragment(ip))
  314. return -EPROTONOSUPPORT;
  315. if ((ip->protocol != IPPROTO_TCP) && (ip->protocol != IPPROTO_UDP))
  316. return -EPROTONOSUPPORT;
  317. ports = (const __be16 *)(skb->data + nhoff + 4 * ip->ihl);
  318. ip_proto = ip->protocol;
  319. src_ip = ip->saddr;
  320. dst_ip = ip->daddr;
  321. src_port = ports[0];
  322. dst_port = ports[1];
  323. spin_lock_bh(&priv->filters_lock);
  324. filter = mlx4_en_filter_find(priv, src_ip, dst_ip, ip_proto,
  325. src_port, dst_port);
  326. if (filter) {
  327. if (filter->rxq_index == rxq_index)
  328. goto out;
  329. filter->rxq_index = rxq_index;
  330. } else {
  331. filter = mlx4_en_filter_alloc(priv, rxq_index,
  332. src_ip, dst_ip, ip_proto,
  333. src_port, dst_port, flow_id);
  334. if (!filter) {
  335. ret = -ENOMEM;
  336. goto err;
  337. }
  338. }
  339. queue_work(priv->mdev->workqueue, &filter->work);
  340. out:
  341. ret = filter->id;
  342. err:
  343. spin_unlock_bh(&priv->filters_lock);
  344. return ret;
  345. }
  346. void mlx4_en_cleanup_filters(struct mlx4_en_priv *priv)
  347. {
  348. struct mlx4_en_filter *filter, *tmp;
  349. LIST_HEAD(del_list);
  350. spin_lock_bh(&priv->filters_lock);
  351. list_for_each_entry_safe(filter, tmp, &priv->filters, next) {
  352. list_move(&filter->next, &del_list);
  353. hlist_del(&filter->filter_chain);
  354. }
  355. spin_unlock_bh(&priv->filters_lock);
  356. list_for_each_entry_safe(filter, tmp, &del_list, next) {
  357. cancel_work_sync(&filter->work);
  358. mlx4_en_filter_free(filter);
  359. }
  360. }
  361. static void mlx4_en_filter_rfs_expire(struct mlx4_en_priv *priv)
  362. {
  363. struct mlx4_en_filter *filter = NULL, *tmp, *last_filter = NULL;
  364. LIST_HEAD(del_list);
  365. int i = 0;
  366. spin_lock_bh(&priv->filters_lock);
  367. list_for_each_entry_safe(filter, tmp, &priv->filters, next) {
  368. if (i > MLX4_EN_FILTER_EXPIRY_QUOTA)
  369. break;
  370. if (filter->activated &&
  371. !work_pending(&filter->work) &&
  372. rps_may_expire_flow(priv->dev,
  373. filter->rxq_index, filter->flow_id,
  374. filter->id)) {
  375. list_move(&filter->next, &del_list);
  376. hlist_del(&filter->filter_chain);
  377. } else
  378. last_filter = filter;
  379. i++;
  380. }
  381. if (last_filter && (&last_filter->next != priv->filters.next))
  382. list_move(&priv->filters, &last_filter->next);
  383. spin_unlock_bh(&priv->filters_lock);
  384. list_for_each_entry_safe(filter, tmp, &del_list, next)
  385. mlx4_en_filter_free(filter);
  386. }
  387. #endif
  388. static int mlx4_en_vlan_rx_add_vid(struct net_device *dev,
  389. __be16 proto, u16 vid)
  390. {
  391. struct mlx4_en_priv *priv = netdev_priv(dev);
  392. struct mlx4_en_dev *mdev = priv->mdev;
  393. int err;
  394. int idx;
  395. en_dbg(HW, priv, "adding VLAN:%d\n", vid);
  396. set_bit(vid, priv->active_vlans);
  397. /* Add VID to port VLAN filter */
  398. mutex_lock(&mdev->state_lock);
  399. if (mdev->device_up && priv->port_up) {
  400. err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
  401. if (err) {
  402. en_err(priv, "Failed configuring VLAN filter\n");
  403. goto out;
  404. }
  405. }
  406. err = mlx4_register_vlan(mdev->dev, priv->port, vid, &idx);
  407. if (err)
  408. en_dbg(HW, priv, "Failed adding vlan %d\n", vid);
  409. out:
  410. mutex_unlock(&mdev->state_lock);
  411. return err;
  412. }
  413. static int mlx4_en_vlan_rx_kill_vid(struct net_device *dev,
  414. __be16 proto, u16 vid)
  415. {
  416. struct mlx4_en_priv *priv = netdev_priv(dev);
  417. struct mlx4_en_dev *mdev = priv->mdev;
  418. int err = 0;
  419. en_dbg(HW, priv, "Killing VID:%d\n", vid);
  420. clear_bit(vid, priv->active_vlans);
  421. /* Remove VID from port VLAN filter */
  422. mutex_lock(&mdev->state_lock);
  423. mlx4_unregister_vlan(mdev->dev, priv->port, vid);
  424. if (mdev->device_up && priv->port_up) {
  425. err = mlx4_SET_VLAN_FLTR(mdev->dev, priv);
  426. if (err)
  427. en_err(priv, "Failed configuring VLAN filter\n");
  428. }
  429. mutex_unlock(&mdev->state_lock);
  430. return err;
  431. }
  432. static void mlx4_en_u64_to_mac(unsigned char dst_mac[ETH_ALEN + 2], u64 src_mac)
  433. {
  434. int i;
  435. for (i = ETH_ALEN - 1; i >= 0; --i) {
  436. dst_mac[i] = src_mac & 0xff;
  437. src_mac >>= 8;
  438. }
  439. memset(&dst_mac[ETH_ALEN], 0, 2);
  440. }
  441. static int mlx4_en_tunnel_steer_add(struct mlx4_en_priv *priv, unsigned char *addr,
  442. int qpn, u64 *reg_id)
  443. {
  444. int err;
  445. if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN ||
  446. priv->mdev->dev->caps.dmfs_high_steer_mode == MLX4_STEERING_DMFS_A0_STATIC)
  447. return 0; /* do nothing */
  448. err = mlx4_tunnel_steer_add(priv->mdev->dev, addr, priv->port, qpn,
  449. MLX4_DOMAIN_NIC, reg_id);
  450. if (err) {
  451. en_err(priv, "failed to add vxlan steering rule, err %d\n", err);
  452. return err;
  453. }
  454. en_dbg(DRV, priv, "added vxlan steering rule, mac %pM reg_id %llx\n", addr, *reg_id);
  455. return 0;
  456. }
  457. static int mlx4_en_uc_steer_add(struct mlx4_en_priv *priv,
  458. unsigned char *mac, int *qpn, u64 *reg_id)
  459. {
  460. struct mlx4_en_dev *mdev = priv->mdev;
  461. struct mlx4_dev *dev = mdev->dev;
  462. int err;
  463. switch (dev->caps.steering_mode) {
  464. case MLX4_STEERING_MODE_B0: {
  465. struct mlx4_qp qp;
  466. u8 gid[16] = {0};
  467. qp.qpn = *qpn;
  468. memcpy(&gid[10], mac, ETH_ALEN);
  469. gid[5] = priv->port;
  470. err = mlx4_unicast_attach(dev, &qp, gid, 0, MLX4_PROT_ETH);
  471. break;
  472. }
  473. case MLX4_STEERING_MODE_DEVICE_MANAGED: {
  474. struct mlx4_spec_list spec_eth = { {NULL} };
  475. __be64 mac_mask = cpu_to_be64(MLX4_MAC_MASK << 16);
  476. struct mlx4_net_trans_rule rule = {
  477. .queue_mode = MLX4_NET_TRANS_Q_FIFO,
  478. .exclusive = 0,
  479. .allow_loopback = 1,
  480. .promisc_mode = MLX4_FS_REGULAR,
  481. .priority = MLX4_DOMAIN_NIC,
  482. };
  483. rule.port = priv->port;
  484. rule.qpn = *qpn;
  485. INIT_LIST_HEAD(&rule.list);
  486. spec_eth.id = MLX4_NET_TRANS_RULE_ID_ETH;
  487. memcpy(spec_eth.eth.dst_mac, mac, ETH_ALEN);
  488. memcpy(spec_eth.eth.dst_mac_msk, &mac_mask, ETH_ALEN);
  489. list_add_tail(&spec_eth.list, &rule.list);
  490. err = mlx4_flow_attach(dev, &rule, reg_id);
  491. break;
  492. }
  493. default:
  494. return -EINVAL;
  495. }
  496. if (err)
  497. en_warn(priv, "Failed Attaching Unicast\n");
  498. return err;
  499. }
  500. static void mlx4_en_uc_steer_release(struct mlx4_en_priv *priv,
  501. unsigned char *mac, int qpn, u64 reg_id)
  502. {
  503. struct mlx4_en_dev *mdev = priv->mdev;
  504. struct mlx4_dev *dev = mdev->dev;
  505. switch (dev->caps.steering_mode) {
  506. case MLX4_STEERING_MODE_B0: {
  507. struct mlx4_qp qp;
  508. u8 gid[16] = {0};
  509. qp.qpn = qpn;
  510. memcpy(&gid[10], mac, ETH_ALEN);
  511. gid[5] = priv->port;
  512. mlx4_unicast_detach(dev, &qp, gid, MLX4_PROT_ETH);
  513. break;
  514. }
  515. case MLX4_STEERING_MODE_DEVICE_MANAGED: {
  516. mlx4_flow_detach(dev, reg_id);
  517. break;
  518. }
  519. default:
  520. en_err(priv, "Invalid steering mode.\n");
  521. }
  522. }
  523. static int mlx4_en_get_qp(struct mlx4_en_priv *priv)
  524. {
  525. struct mlx4_en_dev *mdev = priv->mdev;
  526. struct mlx4_dev *dev = mdev->dev;
  527. int index = 0;
  528. int err = 0;
  529. int *qpn = &priv->base_qpn;
  530. u64 mac = mlx4_mac_to_u64(priv->dev->dev_addr);
  531. en_dbg(DRV, priv, "Registering MAC: %pM for adding\n",
  532. priv->dev->dev_addr);
  533. index = mlx4_register_mac(dev, priv->port, mac);
  534. if (index < 0) {
  535. err = index;
  536. en_err(priv, "Failed adding MAC: %pM\n",
  537. priv->dev->dev_addr);
  538. return err;
  539. }
  540. en_info(priv, "Steering Mode %d\n", dev->caps.steering_mode);
  541. if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) {
  542. int base_qpn = mlx4_get_base_qpn(dev, priv->port);
  543. *qpn = base_qpn + index;
  544. return 0;
  545. }
  546. err = mlx4_qp_reserve_range(dev, 1, 1, qpn, MLX4_RESERVE_A0_QP,
  547. MLX4_RES_USAGE_DRIVER);
  548. en_dbg(DRV, priv, "Reserved qp %d\n", *qpn);
  549. if (err) {
  550. en_err(priv, "Failed to reserve qp for mac registration\n");
  551. mlx4_unregister_mac(dev, priv->port, mac);
  552. return err;
  553. }
  554. return 0;
  555. }
  556. static void mlx4_en_put_qp(struct mlx4_en_priv *priv)
  557. {
  558. struct mlx4_en_dev *mdev = priv->mdev;
  559. struct mlx4_dev *dev = mdev->dev;
  560. int qpn = priv->base_qpn;
  561. if (dev->caps.steering_mode == MLX4_STEERING_MODE_A0) {
  562. u64 mac = mlx4_mac_to_u64(priv->dev->dev_addr);
  563. en_dbg(DRV, priv, "Registering MAC: %pM for deleting\n",
  564. priv->dev->dev_addr);
  565. mlx4_unregister_mac(dev, priv->port, mac);
  566. } else {
  567. en_dbg(DRV, priv, "Releasing qp: port %d, qpn %d\n",
  568. priv->port, qpn);
  569. mlx4_qp_release_range(dev, qpn, 1);
  570. priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC;
  571. }
  572. }
  573. static int mlx4_en_replace_mac(struct mlx4_en_priv *priv, int qpn,
  574. unsigned char *new_mac, unsigned char *prev_mac)
  575. {
  576. struct mlx4_en_dev *mdev = priv->mdev;
  577. struct mlx4_dev *dev = mdev->dev;
  578. int err = 0;
  579. u64 new_mac_u64 = mlx4_mac_to_u64(new_mac);
  580. if (dev->caps.steering_mode != MLX4_STEERING_MODE_A0) {
  581. struct hlist_head *bucket;
  582. unsigned int mac_hash;
  583. struct mlx4_mac_entry *entry;
  584. struct hlist_node *tmp;
  585. u64 prev_mac_u64 = mlx4_mac_to_u64(prev_mac);
  586. bucket = &priv->mac_hash[prev_mac[MLX4_EN_MAC_HASH_IDX]];
  587. hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
  588. if (ether_addr_equal_64bits(entry->mac, prev_mac)) {
  589. mlx4_en_uc_steer_release(priv, entry->mac,
  590. qpn, entry->reg_id);
  591. mlx4_unregister_mac(dev, priv->port,
  592. prev_mac_u64);
  593. hlist_del_rcu(&entry->hlist);
  594. synchronize_rcu();
  595. memcpy(entry->mac, new_mac, ETH_ALEN);
  596. entry->reg_id = 0;
  597. mac_hash = new_mac[MLX4_EN_MAC_HASH_IDX];
  598. hlist_add_head_rcu(&entry->hlist,
  599. &priv->mac_hash[mac_hash]);
  600. mlx4_register_mac(dev, priv->port, new_mac_u64);
  601. err = mlx4_en_uc_steer_add(priv, new_mac,
  602. &qpn,
  603. &entry->reg_id);
  604. if (err)
  605. return err;
  606. if (priv->tunnel_reg_id) {
  607. mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id);
  608. priv->tunnel_reg_id = 0;
  609. }
  610. err = mlx4_en_tunnel_steer_add(priv, new_mac, qpn,
  611. &priv->tunnel_reg_id);
  612. return err;
  613. }
  614. }
  615. return -EINVAL;
  616. }
  617. return __mlx4_replace_mac(dev, priv->port, qpn, new_mac_u64);
  618. }
  619. static void mlx4_en_update_user_mac(struct mlx4_en_priv *priv,
  620. unsigned char new_mac[ETH_ALEN + 2])
  621. {
  622. struct mlx4_en_dev *mdev = priv->mdev;
  623. int err;
  624. if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_USER_MAC_EN))
  625. return;
  626. err = mlx4_SET_PORT_user_mac(mdev->dev, priv->port, new_mac);
  627. if (err)
  628. en_err(priv, "Failed to pass user MAC(%pM) to Firmware for port %d, with error %d\n",
  629. new_mac, priv->port, err);
  630. }
  631. static int mlx4_en_do_set_mac(struct mlx4_en_priv *priv,
  632. unsigned char new_mac[ETH_ALEN + 2])
  633. {
  634. int err = 0;
  635. if (priv->port_up) {
  636. /* Remove old MAC and insert the new one */
  637. err = mlx4_en_replace_mac(priv, priv->base_qpn,
  638. new_mac, priv->current_mac);
  639. if (err)
  640. en_err(priv, "Failed changing HW MAC address\n");
  641. } else
  642. en_dbg(HW, priv, "Port is down while registering mac, exiting...\n");
  643. if (!err)
  644. memcpy(priv->current_mac, new_mac, sizeof(priv->current_mac));
  645. return err;
  646. }
  647. static int mlx4_en_set_mac(struct net_device *dev, void *addr)
  648. {
  649. struct mlx4_en_priv *priv = netdev_priv(dev);
  650. struct mlx4_en_dev *mdev = priv->mdev;
  651. struct sockaddr *saddr = addr;
  652. unsigned char new_mac[ETH_ALEN + 2];
  653. int err;
  654. if (!is_valid_ether_addr(saddr->sa_data))
  655. return -EADDRNOTAVAIL;
  656. mutex_lock(&mdev->state_lock);
  657. memcpy(new_mac, saddr->sa_data, ETH_ALEN);
  658. err = mlx4_en_do_set_mac(priv, new_mac);
  659. if (err)
  660. goto out;
  661. memcpy(dev->dev_addr, saddr->sa_data, ETH_ALEN);
  662. mlx4_en_update_user_mac(priv, new_mac);
  663. out:
  664. mutex_unlock(&mdev->state_lock);
  665. return err;
  666. }
  667. static void mlx4_en_clear_list(struct net_device *dev)
  668. {
  669. struct mlx4_en_priv *priv = netdev_priv(dev);
  670. struct mlx4_en_mc_list *tmp, *mc_to_del;
  671. list_for_each_entry_safe(mc_to_del, tmp, &priv->mc_list, list) {
  672. list_del(&mc_to_del->list);
  673. kfree(mc_to_del);
  674. }
  675. }
  676. static void mlx4_en_cache_mclist(struct net_device *dev)
  677. {
  678. struct mlx4_en_priv *priv = netdev_priv(dev);
  679. struct netdev_hw_addr *ha;
  680. struct mlx4_en_mc_list *tmp;
  681. mlx4_en_clear_list(dev);
  682. netdev_for_each_mc_addr(ha, dev) {
  683. tmp = kzalloc(sizeof(struct mlx4_en_mc_list), GFP_ATOMIC);
  684. if (!tmp) {
  685. mlx4_en_clear_list(dev);
  686. return;
  687. }
  688. memcpy(tmp->addr, ha->addr, ETH_ALEN);
  689. list_add_tail(&tmp->list, &priv->mc_list);
  690. }
  691. }
  692. static void update_mclist_flags(struct mlx4_en_priv *priv,
  693. struct list_head *dst,
  694. struct list_head *src)
  695. {
  696. struct mlx4_en_mc_list *dst_tmp, *src_tmp, *new_mc;
  697. bool found;
  698. /* Find all the entries that should be removed from dst,
  699. * These are the entries that are not found in src
  700. */
  701. list_for_each_entry(dst_tmp, dst, list) {
  702. found = false;
  703. list_for_each_entry(src_tmp, src, list) {
  704. if (ether_addr_equal(dst_tmp->addr, src_tmp->addr)) {
  705. found = true;
  706. break;
  707. }
  708. }
  709. if (!found)
  710. dst_tmp->action = MCLIST_REM;
  711. }
  712. /* Add entries that exist in src but not in dst
  713. * mark them as need to add
  714. */
  715. list_for_each_entry(src_tmp, src, list) {
  716. found = false;
  717. list_for_each_entry(dst_tmp, dst, list) {
  718. if (ether_addr_equal(dst_tmp->addr, src_tmp->addr)) {
  719. dst_tmp->action = MCLIST_NONE;
  720. found = true;
  721. break;
  722. }
  723. }
  724. if (!found) {
  725. new_mc = kmemdup(src_tmp,
  726. sizeof(struct mlx4_en_mc_list),
  727. GFP_KERNEL);
  728. if (!new_mc)
  729. return;
  730. new_mc->action = MCLIST_ADD;
  731. list_add_tail(&new_mc->list, dst);
  732. }
  733. }
  734. }
  735. static void mlx4_en_set_rx_mode(struct net_device *dev)
  736. {
  737. struct mlx4_en_priv *priv = netdev_priv(dev);
  738. if (!priv->port_up)
  739. return;
  740. queue_work(priv->mdev->workqueue, &priv->rx_mode_task);
  741. }
  742. static void mlx4_en_set_promisc_mode(struct mlx4_en_priv *priv,
  743. struct mlx4_en_dev *mdev)
  744. {
  745. int err = 0;
  746. if (!(priv->flags & MLX4_EN_FLAG_PROMISC)) {
  747. if (netif_msg_rx_status(priv))
  748. en_warn(priv, "Entering promiscuous mode\n");
  749. priv->flags |= MLX4_EN_FLAG_PROMISC;
  750. /* Enable promiscouos mode */
  751. switch (mdev->dev->caps.steering_mode) {
  752. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  753. err = mlx4_flow_steer_promisc_add(mdev->dev,
  754. priv->port,
  755. priv->base_qpn,
  756. MLX4_FS_ALL_DEFAULT);
  757. if (err)
  758. en_err(priv, "Failed enabling promiscuous mode\n");
  759. priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
  760. break;
  761. case MLX4_STEERING_MODE_B0:
  762. err = mlx4_unicast_promisc_add(mdev->dev,
  763. priv->base_qpn,
  764. priv->port);
  765. if (err)
  766. en_err(priv, "Failed enabling unicast promiscuous mode\n");
  767. /* Add the default qp number as multicast
  768. * promisc
  769. */
  770. if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {
  771. err = mlx4_multicast_promisc_add(mdev->dev,
  772. priv->base_qpn,
  773. priv->port);
  774. if (err)
  775. en_err(priv, "Failed enabling multicast promiscuous mode\n");
  776. priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
  777. }
  778. break;
  779. case MLX4_STEERING_MODE_A0:
  780. err = mlx4_SET_PORT_qpn_calc(mdev->dev,
  781. priv->port,
  782. priv->base_qpn,
  783. 1);
  784. if (err)
  785. en_err(priv, "Failed enabling promiscuous mode\n");
  786. break;
  787. }
  788. /* Disable port multicast filter (unconditionally) */
  789. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  790. 0, MLX4_MCAST_DISABLE);
  791. if (err)
  792. en_err(priv, "Failed disabling multicast filter\n");
  793. }
  794. }
  795. static void mlx4_en_clear_promisc_mode(struct mlx4_en_priv *priv,
  796. struct mlx4_en_dev *mdev)
  797. {
  798. int err = 0;
  799. if (netif_msg_rx_status(priv))
  800. en_warn(priv, "Leaving promiscuous mode\n");
  801. priv->flags &= ~MLX4_EN_FLAG_PROMISC;
  802. /* Disable promiscouos mode */
  803. switch (mdev->dev->caps.steering_mode) {
  804. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  805. err = mlx4_flow_steer_promisc_remove(mdev->dev,
  806. priv->port,
  807. MLX4_FS_ALL_DEFAULT);
  808. if (err)
  809. en_err(priv, "Failed disabling promiscuous mode\n");
  810. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  811. break;
  812. case MLX4_STEERING_MODE_B0:
  813. err = mlx4_unicast_promisc_remove(mdev->dev,
  814. priv->base_qpn,
  815. priv->port);
  816. if (err)
  817. en_err(priv, "Failed disabling unicast promiscuous mode\n");
  818. /* Disable Multicast promisc */
  819. if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
  820. err = mlx4_multicast_promisc_remove(mdev->dev,
  821. priv->base_qpn,
  822. priv->port);
  823. if (err)
  824. en_err(priv, "Failed disabling multicast promiscuous mode\n");
  825. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  826. }
  827. break;
  828. case MLX4_STEERING_MODE_A0:
  829. err = mlx4_SET_PORT_qpn_calc(mdev->dev,
  830. priv->port,
  831. priv->base_qpn, 0);
  832. if (err)
  833. en_err(priv, "Failed disabling promiscuous mode\n");
  834. break;
  835. }
  836. }
  837. static void mlx4_en_do_multicast(struct mlx4_en_priv *priv,
  838. struct net_device *dev,
  839. struct mlx4_en_dev *mdev)
  840. {
  841. struct mlx4_en_mc_list *mclist, *tmp;
  842. u64 mcast_addr = 0;
  843. u8 mc_list[16] = {0};
  844. int err = 0;
  845. /* Enable/disable the multicast filter according to IFF_ALLMULTI */
  846. if (dev->flags & IFF_ALLMULTI) {
  847. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  848. 0, MLX4_MCAST_DISABLE);
  849. if (err)
  850. en_err(priv, "Failed disabling multicast filter\n");
  851. /* Add the default qp number as multicast promisc */
  852. if (!(priv->flags & MLX4_EN_FLAG_MC_PROMISC)) {
  853. switch (mdev->dev->caps.steering_mode) {
  854. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  855. err = mlx4_flow_steer_promisc_add(mdev->dev,
  856. priv->port,
  857. priv->base_qpn,
  858. MLX4_FS_MC_DEFAULT);
  859. break;
  860. case MLX4_STEERING_MODE_B0:
  861. err = mlx4_multicast_promisc_add(mdev->dev,
  862. priv->base_qpn,
  863. priv->port);
  864. break;
  865. case MLX4_STEERING_MODE_A0:
  866. break;
  867. }
  868. if (err)
  869. en_err(priv, "Failed entering multicast promisc mode\n");
  870. priv->flags |= MLX4_EN_FLAG_MC_PROMISC;
  871. }
  872. } else {
  873. /* Disable Multicast promisc */
  874. if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
  875. switch (mdev->dev->caps.steering_mode) {
  876. case MLX4_STEERING_MODE_DEVICE_MANAGED:
  877. err = mlx4_flow_steer_promisc_remove(mdev->dev,
  878. priv->port,
  879. MLX4_FS_MC_DEFAULT);
  880. break;
  881. case MLX4_STEERING_MODE_B0:
  882. err = mlx4_multicast_promisc_remove(mdev->dev,
  883. priv->base_qpn,
  884. priv->port);
  885. break;
  886. case MLX4_STEERING_MODE_A0:
  887. break;
  888. }
  889. if (err)
  890. en_err(priv, "Failed disabling multicast promiscuous mode\n");
  891. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  892. }
  893. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  894. 0, MLX4_MCAST_DISABLE);
  895. if (err)
  896. en_err(priv, "Failed disabling multicast filter\n");
  897. /* Flush mcast filter and init it with broadcast address */
  898. mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, ETH_BCAST,
  899. 1, MLX4_MCAST_CONFIG);
  900. /* Update multicast list - we cache all addresses so they won't
  901. * change while HW is updated holding the command semaphor */
  902. netif_addr_lock_bh(dev);
  903. mlx4_en_cache_mclist(dev);
  904. netif_addr_unlock_bh(dev);
  905. list_for_each_entry(mclist, &priv->mc_list, list) {
  906. mcast_addr = mlx4_mac_to_u64(mclist->addr);
  907. mlx4_SET_MCAST_FLTR(mdev->dev, priv->port,
  908. mcast_addr, 0, MLX4_MCAST_CONFIG);
  909. }
  910. err = mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0,
  911. 0, MLX4_MCAST_ENABLE);
  912. if (err)
  913. en_err(priv, "Failed enabling multicast filter\n");
  914. update_mclist_flags(priv, &priv->curr_list, &priv->mc_list);
  915. list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) {
  916. if (mclist->action == MCLIST_REM) {
  917. /* detach this address and delete from list */
  918. memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
  919. mc_list[5] = priv->port;
  920. err = mlx4_multicast_detach(mdev->dev,
  921. priv->rss_map.indir_qp,
  922. mc_list,
  923. MLX4_PROT_ETH,
  924. mclist->reg_id);
  925. if (err)
  926. en_err(priv, "Fail to detach multicast address\n");
  927. if (mclist->tunnel_reg_id) {
  928. err = mlx4_flow_detach(priv->mdev->dev, mclist->tunnel_reg_id);
  929. if (err)
  930. en_err(priv, "Failed to detach multicast address\n");
  931. }
  932. /* remove from list */
  933. list_del(&mclist->list);
  934. kfree(mclist);
  935. } else if (mclist->action == MCLIST_ADD) {
  936. /* attach the address */
  937. memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
  938. /* needed for B0 steering support */
  939. mc_list[5] = priv->port;
  940. err = mlx4_multicast_attach(mdev->dev,
  941. priv->rss_map.indir_qp,
  942. mc_list,
  943. priv->port, 0,
  944. MLX4_PROT_ETH,
  945. &mclist->reg_id);
  946. if (err)
  947. en_err(priv, "Fail to attach multicast address\n");
  948. err = mlx4_en_tunnel_steer_add(priv, &mc_list[10], priv->base_qpn,
  949. &mclist->tunnel_reg_id);
  950. if (err)
  951. en_err(priv, "Failed to attach multicast address\n");
  952. }
  953. }
  954. }
  955. }
  956. static void mlx4_en_do_uc_filter(struct mlx4_en_priv *priv,
  957. struct net_device *dev,
  958. struct mlx4_en_dev *mdev)
  959. {
  960. struct netdev_hw_addr *ha;
  961. struct mlx4_mac_entry *entry;
  962. struct hlist_node *tmp;
  963. bool found;
  964. u64 mac;
  965. int err = 0;
  966. struct hlist_head *bucket;
  967. unsigned int i;
  968. int removed = 0;
  969. u32 prev_flags;
  970. /* Note that we do not need to protect our mac_hash traversal with rcu,
  971. * since all modification code is protected by mdev->state_lock
  972. */
  973. /* find what to remove */
  974. for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) {
  975. bucket = &priv->mac_hash[i];
  976. hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
  977. found = false;
  978. netdev_for_each_uc_addr(ha, dev) {
  979. if (ether_addr_equal_64bits(entry->mac,
  980. ha->addr)) {
  981. found = true;
  982. break;
  983. }
  984. }
  985. /* MAC address of the port is not in uc list */
  986. if (ether_addr_equal_64bits(entry->mac,
  987. priv->current_mac))
  988. found = true;
  989. if (!found) {
  990. mac = mlx4_mac_to_u64(entry->mac);
  991. mlx4_en_uc_steer_release(priv, entry->mac,
  992. priv->base_qpn,
  993. entry->reg_id);
  994. mlx4_unregister_mac(mdev->dev, priv->port, mac);
  995. hlist_del_rcu(&entry->hlist);
  996. kfree_rcu(entry, rcu);
  997. en_dbg(DRV, priv, "Removed MAC %pM on port:%d\n",
  998. entry->mac, priv->port);
  999. ++removed;
  1000. }
  1001. }
  1002. }
  1003. /* if we didn't remove anything, there is no use in trying to add
  1004. * again once we are in a forced promisc mode state
  1005. */
  1006. if ((priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) && 0 == removed)
  1007. return;
  1008. prev_flags = priv->flags;
  1009. priv->flags &= ~MLX4_EN_FLAG_FORCE_PROMISC;
  1010. /* find what to add */
  1011. netdev_for_each_uc_addr(ha, dev) {
  1012. found = false;
  1013. bucket = &priv->mac_hash[ha->addr[MLX4_EN_MAC_HASH_IDX]];
  1014. hlist_for_each_entry(entry, bucket, hlist) {
  1015. if (ether_addr_equal_64bits(entry->mac, ha->addr)) {
  1016. found = true;
  1017. break;
  1018. }
  1019. }
  1020. if (!found) {
  1021. entry = kmalloc(sizeof(*entry), GFP_KERNEL);
  1022. if (!entry) {
  1023. en_err(priv, "Failed adding MAC %pM on port:%d (out of memory)\n",
  1024. ha->addr, priv->port);
  1025. priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
  1026. break;
  1027. }
  1028. mac = mlx4_mac_to_u64(ha->addr);
  1029. memcpy(entry->mac, ha->addr, ETH_ALEN);
  1030. err = mlx4_register_mac(mdev->dev, priv->port, mac);
  1031. if (err < 0) {
  1032. en_err(priv, "Failed registering MAC %pM on port %d: %d\n",
  1033. ha->addr, priv->port, err);
  1034. kfree(entry);
  1035. priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
  1036. break;
  1037. }
  1038. err = mlx4_en_uc_steer_add(priv, ha->addr,
  1039. &priv->base_qpn,
  1040. &entry->reg_id);
  1041. if (err) {
  1042. en_err(priv, "Failed adding MAC %pM on port %d: %d\n",
  1043. ha->addr, priv->port, err);
  1044. mlx4_unregister_mac(mdev->dev, priv->port, mac);
  1045. kfree(entry);
  1046. priv->flags |= MLX4_EN_FLAG_FORCE_PROMISC;
  1047. break;
  1048. } else {
  1049. unsigned int mac_hash;
  1050. en_dbg(DRV, priv, "Added MAC %pM on port:%d\n",
  1051. ha->addr, priv->port);
  1052. mac_hash = ha->addr[MLX4_EN_MAC_HASH_IDX];
  1053. bucket = &priv->mac_hash[mac_hash];
  1054. hlist_add_head_rcu(&entry->hlist, bucket);
  1055. }
  1056. }
  1057. }
  1058. if (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC) {
  1059. en_warn(priv, "Forcing promiscuous mode on port:%d\n",
  1060. priv->port);
  1061. } else if (prev_flags & MLX4_EN_FLAG_FORCE_PROMISC) {
  1062. en_warn(priv, "Stop forcing promiscuous mode on port:%d\n",
  1063. priv->port);
  1064. }
  1065. }
  1066. static void mlx4_en_do_set_rx_mode(struct work_struct *work)
  1067. {
  1068. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  1069. rx_mode_task);
  1070. struct mlx4_en_dev *mdev = priv->mdev;
  1071. struct net_device *dev = priv->dev;
  1072. mutex_lock(&mdev->state_lock);
  1073. if (!mdev->device_up) {
  1074. en_dbg(HW, priv, "Card is not up, ignoring rx mode change.\n");
  1075. goto out;
  1076. }
  1077. if (!priv->port_up) {
  1078. en_dbg(HW, priv, "Port is down, ignoring rx mode change.\n");
  1079. goto out;
  1080. }
  1081. if (!netif_carrier_ok(dev)) {
  1082. if (!mlx4_en_QUERY_PORT(mdev, priv->port)) {
  1083. if (priv->port_state.link_state) {
  1084. priv->last_link_state = MLX4_DEV_EVENT_PORT_UP;
  1085. netif_carrier_on(dev);
  1086. en_dbg(LINK, priv, "Link Up\n");
  1087. }
  1088. }
  1089. }
  1090. if (dev->priv_flags & IFF_UNICAST_FLT)
  1091. mlx4_en_do_uc_filter(priv, dev, mdev);
  1092. /* Promsicuous mode: disable all filters */
  1093. if ((dev->flags & IFF_PROMISC) ||
  1094. (priv->flags & MLX4_EN_FLAG_FORCE_PROMISC)) {
  1095. mlx4_en_set_promisc_mode(priv, mdev);
  1096. goto out;
  1097. }
  1098. /* Not in promiscuous mode */
  1099. if (priv->flags & MLX4_EN_FLAG_PROMISC)
  1100. mlx4_en_clear_promisc_mode(priv, mdev);
  1101. mlx4_en_do_multicast(priv, dev, mdev);
  1102. out:
  1103. mutex_unlock(&mdev->state_lock);
  1104. }
  1105. static int mlx4_en_set_rss_steer_rules(struct mlx4_en_priv *priv)
  1106. {
  1107. u64 reg_id;
  1108. int err = 0;
  1109. int *qpn = &priv->base_qpn;
  1110. struct mlx4_mac_entry *entry;
  1111. err = mlx4_en_uc_steer_add(priv, priv->dev->dev_addr, qpn, &reg_id);
  1112. if (err)
  1113. return err;
  1114. err = mlx4_en_tunnel_steer_add(priv, priv->dev->dev_addr, *qpn,
  1115. &priv->tunnel_reg_id);
  1116. if (err)
  1117. goto tunnel_err;
  1118. entry = kmalloc(sizeof(*entry), GFP_KERNEL);
  1119. if (!entry) {
  1120. err = -ENOMEM;
  1121. goto alloc_err;
  1122. }
  1123. memcpy(entry->mac, priv->dev->dev_addr, sizeof(entry->mac));
  1124. memcpy(priv->current_mac, entry->mac, sizeof(priv->current_mac));
  1125. entry->reg_id = reg_id;
  1126. hlist_add_head_rcu(&entry->hlist,
  1127. &priv->mac_hash[entry->mac[MLX4_EN_MAC_HASH_IDX]]);
  1128. return 0;
  1129. alloc_err:
  1130. if (priv->tunnel_reg_id)
  1131. mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id);
  1132. tunnel_err:
  1133. mlx4_en_uc_steer_release(priv, priv->dev->dev_addr, *qpn, reg_id);
  1134. return err;
  1135. }
  1136. static void mlx4_en_delete_rss_steer_rules(struct mlx4_en_priv *priv)
  1137. {
  1138. u64 mac;
  1139. unsigned int i;
  1140. int qpn = priv->base_qpn;
  1141. struct hlist_head *bucket;
  1142. struct hlist_node *tmp;
  1143. struct mlx4_mac_entry *entry;
  1144. for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i) {
  1145. bucket = &priv->mac_hash[i];
  1146. hlist_for_each_entry_safe(entry, tmp, bucket, hlist) {
  1147. mac = mlx4_mac_to_u64(entry->mac);
  1148. en_dbg(DRV, priv, "Registering MAC:%pM for deleting\n",
  1149. entry->mac);
  1150. mlx4_en_uc_steer_release(priv, entry->mac,
  1151. qpn, entry->reg_id);
  1152. mlx4_unregister_mac(priv->mdev->dev, priv->port, mac);
  1153. hlist_del_rcu(&entry->hlist);
  1154. kfree_rcu(entry, rcu);
  1155. }
  1156. }
  1157. if (priv->tunnel_reg_id) {
  1158. mlx4_flow_detach(priv->mdev->dev, priv->tunnel_reg_id);
  1159. priv->tunnel_reg_id = 0;
  1160. }
  1161. }
  1162. static void mlx4_en_tx_timeout(struct net_device *dev)
  1163. {
  1164. struct mlx4_en_priv *priv = netdev_priv(dev);
  1165. struct mlx4_en_dev *mdev = priv->mdev;
  1166. int i;
  1167. if (netif_msg_timer(priv))
  1168. en_warn(priv, "Tx timeout called on port:%d\n", priv->port);
  1169. for (i = 0; i < priv->tx_ring_num[TX]; i++) {
  1170. struct mlx4_en_tx_ring *tx_ring = priv->tx_ring[TX][i];
  1171. if (!netif_tx_queue_stopped(netdev_get_tx_queue(dev, i)))
  1172. continue;
  1173. en_warn(priv, "TX timeout on queue: %d, QP: 0x%x, CQ: 0x%x, Cons: 0x%x, Prod: 0x%x\n",
  1174. i, tx_ring->qpn, tx_ring->sp_cqn,
  1175. tx_ring->cons, tx_ring->prod);
  1176. }
  1177. priv->port_stats.tx_timeout++;
  1178. en_dbg(DRV, priv, "Scheduling watchdog\n");
  1179. queue_work(mdev->workqueue, &priv->watchdog_task);
  1180. }
  1181. static void
  1182. mlx4_en_get_stats64(struct net_device *dev, struct rtnl_link_stats64 *stats)
  1183. {
  1184. struct mlx4_en_priv *priv = netdev_priv(dev);
  1185. spin_lock_bh(&priv->stats_lock);
  1186. mlx4_en_fold_software_stats(dev);
  1187. netdev_stats_to_stats64(stats, &dev->stats);
  1188. spin_unlock_bh(&priv->stats_lock);
  1189. }
  1190. static void mlx4_en_set_default_moderation(struct mlx4_en_priv *priv)
  1191. {
  1192. struct mlx4_en_cq *cq;
  1193. int i, t;
  1194. /* If we haven't received a specific coalescing setting
  1195. * (module param), we set the moderation parameters as follows:
  1196. * - moder_cnt is set to the number of mtu sized packets to
  1197. * satisfy our coalescing target.
  1198. * - moder_time is set to a fixed value.
  1199. */
  1200. priv->rx_frames = MLX4_EN_RX_COAL_TARGET;
  1201. priv->rx_usecs = MLX4_EN_RX_COAL_TIME;
  1202. priv->tx_frames = MLX4_EN_TX_COAL_PKTS;
  1203. priv->tx_usecs = MLX4_EN_TX_COAL_TIME;
  1204. en_dbg(INTR, priv, "Default coalescing params for mtu:%d - rx_frames:%d rx_usecs:%d\n",
  1205. priv->dev->mtu, priv->rx_frames, priv->rx_usecs);
  1206. /* Setup cq moderation params */
  1207. for (i = 0; i < priv->rx_ring_num; i++) {
  1208. cq = priv->rx_cq[i];
  1209. cq->moder_cnt = priv->rx_frames;
  1210. cq->moder_time = priv->rx_usecs;
  1211. priv->last_moder_time[i] = MLX4_EN_AUTO_CONF;
  1212. priv->last_moder_packets[i] = 0;
  1213. priv->last_moder_bytes[i] = 0;
  1214. }
  1215. for (t = 0 ; t < MLX4_EN_NUM_TX_TYPES; t++) {
  1216. for (i = 0; i < priv->tx_ring_num[t]; i++) {
  1217. cq = priv->tx_cq[t][i];
  1218. cq->moder_cnt = priv->tx_frames;
  1219. cq->moder_time = priv->tx_usecs;
  1220. }
  1221. }
  1222. /* Reset auto-moderation params */
  1223. priv->pkt_rate_low = MLX4_EN_RX_RATE_LOW;
  1224. priv->rx_usecs_low = MLX4_EN_RX_COAL_TIME_LOW;
  1225. priv->pkt_rate_high = MLX4_EN_RX_RATE_HIGH;
  1226. priv->rx_usecs_high = MLX4_EN_RX_COAL_TIME_HIGH;
  1227. priv->sample_interval = MLX4_EN_SAMPLE_INTERVAL;
  1228. priv->adaptive_rx_coal = 1;
  1229. priv->last_moder_jiffies = 0;
  1230. priv->last_moder_tx_packets = 0;
  1231. }
  1232. static void mlx4_en_auto_moderation(struct mlx4_en_priv *priv)
  1233. {
  1234. unsigned long period = (unsigned long) (jiffies - priv->last_moder_jiffies);
  1235. u32 pkt_rate_high, pkt_rate_low;
  1236. struct mlx4_en_cq *cq;
  1237. unsigned long packets;
  1238. unsigned long rate;
  1239. unsigned long avg_pkt_size;
  1240. unsigned long rx_packets;
  1241. unsigned long rx_bytes;
  1242. unsigned long rx_pkt_diff;
  1243. int moder_time;
  1244. int ring, err;
  1245. if (!priv->adaptive_rx_coal || period < priv->sample_interval * HZ)
  1246. return;
  1247. pkt_rate_low = READ_ONCE(priv->pkt_rate_low);
  1248. pkt_rate_high = READ_ONCE(priv->pkt_rate_high);
  1249. for (ring = 0; ring < priv->rx_ring_num; ring++) {
  1250. rx_packets = READ_ONCE(priv->rx_ring[ring]->packets);
  1251. rx_bytes = READ_ONCE(priv->rx_ring[ring]->bytes);
  1252. rx_pkt_diff = rx_packets - priv->last_moder_packets[ring];
  1253. packets = rx_pkt_diff;
  1254. rate = packets * HZ / period;
  1255. avg_pkt_size = packets ? (rx_bytes -
  1256. priv->last_moder_bytes[ring]) / packets : 0;
  1257. /* Apply auto-moderation only when packet rate
  1258. * exceeds a rate that it matters */
  1259. if (rate > (MLX4_EN_RX_RATE_THRESH / priv->rx_ring_num) &&
  1260. avg_pkt_size > MLX4_EN_AVG_PKT_SMALL) {
  1261. if (rate <= pkt_rate_low)
  1262. moder_time = priv->rx_usecs_low;
  1263. else if (rate >= pkt_rate_high)
  1264. moder_time = priv->rx_usecs_high;
  1265. else
  1266. moder_time = (rate - pkt_rate_low) *
  1267. (priv->rx_usecs_high - priv->rx_usecs_low) /
  1268. (pkt_rate_high - pkt_rate_low) +
  1269. priv->rx_usecs_low;
  1270. } else {
  1271. moder_time = priv->rx_usecs_low;
  1272. }
  1273. cq = priv->rx_cq[ring];
  1274. if (moder_time != priv->last_moder_time[ring] ||
  1275. cq->moder_cnt != priv->rx_frames) {
  1276. priv->last_moder_time[ring] = moder_time;
  1277. cq->moder_time = moder_time;
  1278. cq->moder_cnt = priv->rx_frames;
  1279. err = mlx4_en_set_cq_moder(priv, cq);
  1280. if (err)
  1281. en_err(priv, "Failed modifying moderation for cq:%d\n",
  1282. ring);
  1283. }
  1284. priv->last_moder_packets[ring] = rx_packets;
  1285. priv->last_moder_bytes[ring] = rx_bytes;
  1286. }
  1287. priv->last_moder_jiffies = jiffies;
  1288. }
  1289. static void mlx4_en_do_get_stats(struct work_struct *work)
  1290. {
  1291. struct delayed_work *delay = to_delayed_work(work);
  1292. struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv,
  1293. stats_task);
  1294. struct mlx4_en_dev *mdev = priv->mdev;
  1295. int err;
  1296. mutex_lock(&mdev->state_lock);
  1297. if (mdev->device_up) {
  1298. if (priv->port_up) {
  1299. err = mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 0);
  1300. if (err)
  1301. en_dbg(HW, priv, "Could not update stats\n");
  1302. mlx4_en_auto_moderation(priv);
  1303. }
  1304. queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
  1305. }
  1306. if (mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port]) {
  1307. mlx4_en_do_set_mac(priv, priv->current_mac);
  1308. mdev->mac_removed[MLX4_MAX_PORTS + 1 - priv->port] = 0;
  1309. }
  1310. mutex_unlock(&mdev->state_lock);
  1311. }
  1312. /* mlx4_en_service_task - Run service task for tasks that needed to be done
  1313. * periodically
  1314. */
  1315. static void mlx4_en_service_task(struct work_struct *work)
  1316. {
  1317. struct delayed_work *delay = to_delayed_work(work);
  1318. struct mlx4_en_priv *priv = container_of(delay, struct mlx4_en_priv,
  1319. service_task);
  1320. struct mlx4_en_dev *mdev = priv->mdev;
  1321. mutex_lock(&mdev->state_lock);
  1322. if (mdev->device_up) {
  1323. if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)
  1324. mlx4_en_ptp_overflow_check(mdev);
  1325. mlx4_en_recover_from_oom(priv);
  1326. queue_delayed_work(mdev->workqueue, &priv->service_task,
  1327. SERVICE_TASK_DELAY);
  1328. }
  1329. mutex_unlock(&mdev->state_lock);
  1330. }
  1331. static void mlx4_en_linkstate(struct work_struct *work)
  1332. {
  1333. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  1334. linkstate_task);
  1335. struct mlx4_en_dev *mdev = priv->mdev;
  1336. int linkstate = priv->link_state;
  1337. mutex_lock(&mdev->state_lock);
  1338. /* If observable port state changed set carrier state and
  1339. * report to system log */
  1340. if (priv->last_link_state != linkstate) {
  1341. if (linkstate == MLX4_DEV_EVENT_PORT_DOWN) {
  1342. en_info(priv, "Link Down\n");
  1343. netif_carrier_off(priv->dev);
  1344. } else {
  1345. en_info(priv, "Link Up\n");
  1346. netif_carrier_on(priv->dev);
  1347. }
  1348. }
  1349. priv->last_link_state = linkstate;
  1350. mutex_unlock(&mdev->state_lock);
  1351. }
  1352. static int mlx4_en_init_affinity_hint(struct mlx4_en_priv *priv, int ring_idx)
  1353. {
  1354. struct mlx4_en_rx_ring *ring = priv->rx_ring[ring_idx];
  1355. int numa_node = priv->mdev->dev->numa_node;
  1356. if (!zalloc_cpumask_var(&ring->affinity_mask, GFP_KERNEL))
  1357. return -ENOMEM;
  1358. cpumask_set_cpu(cpumask_local_spread(ring_idx, numa_node),
  1359. ring->affinity_mask);
  1360. return 0;
  1361. }
  1362. static void mlx4_en_free_affinity_hint(struct mlx4_en_priv *priv, int ring_idx)
  1363. {
  1364. free_cpumask_var(priv->rx_ring[ring_idx]->affinity_mask);
  1365. }
  1366. static void mlx4_en_init_recycle_ring(struct mlx4_en_priv *priv,
  1367. int tx_ring_idx)
  1368. {
  1369. struct mlx4_en_tx_ring *tx_ring = priv->tx_ring[TX_XDP][tx_ring_idx];
  1370. int rr_index = tx_ring_idx;
  1371. tx_ring->free_tx_desc = mlx4_en_recycle_tx_desc;
  1372. tx_ring->recycle_ring = priv->rx_ring[rr_index];
  1373. en_dbg(DRV, priv, "Set tx_ring[%d][%d]->recycle_ring = rx_ring[%d]\n",
  1374. TX_XDP, tx_ring_idx, rr_index);
  1375. }
  1376. int mlx4_en_start_port(struct net_device *dev)
  1377. {
  1378. struct mlx4_en_priv *priv = netdev_priv(dev);
  1379. struct mlx4_en_dev *mdev = priv->mdev;
  1380. struct mlx4_en_cq *cq;
  1381. struct mlx4_en_tx_ring *tx_ring;
  1382. int rx_index = 0;
  1383. int err = 0;
  1384. int i, t;
  1385. int j;
  1386. u8 mc_list[16] = {0};
  1387. if (priv->port_up) {
  1388. en_dbg(DRV, priv, "start port called while port already up\n");
  1389. return 0;
  1390. }
  1391. INIT_LIST_HEAD(&priv->mc_list);
  1392. INIT_LIST_HEAD(&priv->curr_list);
  1393. INIT_LIST_HEAD(&priv->ethtool_list);
  1394. memset(&priv->ethtool_rules[0], 0,
  1395. sizeof(struct ethtool_flow_id) * MAX_NUM_OF_FS_RULES);
  1396. /* Calculate Rx buf size */
  1397. dev->mtu = min(dev->mtu, priv->max_mtu);
  1398. mlx4_en_calc_rx_buf(dev);
  1399. en_dbg(DRV, priv, "Rx buf size:%d\n", priv->rx_skb_size);
  1400. /* Configure rx cq's and rings */
  1401. err = mlx4_en_activate_rx_rings(priv);
  1402. if (err) {
  1403. en_err(priv, "Failed to activate RX rings\n");
  1404. return err;
  1405. }
  1406. for (i = 0; i < priv->rx_ring_num; i++) {
  1407. cq = priv->rx_cq[i];
  1408. err = mlx4_en_init_affinity_hint(priv, i);
  1409. if (err) {
  1410. en_err(priv, "Failed preparing IRQ affinity hint\n");
  1411. goto cq_err;
  1412. }
  1413. err = mlx4_en_activate_cq(priv, cq, i);
  1414. if (err) {
  1415. en_err(priv, "Failed activating Rx CQ\n");
  1416. mlx4_en_free_affinity_hint(priv, i);
  1417. goto cq_err;
  1418. }
  1419. for (j = 0; j < cq->size; j++) {
  1420. struct mlx4_cqe *cqe = NULL;
  1421. cqe = mlx4_en_get_cqe(cq->buf, j, priv->cqe_size) +
  1422. priv->cqe_factor;
  1423. cqe->owner_sr_opcode = MLX4_CQE_OWNER_MASK;
  1424. }
  1425. err = mlx4_en_set_cq_moder(priv, cq);
  1426. if (err) {
  1427. en_err(priv, "Failed setting cq moderation parameters\n");
  1428. mlx4_en_deactivate_cq(priv, cq);
  1429. mlx4_en_free_affinity_hint(priv, i);
  1430. goto cq_err;
  1431. }
  1432. mlx4_en_arm_cq(priv, cq);
  1433. priv->rx_ring[i]->cqn = cq->mcq.cqn;
  1434. ++rx_index;
  1435. }
  1436. /* Set qp number */
  1437. en_dbg(DRV, priv, "Getting qp number for port %d\n", priv->port);
  1438. err = mlx4_en_get_qp(priv);
  1439. if (err) {
  1440. en_err(priv, "Failed getting eth qp\n");
  1441. goto cq_err;
  1442. }
  1443. mdev->mac_removed[priv->port] = 0;
  1444. priv->counter_index =
  1445. mlx4_get_default_counter_index(mdev->dev, priv->port);
  1446. err = mlx4_en_config_rss_steer(priv);
  1447. if (err) {
  1448. en_err(priv, "Failed configuring rss steering\n");
  1449. goto mac_err;
  1450. }
  1451. err = mlx4_en_create_drop_qp(priv);
  1452. if (err)
  1453. goto rss_err;
  1454. /* Configure tx cq's and rings */
  1455. for (t = 0 ; t < MLX4_EN_NUM_TX_TYPES; t++) {
  1456. u8 num_tx_rings_p_up = t == TX ?
  1457. priv->num_tx_rings_p_up : priv->tx_ring_num[t];
  1458. for (i = 0; i < priv->tx_ring_num[t]; i++) {
  1459. /* Configure cq */
  1460. cq = priv->tx_cq[t][i];
  1461. err = mlx4_en_activate_cq(priv, cq, i);
  1462. if (err) {
  1463. en_err(priv, "Failed allocating Tx CQ\n");
  1464. goto tx_err;
  1465. }
  1466. err = mlx4_en_set_cq_moder(priv, cq);
  1467. if (err) {
  1468. en_err(priv, "Failed setting cq moderation parameters\n");
  1469. mlx4_en_deactivate_cq(priv, cq);
  1470. goto tx_err;
  1471. }
  1472. en_dbg(DRV, priv,
  1473. "Resetting index of collapsed CQ:%d to -1\n", i);
  1474. cq->buf->wqe_index = cpu_to_be16(0xffff);
  1475. /* Configure ring */
  1476. tx_ring = priv->tx_ring[t][i];
  1477. err = mlx4_en_activate_tx_ring(priv, tx_ring,
  1478. cq->mcq.cqn,
  1479. i / num_tx_rings_p_up);
  1480. if (err) {
  1481. en_err(priv, "Failed allocating Tx ring\n");
  1482. mlx4_en_deactivate_cq(priv, cq);
  1483. goto tx_err;
  1484. }
  1485. if (t != TX_XDP) {
  1486. tx_ring->tx_queue = netdev_get_tx_queue(dev, i);
  1487. tx_ring->recycle_ring = NULL;
  1488. /* Arm CQ for TX completions */
  1489. mlx4_en_arm_cq(priv, cq);
  1490. } else {
  1491. mlx4_en_init_tx_xdp_ring_descs(priv, tx_ring);
  1492. mlx4_en_init_recycle_ring(priv, i);
  1493. /* XDP TX CQ should never be armed */
  1494. }
  1495. /* Set initial ownership of all Tx TXBBs to SW (1) */
  1496. for (j = 0; j < tx_ring->buf_size; j += STAMP_STRIDE)
  1497. *((u32 *)(tx_ring->buf + j)) = 0xffffffff;
  1498. }
  1499. }
  1500. /* Configure port */
  1501. err = mlx4_SET_PORT_general(mdev->dev, priv->port,
  1502. priv->rx_skb_size + ETH_FCS_LEN,
  1503. priv->prof->tx_pause,
  1504. priv->prof->tx_ppp,
  1505. priv->prof->rx_pause,
  1506. priv->prof->rx_ppp);
  1507. if (err) {
  1508. en_err(priv, "Failed setting port general configurations for port %d, with error %d\n",
  1509. priv->port, err);
  1510. goto tx_err;
  1511. }
  1512. err = mlx4_SET_PORT_user_mtu(mdev->dev, priv->port, dev->mtu);
  1513. if (err) {
  1514. en_err(priv, "Failed to pass user MTU(%d) to Firmware for port %d, with error %d\n",
  1515. dev->mtu, priv->port, err);
  1516. goto tx_err;
  1517. }
  1518. /* Set default qp number */
  1519. err = mlx4_SET_PORT_qpn_calc(mdev->dev, priv->port, priv->base_qpn, 0);
  1520. if (err) {
  1521. en_err(priv, "Failed setting default qp numbers\n");
  1522. goto tx_err;
  1523. }
  1524. if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) {
  1525. err = mlx4_SET_PORT_VXLAN(mdev->dev, priv->port, VXLAN_STEER_BY_OUTER_MAC, 1);
  1526. if (err) {
  1527. en_err(priv, "Failed setting port L2 tunnel configuration, err %d\n",
  1528. err);
  1529. goto tx_err;
  1530. }
  1531. }
  1532. /* Init port */
  1533. en_dbg(HW, priv, "Initializing port\n");
  1534. err = mlx4_INIT_PORT(mdev->dev, priv->port);
  1535. if (err) {
  1536. en_err(priv, "Failed Initializing port\n");
  1537. goto tx_err;
  1538. }
  1539. /* Set Unicast and VXLAN steering rules */
  1540. if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0 &&
  1541. mlx4_en_set_rss_steer_rules(priv))
  1542. mlx4_warn(mdev, "Failed setting steering rules\n");
  1543. /* Attach rx QP to bradcast address */
  1544. eth_broadcast_addr(&mc_list[10]);
  1545. mc_list[5] = priv->port; /* needed for B0 steering support */
  1546. if (mlx4_multicast_attach(mdev->dev, priv->rss_map.indir_qp, mc_list,
  1547. priv->port, 0, MLX4_PROT_ETH,
  1548. &priv->broadcast_id))
  1549. mlx4_warn(mdev, "Failed Attaching Broadcast\n");
  1550. /* Must redo promiscuous mode setup. */
  1551. priv->flags &= ~(MLX4_EN_FLAG_PROMISC | MLX4_EN_FLAG_MC_PROMISC);
  1552. /* Schedule multicast task to populate multicast list */
  1553. queue_work(mdev->workqueue, &priv->rx_mode_task);
  1554. if (priv->mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN)
  1555. udp_tunnel_get_rx_info(dev);
  1556. priv->port_up = true;
  1557. /* Process all completions if exist to prevent
  1558. * the queues freezing if they are full
  1559. */
  1560. for (i = 0; i < priv->rx_ring_num; i++) {
  1561. local_bh_disable();
  1562. napi_schedule(&priv->rx_cq[i]->napi);
  1563. local_bh_enable();
  1564. }
  1565. netif_tx_start_all_queues(dev);
  1566. netif_device_attach(dev);
  1567. return 0;
  1568. tx_err:
  1569. if (t == MLX4_EN_NUM_TX_TYPES) {
  1570. t--;
  1571. i = priv->tx_ring_num[t];
  1572. }
  1573. while (t >= 0) {
  1574. while (i--) {
  1575. mlx4_en_deactivate_tx_ring(priv, priv->tx_ring[t][i]);
  1576. mlx4_en_deactivate_cq(priv, priv->tx_cq[t][i]);
  1577. }
  1578. if (!t--)
  1579. break;
  1580. i = priv->tx_ring_num[t];
  1581. }
  1582. mlx4_en_destroy_drop_qp(priv);
  1583. rss_err:
  1584. mlx4_en_release_rss_steer(priv);
  1585. mac_err:
  1586. mlx4_en_put_qp(priv);
  1587. cq_err:
  1588. while (rx_index--) {
  1589. mlx4_en_deactivate_cq(priv, priv->rx_cq[rx_index]);
  1590. mlx4_en_free_affinity_hint(priv, rx_index);
  1591. }
  1592. for (i = 0; i < priv->rx_ring_num; i++)
  1593. mlx4_en_deactivate_rx_ring(priv, priv->rx_ring[i]);
  1594. return err; /* need to close devices */
  1595. }
  1596. void mlx4_en_stop_port(struct net_device *dev, int detach)
  1597. {
  1598. struct mlx4_en_priv *priv = netdev_priv(dev);
  1599. struct mlx4_en_dev *mdev = priv->mdev;
  1600. struct mlx4_en_mc_list *mclist, *tmp;
  1601. struct ethtool_flow_id *flow, *tmp_flow;
  1602. int i, t;
  1603. u8 mc_list[16] = {0};
  1604. if (!priv->port_up) {
  1605. en_dbg(DRV, priv, "stop port called while port already down\n");
  1606. return;
  1607. }
  1608. /* close port*/
  1609. mlx4_CLOSE_PORT(mdev->dev, priv->port);
  1610. /* Synchronize with tx routine */
  1611. netif_tx_lock_bh(dev);
  1612. if (detach)
  1613. netif_device_detach(dev);
  1614. netif_tx_stop_all_queues(dev);
  1615. netif_tx_unlock_bh(dev);
  1616. netif_tx_disable(dev);
  1617. spin_lock_bh(&priv->stats_lock);
  1618. mlx4_en_fold_software_stats(dev);
  1619. /* Set port as not active */
  1620. priv->port_up = false;
  1621. spin_unlock_bh(&priv->stats_lock);
  1622. priv->counter_index = MLX4_SINK_COUNTER_INDEX(mdev->dev);
  1623. /* Promsicuous mode */
  1624. if (mdev->dev->caps.steering_mode ==
  1625. MLX4_STEERING_MODE_DEVICE_MANAGED) {
  1626. priv->flags &= ~(MLX4_EN_FLAG_PROMISC |
  1627. MLX4_EN_FLAG_MC_PROMISC);
  1628. mlx4_flow_steer_promisc_remove(mdev->dev,
  1629. priv->port,
  1630. MLX4_FS_ALL_DEFAULT);
  1631. mlx4_flow_steer_promisc_remove(mdev->dev,
  1632. priv->port,
  1633. MLX4_FS_MC_DEFAULT);
  1634. } else if (priv->flags & MLX4_EN_FLAG_PROMISC) {
  1635. priv->flags &= ~MLX4_EN_FLAG_PROMISC;
  1636. /* Disable promiscouos mode */
  1637. mlx4_unicast_promisc_remove(mdev->dev, priv->base_qpn,
  1638. priv->port);
  1639. /* Disable Multicast promisc */
  1640. if (priv->flags & MLX4_EN_FLAG_MC_PROMISC) {
  1641. mlx4_multicast_promisc_remove(mdev->dev, priv->base_qpn,
  1642. priv->port);
  1643. priv->flags &= ~MLX4_EN_FLAG_MC_PROMISC;
  1644. }
  1645. }
  1646. /* Detach All multicasts */
  1647. eth_broadcast_addr(&mc_list[10]);
  1648. mc_list[5] = priv->port; /* needed for B0 steering support */
  1649. mlx4_multicast_detach(mdev->dev, priv->rss_map.indir_qp, mc_list,
  1650. MLX4_PROT_ETH, priv->broadcast_id);
  1651. list_for_each_entry(mclist, &priv->curr_list, list) {
  1652. memcpy(&mc_list[10], mclist->addr, ETH_ALEN);
  1653. mc_list[5] = priv->port;
  1654. mlx4_multicast_detach(mdev->dev, priv->rss_map.indir_qp,
  1655. mc_list, MLX4_PROT_ETH, mclist->reg_id);
  1656. if (mclist->tunnel_reg_id)
  1657. mlx4_flow_detach(mdev->dev, mclist->tunnel_reg_id);
  1658. }
  1659. mlx4_en_clear_list(dev);
  1660. list_for_each_entry_safe(mclist, tmp, &priv->curr_list, list) {
  1661. list_del(&mclist->list);
  1662. kfree(mclist);
  1663. }
  1664. /* Flush multicast filter */
  1665. mlx4_SET_MCAST_FLTR(mdev->dev, priv->port, 0, 1, MLX4_MCAST_CONFIG);
  1666. /* Remove flow steering rules for the port*/
  1667. if (mdev->dev->caps.steering_mode ==
  1668. MLX4_STEERING_MODE_DEVICE_MANAGED) {
  1669. ASSERT_RTNL();
  1670. list_for_each_entry_safe(flow, tmp_flow,
  1671. &priv->ethtool_list, list) {
  1672. mlx4_flow_detach(mdev->dev, flow->id);
  1673. list_del(&flow->list);
  1674. }
  1675. }
  1676. mlx4_en_destroy_drop_qp(priv);
  1677. /* Free TX Rings */
  1678. for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
  1679. for (i = 0; i < priv->tx_ring_num[t]; i++) {
  1680. mlx4_en_deactivate_tx_ring(priv, priv->tx_ring[t][i]);
  1681. mlx4_en_deactivate_cq(priv, priv->tx_cq[t][i]);
  1682. }
  1683. }
  1684. msleep(10);
  1685. for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++)
  1686. for (i = 0; i < priv->tx_ring_num[t]; i++)
  1687. mlx4_en_free_tx_buf(dev, priv->tx_ring[t][i]);
  1688. if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0)
  1689. mlx4_en_delete_rss_steer_rules(priv);
  1690. /* Free RSS qps */
  1691. mlx4_en_release_rss_steer(priv);
  1692. /* Unregister Mac address for the port */
  1693. mlx4_en_put_qp(priv);
  1694. if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_REASSIGN_MAC_EN))
  1695. mdev->mac_removed[priv->port] = 1;
  1696. /* Free RX Rings */
  1697. for (i = 0; i < priv->rx_ring_num; i++) {
  1698. struct mlx4_en_cq *cq = priv->rx_cq[i];
  1699. napi_synchronize(&cq->napi);
  1700. mlx4_en_deactivate_rx_ring(priv, priv->rx_ring[i]);
  1701. mlx4_en_deactivate_cq(priv, cq);
  1702. mlx4_en_free_affinity_hint(priv, i);
  1703. }
  1704. }
  1705. static void mlx4_en_restart(struct work_struct *work)
  1706. {
  1707. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  1708. watchdog_task);
  1709. struct mlx4_en_dev *mdev = priv->mdev;
  1710. struct net_device *dev = priv->dev;
  1711. en_dbg(DRV, priv, "Watchdog task called for port %d\n", priv->port);
  1712. rtnl_lock();
  1713. mutex_lock(&mdev->state_lock);
  1714. if (priv->port_up) {
  1715. mlx4_en_stop_port(dev, 1);
  1716. if (mlx4_en_start_port(dev))
  1717. en_err(priv, "Failed restarting port %d\n", priv->port);
  1718. }
  1719. mutex_unlock(&mdev->state_lock);
  1720. rtnl_unlock();
  1721. }
  1722. static void mlx4_en_clear_stats(struct net_device *dev)
  1723. {
  1724. struct mlx4_en_priv *priv = netdev_priv(dev);
  1725. struct mlx4_en_dev *mdev = priv->mdev;
  1726. struct mlx4_en_tx_ring **tx_ring;
  1727. int i;
  1728. if (!mlx4_is_slave(mdev->dev))
  1729. if (mlx4_en_DUMP_ETH_STATS(mdev, priv->port, 1))
  1730. en_dbg(HW, priv, "Failed dumping statistics\n");
  1731. memset(&priv->pstats, 0, sizeof(priv->pstats));
  1732. memset(&priv->pkstats, 0, sizeof(priv->pkstats));
  1733. memset(&priv->port_stats, 0, sizeof(priv->port_stats));
  1734. memset(&priv->rx_flowstats, 0, sizeof(priv->rx_flowstats));
  1735. memset(&priv->tx_flowstats, 0, sizeof(priv->tx_flowstats));
  1736. memset(&priv->rx_priority_flowstats, 0,
  1737. sizeof(priv->rx_priority_flowstats));
  1738. memset(&priv->tx_priority_flowstats, 0,
  1739. sizeof(priv->tx_priority_flowstats));
  1740. memset(&priv->pf_stats, 0, sizeof(priv->pf_stats));
  1741. tx_ring = priv->tx_ring[TX];
  1742. for (i = 0; i < priv->tx_ring_num[TX]; i++) {
  1743. tx_ring[i]->bytes = 0;
  1744. tx_ring[i]->packets = 0;
  1745. tx_ring[i]->tx_csum = 0;
  1746. tx_ring[i]->tx_dropped = 0;
  1747. tx_ring[i]->queue_stopped = 0;
  1748. tx_ring[i]->wake_queue = 0;
  1749. tx_ring[i]->tso_packets = 0;
  1750. tx_ring[i]->xmit_more = 0;
  1751. }
  1752. for (i = 0; i < priv->rx_ring_num; i++) {
  1753. priv->rx_ring[i]->bytes = 0;
  1754. priv->rx_ring[i]->packets = 0;
  1755. priv->rx_ring[i]->csum_ok = 0;
  1756. priv->rx_ring[i]->csum_none = 0;
  1757. priv->rx_ring[i]->csum_complete = 0;
  1758. }
  1759. }
  1760. static int mlx4_en_open(struct net_device *dev)
  1761. {
  1762. struct mlx4_en_priv *priv = netdev_priv(dev);
  1763. struct mlx4_en_dev *mdev = priv->mdev;
  1764. int err = 0;
  1765. mutex_lock(&mdev->state_lock);
  1766. if (!mdev->device_up) {
  1767. en_err(priv, "Cannot open - device down/disabled\n");
  1768. err = -EBUSY;
  1769. goto out;
  1770. }
  1771. /* Reset HW statistics and SW counters */
  1772. mlx4_en_clear_stats(dev);
  1773. err = mlx4_en_start_port(dev);
  1774. if (err)
  1775. en_err(priv, "Failed starting port:%d\n", priv->port);
  1776. out:
  1777. mutex_unlock(&mdev->state_lock);
  1778. return err;
  1779. }
  1780. static int mlx4_en_close(struct net_device *dev)
  1781. {
  1782. struct mlx4_en_priv *priv = netdev_priv(dev);
  1783. struct mlx4_en_dev *mdev = priv->mdev;
  1784. en_dbg(IFDOWN, priv, "Close port called\n");
  1785. mutex_lock(&mdev->state_lock);
  1786. mlx4_en_stop_port(dev, 0);
  1787. netif_carrier_off(dev);
  1788. mutex_unlock(&mdev->state_lock);
  1789. return 0;
  1790. }
  1791. static void mlx4_en_free_resources(struct mlx4_en_priv *priv)
  1792. {
  1793. int i, t;
  1794. #ifdef CONFIG_RFS_ACCEL
  1795. priv->dev->rx_cpu_rmap = NULL;
  1796. #endif
  1797. for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
  1798. for (i = 0; i < priv->tx_ring_num[t]; i++) {
  1799. if (priv->tx_ring[t] && priv->tx_ring[t][i])
  1800. mlx4_en_destroy_tx_ring(priv,
  1801. &priv->tx_ring[t][i]);
  1802. if (priv->tx_cq[t] && priv->tx_cq[t][i])
  1803. mlx4_en_destroy_cq(priv, &priv->tx_cq[t][i]);
  1804. }
  1805. kfree(priv->tx_ring[t]);
  1806. kfree(priv->tx_cq[t]);
  1807. }
  1808. for (i = 0; i < priv->rx_ring_num; i++) {
  1809. if (priv->rx_ring[i])
  1810. mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i],
  1811. priv->prof->rx_ring_size, priv->stride);
  1812. if (priv->rx_cq[i])
  1813. mlx4_en_destroy_cq(priv, &priv->rx_cq[i]);
  1814. }
  1815. }
  1816. static int mlx4_en_alloc_resources(struct mlx4_en_priv *priv)
  1817. {
  1818. struct mlx4_en_port_profile *prof = priv->prof;
  1819. int i, t;
  1820. int node;
  1821. /* Create tx Rings */
  1822. for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
  1823. for (i = 0; i < priv->tx_ring_num[t]; i++) {
  1824. node = cpu_to_node(i % num_online_cpus());
  1825. if (mlx4_en_create_cq(priv, &priv->tx_cq[t][i],
  1826. prof->tx_ring_size, i, t, node))
  1827. goto err;
  1828. if (mlx4_en_create_tx_ring(priv, &priv->tx_ring[t][i],
  1829. prof->tx_ring_size,
  1830. TXBB_SIZE, node, i))
  1831. goto err;
  1832. }
  1833. }
  1834. /* Create rx Rings */
  1835. for (i = 0; i < priv->rx_ring_num; i++) {
  1836. node = cpu_to_node(i % num_online_cpus());
  1837. if (mlx4_en_create_cq(priv, &priv->rx_cq[i],
  1838. prof->rx_ring_size, i, RX, node))
  1839. goto err;
  1840. if (mlx4_en_create_rx_ring(priv, &priv->rx_ring[i],
  1841. prof->rx_ring_size, priv->stride,
  1842. node, i))
  1843. goto err;
  1844. }
  1845. #ifdef CONFIG_RFS_ACCEL
  1846. priv->dev->rx_cpu_rmap = mlx4_get_cpu_rmap(priv->mdev->dev, priv->port);
  1847. #endif
  1848. return 0;
  1849. err:
  1850. en_err(priv, "Failed to allocate NIC resources\n");
  1851. for (i = 0; i < priv->rx_ring_num; i++) {
  1852. if (priv->rx_ring[i])
  1853. mlx4_en_destroy_rx_ring(priv, &priv->rx_ring[i],
  1854. prof->rx_ring_size,
  1855. priv->stride);
  1856. if (priv->rx_cq[i])
  1857. mlx4_en_destroy_cq(priv, &priv->rx_cq[i]);
  1858. }
  1859. for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
  1860. for (i = 0; i < priv->tx_ring_num[t]; i++) {
  1861. if (priv->tx_ring[t][i])
  1862. mlx4_en_destroy_tx_ring(priv,
  1863. &priv->tx_ring[t][i]);
  1864. if (priv->tx_cq[t][i])
  1865. mlx4_en_destroy_cq(priv, &priv->tx_cq[t][i]);
  1866. }
  1867. }
  1868. return -ENOMEM;
  1869. }
  1870. static int mlx4_en_copy_priv(struct mlx4_en_priv *dst,
  1871. struct mlx4_en_priv *src,
  1872. struct mlx4_en_port_profile *prof)
  1873. {
  1874. int t;
  1875. memcpy(&dst->hwtstamp_config, &prof->hwtstamp_config,
  1876. sizeof(dst->hwtstamp_config));
  1877. dst->num_tx_rings_p_up = prof->num_tx_rings_p_up;
  1878. dst->rx_ring_num = prof->rx_ring_num;
  1879. dst->flags = prof->flags;
  1880. dst->mdev = src->mdev;
  1881. dst->port = src->port;
  1882. dst->dev = src->dev;
  1883. dst->prof = prof;
  1884. dst->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) +
  1885. DS_SIZE * MLX4_EN_MAX_RX_FRAGS);
  1886. for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
  1887. dst->tx_ring_num[t] = prof->tx_ring_num[t];
  1888. if (!dst->tx_ring_num[t])
  1889. continue;
  1890. dst->tx_ring[t] = kcalloc(MAX_TX_RINGS,
  1891. sizeof(struct mlx4_en_tx_ring *),
  1892. GFP_KERNEL);
  1893. if (!dst->tx_ring[t])
  1894. goto err_free_tx;
  1895. dst->tx_cq[t] = kcalloc(MAX_TX_RINGS,
  1896. sizeof(struct mlx4_en_cq *),
  1897. GFP_KERNEL);
  1898. if (!dst->tx_cq[t]) {
  1899. kfree(dst->tx_ring[t]);
  1900. goto err_free_tx;
  1901. }
  1902. }
  1903. return 0;
  1904. err_free_tx:
  1905. while (t--) {
  1906. kfree(dst->tx_ring[t]);
  1907. kfree(dst->tx_cq[t]);
  1908. }
  1909. return -ENOMEM;
  1910. }
  1911. static void mlx4_en_update_priv(struct mlx4_en_priv *dst,
  1912. struct mlx4_en_priv *src)
  1913. {
  1914. int t;
  1915. memcpy(dst->rx_ring, src->rx_ring,
  1916. sizeof(struct mlx4_en_rx_ring *) * src->rx_ring_num);
  1917. memcpy(dst->rx_cq, src->rx_cq,
  1918. sizeof(struct mlx4_en_cq *) * src->rx_ring_num);
  1919. memcpy(&dst->hwtstamp_config, &src->hwtstamp_config,
  1920. sizeof(dst->hwtstamp_config));
  1921. for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
  1922. dst->tx_ring_num[t] = src->tx_ring_num[t];
  1923. dst->tx_ring[t] = src->tx_ring[t];
  1924. dst->tx_cq[t] = src->tx_cq[t];
  1925. }
  1926. dst->num_tx_rings_p_up = src->num_tx_rings_p_up;
  1927. dst->rx_ring_num = src->rx_ring_num;
  1928. memcpy(dst->prof, src->prof, sizeof(struct mlx4_en_port_profile));
  1929. }
  1930. int mlx4_en_try_alloc_resources(struct mlx4_en_priv *priv,
  1931. struct mlx4_en_priv *tmp,
  1932. struct mlx4_en_port_profile *prof,
  1933. bool carry_xdp_prog)
  1934. {
  1935. struct bpf_prog *xdp_prog;
  1936. int i, t;
  1937. mlx4_en_copy_priv(tmp, priv, prof);
  1938. if (mlx4_en_alloc_resources(tmp)) {
  1939. en_warn(priv,
  1940. "%s: Resource allocation failed, using previous configuration\n",
  1941. __func__);
  1942. for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
  1943. kfree(tmp->tx_ring[t]);
  1944. kfree(tmp->tx_cq[t]);
  1945. }
  1946. return -ENOMEM;
  1947. }
  1948. /* All rx_rings has the same xdp_prog. Pick the first one. */
  1949. xdp_prog = rcu_dereference_protected(
  1950. priv->rx_ring[0]->xdp_prog,
  1951. lockdep_is_held(&priv->mdev->state_lock));
  1952. if (xdp_prog && carry_xdp_prog) {
  1953. xdp_prog = bpf_prog_add(xdp_prog, tmp->rx_ring_num);
  1954. if (IS_ERR(xdp_prog)) {
  1955. mlx4_en_free_resources(tmp);
  1956. return PTR_ERR(xdp_prog);
  1957. }
  1958. for (i = 0; i < tmp->rx_ring_num; i++)
  1959. rcu_assign_pointer(tmp->rx_ring[i]->xdp_prog,
  1960. xdp_prog);
  1961. }
  1962. return 0;
  1963. }
  1964. void mlx4_en_safe_replace_resources(struct mlx4_en_priv *priv,
  1965. struct mlx4_en_priv *tmp)
  1966. {
  1967. mlx4_en_free_resources(priv);
  1968. mlx4_en_update_priv(priv, tmp);
  1969. }
  1970. void mlx4_en_destroy_netdev(struct net_device *dev)
  1971. {
  1972. struct mlx4_en_priv *priv = netdev_priv(dev);
  1973. struct mlx4_en_dev *mdev = priv->mdev;
  1974. en_dbg(DRV, priv, "Destroying netdev on port:%d\n", priv->port);
  1975. /* Unregister device - this will close the port if it was up */
  1976. if (priv->registered) {
  1977. devlink_port_type_clear(mlx4_get_devlink_port(mdev->dev,
  1978. priv->port));
  1979. unregister_netdev(dev);
  1980. }
  1981. if (priv->allocated)
  1982. mlx4_free_hwq_res(mdev->dev, &priv->res, MLX4_EN_PAGE_SIZE);
  1983. cancel_delayed_work(&priv->stats_task);
  1984. cancel_delayed_work(&priv->service_task);
  1985. /* flush any pending task for this netdev */
  1986. flush_workqueue(mdev->workqueue);
  1987. if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)
  1988. mlx4_en_remove_timestamp(mdev);
  1989. /* Detach the netdev so tasks would not attempt to access it */
  1990. mutex_lock(&mdev->state_lock);
  1991. mdev->pndev[priv->port] = NULL;
  1992. mdev->upper[priv->port] = NULL;
  1993. #ifdef CONFIG_RFS_ACCEL
  1994. mlx4_en_cleanup_filters(priv);
  1995. #endif
  1996. mlx4_en_free_resources(priv);
  1997. mutex_unlock(&mdev->state_lock);
  1998. free_netdev(dev);
  1999. }
  2000. static bool mlx4_en_check_xdp_mtu(struct net_device *dev, int mtu)
  2001. {
  2002. struct mlx4_en_priv *priv = netdev_priv(dev);
  2003. if (mtu > MLX4_EN_MAX_XDP_MTU) {
  2004. en_err(priv, "mtu:%d > max:%d when XDP prog is attached\n",
  2005. mtu, MLX4_EN_MAX_XDP_MTU);
  2006. return false;
  2007. }
  2008. return true;
  2009. }
  2010. static int mlx4_en_change_mtu(struct net_device *dev, int new_mtu)
  2011. {
  2012. struct mlx4_en_priv *priv = netdev_priv(dev);
  2013. struct mlx4_en_dev *mdev = priv->mdev;
  2014. int err = 0;
  2015. en_dbg(DRV, priv, "Change MTU called - current:%d new:%d\n",
  2016. dev->mtu, new_mtu);
  2017. if (priv->tx_ring_num[TX_XDP] &&
  2018. !mlx4_en_check_xdp_mtu(dev, new_mtu))
  2019. return -EOPNOTSUPP;
  2020. dev->mtu = new_mtu;
  2021. if (netif_running(dev)) {
  2022. mutex_lock(&mdev->state_lock);
  2023. if (!mdev->device_up) {
  2024. /* NIC is probably restarting - let watchdog task reset
  2025. * the port */
  2026. en_dbg(DRV, priv, "Change MTU called with card down!?\n");
  2027. } else {
  2028. mlx4_en_stop_port(dev, 1);
  2029. err = mlx4_en_start_port(dev);
  2030. if (err) {
  2031. en_err(priv, "Failed restarting port:%d\n",
  2032. priv->port);
  2033. queue_work(mdev->workqueue, &priv->watchdog_task);
  2034. }
  2035. }
  2036. mutex_unlock(&mdev->state_lock);
  2037. }
  2038. return 0;
  2039. }
  2040. static int mlx4_en_hwtstamp_set(struct net_device *dev, struct ifreq *ifr)
  2041. {
  2042. struct mlx4_en_priv *priv = netdev_priv(dev);
  2043. struct mlx4_en_dev *mdev = priv->mdev;
  2044. struct hwtstamp_config config;
  2045. if (copy_from_user(&config, ifr->ifr_data, sizeof(config)))
  2046. return -EFAULT;
  2047. /* reserved for future extensions */
  2048. if (config.flags)
  2049. return -EINVAL;
  2050. /* device doesn't support time stamping */
  2051. if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS))
  2052. return -EINVAL;
  2053. /* TX HW timestamp */
  2054. switch (config.tx_type) {
  2055. case HWTSTAMP_TX_OFF:
  2056. case HWTSTAMP_TX_ON:
  2057. break;
  2058. default:
  2059. return -ERANGE;
  2060. }
  2061. /* RX HW timestamp */
  2062. switch (config.rx_filter) {
  2063. case HWTSTAMP_FILTER_NONE:
  2064. break;
  2065. case HWTSTAMP_FILTER_ALL:
  2066. case HWTSTAMP_FILTER_SOME:
  2067. case HWTSTAMP_FILTER_PTP_V1_L4_EVENT:
  2068. case HWTSTAMP_FILTER_PTP_V1_L4_SYNC:
  2069. case HWTSTAMP_FILTER_PTP_V1_L4_DELAY_REQ:
  2070. case HWTSTAMP_FILTER_PTP_V2_L4_EVENT:
  2071. case HWTSTAMP_FILTER_PTP_V2_L4_SYNC:
  2072. case HWTSTAMP_FILTER_PTP_V2_L4_DELAY_REQ:
  2073. case HWTSTAMP_FILTER_PTP_V2_L2_EVENT:
  2074. case HWTSTAMP_FILTER_PTP_V2_L2_SYNC:
  2075. case HWTSTAMP_FILTER_PTP_V2_L2_DELAY_REQ:
  2076. case HWTSTAMP_FILTER_PTP_V2_EVENT:
  2077. case HWTSTAMP_FILTER_PTP_V2_SYNC:
  2078. case HWTSTAMP_FILTER_PTP_V2_DELAY_REQ:
  2079. case HWTSTAMP_FILTER_NTP_ALL:
  2080. config.rx_filter = HWTSTAMP_FILTER_ALL;
  2081. break;
  2082. default:
  2083. return -ERANGE;
  2084. }
  2085. if (mlx4_en_reset_config(dev, config, dev->features)) {
  2086. config.tx_type = HWTSTAMP_TX_OFF;
  2087. config.rx_filter = HWTSTAMP_FILTER_NONE;
  2088. }
  2089. return copy_to_user(ifr->ifr_data, &config,
  2090. sizeof(config)) ? -EFAULT : 0;
  2091. }
  2092. static int mlx4_en_hwtstamp_get(struct net_device *dev, struct ifreq *ifr)
  2093. {
  2094. struct mlx4_en_priv *priv = netdev_priv(dev);
  2095. return copy_to_user(ifr->ifr_data, &priv->hwtstamp_config,
  2096. sizeof(priv->hwtstamp_config)) ? -EFAULT : 0;
  2097. }
  2098. static int mlx4_en_ioctl(struct net_device *dev, struct ifreq *ifr, int cmd)
  2099. {
  2100. switch (cmd) {
  2101. case SIOCSHWTSTAMP:
  2102. return mlx4_en_hwtstamp_set(dev, ifr);
  2103. case SIOCGHWTSTAMP:
  2104. return mlx4_en_hwtstamp_get(dev, ifr);
  2105. default:
  2106. return -EOPNOTSUPP;
  2107. }
  2108. }
  2109. static netdev_features_t mlx4_en_fix_features(struct net_device *netdev,
  2110. netdev_features_t features)
  2111. {
  2112. struct mlx4_en_priv *en_priv = netdev_priv(netdev);
  2113. struct mlx4_en_dev *mdev = en_priv->mdev;
  2114. /* Since there is no support for separate RX C-TAG/S-TAG vlan accel
  2115. * enable/disable make sure S-TAG flag is always in same state as
  2116. * C-TAG.
  2117. */
  2118. if (features & NETIF_F_HW_VLAN_CTAG_RX &&
  2119. !(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN))
  2120. features |= NETIF_F_HW_VLAN_STAG_RX;
  2121. else
  2122. features &= ~NETIF_F_HW_VLAN_STAG_RX;
  2123. return features;
  2124. }
  2125. static int mlx4_en_set_features(struct net_device *netdev,
  2126. netdev_features_t features)
  2127. {
  2128. struct mlx4_en_priv *priv = netdev_priv(netdev);
  2129. bool reset = false;
  2130. int ret = 0;
  2131. if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_RXFCS)) {
  2132. en_info(priv, "Turn %s RX-FCS\n",
  2133. (features & NETIF_F_RXFCS) ? "ON" : "OFF");
  2134. reset = true;
  2135. }
  2136. if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_RXALL)) {
  2137. u8 ignore_fcs_value = (features & NETIF_F_RXALL) ? 1 : 0;
  2138. en_info(priv, "Turn %s RX-ALL\n",
  2139. ignore_fcs_value ? "ON" : "OFF");
  2140. ret = mlx4_SET_PORT_fcs_check(priv->mdev->dev,
  2141. priv->port, ignore_fcs_value);
  2142. if (ret)
  2143. return ret;
  2144. }
  2145. if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_CTAG_RX)) {
  2146. en_info(priv, "Turn %s RX vlan strip offload\n",
  2147. (features & NETIF_F_HW_VLAN_CTAG_RX) ? "ON" : "OFF");
  2148. reset = true;
  2149. }
  2150. if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_CTAG_TX))
  2151. en_info(priv, "Turn %s TX vlan strip offload\n",
  2152. (features & NETIF_F_HW_VLAN_CTAG_TX) ? "ON" : "OFF");
  2153. if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_HW_VLAN_STAG_TX))
  2154. en_info(priv, "Turn %s TX S-VLAN strip offload\n",
  2155. (features & NETIF_F_HW_VLAN_STAG_TX) ? "ON" : "OFF");
  2156. if (DEV_FEATURE_CHANGED(netdev, features, NETIF_F_LOOPBACK)) {
  2157. en_info(priv, "Turn %s loopback\n",
  2158. (features & NETIF_F_LOOPBACK) ? "ON" : "OFF");
  2159. mlx4_en_update_loopback_state(netdev, features);
  2160. }
  2161. if (reset) {
  2162. ret = mlx4_en_reset_config(netdev, priv->hwtstamp_config,
  2163. features);
  2164. if (ret)
  2165. return ret;
  2166. }
  2167. return 0;
  2168. }
  2169. static int mlx4_en_set_vf_mac(struct net_device *dev, int queue, u8 *mac)
  2170. {
  2171. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  2172. struct mlx4_en_dev *mdev = en_priv->mdev;
  2173. return mlx4_set_vf_mac(mdev->dev, en_priv->port, queue, mac);
  2174. }
  2175. static int mlx4_en_set_vf_vlan(struct net_device *dev, int vf, u16 vlan, u8 qos,
  2176. __be16 vlan_proto)
  2177. {
  2178. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  2179. struct mlx4_en_dev *mdev = en_priv->mdev;
  2180. return mlx4_set_vf_vlan(mdev->dev, en_priv->port, vf, vlan, qos,
  2181. vlan_proto);
  2182. }
  2183. static int mlx4_en_set_vf_rate(struct net_device *dev, int vf, int min_tx_rate,
  2184. int max_tx_rate)
  2185. {
  2186. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  2187. struct mlx4_en_dev *mdev = en_priv->mdev;
  2188. return mlx4_set_vf_rate(mdev->dev, en_priv->port, vf, min_tx_rate,
  2189. max_tx_rate);
  2190. }
  2191. static int mlx4_en_set_vf_spoofchk(struct net_device *dev, int vf, bool setting)
  2192. {
  2193. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  2194. struct mlx4_en_dev *mdev = en_priv->mdev;
  2195. return mlx4_set_vf_spoofchk(mdev->dev, en_priv->port, vf, setting);
  2196. }
  2197. static int mlx4_en_get_vf_config(struct net_device *dev, int vf, struct ifla_vf_info *ivf)
  2198. {
  2199. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  2200. struct mlx4_en_dev *mdev = en_priv->mdev;
  2201. return mlx4_get_vf_config(mdev->dev, en_priv->port, vf, ivf);
  2202. }
  2203. static int mlx4_en_set_vf_link_state(struct net_device *dev, int vf, int link_state)
  2204. {
  2205. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  2206. struct mlx4_en_dev *mdev = en_priv->mdev;
  2207. return mlx4_set_vf_link_state(mdev->dev, en_priv->port, vf, link_state);
  2208. }
  2209. static int mlx4_en_get_vf_stats(struct net_device *dev, int vf,
  2210. struct ifla_vf_stats *vf_stats)
  2211. {
  2212. struct mlx4_en_priv *en_priv = netdev_priv(dev);
  2213. struct mlx4_en_dev *mdev = en_priv->mdev;
  2214. return mlx4_get_vf_stats(mdev->dev, en_priv->port, vf, vf_stats);
  2215. }
  2216. #define PORT_ID_BYTE_LEN 8
  2217. static int mlx4_en_get_phys_port_id(struct net_device *dev,
  2218. struct netdev_phys_item_id *ppid)
  2219. {
  2220. struct mlx4_en_priv *priv = netdev_priv(dev);
  2221. struct mlx4_dev *mdev = priv->mdev->dev;
  2222. int i;
  2223. u64 phys_port_id = mdev->caps.phys_port_id[priv->port];
  2224. if (!phys_port_id)
  2225. return -EOPNOTSUPP;
  2226. ppid->id_len = sizeof(phys_port_id);
  2227. for (i = PORT_ID_BYTE_LEN - 1; i >= 0; --i) {
  2228. ppid->id[i] = phys_port_id & 0xff;
  2229. phys_port_id >>= 8;
  2230. }
  2231. return 0;
  2232. }
  2233. static void mlx4_en_add_vxlan_offloads(struct work_struct *work)
  2234. {
  2235. int ret;
  2236. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  2237. vxlan_add_task);
  2238. ret = mlx4_config_vxlan_port(priv->mdev->dev, priv->vxlan_port);
  2239. if (ret)
  2240. goto out;
  2241. ret = mlx4_SET_PORT_VXLAN(priv->mdev->dev, priv->port,
  2242. VXLAN_STEER_BY_OUTER_MAC, 1);
  2243. out:
  2244. if (ret) {
  2245. en_err(priv, "failed setting L2 tunnel configuration ret %d\n", ret);
  2246. return;
  2247. }
  2248. /* set offloads */
  2249. priv->dev->hw_enc_features |= NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
  2250. NETIF_F_RXCSUM |
  2251. NETIF_F_TSO | NETIF_F_TSO6 |
  2252. NETIF_F_GSO_UDP_TUNNEL |
  2253. NETIF_F_GSO_UDP_TUNNEL_CSUM |
  2254. NETIF_F_GSO_PARTIAL;
  2255. }
  2256. static void mlx4_en_del_vxlan_offloads(struct work_struct *work)
  2257. {
  2258. int ret;
  2259. struct mlx4_en_priv *priv = container_of(work, struct mlx4_en_priv,
  2260. vxlan_del_task);
  2261. /* unset offloads */
  2262. priv->dev->hw_enc_features &= ~(NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM |
  2263. NETIF_F_RXCSUM |
  2264. NETIF_F_TSO | NETIF_F_TSO6 |
  2265. NETIF_F_GSO_UDP_TUNNEL |
  2266. NETIF_F_GSO_UDP_TUNNEL_CSUM |
  2267. NETIF_F_GSO_PARTIAL);
  2268. ret = mlx4_SET_PORT_VXLAN(priv->mdev->dev, priv->port,
  2269. VXLAN_STEER_BY_OUTER_MAC, 0);
  2270. if (ret)
  2271. en_err(priv, "failed setting L2 tunnel configuration ret %d\n", ret);
  2272. priv->vxlan_port = 0;
  2273. }
  2274. static void mlx4_en_add_vxlan_port(struct net_device *dev,
  2275. struct udp_tunnel_info *ti)
  2276. {
  2277. struct mlx4_en_priv *priv = netdev_priv(dev);
  2278. __be16 port = ti->port;
  2279. __be16 current_port;
  2280. if (ti->type != UDP_TUNNEL_TYPE_VXLAN)
  2281. return;
  2282. if (ti->sa_family != AF_INET)
  2283. return;
  2284. if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN)
  2285. return;
  2286. current_port = priv->vxlan_port;
  2287. if (current_port && current_port != port) {
  2288. en_warn(priv, "vxlan port %d configured, can't add port %d\n",
  2289. ntohs(current_port), ntohs(port));
  2290. return;
  2291. }
  2292. priv->vxlan_port = port;
  2293. queue_work(priv->mdev->workqueue, &priv->vxlan_add_task);
  2294. }
  2295. static void mlx4_en_del_vxlan_port(struct net_device *dev,
  2296. struct udp_tunnel_info *ti)
  2297. {
  2298. struct mlx4_en_priv *priv = netdev_priv(dev);
  2299. __be16 port = ti->port;
  2300. __be16 current_port;
  2301. if (ti->type != UDP_TUNNEL_TYPE_VXLAN)
  2302. return;
  2303. if (ti->sa_family != AF_INET)
  2304. return;
  2305. if (priv->mdev->dev->caps.tunnel_offload_mode != MLX4_TUNNEL_OFFLOAD_MODE_VXLAN)
  2306. return;
  2307. current_port = priv->vxlan_port;
  2308. if (current_port != port) {
  2309. en_dbg(DRV, priv, "vxlan port %d isn't configured, ignoring\n", ntohs(port));
  2310. return;
  2311. }
  2312. queue_work(priv->mdev->workqueue, &priv->vxlan_del_task);
  2313. }
  2314. static netdev_features_t mlx4_en_features_check(struct sk_buff *skb,
  2315. struct net_device *dev,
  2316. netdev_features_t features)
  2317. {
  2318. features = vlan_features_check(skb, features);
  2319. features = vxlan_features_check(skb, features);
  2320. /* The ConnectX-3 doesn't support outer IPv6 checksums but it does
  2321. * support inner IPv6 checksums and segmentation so we need to
  2322. * strip that feature if this is an IPv6 encapsulated frame.
  2323. */
  2324. if (skb->encapsulation &&
  2325. (skb->ip_summed == CHECKSUM_PARTIAL)) {
  2326. struct mlx4_en_priv *priv = netdev_priv(dev);
  2327. if (!priv->vxlan_port ||
  2328. (ip_hdr(skb)->version != 4) ||
  2329. (udp_hdr(skb)->dest != priv->vxlan_port))
  2330. features &= ~(NETIF_F_CSUM_MASK | NETIF_F_GSO_MASK);
  2331. }
  2332. return features;
  2333. }
  2334. static int mlx4_en_set_tx_maxrate(struct net_device *dev, int queue_index, u32 maxrate)
  2335. {
  2336. struct mlx4_en_priv *priv = netdev_priv(dev);
  2337. struct mlx4_en_tx_ring *tx_ring = priv->tx_ring[TX][queue_index];
  2338. struct mlx4_update_qp_params params;
  2339. int err;
  2340. if (!(priv->mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_QP_RATE_LIMIT))
  2341. return -EOPNOTSUPP;
  2342. /* rate provided to us in Mbs, check if it fits into 12 bits, if not use Gbs */
  2343. if (maxrate >> 12) {
  2344. params.rate_unit = MLX4_QP_RATE_LIMIT_GBS;
  2345. params.rate_val = maxrate / 1000;
  2346. } else if (maxrate) {
  2347. params.rate_unit = MLX4_QP_RATE_LIMIT_MBS;
  2348. params.rate_val = maxrate;
  2349. } else { /* zero serves to revoke the QP rate-limitation */
  2350. params.rate_unit = 0;
  2351. params.rate_val = 0;
  2352. }
  2353. err = mlx4_update_qp(priv->mdev->dev, tx_ring->qpn, MLX4_UPDATE_QP_RATE_LIMIT,
  2354. &params);
  2355. return err;
  2356. }
  2357. static int mlx4_xdp_set(struct net_device *dev, struct bpf_prog *prog)
  2358. {
  2359. struct mlx4_en_priv *priv = netdev_priv(dev);
  2360. struct mlx4_en_dev *mdev = priv->mdev;
  2361. struct mlx4_en_port_profile new_prof;
  2362. struct bpf_prog *old_prog;
  2363. struct mlx4_en_priv *tmp;
  2364. int tx_changed = 0;
  2365. int xdp_ring_num;
  2366. int port_up = 0;
  2367. int err;
  2368. int i;
  2369. xdp_ring_num = prog ? priv->rx_ring_num : 0;
  2370. /* No need to reconfigure buffers when simply swapping the
  2371. * program for a new one.
  2372. */
  2373. if (priv->tx_ring_num[TX_XDP] == xdp_ring_num) {
  2374. if (prog) {
  2375. prog = bpf_prog_add(prog, priv->rx_ring_num - 1);
  2376. if (IS_ERR(prog))
  2377. return PTR_ERR(prog);
  2378. }
  2379. mutex_lock(&mdev->state_lock);
  2380. for (i = 0; i < priv->rx_ring_num; i++) {
  2381. old_prog = rcu_dereference_protected(
  2382. priv->rx_ring[i]->xdp_prog,
  2383. lockdep_is_held(&mdev->state_lock));
  2384. rcu_assign_pointer(priv->rx_ring[i]->xdp_prog, prog);
  2385. if (old_prog)
  2386. bpf_prog_put(old_prog);
  2387. }
  2388. mutex_unlock(&mdev->state_lock);
  2389. return 0;
  2390. }
  2391. if (!mlx4_en_check_xdp_mtu(dev, dev->mtu))
  2392. return -EOPNOTSUPP;
  2393. tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
  2394. if (!tmp)
  2395. return -ENOMEM;
  2396. if (prog) {
  2397. prog = bpf_prog_add(prog, priv->rx_ring_num - 1);
  2398. if (IS_ERR(prog)) {
  2399. err = PTR_ERR(prog);
  2400. goto out;
  2401. }
  2402. }
  2403. mutex_lock(&mdev->state_lock);
  2404. memcpy(&new_prof, priv->prof, sizeof(struct mlx4_en_port_profile));
  2405. new_prof.tx_ring_num[TX_XDP] = xdp_ring_num;
  2406. if (priv->tx_ring_num[TX] + xdp_ring_num > MAX_TX_RINGS) {
  2407. tx_changed = 1;
  2408. new_prof.tx_ring_num[TX] =
  2409. MAX_TX_RINGS - ALIGN(xdp_ring_num, priv->prof->num_up);
  2410. en_warn(priv, "Reducing the number of TX rings, to not exceed the max total rings number.\n");
  2411. }
  2412. err = mlx4_en_try_alloc_resources(priv, tmp, &new_prof, false);
  2413. if (err) {
  2414. if (prog)
  2415. bpf_prog_sub(prog, priv->rx_ring_num - 1);
  2416. goto unlock_out;
  2417. }
  2418. if (priv->port_up) {
  2419. port_up = 1;
  2420. mlx4_en_stop_port(dev, 1);
  2421. }
  2422. mlx4_en_safe_replace_resources(priv, tmp);
  2423. if (tx_changed)
  2424. netif_set_real_num_tx_queues(dev, priv->tx_ring_num[TX]);
  2425. for (i = 0; i < priv->rx_ring_num; i++) {
  2426. old_prog = rcu_dereference_protected(
  2427. priv->rx_ring[i]->xdp_prog,
  2428. lockdep_is_held(&mdev->state_lock));
  2429. rcu_assign_pointer(priv->rx_ring[i]->xdp_prog, prog);
  2430. if (old_prog)
  2431. bpf_prog_put(old_prog);
  2432. }
  2433. if (port_up) {
  2434. err = mlx4_en_start_port(dev);
  2435. if (err) {
  2436. en_err(priv, "Failed starting port %d for XDP change\n",
  2437. priv->port);
  2438. queue_work(mdev->workqueue, &priv->watchdog_task);
  2439. }
  2440. }
  2441. unlock_out:
  2442. mutex_unlock(&mdev->state_lock);
  2443. out:
  2444. kfree(tmp);
  2445. return err;
  2446. }
  2447. static u32 mlx4_xdp_query(struct net_device *dev)
  2448. {
  2449. struct mlx4_en_priv *priv = netdev_priv(dev);
  2450. struct mlx4_en_dev *mdev = priv->mdev;
  2451. const struct bpf_prog *xdp_prog;
  2452. u32 prog_id = 0;
  2453. if (!priv->tx_ring_num[TX_XDP])
  2454. return prog_id;
  2455. mutex_lock(&mdev->state_lock);
  2456. xdp_prog = rcu_dereference_protected(
  2457. priv->rx_ring[0]->xdp_prog,
  2458. lockdep_is_held(&mdev->state_lock));
  2459. if (xdp_prog)
  2460. prog_id = xdp_prog->aux->id;
  2461. mutex_unlock(&mdev->state_lock);
  2462. return prog_id;
  2463. }
  2464. static int mlx4_xdp(struct net_device *dev, struct netdev_bpf *xdp)
  2465. {
  2466. switch (xdp->command) {
  2467. case XDP_SETUP_PROG:
  2468. return mlx4_xdp_set(dev, xdp->prog);
  2469. case XDP_QUERY_PROG:
  2470. xdp->prog_id = mlx4_xdp_query(dev);
  2471. return 0;
  2472. default:
  2473. return -EINVAL;
  2474. }
  2475. }
  2476. static const struct net_device_ops mlx4_netdev_ops = {
  2477. .ndo_open = mlx4_en_open,
  2478. .ndo_stop = mlx4_en_close,
  2479. .ndo_start_xmit = mlx4_en_xmit,
  2480. .ndo_select_queue = mlx4_en_select_queue,
  2481. .ndo_get_stats64 = mlx4_en_get_stats64,
  2482. .ndo_set_rx_mode = mlx4_en_set_rx_mode,
  2483. .ndo_set_mac_address = mlx4_en_set_mac,
  2484. .ndo_validate_addr = eth_validate_addr,
  2485. .ndo_change_mtu = mlx4_en_change_mtu,
  2486. .ndo_do_ioctl = mlx4_en_ioctl,
  2487. .ndo_tx_timeout = mlx4_en_tx_timeout,
  2488. .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid,
  2489. .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid,
  2490. .ndo_set_features = mlx4_en_set_features,
  2491. .ndo_fix_features = mlx4_en_fix_features,
  2492. .ndo_setup_tc = __mlx4_en_setup_tc,
  2493. #ifdef CONFIG_RFS_ACCEL
  2494. .ndo_rx_flow_steer = mlx4_en_filter_rfs,
  2495. #endif
  2496. .ndo_get_phys_port_id = mlx4_en_get_phys_port_id,
  2497. .ndo_udp_tunnel_add = mlx4_en_add_vxlan_port,
  2498. .ndo_udp_tunnel_del = mlx4_en_del_vxlan_port,
  2499. .ndo_features_check = mlx4_en_features_check,
  2500. .ndo_set_tx_maxrate = mlx4_en_set_tx_maxrate,
  2501. .ndo_bpf = mlx4_xdp,
  2502. };
  2503. static const struct net_device_ops mlx4_netdev_ops_master = {
  2504. .ndo_open = mlx4_en_open,
  2505. .ndo_stop = mlx4_en_close,
  2506. .ndo_start_xmit = mlx4_en_xmit,
  2507. .ndo_select_queue = mlx4_en_select_queue,
  2508. .ndo_get_stats64 = mlx4_en_get_stats64,
  2509. .ndo_set_rx_mode = mlx4_en_set_rx_mode,
  2510. .ndo_set_mac_address = mlx4_en_set_mac,
  2511. .ndo_validate_addr = eth_validate_addr,
  2512. .ndo_change_mtu = mlx4_en_change_mtu,
  2513. .ndo_tx_timeout = mlx4_en_tx_timeout,
  2514. .ndo_vlan_rx_add_vid = mlx4_en_vlan_rx_add_vid,
  2515. .ndo_vlan_rx_kill_vid = mlx4_en_vlan_rx_kill_vid,
  2516. .ndo_set_vf_mac = mlx4_en_set_vf_mac,
  2517. .ndo_set_vf_vlan = mlx4_en_set_vf_vlan,
  2518. .ndo_set_vf_rate = mlx4_en_set_vf_rate,
  2519. .ndo_set_vf_spoofchk = mlx4_en_set_vf_spoofchk,
  2520. .ndo_set_vf_link_state = mlx4_en_set_vf_link_state,
  2521. .ndo_get_vf_stats = mlx4_en_get_vf_stats,
  2522. .ndo_get_vf_config = mlx4_en_get_vf_config,
  2523. .ndo_set_features = mlx4_en_set_features,
  2524. .ndo_fix_features = mlx4_en_fix_features,
  2525. .ndo_setup_tc = __mlx4_en_setup_tc,
  2526. #ifdef CONFIG_RFS_ACCEL
  2527. .ndo_rx_flow_steer = mlx4_en_filter_rfs,
  2528. #endif
  2529. .ndo_get_phys_port_id = mlx4_en_get_phys_port_id,
  2530. .ndo_udp_tunnel_add = mlx4_en_add_vxlan_port,
  2531. .ndo_udp_tunnel_del = mlx4_en_del_vxlan_port,
  2532. .ndo_features_check = mlx4_en_features_check,
  2533. .ndo_set_tx_maxrate = mlx4_en_set_tx_maxrate,
  2534. .ndo_bpf = mlx4_xdp,
  2535. };
  2536. struct mlx4_en_bond {
  2537. struct work_struct work;
  2538. struct mlx4_en_priv *priv;
  2539. int is_bonded;
  2540. struct mlx4_port_map port_map;
  2541. };
  2542. static void mlx4_en_bond_work(struct work_struct *work)
  2543. {
  2544. struct mlx4_en_bond *bond = container_of(work,
  2545. struct mlx4_en_bond,
  2546. work);
  2547. int err = 0;
  2548. struct mlx4_dev *dev = bond->priv->mdev->dev;
  2549. if (bond->is_bonded) {
  2550. if (!mlx4_is_bonded(dev)) {
  2551. err = mlx4_bond(dev);
  2552. if (err)
  2553. en_err(bond->priv, "Fail to bond device\n");
  2554. }
  2555. if (!err) {
  2556. err = mlx4_port_map_set(dev, &bond->port_map);
  2557. if (err)
  2558. en_err(bond->priv, "Fail to set port map [%d][%d]: %d\n",
  2559. bond->port_map.port1,
  2560. bond->port_map.port2,
  2561. err);
  2562. }
  2563. } else if (mlx4_is_bonded(dev)) {
  2564. err = mlx4_unbond(dev);
  2565. if (err)
  2566. en_err(bond->priv, "Fail to unbond device\n");
  2567. }
  2568. dev_put(bond->priv->dev);
  2569. kfree(bond);
  2570. }
  2571. static int mlx4_en_queue_bond_work(struct mlx4_en_priv *priv, int is_bonded,
  2572. u8 v2p_p1, u8 v2p_p2)
  2573. {
  2574. struct mlx4_en_bond *bond = NULL;
  2575. bond = kzalloc(sizeof(*bond), GFP_ATOMIC);
  2576. if (!bond)
  2577. return -ENOMEM;
  2578. INIT_WORK(&bond->work, mlx4_en_bond_work);
  2579. bond->priv = priv;
  2580. bond->is_bonded = is_bonded;
  2581. bond->port_map.port1 = v2p_p1;
  2582. bond->port_map.port2 = v2p_p2;
  2583. dev_hold(priv->dev);
  2584. queue_work(priv->mdev->workqueue, &bond->work);
  2585. return 0;
  2586. }
  2587. int mlx4_en_netdev_event(struct notifier_block *this,
  2588. unsigned long event, void *ptr)
  2589. {
  2590. struct net_device *ndev = netdev_notifier_info_to_dev(ptr);
  2591. u8 port = 0;
  2592. struct mlx4_en_dev *mdev;
  2593. struct mlx4_dev *dev;
  2594. int i, num_eth_ports = 0;
  2595. bool do_bond = true;
  2596. struct mlx4_en_priv *priv;
  2597. u8 v2p_port1 = 0;
  2598. u8 v2p_port2 = 0;
  2599. if (!net_eq(dev_net(ndev), &init_net))
  2600. return NOTIFY_DONE;
  2601. mdev = container_of(this, struct mlx4_en_dev, nb);
  2602. dev = mdev->dev;
  2603. /* Go into this mode only when two network devices set on two ports
  2604. * of the same mlx4 device are slaves of the same bonding master
  2605. */
  2606. mlx4_foreach_port(i, dev, MLX4_PORT_TYPE_ETH) {
  2607. ++num_eth_ports;
  2608. if (!port && (mdev->pndev[i] == ndev))
  2609. port = i;
  2610. mdev->upper[i] = mdev->pndev[i] ?
  2611. netdev_master_upper_dev_get(mdev->pndev[i]) : NULL;
  2612. /* condition not met: network device is a slave */
  2613. if (!mdev->upper[i])
  2614. do_bond = false;
  2615. if (num_eth_ports < 2)
  2616. continue;
  2617. /* condition not met: same master */
  2618. if (mdev->upper[i] != mdev->upper[i-1])
  2619. do_bond = false;
  2620. }
  2621. /* condition not met: 2 salves */
  2622. do_bond = (num_eth_ports == 2) ? do_bond : false;
  2623. /* handle only events that come with enough info */
  2624. if ((do_bond && (event != NETDEV_BONDING_INFO)) || !port)
  2625. return NOTIFY_DONE;
  2626. priv = netdev_priv(ndev);
  2627. if (do_bond) {
  2628. struct netdev_notifier_bonding_info *notifier_info = ptr;
  2629. struct netdev_bonding_info *bonding_info =
  2630. &notifier_info->bonding_info;
  2631. /* required mode 1, 2 or 4 */
  2632. if ((bonding_info->master.bond_mode != BOND_MODE_ACTIVEBACKUP) &&
  2633. (bonding_info->master.bond_mode != BOND_MODE_XOR) &&
  2634. (bonding_info->master.bond_mode != BOND_MODE_8023AD))
  2635. do_bond = false;
  2636. /* require exactly 2 slaves */
  2637. if (bonding_info->master.num_slaves != 2)
  2638. do_bond = false;
  2639. /* calc v2p */
  2640. if (do_bond) {
  2641. if (bonding_info->master.bond_mode ==
  2642. BOND_MODE_ACTIVEBACKUP) {
  2643. /* in active-backup mode virtual ports are
  2644. * mapped to the physical port of the active
  2645. * slave */
  2646. if (bonding_info->slave.state ==
  2647. BOND_STATE_BACKUP) {
  2648. if (port == 1) {
  2649. v2p_port1 = 2;
  2650. v2p_port2 = 2;
  2651. } else {
  2652. v2p_port1 = 1;
  2653. v2p_port2 = 1;
  2654. }
  2655. } else { /* BOND_STATE_ACTIVE */
  2656. if (port == 1) {
  2657. v2p_port1 = 1;
  2658. v2p_port2 = 1;
  2659. } else {
  2660. v2p_port1 = 2;
  2661. v2p_port2 = 2;
  2662. }
  2663. }
  2664. } else { /* Active-Active */
  2665. /* in active-active mode a virtual port is
  2666. * mapped to the native physical port if and only
  2667. * if the physical port is up */
  2668. __s8 link = bonding_info->slave.link;
  2669. if (port == 1)
  2670. v2p_port2 = 2;
  2671. else
  2672. v2p_port1 = 1;
  2673. if ((link == BOND_LINK_UP) ||
  2674. (link == BOND_LINK_FAIL)) {
  2675. if (port == 1)
  2676. v2p_port1 = 1;
  2677. else
  2678. v2p_port2 = 2;
  2679. } else { /* BOND_LINK_DOWN || BOND_LINK_BACK */
  2680. if (port == 1)
  2681. v2p_port1 = 2;
  2682. else
  2683. v2p_port2 = 1;
  2684. }
  2685. }
  2686. }
  2687. }
  2688. mlx4_en_queue_bond_work(priv, do_bond,
  2689. v2p_port1, v2p_port2);
  2690. return NOTIFY_DONE;
  2691. }
  2692. void mlx4_en_update_pfc_stats_bitmap(struct mlx4_dev *dev,
  2693. struct mlx4_en_stats_bitmap *stats_bitmap,
  2694. u8 rx_ppp, u8 rx_pause,
  2695. u8 tx_ppp, u8 tx_pause)
  2696. {
  2697. int last_i = NUM_MAIN_STATS + NUM_PORT_STATS + NUM_PF_STATS;
  2698. if (!mlx4_is_slave(dev) &&
  2699. (dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_FLOWSTATS_EN)) {
  2700. mutex_lock(&stats_bitmap->mutex);
  2701. bitmap_clear(stats_bitmap->bitmap, last_i, NUM_FLOW_STATS);
  2702. if (rx_ppp)
  2703. bitmap_set(stats_bitmap->bitmap, last_i,
  2704. NUM_FLOW_PRIORITY_STATS_RX);
  2705. last_i += NUM_FLOW_PRIORITY_STATS_RX;
  2706. if (rx_pause && !(rx_ppp))
  2707. bitmap_set(stats_bitmap->bitmap, last_i,
  2708. NUM_FLOW_STATS_RX);
  2709. last_i += NUM_FLOW_STATS_RX;
  2710. if (tx_ppp)
  2711. bitmap_set(stats_bitmap->bitmap, last_i,
  2712. NUM_FLOW_PRIORITY_STATS_TX);
  2713. last_i += NUM_FLOW_PRIORITY_STATS_TX;
  2714. if (tx_pause && !(tx_ppp))
  2715. bitmap_set(stats_bitmap->bitmap, last_i,
  2716. NUM_FLOW_STATS_TX);
  2717. last_i += NUM_FLOW_STATS_TX;
  2718. mutex_unlock(&stats_bitmap->mutex);
  2719. }
  2720. }
  2721. void mlx4_en_set_stats_bitmap(struct mlx4_dev *dev,
  2722. struct mlx4_en_stats_bitmap *stats_bitmap,
  2723. u8 rx_ppp, u8 rx_pause,
  2724. u8 tx_ppp, u8 tx_pause)
  2725. {
  2726. int last_i = 0;
  2727. mutex_init(&stats_bitmap->mutex);
  2728. bitmap_zero(stats_bitmap->bitmap, NUM_ALL_STATS);
  2729. if (mlx4_is_slave(dev)) {
  2730. bitmap_set(stats_bitmap->bitmap, last_i +
  2731. MLX4_FIND_NETDEV_STAT(rx_packets), 1);
  2732. bitmap_set(stats_bitmap->bitmap, last_i +
  2733. MLX4_FIND_NETDEV_STAT(tx_packets), 1);
  2734. bitmap_set(stats_bitmap->bitmap, last_i +
  2735. MLX4_FIND_NETDEV_STAT(rx_bytes), 1);
  2736. bitmap_set(stats_bitmap->bitmap, last_i +
  2737. MLX4_FIND_NETDEV_STAT(tx_bytes), 1);
  2738. bitmap_set(stats_bitmap->bitmap, last_i +
  2739. MLX4_FIND_NETDEV_STAT(rx_dropped), 1);
  2740. bitmap_set(stats_bitmap->bitmap, last_i +
  2741. MLX4_FIND_NETDEV_STAT(tx_dropped), 1);
  2742. } else {
  2743. bitmap_set(stats_bitmap->bitmap, last_i, NUM_MAIN_STATS);
  2744. }
  2745. last_i += NUM_MAIN_STATS;
  2746. bitmap_set(stats_bitmap->bitmap, last_i, NUM_PORT_STATS);
  2747. last_i += NUM_PORT_STATS;
  2748. if (mlx4_is_master(dev))
  2749. bitmap_set(stats_bitmap->bitmap, last_i,
  2750. NUM_PF_STATS);
  2751. last_i += NUM_PF_STATS;
  2752. mlx4_en_update_pfc_stats_bitmap(dev, stats_bitmap,
  2753. rx_ppp, rx_pause,
  2754. tx_ppp, tx_pause);
  2755. last_i += NUM_FLOW_STATS;
  2756. if (!mlx4_is_slave(dev))
  2757. bitmap_set(stats_bitmap->bitmap, last_i, NUM_PKT_STATS);
  2758. last_i += NUM_PKT_STATS;
  2759. bitmap_set(stats_bitmap->bitmap, last_i, NUM_XDP_STATS);
  2760. last_i += NUM_XDP_STATS;
  2761. if (!mlx4_is_slave(dev))
  2762. bitmap_set(stats_bitmap->bitmap, last_i, NUM_PHY_STATS);
  2763. last_i += NUM_PHY_STATS;
  2764. }
  2765. int mlx4_en_init_netdev(struct mlx4_en_dev *mdev, int port,
  2766. struct mlx4_en_port_profile *prof)
  2767. {
  2768. struct net_device *dev;
  2769. struct mlx4_en_priv *priv;
  2770. int i, t;
  2771. int err;
  2772. dev = alloc_etherdev_mqs(sizeof(struct mlx4_en_priv),
  2773. MAX_TX_RINGS, MAX_RX_RINGS);
  2774. if (dev == NULL)
  2775. return -ENOMEM;
  2776. netif_set_real_num_tx_queues(dev, prof->tx_ring_num[TX]);
  2777. netif_set_real_num_rx_queues(dev, prof->rx_ring_num);
  2778. SET_NETDEV_DEV(dev, &mdev->dev->persist->pdev->dev);
  2779. dev->dev_port = port - 1;
  2780. /*
  2781. * Initialize driver private data
  2782. */
  2783. priv = netdev_priv(dev);
  2784. memset(priv, 0, sizeof(struct mlx4_en_priv));
  2785. priv->counter_index = MLX4_SINK_COUNTER_INDEX(mdev->dev);
  2786. spin_lock_init(&priv->stats_lock);
  2787. INIT_WORK(&priv->rx_mode_task, mlx4_en_do_set_rx_mode);
  2788. INIT_WORK(&priv->watchdog_task, mlx4_en_restart);
  2789. INIT_WORK(&priv->linkstate_task, mlx4_en_linkstate);
  2790. INIT_DELAYED_WORK(&priv->stats_task, mlx4_en_do_get_stats);
  2791. INIT_DELAYED_WORK(&priv->service_task, mlx4_en_service_task);
  2792. INIT_WORK(&priv->vxlan_add_task, mlx4_en_add_vxlan_offloads);
  2793. INIT_WORK(&priv->vxlan_del_task, mlx4_en_del_vxlan_offloads);
  2794. #ifdef CONFIG_RFS_ACCEL
  2795. INIT_LIST_HEAD(&priv->filters);
  2796. spin_lock_init(&priv->filters_lock);
  2797. #endif
  2798. priv->dev = dev;
  2799. priv->mdev = mdev;
  2800. priv->ddev = &mdev->pdev->dev;
  2801. priv->prof = prof;
  2802. priv->port = port;
  2803. priv->port_up = false;
  2804. priv->flags = prof->flags;
  2805. priv->pflags = MLX4_EN_PRIV_FLAGS_BLUEFLAME;
  2806. priv->ctrl_flags = cpu_to_be32(MLX4_WQE_CTRL_CQ_UPDATE |
  2807. MLX4_WQE_CTRL_SOLICITED);
  2808. priv->num_tx_rings_p_up = mdev->profile.max_num_tx_rings_p_up;
  2809. priv->tx_work_limit = MLX4_EN_DEFAULT_TX_WORK;
  2810. netdev_rss_key_fill(priv->rss_key, sizeof(priv->rss_key));
  2811. for (t = 0; t < MLX4_EN_NUM_TX_TYPES; t++) {
  2812. priv->tx_ring_num[t] = prof->tx_ring_num[t];
  2813. if (!priv->tx_ring_num[t])
  2814. continue;
  2815. priv->tx_ring[t] = kcalloc(MAX_TX_RINGS,
  2816. sizeof(struct mlx4_en_tx_ring *),
  2817. GFP_KERNEL);
  2818. if (!priv->tx_ring[t]) {
  2819. err = -ENOMEM;
  2820. goto out;
  2821. }
  2822. priv->tx_cq[t] = kcalloc(MAX_TX_RINGS,
  2823. sizeof(struct mlx4_en_cq *),
  2824. GFP_KERNEL);
  2825. if (!priv->tx_cq[t]) {
  2826. err = -ENOMEM;
  2827. goto out;
  2828. }
  2829. }
  2830. priv->rx_ring_num = prof->rx_ring_num;
  2831. priv->cqe_factor = (mdev->dev->caps.cqe_size == 64) ? 1 : 0;
  2832. priv->cqe_size = mdev->dev->caps.cqe_size;
  2833. priv->mac_index = -1;
  2834. priv->msg_enable = MLX4_EN_MSG_LEVEL;
  2835. #ifdef CONFIG_MLX4_EN_DCB
  2836. if (!mlx4_is_slave(priv->mdev->dev)) {
  2837. u8 prio;
  2838. for (prio = 0; prio < IEEE_8021QAZ_MAX_TCS; ++prio) {
  2839. priv->ets.prio_tc[prio] = prio;
  2840. priv->ets.tc_tsa[prio] = IEEE_8021QAZ_TSA_VENDOR;
  2841. }
  2842. priv->dcbx_cap = DCB_CAP_DCBX_VER_CEE | DCB_CAP_DCBX_HOST |
  2843. DCB_CAP_DCBX_VER_IEEE;
  2844. priv->flags |= MLX4_EN_DCB_ENABLED;
  2845. priv->cee_config.pfc_state = false;
  2846. for (i = 0; i < MLX4_EN_NUM_UP_HIGH; i++)
  2847. priv->cee_config.dcb_pfc[i] = pfc_disabled;
  2848. if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_ETS_CFG) {
  2849. dev->dcbnl_ops = &mlx4_en_dcbnl_ops;
  2850. } else {
  2851. en_info(priv, "enabling only PFC DCB ops\n");
  2852. dev->dcbnl_ops = &mlx4_en_dcbnl_pfc_ops;
  2853. }
  2854. }
  2855. #endif
  2856. for (i = 0; i < MLX4_EN_MAC_HASH_SIZE; ++i)
  2857. INIT_HLIST_HEAD(&priv->mac_hash[i]);
  2858. /* Query for default mac and max mtu */
  2859. priv->max_mtu = mdev->dev->caps.eth_mtu_cap[priv->port];
  2860. if (mdev->dev->caps.rx_checksum_flags_port[priv->port] &
  2861. MLX4_RX_CSUM_MODE_VAL_NON_TCP_UDP)
  2862. priv->flags |= MLX4_EN_FLAG_RX_CSUM_NON_TCP_UDP;
  2863. /* Set default MAC */
  2864. dev->addr_len = ETH_ALEN;
  2865. mlx4_en_u64_to_mac(dev->dev_addr, mdev->dev->caps.def_mac[priv->port]);
  2866. if (!is_valid_ether_addr(dev->dev_addr)) {
  2867. en_err(priv, "Port: %d, invalid mac burned: %pM, quiting\n",
  2868. priv->port, dev->dev_addr);
  2869. err = -EINVAL;
  2870. goto out;
  2871. } else if (mlx4_is_slave(priv->mdev->dev) &&
  2872. (priv->mdev->dev->port_random_macs & 1 << priv->port)) {
  2873. /* Random MAC was assigned in mlx4_slave_cap
  2874. * in mlx4_core module
  2875. */
  2876. dev->addr_assign_type |= NET_ADDR_RANDOM;
  2877. en_warn(priv, "Assigned random MAC address %pM\n", dev->dev_addr);
  2878. }
  2879. memcpy(priv->current_mac, dev->dev_addr, sizeof(priv->current_mac));
  2880. priv->stride = roundup_pow_of_two(sizeof(struct mlx4_en_rx_desc) +
  2881. DS_SIZE * MLX4_EN_MAX_RX_FRAGS);
  2882. err = mlx4_en_alloc_resources(priv);
  2883. if (err)
  2884. goto out;
  2885. /* Initialize time stamping config */
  2886. priv->hwtstamp_config.flags = 0;
  2887. priv->hwtstamp_config.tx_type = HWTSTAMP_TX_OFF;
  2888. priv->hwtstamp_config.rx_filter = HWTSTAMP_FILTER_NONE;
  2889. /* Allocate page for receive rings */
  2890. err = mlx4_alloc_hwq_res(mdev->dev, &priv->res,
  2891. MLX4_EN_PAGE_SIZE);
  2892. if (err) {
  2893. en_err(priv, "Failed to allocate page for rx qps\n");
  2894. goto out;
  2895. }
  2896. priv->allocated = 1;
  2897. /*
  2898. * Initialize netdev entry points
  2899. */
  2900. if (mlx4_is_master(priv->mdev->dev))
  2901. dev->netdev_ops = &mlx4_netdev_ops_master;
  2902. else
  2903. dev->netdev_ops = &mlx4_netdev_ops;
  2904. dev->watchdog_timeo = MLX4_EN_WATCHDOG_TIMEOUT;
  2905. netif_set_real_num_tx_queues(dev, priv->tx_ring_num[TX]);
  2906. netif_set_real_num_rx_queues(dev, priv->rx_ring_num);
  2907. dev->ethtool_ops = &mlx4_en_ethtool_ops;
  2908. /*
  2909. * Set driver features
  2910. */
  2911. dev->hw_features = NETIF_F_SG | NETIF_F_IP_CSUM | NETIF_F_IPV6_CSUM;
  2912. if (mdev->LSO_support)
  2913. dev->hw_features |= NETIF_F_TSO | NETIF_F_TSO6;
  2914. dev->vlan_features = dev->hw_features;
  2915. dev->hw_features |= NETIF_F_RXCSUM | NETIF_F_RXHASH;
  2916. dev->features = dev->hw_features | NETIF_F_HIGHDMA |
  2917. NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX |
  2918. NETIF_F_HW_VLAN_CTAG_FILTER;
  2919. dev->hw_features |= NETIF_F_LOOPBACK |
  2920. NETIF_F_HW_VLAN_CTAG_TX | NETIF_F_HW_VLAN_CTAG_RX;
  2921. if (!(mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN)) {
  2922. dev->features |= NETIF_F_HW_VLAN_STAG_RX |
  2923. NETIF_F_HW_VLAN_STAG_FILTER;
  2924. dev->hw_features |= NETIF_F_HW_VLAN_STAG_RX;
  2925. }
  2926. if (mlx4_is_slave(mdev->dev)) {
  2927. bool vlan_offload_disabled;
  2928. int phv;
  2929. err = get_phv_bit(mdev->dev, port, &phv);
  2930. if (!err && phv) {
  2931. dev->hw_features |= NETIF_F_HW_VLAN_STAG_TX;
  2932. priv->pflags |= MLX4_EN_PRIV_FLAGS_PHV;
  2933. }
  2934. err = mlx4_get_is_vlan_offload_disabled(mdev->dev, port,
  2935. &vlan_offload_disabled);
  2936. if (!err && vlan_offload_disabled) {
  2937. dev->hw_features &= ~(NETIF_F_HW_VLAN_CTAG_TX |
  2938. NETIF_F_HW_VLAN_CTAG_RX |
  2939. NETIF_F_HW_VLAN_STAG_TX |
  2940. NETIF_F_HW_VLAN_STAG_RX);
  2941. dev->features &= ~(NETIF_F_HW_VLAN_CTAG_TX |
  2942. NETIF_F_HW_VLAN_CTAG_RX |
  2943. NETIF_F_HW_VLAN_STAG_TX |
  2944. NETIF_F_HW_VLAN_STAG_RX);
  2945. }
  2946. } else {
  2947. if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_PHV_EN &&
  2948. !(mdev->dev->caps.flags2 &
  2949. MLX4_DEV_CAP_FLAG2_SKIP_OUTER_VLAN))
  2950. dev->hw_features |= NETIF_F_HW_VLAN_STAG_TX;
  2951. }
  2952. if (mdev->dev->caps.flags & MLX4_DEV_CAP_FLAG_FCS_KEEP)
  2953. dev->hw_features |= NETIF_F_RXFCS;
  2954. if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_IGNORE_FCS)
  2955. dev->hw_features |= NETIF_F_RXALL;
  2956. if (mdev->dev->caps.steering_mode ==
  2957. MLX4_STEERING_MODE_DEVICE_MANAGED &&
  2958. mdev->dev->caps.dmfs_high_steer_mode != MLX4_STEERING_DMFS_A0_STATIC)
  2959. dev->hw_features |= NETIF_F_NTUPLE;
  2960. if (mdev->dev->caps.steering_mode != MLX4_STEERING_MODE_A0)
  2961. dev->priv_flags |= IFF_UNICAST_FLT;
  2962. /* Setting a default hash function value */
  2963. if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_TOP) {
  2964. priv->rss_hash_fn = ETH_RSS_HASH_TOP;
  2965. } else if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_RSS_XOR) {
  2966. priv->rss_hash_fn = ETH_RSS_HASH_XOR;
  2967. } else {
  2968. en_warn(priv,
  2969. "No RSS hash capabilities exposed, using Toeplitz\n");
  2970. priv->rss_hash_fn = ETH_RSS_HASH_TOP;
  2971. }
  2972. if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) {
  2973. dev->hw_features |= NETIF_F_GSO_UDP_TUNNEL |
  2974. NETIF_F_GSO_UDP_TUNNEL_CSUM |
  2975. NETIF_F_GSO_PARTIAL;
  2976. dev->features |= NETIF_F_GSO_UDP_TUNNEL |
  2977. NETIF_F_GSO_UDP_TUNNEL_CSUM |
  2978. NETIF_F_GSO_PARTIAL;
  2979. dev->gso_partial_features = NETIF_F_GSO_UDP_TUNNEL_CSUM;
  2980. }
  2981. /* MTU range: 68 - hw-specific max */
  2982. dev->min_mtu = ETH_MIN_MTU;
  2983. dev->max_mtu = priv->max_mtu;
  2984. mdev->pndev[port] = dev;
  2985. mdev->upper[port] = NULL;
  2986. netif_carrier_off(dev);
  2987. mlx4_en_set_default_moderation(priv);
  2988. en_warn(priv, "Using %d TX rings\n", prof->tx_ring_num[TX]);
  2989. en_warn(priv, "Using %d RX rings\n", prof->rx_ring_num);
  2990. mlx4_en_update_loopback_state(priv->dev, priv->dev->features);
  2991. /* Configure port */
  2992. mlx4_en_calc_rx_buf(dev);
  2993. err = mlx4_SET_PORT_general(mdev->dev, priv->port,
  2994. priv->rx_skb_size + ETH_FCS_LEN,
  2995. prof->tx_pause, prof->tx_ppp,
  2996. prof->rx_pause, prof->rx_ppp);
  2997. if (err) {
  2998. en_err(priv, "Failed setting port general configurations for port %d, with error %d\n",
  2999. priv->port, err);
  3000. goto out;
  3001. }
  3002. if (mdev->dev->caps.tunnel_offload_mode == MLX4_TUNNEL_OFFLOAD_MODE_VXLAN) {
  3003. err = mlx4_SET_PORT_VXLAN(mdev->dev, priv->port, VXLAN_STEER_BY_OUTER_MAC, 1);
  3004. if (err) {
  3005. en_err(priv, "Failed setting port L2 tunnel configuration, err %d\n",
  3006. err);
  3007. goto out;
  3008. }
  3009. }
  3010. /* Init port */
  3011. en_warn(priv, "Initializing port\n");
  3012. err = mlx4_INIT_PORT(mdev->dev, priv->port);
  3013. if (err) {
  3014. en_err(priv, "Failed Initializing port\n");
  3015. goto out;
  3016. }
  3017. queue_delayed_work(mdev->workqueue, &priv->stats_task, STATS_DELAY);
  3018. /* Initialize time stamp mechanism */
  3019. if (mdev->dev->caps.flags2 & MLX4_DEV_CAP_FLAG2_TS)
  3020. mlx4_en_init_timestamp(mdev);
  3021. queue_delayed_work(mdev->workqueue, &priv->service_task,
  3022. SERVICE_TASK_DELAY);
  3023. mlx4_en_set_stats_bitmap(mdev->dev, &priv->stats_bitmap,
  3024. mdev->profile.prof[priv->port].rx_ppp,
  3025. mdev->profile.prof[priv->port].rx_pause,
  3026. mdev->profile.prof[priv->port].tx_ppp,
  3027. mdev->profile.prof[priv->port].tx_pause);
  3028. err = register_netdev(dev);
  3029. if (err) {
  3030. en_err(priv, "Netdev registration failed for port %d\n", port);
  3031. goto out;
  3032. }
  3033. priv->registered = 1;
  3034. devlink_port_type_eth_set(mlx4_get_devlink_port(mdev->dev, priv->port),
  3035. dev);
  3036. return 0;
  3037. out:
  3038. mlx4_en_destroy_netdev(dev);
  3039. return err;
  3040. }
  3041. int mlx4_en_reset_config(struct net_device *dev,
  3042. struct hwtstamp_config ts_config,
  3043. netdev_features_t features)
  3044. {
  3045. struct mlx4_en_priv *priv = netdev_priv(dev);
  3046. struct mlx4_en_dev *mdev = priv->mdev;
  3047. struct mlx4_en_port_profile new_prof;
  3048. struct mlx4_en_priv *tmp;
  3049. int port_up = 0;
  3050. int err = 0;
  3051. if (priv->hwtstamp_config.tx_type == ts_config.tx_type &&
  3052. priv->hwtstamp_config.rx_filter == ts_config.rx_filter &&
  3053. !DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX) &&
  3054. !DEV_FEATURE_CHANGED(dev, features, NETIF_F_RXFCS))
  3055. return 0; /* Nothing to change */
  3056. if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX) &&
  3057. (features & NETIF_F_HW_VLAN_CTAG_RX) &&
  3058. (priv->hwtstamp_config.rx_filter != HWTSTAMP_FILTER_NONE)) {
  3059. en_warn(priv, "Can't turn ON rx vlan offload while time-stamping rx filter is ON\n");
  3060. return -EINVAL;
  3061. }
  3062. tmp = kzalloc(sizeof(*tmp), GFP_KERNEL);
  3063. if (!tmp)
  3064. return -ENOMEM;
  3065. mutex_lock(&mdev->state_lock);
  3066. memcpy(&new_prof, priv->prof, sizeof(struct mlx4_en_port_profile));
  3067. memcpy(&new_prof.hwtstamp_config, &ts_config, sizeof(ts_config));
  3068. err = mlx4_en_try_alloc_resources(priv, tmp, &new_prof, true);
  3069. if (err)
  3070. goto out;
  3071. if (priv->port_up) {
  3072. port_up = 1;
  3073. mlx4_en_stop_port(dev, 1);
  3074. }
  3075. mlx4_en_safe_replace_resources(priv, tmp);
  3076. if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_HW_VLAN_CTAG_RX)) {
  3077. if (features & NETIF_F_HW_VLAN_CTAG_RX)
  3078. dev->features |= NETIF_F_HW_VLAN_CTAG_RX;
  3079. else
  3080. dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX;
  3081. } else if (ts_config.rx_filter == HWTSTAMP_FILTER_NONE) {
  3082. /* RX time-stamping is OFF, update the RX vlan offload
  3083. * to the latest wanted state
  3084. */
  3085. if (dev->wanted_features & NETIF_F_HW_VLAN_CTAG_RX)
  3086. dev->features |= NETIF_F_HW_VLAN_CTAG_RX;
  3087. else
  3088. dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX;
  3089. }
  3090. if (DEV_FEATURE_CHANGED(dev, features, NETIF_F_RXFCS)) {
  3091. if (features & NETIF_F_RXFCS)
  3092. dev->features |= NETIF_F_RXFCS;
  3093. else
  3094. dev->features &= ~NETIF_F_RXFCS;
  3095. }
  3096. /* RX vlan offload and RX time-stamping can't co-exist !
  3097. * Regardless of the caller's choice,
  3098. * Turn Off RX vlan offload in case of time-stamping is ON
  3099. */
  3100. if (ts_config.rx_filter != HWTSTAMP_FILTER_NONE) {
  3101. if (dev->features & NETIF_F_HW_VLAN_CTAG_RX)
  3102. en_warn(priv, "Turning off RX vlan offload since RX time-stamping is ON\n");
  3103. dev->features &= ~NETIF_F_HW_VLAN_CTAG_RX;
  3104. }
  3105. if (port_up) {
  3106. err = mlx4_en_start_port(dev);
  3107. if (err)
  3108. en_err(priv, "Failed starting port\n");
  3109. }
  3110. out:
  3111. mutex_unlock(&mdev->state_lock);
  3112. kfree(tmp);
  3113. if (!err)
  3114. netdev_features_change(dev);
  3115. return err;
  3116. }