db1300.c 22 KB

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  1. /*
  2. * DBAu1300 init and platform device setup.
  3. *
  4. * (c) 2009 Manuel Lauss <manuel.lauss@googlemail.com>
  5. */
  6. #include <linux/clk.h>
  7. #include <linux/dma-mapping.h>
  8. #include <linux/gpio.h>
  9. #include <linux/gpio_keys.h>
  10. #include <linux/init.h>
  11. #include <linux/input.h> /* KEY_* codes */
  12. #include <linux/i2c.h>
  13. #include <linux/io.h>
  14. #include <linux/leds.h>
  15. #include <linux/interrupt.h>
  16. #include <linux/ata_platform.h>
  17. #include <linux/mmc/host.h>
  18. #include <linux/module.h>
  19. #include <linux/mtd/mtd.h>
  20. #include <linux/mtd/rawnand.h>
  21. #include <linux/mtd/partitions.h>
  22. #include <linux/platform_device.h>
  23. #include <linux/smsc911x.h>
  24. #include <linux/wm97xx.h>
  25. #include <asm/mach-au1x00/au1000.h>
  26. #include <asm/mach-au1x00/gpio-au1300.h>
  27. #include <asm/mach-au1x00/au1100_mmc.h>
  28. #include <asm/mach-au1x00/au1200fb.h>
  29. #include <asm/mach-au1x00/au1xxx_dbdma.h>
  30. #include <asm/mach-au1x00/au1xxx_psc.h>
  31. #include <asm/mach-db1x00/bcsr.h>
  32. #include <asm/mach-au1x00/prom.h>
  33. #include "platform.h"
  34. /* FPGA (external mux) interrupt sources */
  35. #define DB1300_FIRST_INT (ALCHEMY_GPIC_INT_LAST + 1)
  36. #define DB1300_IDE_INT (DB1300_FIRST_INT + 0)
  37. #define DB1300_ETH_INT (DB1300_FIRST_INT + 1)
  38. #define DB1300_CF_INT (DB1300_FIRST_INT + 2)
  39. #define DB1300_VIDEO_INT (DB1300_FIRST_INT + 4)
  40. #define DB1300_HDMI_INT (DB1300_FIRST_INT + 5)
  41. #define DB1300_DC_INT (DB1300_FIRST_INT + 6)
  42. #define DB1300_FLASH_INT (DB1300_FIRST_INT + 7)
  43. #define DB1300_CF_INSERT_INT (DB1300_FIRST_INT + 8)
  44. #define DB1300_CF_EJECT_INT (DB1300_FIRST_INT + 9)
  45. #define DB1300_AC97_INT (DB1300_FIRST_INT + 10)
  46. #define DB1300_AC97_PEN_INT (DB1300_FIRST_INT + 11)
  47. #define DB1300_SD1_INSERT_INT (DB1300_FIRST_INT + 12)
  48. #define DB1300_SD1_EJECT_INT (DB1300_FIRST_INT + 13)
  49. #define DB1300_OTG_VBUS_OC_INT (DB1300_FIRST_INT + 14)
  50. #define DB1300_HOST_VBUS_OC_INT (DB1300_FIRST_INT + 15)
  51. #define DB1300_LAST_INT (DB1300_FIRST_INT + 15)
  52. /* SMSC9210 CS */
  53. #define DB1300_ETH_PHYS_ADDR 0x19000000
  54. #define DB1300_ETH_PHYS_END 0x197fffff
  55. /* ATA CS */
  56. #define DB1300_IDE_PHYS_ADDR 0x18800000
  57. #define DB1300_IDE_REG_SHIFT 5
  58. #define DB1300_IDE_PHYS_LEN (16 << DB1300_IDE_REG_SHIFT)
  59. /* NAND CS */
  60. #define DB1300_NAND_PHYS_ADDR 0x20000000
  61. #define DB1300_NAND_PHYS_END 0x20000fff
  62. static struct i2c_board_info db1300_i2c_devs[] __initdata = {
  63. { I2C_BOARD_INFO("wm8731", 0x1b), }, /* I2S audio codec */
  64. { I2C_BOARD_INFO("ne1619", 0x2d), }, /* adm1025-compat hwmon */
  65. };
  66. /* multifunction pins to assign to GPIO controller */
  67. static int db1300_gpio_pins[] __initdata = {
  68. AU1300_PIN_LCDPWM0, AU1300_PIN_PSC2SYNC1, AU1300_PIN_WAKE1,
  69. AU1300_PIN_WAKE2, AU1300_PIN_WAKE3, AU1300_PIN_FG3AUX,
  70. AU1300_PIN_EXTCLK1,
  71. -1, /* terminator */
  72. };
  73. /* multifunction pins to assign to device functions */
  74. static int db1300_dev_pins[] __initdata = {
  75. /* wake-from-str pins 0-3 */
  76. AU1300_PIN_WAKE0,
  77. /* external clock sources for PSC0 */
  78. AU1300_PIN_EXTCLK0,
  79. /* 8bit MMC interface on SD0: 6-9 */
  80. AU1300_PIN_SD0DAT4, AU1300_PIN_SD0DAT5, AU1300_PIN_SD0DAT6,
  81. AU1300_PIN_SD0DAT7,
  82. /* UART1 pins: 11-18 */
  83. AU1300_PIN_U1RI, AU1300_PIN_U1DCD, AU1300_PIN_U1DSR,
  84. AU1300_PIN_U1CTS, AU1300_PIN_U1RTS, AU1300_PIN_U1DTR,
  85. AU1300_PIN_U1RX, AU1300_PIN_U1TX,
  86. /* UART0 pins: 19-24 */
  87. AU1300_PIN_U0RI, AU1300_PIN_U0DCD, AU1300_PIN_U0DSR,
  88. AU1300_PIN_U0CTS, AU1300_PIN_U0RTS, AU1300_PIN_U0DTR,
  89. /* UART2: 25-26 */
  90. AU1300_PIN_U2RX, AU1300_PIN_U2TX,
  91. /* UART3: 27-28 */
  92. AU1300_PIN_U3RX, AU1300_PIN_U3TX,
  93. /* LCD controller PWMs, ext pixclock: 30-31 */
  94. AU1300_PIN_LCDPWM1, AU1300_PIN_LCDCLKIN,
  95. /* SD1 interface: 32-37 */
  96. AU1300_PIN_SD1DAT0, AU1300_PIN_SD1DAT1, AU1300_PIN_SD1DAT2,
  97. AU1300_PIN_SD1DAT3, AU1300_PIN_SD1CMD, AU1300_PIN_SD1CLK,
  98. /* SD2 interface: 38-43 */
  99. AU1300_PIN_SD2DAT0, AU1300_PIN_SD2DAT1, AU1300_PIN_SD2DAT2,
  100. AU1300_PIN_SD2DAT3, AU1300_PIN_SD2CMD, AU1300_PIN_SD2CLK,
  101. /* PSC0/1 clocks: 44-45 */
  102. AU1300_PIN_PSC0CLK, AU1300_PIN_PSC1CLK,
  103. /* PSCs: 46-49/50-53/54-57/58-61 */
  104. AU1300_PIN_PSC0SYNC0, AU1300_PIN_PSC0SYNC1, AU1300_PIN_PSC0D0,
  105. AU1300_PIN_PSC0D1,
  106. AU1300_PIN_PSC1SYNC0, AU1300_PIN_PSC1SYNC1, AU1300_PIN_PSC1D0,
  107. AU1300_PIN_PSC1D1,
  108. AU1300_PIN_PSC2SYNC0, AU1300_PIN_PSC2D0,
  109. AU1300_PIN_PSC2D1,
  110. AU1300_PIN_PSC3SYNC0, AU1300_PIN_PSC3SYNC1, AU1300_PIN_PSC3D0,
  111. AU1300_PIN_PSC3D1,
  112. /* PCMCIA interface: 62-70 */
  113. AU1300_PIN_PCE2, AU1300_PIN_PCE1, AU1300_PIN_PIOS16,
  114. AU1300_PIN_PIOR, AU1300_PIN_PWE, AU1300_PIN_PWAIT,
  115. AU1300_PIN_PREG, AU1300_PIN_POE, AU1300_PIN_PIOW,
  116. /* camera interface H/V sync inputs: 71-72 */
  117. AU1300_PIN_CIMLS, AU1300_PIN_CIMFS,
  118. /* PSC2/3 clocks: 73-74 */
  119. AU1300_PIN_PSC2CLK, AU1300_PIN_PSC3CLK,
  120. -1, /* terminator */
  121. };
  122. static void __init db1300_gpio_config(void)
  123. {
  124. int *i;
  125. i = &db1300_dev_pins[0];
  126. while (*i != -1)
  127. au1300_pinfunc_to_dev(*i++);
  128. i = &db1300_gpio_pins[0];
  129. while (*i != -1)
  130. au1300_gpio_direction_input(*i++);/* implies pin_to_gpio */
  131. au1300_set_dbdma_gpio(1, AU1300_PIN_FG3AUX);
  132. }
  133. /**********************************************************************/
  134. static void au1300_nand_cmd_ctrl(struct mtd_info *mtd, int cmd,
  135. unsigned int ctrl)
  136. {
  137. struct nand_chip *this = mtd_to_nand(mtd);
  138. unsigned long ioaddr = (unsigned long)this->IO_ADDR_W;
  139. ioaddr &= 0xffffff00;
  140. if (ctrl & NAND_CLE) {
  141. ioaddr += MEM_STNAND_CMD;
  142. } else if (ctrl & NAND_ALE) {
  143. ioaddr += MEM_STNAND_ADDR;
  144. } else {
  145. /* assume we want to r/w real data by default */
  146. ioaddr += MEM_STNAND_DATA;
  147. }
  148. this->IO_ADDR_R = this->IO_ADDR_W = (void __iomem *)ioaddr;
  149. if (cmd != NAND_CMD_NONE) {
  150. __raw_writeb(cmd, this->IO_ADDR_W);
  151. wmb();
  152. }
  153. }
  154. static int au1300_nand_device_ready(struct mtd_info *mtd)
  155. {
  156. return alchemy_rdsmem(AU1000_MEM_STSTAT) & 1;
  157. }
  158. static struct mtd_partition db1300_nand_parts[] = {
  159. {
  160. .name = "NAND FS 0",
  161. .offset = 0,
  162. .size = 8 * 1024 * 1024,
  163. },
  164. {
  165. .name = "NAND FS 1",
  166. .offset = MTDPART_OFS_APPEND,
  167. .size = MTDPART_SIZ_FULL
  168. },
  169. };
  170. struct platform_nand_data db1300_nand_platdata = {
  171. .chip = {
  172. .nr_chips = 1,
  173. .chip_offset = 0,
  174. .nr_partitions = ARRAY_SIZE(db1300_nand_parts),
  175. .partitions = db1300_nand_parts,
  176. .chip_delay = 20,
  177. },
  178. .ctrl = {
  179. .dev_ready = au1300_nand_device_ready,
  180. .cmd_ctrl = au1300_nand_cmd_ctrl,
  181. },
  182. };
  183. static struct resource db1300_nand_res[] = {
  184. [0] = {
  185. .start = DB1300_NAND_PHYS_ADDR,
  186. .end = DB1300_NAND_PHYS_ADDR + 0xff,
  187. .flags = IORESOURCE_MEM,
  188. },
  189. };
  190. static struct platform_device db1300_nand_dev = {
  191. .name = "gen_nand",
  192. .num_resources = ARRAY_SIZE(db1300_nand_res),
  193. .resource = db1300_nand_res,
  194. .id = -1,
  195. .dev = {
  196. .platform_data = &db1300_nand_platdata,
  197. }
  198. };
  199. /**********************************************************************/
  200. static struct resource db1300_eth_res[] = {
  201. [0] = {
  202. .start = DB1300_ETH_PHYS_ADDR,
  203. .end = DB1300_ETH_PHYS_END,
  204. .flags = IORESOURCE_MEM,
  205. },
  206. [1] = {
  207. .start = DB1300_ETH_INT,
  208. .end = DB1300_ETH_INT,
  209. .flags = IORESOURCE_IRQ,
  210. },
  211. };
  212. static struct smsc911x_platform_config db1300_eth_config = {
  213. .phy_interface = PHY_INTERFACE_MODE_MII,
  214. .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
  215. .irq_type = SMSC911X_IRQ_TYPE_PUSH_PULL,
  216. .flags = SMSC911X_USE_32BIT,
  217. };
  218. static struct platform_device db1300_eth_dev = {
  219. .name = "smsc911x",
  220. .id = -1,
  221. .num_resources = ARRAY_SIZE(db1300_eth_res),
  222. .resource = db1300_eth_res,
  223. .dev = {
  224. .platform_data = &db1300_eth_config,
  225. },
  226. };
  227. /**********************************************************************/
  228. static struct resource au1300_psc1_res[] = {
  229. [0] = {
  230. .start = AU1300_PSC1_PHYS_ADDR,
  231. .end = AU1300_PSC1_PHYS_ADDR + 0x0fff,
  232. .flags = IORESOURCE_MEM,
  233. },
  234. [1] = {
  235. .start = AU1300_PSC1_INT,
  236. .end = AU1300_PSC1_INT,
  237. .flags = IORESOURCE_IRQ,
  238. },
  239. [2] = {
  240. .start = AU1300_DSCR_CMD0_PSC1_TX,
  241. .end = AU1300_DSCR_CMD0_PSC1_TX,
  242. .flags = IORESOURCE_DMA,
  243. },
  244. [3] = {
  245. .start = AU1300_DSCR_CMD0_PSC1_RX,
  246. .end = AU1300_DSCR_CMD0_PSC1_RX,
  247. .flags = IORESOURCE_DMA,
  248. },
  249. };
  250. static struct platform_device db1300_ac97_dev = {
  251. .name = "au1xpsc_ac97",
  252. .id = 1, /* PSC ID. match with AC97 codec ID! */
  253. .num_resources = ARRAY_SIZE(au1300_psc1_res),
  254. .resource = au1300_psc1_res,
  255. };
  256. /**********************************************************************/
  257. static struct resource au1300_psc2_res[] = {
  258. [0] = {
  259. .start = AU1300_PSC2_PHYS_ADDR,
  260. .end = AU1300_PSC2_PHYS_ADDR + 0x0fff,
  261. .flags = IORESOURCE_MEM,
  262. },
  263. [1] = {
  264. .start = AU1300_PSC2_INT,
  265. .end = AU1300_PSC2_INT,
  266. .flags = IORESOURCE_IRQ,
  267. },
  268. [2] = {
  269. .start = AU1300_DSCR_CMD0_PSC2_TX,
  270. .end = AU1300_DSCR_CMD0_PSC2_TX,
  271. .flags = IORESOURCE_DMA,
  272. },
  273. [3] = {
  274. .start = AU1300_DSCR_CMD0_PSC2_RX,
  275. .end = AU1300_DSCR_CMD0_PSC2_RX,
  276. .flags = IORESOURCE_DMA,
  277. },
  278. };
  279. static struct platform_device db1300_i2s_dev = {
  280. .name = "au1xpsc_i2s",
  281. .id = 2, /* PSC ID */
  282. .num_resources = ARRAY_SIZE(au1300_psc2_res),
  283. .resource = au1300_psc2_res,
  284. };
  285. /**********************************************************************/
  286. static struct resource au1300_psc3_res[] = {
  287. [0] = {
  288. .start = AU1300_PSC3_PHYS_ADDR,
  289. .end = AU1300_PSC3_PHYS_ADDR + 0x0fff,
  290. .flags = IORESOURCE_MEM,
  291. },
  292. [1] = {
  293. .start = AU1300_PSC3_INT,
  294. .end = AU1300_PSC3_INT,
  295. .flags = IORESOURCE_IRQ,
  296. },
  297. [2] = {
  298. .start = AU1300_DSCR_CMD0_PSC3_TX,
  299. .end = AU1300_DSCR_CMD0_PSC3_TX,
  300. .flags = IORESOURCE_DMA,
  301. },
  302. [3] = {
  303. .start = AU1300_DSCR_CMD0_PSC3_RX,
  304. .end = AU1300_DSCR_CMD0_PSC3_RX,
  305. .flags = IORESOURCE_DMA,
  306. },
  307. };
  308. static struct platform_device db1300_i2c_dev = {
  309. .name = "au1xpsc_smbus",
  310. .id = 0, /* bus number */
  311. .num_resources = ARRAY_SIZE(au1300_psc3_res),
  312. .resource = au1300_psc3_res,
  313. };
  314. /**********************************************************************/
  315. /* proper key assignments when facing the LCD panel. For key assignments
  316. * according to the schematics swap up with down and left with right.
  317. * I chose to use it to emulate the arrow keys of a keyboard.
  318. */
  319. static struct gpio_keys_button db1300_5waysw_arrowkeys[] = {
  320. {
  321. .code = KEY_DOWN,
  322. .gpio = AU1300_PIN_LCDPWM0,
  323. .type = EV_KEY,
  324. .debounce_interval = 1,
  325. .active_low = 1,
  326. .desc = "5waysw-down",
  327. },
  328. {
  329. .code = KEY_UP,
  330. .gpio = AU1300_PIN_PSC2SYNC1,
  331. .type = EV_KEY,
  332. .debounce_interval = 1,
  333. .active_low = 1,
  334. .desc = "5waysw-up",
  335. },
  336. {
  337. .code = KEY_RIGHT,
  338. .gpio = AU1300_PIN_WAKE3,
  339. .type = EV_KEY,
  340. .debounce_interval = 1,
  341. .active_low = 1,
  342. .desc = "5waysw-right",
  343. },
  344. {
  345. .code = KEY_LEFT,
  346. .gpio = AU1300_PIN_WAKE2,
  347. .type = EV_KEY,
  348. .debounce_interval = 1,
  349. .active_low = 1,
  350. .desc = "5waysw-left",
  351. },
  352. {
  353. .code = KEY_ENTER,
  354. .gpio = AU1300_PIN_WAKE1,
  355. .type = EV_KEY,
  356. .debounce_interval = 1,
  357. .active_low = 1,
  358. .desc = "5waysw-push",
  359. },
  360. };
  361. static struct gpio_keys_platform_data db1300_5waysw_data = {
  362. .buttons = db1300_5waysw_arrowkeys,
  363. .nbuttons = ARRAY_SIZE(db1300_5waysw_arrowkeys),
  364. .rep = 1,
  365. .name = "db1300-5wayswitch",
  366. };
  367. static struct platform_device db1300_5waysw_dev = {
  368. .name = "gpio-keys",
  369. .dev = {
  370. .platform_data = &db1300_5waysw_data,
  371. },
  372. };
  373. /**********************************************************************/
  374. static struct pata_platform_info db1300_ide_info = {
  375. .ioport_shift = DB1300_IDE_REG_SHIFT,
  376. };
  377. #define IDE_ALT_START (14 << DB1300_IDE_REG_SHIFT)
  378. static struct resource db1300_ide_res[] = {
  379. [0] = {
  380. .start = DB1300_IDE_PHYS_ADDR,
  381. .end = DB1300_IDE_PHYS_ADDR + IDE_ALT_START - 1,
  382. .flags = IORESOURCE_MEM,
  383. },
  384. [1] = {
  385. .start = DB1300_IDE_PHYS_ADDR + IDE_ALT_START,
  386. .end = DB1300_IDE_PHYS_ADDR + DB1300_IDE_PHYS_LEN - 1,
  387. .flags = IORESOURCE_MEM,
  388. },
  389. [2] = {
  390. .start = DB1300_IDE_INT,
  391. .end = DB1300_IDE_INT,
  392. .flags = IORESOURCE_IRQ,
  393. },
  394. };
  395. static struct platform_device db1300_ide_dev = {
  396. .dev = {
  397. .platform_data = &db1300_ide_info,
  398. },
  399. .name = "pata_platform",
  400. .resource = db1300_ide_res,
  401. .num_resources = ARRAY_SIZE(db1300_ide_res),
  402. };
  403. /**********************************************************************/
  404. static irqreturn_t db1300_mmc_cd(int irq, void *ptr)
  405. {
  406. void(*mmc_cd)(struct mmc_host *, unsigned long);
  407. /* disable the one currently screaming. No other way to shut it up */
  408. if (irq == DB1300_SD1_INSERT_INT) {
  409. disable_irq_nosync(DB1300_SD1_INSERT_INT);
  410. enable_irq(DB1300_SD1_EJECT_INT);
  411. } else {
  412. disable_irq_nosync(DB1300_SD1_EJECT_INT);
  413. enable_irq(DB1300_SD1_INSERT_INT);
  414. }
  415. /* link against CONFIG_MMC=m. We can only be called once MMC core has
  416. * initialized the controller, so symbol_get() should always succeed.
  417. */
  418. mmc_cd = symbol_get(mmc_detect_change);
  419. mmc_cd(ptr, msecs_to_jiffies(500));
  420. symbol_put(mmc_detect_change);
  421. return IRQ_HANDLED;
  422. }
  423. static int db1300_mmc_card_readonly(void *mmc_host)
  424. {
  425. /* it uses SD1 interface, but the DB1200's SD0 bit in the CPLD */
  426. return bcsr_read(BCSR_STATUS) & BCSR_STATUS_SD0WP;
  427. }
  428. static int db1300_mmc_card_inserted(void *mmc_host)
  429. {
  430. return bcsr_read(BCSR_SIGSTAT) & (1 << 12); /* insertion irq signal */
  431. }
  432. static int db1300_mmc_cd_setup(void *mmc_host, int en)
  433. {
  434. int ret;
  435. if (en) {
  436. ret = request_irq(DB1300_SD1_INSERT_INT, db1300_mmc_cd, 0,
  437. "sd_insert", mmc_host);
  438. if (ret)
  439. goto out;
  440. ret = request_irq(DB1300_SD1_EJECT_INT, db1300_mmc_cd, 0,
  441. "sd_eject", mmc_host);
  442. if (ret) {
  443. free_irq(DB1300_SD1_INSERT_INT, mmc_host);
  444. goto out;
  445. }
  446. if (db1300_mmc_card_inserted(mmc_host))
  447. enable_irq(DB1300_SD1_EJECT_INT);
  448. else
  449. enable_irq(DB1300_SD1_INSERT_INT);
  450. } else {
  451. free_irq(DB1300_SD1_INSERT_INT, mmc_host);
  452. free_irq(DB1300_SD1_EJECT_INT, mmc_host);
  453. }
  454. ret = 0;
  455. out:
  456. return ret;
  457. }
  458. static void db1300_mmcled_set(struct led_classdev *led,
  459. enum led_brightness brightness)
  460. {
  461. if (brightness != LED_OFF)
  462. bcsr_mod(BCSR_LEDS, BCSR_LEDS_LED0, 0);
  463. else
  464. bcsr_mod(BCSR_LEDS, 0, BCSR_LEDS_LED0);
  465. }
  466. static struct led_classdev db1300_mmc_led = {
  467. .brightness_set = db1300_mmcled_set,
  468. };
  469. struct au1xmmc_platform_data db1300_sd1_platdata = {
  470. .cd_setup = db1300_mmc_cd_setup,
  471. .card_inserted = db1300_mmc_card_inserted,
  472. .card_readonly = db1300_mmc_card_readonly,
  473. .led = &db1300_mmc_led,
  474. };
  475. static struct resource au1300_sd1_res[] = {
  476. [0] = {
  477. .start = AU1300_SD1_PHYS_ADDR,
  478. .end = AU1300_SD1_PHYS_ADDR,
  479. .flags = IORESOURCE_MEM,
  480. },
  481. [1] = {
  482. .start = AU1300_SD1_INT,
  483. .end = AU1300_SD1_INT,
  484. .flags = IORESOURCE_IRQ,
  485. },
  486. [2] = {
  487. .start = AU1300_DSCR_CMD0_SDMS_TX1,
  488. .end = AU1300_DSCR_CMD0_SDMS_TX1,
  489. .flags = IORESOURCE_DMA,
  490. },
  491. [3] = {
  492. .start = AU1300_DSCR_CMD0_SDMS_RX1,
  493. .end = AU1300_DSCR_CMD0_SDMS_RX1,
  494. .flags = IORESOURCE_DMA,
  495. },
  496. };
  497. static struct platform_device db1300_sd1_dev = {
  498. .dev = {
  499. .platform_data = &db1300_sd1_platdata,
  500. },
  501. .name = "au1xxx-mmc",
  502. .id = 1,
  503. .resource = au1300_sd1_res,
  504. .num_resources = ARRAY_SIZE(au1300_sd1_res),
  505. };
  506. /**********************************************************************/
  507. static int db1300_movinand_inserted(void *mmc_host)
  508. {
  509. return 0; /* disable for now, it doesn't work yet */
  510. }
  511. static int db1300_movinand_readonly(void *mmc_host)
  512. {
  513. return 0;
  514. }
  515. static void db1300_movinand_led_set(struct led_classdev *led,
  516. enum led_brightness brightness)
  517. {
  518. if (brightness != LED_OFF)
  519. bcsr_mod(BCSR_LEDS, BCSR_LEDS_LED1, 0);
  520. else
  521. bcsr_mod(BCSR_LEDS, 0, BCSR_LEDS_LED1);
  522. }
  523. static struct led_classdev db1300_movinand_led = {
  524. .brightness_set = db1300_movinand_led_set,
  525. };
  526. struct au1xmmc_platform_data db1300_sd0_platdata = {
  527. .card_inserted = db1300_movinand_inserted,
  528. .card_readonly = db1300_movinand_readonly,
  529. .led = &db1300_movinand_led,
  530. .mask_host_caps = MMC_CAP_NEEDS_POLL,
  531. };
  532. static struct resource au1300_sd0_res[] = {
  533. [0] = {
  534. .start = AU1100_SD0_PHYS_ADDR,
  535. .end = AU1100_SD0_PHYS_ADDR,
  536. .flags = IORESOURCE_MEM,
  537. },
  538. [1] = {
  539. .start = AU1300_SD0_INT,
  540. .end = AU1300_SD0_INT,
  541. .flags = IORESOURCE_IRQ,
  542. },
  543. [2] = {
  544. .start = AU1300_DSCR_CMD0_SDMS_TX0,
  545. .end = AU1300_DSCR_CMD0_SDMS_TX0,
  546. .flags = IORESOURCE_DMA,
  547. },
  548. [3] = {
  549. .start = AU1300_DSCR_CMD0_SDMS_RX0,
  550. .end = AU1300_DSCR_CMD0_SDMS_RX0,
  551. .flags = IORESOURCE_DMA,
  552. },
  553. };
  554. static struct platform_device db1300_sd0_dev = {
  555. .dev = {
  556. .platform_data = &db1300_sd0_platdata,
  557. },
  558. .name = "au1xxx-mmc",
  559. .id = 0,
  560. .resource = au1300_sd0_res,
  561. .num_resources = ARRAY_SIZE(au1300_sd0_res),
  562. };
  563. /**********************************************************************/
  564. static struct platform_device db1300_wm9715_dev = {
  565. .name = "wm9712-codec",
  566. .id = 1, /* ID of PSC for AC97 audio, see asoc glue! */
  567. };
  568. static struct platform_device db1300_ac97dma_dev = {
  569. .name = "au1xpsc-pcm",
  570. .id = 1, /* PSC ID */
  571. };
  572. static struct platform_device db1300_i2sdma_dev = {
  573. .name = "au1xpsc-pcm",
  574. .id = 2, /* PSC ID */
  575. };
  576. static struct platform_device db1300_sndac97_dev = {
  577. .name = "db1300-ac97",
  578. };
  579. static struct platform_device db1300_sndi2s_dev = {
  580. .name = "db1300-i2s",
  581. };
  582. /**********************************************************************/
  583. static int db1300fb_panel_index(void)
  584. {
  585. return 9; /* DB1300_800x480 */
  586. }
  587. static int db1300fb_panel_init(void)
  588. {
  589. /* Apply power (Vee/Vdd logic is inverted on Panel DB1300_800x480) */
  590. bcsr_mod(BCSR_BOARD, BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD,
  591. BCSR_BOARD_LCDBL);
  592. return 0;
  593. }
  594. static int db1300fb_panel_shutdown(void)
  595. {
  596. /* Remove power (Vee/Vdd logic is inverted on Panel DB1300_800x480) */
  597. bcsr_mod(BCSR_BOARD, BCSR_BOARD_LCDBL,
  598. BCSR_BOARD_LCDVEE | BCSR_BOARD_LCDVDD);
  599. return 0;
  600. }
  601. static struct au1200fb_platdata db1300fb_pd = {
  602. .panel_index = db1300fb_panel_index,
  603. .panel_init = db1300fb_panel_init,
  604. .panel_shutdown = db1300fb_panel_shutdown,
  605. };
  606. static struct resource au1300_lcd_res[] = {
  607. [0] = {
  608. .start = AU1200_LCD_PHYS_ADDR,
  609. .end = AU1200_LCD_PHYS_ADDR + 0x800 - 1,
  610. .flags = IORESOURCE_MEM,
  611. },
  612. [1] = {
  613. .start = AU1300_LCD_INT,
  614. .end = AU1300_LCD_INT,
  615. .flags = IORESOURCE_IRQ,
  616. }
  617. };
  618. static u64 au1300_lcd_dmamask = DMA_BIT_MASK(32);
  619. static struct platform_device db1300_lcd_dev = {
  620. .name = "au1200-lcd",
  621. .id = 0,
  622. .dev = {
  623. .dma_mask = &au1300_lcd_dmamask,
  624. .coherent_dma_mask = DMA_BIT_MASK(32),
  625. .platform_data = &db1300fb_pd,
  626. },
  627. .num_resources = ARRAY_SIZE(au1300_lcd_res),
  628. .resource = au1300_lcd_res,
  629. };
  630. /**********************************************************************/
  631. static void db1300_wm97xx_irqen(struct wm97xx *wm, int enable)
  632. {
  633. if (enable)
  634. enable_irq(DB1300_AC97_PEN_INT);
  635. else
  636. disable_irq_nosync(DB1300_AC97_PEN_INT);
  637. }
  638. static struct wm97xx_mach_ops db1300_wm97xx_ops = {
  639. .irq_enable = db1300_wm97xx_irqen,
  640. .irq_gpio = WM97XX_GPIO_3,
  641. };
  642. static int db1300_wm97xx_probe(struct platform_device *pdev)
  643. {
  644. struct wm97xx *wm = platform_get_drvdata(pdev);
  645. /* external pendown indicator */
  646. wm97xx_config_gpio(wm, WM97XX_GPIO_13, WM97XX_GPIO_IN,
  647. WM97XX_GPIO_POL_LOW, WM97XX_GPIO_STICKY,
  648. WM97XX_GPIO_WAKE);
  649. /* internal "virtual" pendown gpio */
  650. wm97xx_config_gpio(wm, WM97XX_GPIO_3, WM97XX_GPIO_OUT,
  651. WM97XX_GPIO_POL_LOW, WM97XX_GPIO_NOTSTICKY,
  652. WM97XX_GPIO_NOWAKE);
  653. wm->pen_irq = DB1300_AC97_PEN_INT;
  654. return wm97xx_register_mach_ops(wm, &db1300_wm97xx_ops);
  655. }
  656. static struct platform_driver db1300_wm97xx_driver = {
  657. .driver.name = "wm97xx-touch",
  658. .driver.owner = THIS_MODULE,
  659. .probe = db1300_wm97xx_probe,
  660. };
  661. /**********************************************************************/
  662. static struct platform_device *db1300_dev[] __initdata = {
  663. &db1300_eth_dev,
  664. &db1300_i2c_dev,
  665. &db1300_5waysw_dev,
  666. &db1300_nand_dev,
  667. &db1300_ide_dev,
  668. &db1300_sd0_dev,
  669. &db1300_sd1_dev,
  670. &db1300_lcd_dev,
  671. &db1300_ac97_dev,
  672. &db1300_i2s_dev,
  673. &db1300_wm9715_dev,
  674. &db1300_ac97dma_dev,
  675. &db1300_i2sdma_dev,
  676. &db1300_sndac97_dev,
  677. &db1300_sndi2s_dev,
  678. };
  679. int __init db1300_dev_setup(void)
  680. {
  681. int swapped, cpldirq;
  682. struct clk *c;
  683. /* setup CPLD IRQ muxer */
  684. cpldirq = au1300_gpio_to_irq(AU1300_PIN_EXTCLK1);
  685. irq_set_irq_type(cpldirq, IRQ_TYPE_LEVEL_HIGH);
  686. bcsr_init_irq(DB1300_FIRST_INT, DB1300_LAST_INT, cpldirq);
  687. /* insert/eject IRQs: one always triggers so don't enable them
  688. * when doing request_irq() on them. DB1200 has this bug too.
  689. */
  690. irq_set_status_flags(DB1300_SD1_INSERT_INT, IRQ_NOAUTOEN);
  691. irq_set_status_flags(DB1300_SD1_EJECT_INT, IRQ_NOAUTOEN);
  692. irq_set_status_flags(DB1300_CF_INSERT_INT, IRQ_NOAUTOEN);
  693. irq_set_status_flags(DB1300_CF_EJECT_INT, IRQ_NOAUTOEN);
  694. /*
  695. * setup board
  696. */
  697. prom_get_ethernet_addr(&db1300_eth_config.mac[0]);
  698. i2c_register_board_info(0, db1300_i2c_devs,
  699. ARRAY_SIZE(db1300_i2c_devs));
  700. if (platform_driver_register(&db1300_wm97xx_driver))
  701. pr_warn("DB1300: failed to init touch pen irq support!\n");
  702. /* Audio PSC clock is supplied by codecs (PSC1, 2) */
  703. __raw_writel(PSC_SEL_CLK_SERCLK,
  704. (void __iomem *)KSEG1ADDR(AU1300_PSC1_PHYS_ADDR) + PSC_SEL_OFFSET);
  705. wmb();
  706. __raw_writel(PSC_SEL_CLK_SERCLK,
  707. (void __iomem *)KSEG1ADDR(AU1300_PSC2_PHYS_ADDR) + PSC_SEL_OFFSET);
  708. wmb();
  709. /* I2C driver wants 50MHz, get as close as possible */
  710. c = clk_get(NULL, "psc3_intclk");
  711. if (!IS_ERR(c)) {
  712. clk_set_rate(c, 50000000);
  713. clk_prepare_enable(c);
  714. clk_put(c);
  715. }
  716. __raw_writel(PSC_SEL_CLK_INTCLK,
  717. (void __iomem *)KSEG1ADDR(AU1300_PSC3_PHYS_ADDR) + PSC_SEL_OFFSET);
  718. wmb();
  719. /* enable power to USB ports */
  720. bcsr_mod(BCSR_RESETS, 0, BCSR_RESETS_USBHPWR | BCSR_RESETS_OTGPWR);
  721. /* although it is socket #0, it uses the CPLD bits which previous boards
  722. * have used for socket #1.
  723. */
  724. db1x_register_pcmcia_socket(
  725. AU1000_PCMCIA_ATTR_PHYS_ADDR,
  726. AU1000_PCMCIA_ATTR_PHYS_ADDR + 0x00400000 - 1,
  727. AU1000_PCMCIA_MEM_PHYS_ADDR,
  728. AU1000_PCMCIA_MEM_PHYS_ADDR + 0x00400000 - 1,
  729. AU1000_PCMCIA_IO_PHYS_ADDR,
  730. AU1000_PCMCIA_IO_PHYS_ADDR + 0x00010000 - 1,
  731. DB1300_CF_INT, DB1300_CF_INSERT_INT, 0, DB1300_CF_EJECT_INT, 1);
  732. swapped = bcsr_read(BCSR_STATUS) & BCSR_STATUS_DB1200_SWAPBOOT;
  733. db1x_register_norflash(64 << 20, 2, swapped);
  734. return platform_add_devices(db1300_dev, ARRAY_SIZE(db1300_dev));
  735. }
  736. int __init db1300_board_setup(void)
  737. {
  738. unsigned short whoami;
  739. bcsr_init(DB1300_BCSR_PHYS_ADDR,
  740. DB1300_BCSR_PHYS_ADDR + DB1300_BCSR_HEXLED_OFS);
  741. whoami = bcsr_read(BCSR_WHOAMI);
  742. if (BCSR_WHOAMI_BOARD(whoami) != BCSR_WHOAMI_DB1300)
  743. return -ENODEV;
  744. db1300_gpio_config();
  745. printk(KERN_INFO "NetLogic DBAu1300 Development Platform.\n\t"
  746. "BoardID %d CPLD Rev %d DaughtercardID %d\n",
  747. BCSR_WHOAMI_BOARD(whoami), BCSR_WHOAMI_CPLD(whoami),
  748. BCSR_WHOAMI_DCID(whoami));
  749. /* enable UARTs, YAMON only enables #2 */
  750. alchemy_uart_enable(AU1300_UART0_PHYS_ADDR);
  751. alchemy_uart_enable(AU1300_UART1_PHYS_ADDR);
  752. alchemy_uart_enable(AU1300_UART3_PHYS_ADDR);
  753. return 0;
  754. }