board-dm644x-evm.c 20 KB

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  1. /*
  2. * TI DaVinci EVM board support
  3. *
  4. * Author: Kevin Hilman, MontaVista Software, Inc. <source@mvista.com>
  5. *
  6. * 2007 (c) MontaVista Software, Inc. This file is licensed under
  7. * the terms of the GNU General Public License version 2. This program
  8. * is licensed "as is" without any warranty of any kind, whether express
  9. * or implied.
  10. */
  11. #include <linux/kernel.h>
  12. #include <linux/init.h>
  13. #include <linux/dma-mapping.h>
  14. #include <linux/platform_device.h>
  15. #include <linux/gpio.h>
  16. #include <linux/i2c.h>
  17. #include <linux/platform_data/pcf857x.h>
  18. #include <linux/platform_data/at24.h>
  19. #include <linux/mtd/mtd.h>
  20. #include <linux/mtd/rawnand.h>
  21. #include <linux/mtd/partitions.h>
  22. #include <linux/mtd/physmap.h>
  23. #include <linux/phy.h>
  24. #include <linux/clk.h>
  25. #include <linux/videodev2.h>
  26. #include <linux/v4l2-dv-timings.h>
  27. #include <linux/export.h>
  28. #include <linux/leds.h>
  29. #include <media/i2c/tvp514x.h>
  30. #include <asm/mach-types.h>
  31. #include <asm/mach/arch.h>
  32. #include <mach/common.h>
  33. #include <linux/platform_data/i2c-davinci.h>
  34. #include <mach/serial.h>
  35. #include <mach/mux.h>
  36. #include <linux/platform_data/mtd-davinci.h>
  37. #include <linux/platform_data/mmc-davinci.h>
  38. #include <linux/platform_data/usb-davinci.h>
  39. #include <linux/platform_data/mtd-davinci-aemif.h>
  40. #include "davinci.h"
  41. #define DM644X_EVM_PHY_ID "davinci_mdio-0:01"
  42. #define LXT971_PHY_ID (0x001378e2)
  43. #define LXT971_PHY_MASK (0xfffffff0)
  44. static struct mtd_partition davinci_evm_norflash_partitions[] = {
  45. /* bootloader (UBL, U-Boot, etc) in first 5 sectors */
  46. {
  47. .name = "bootloader",
  48. .offset = 0,
  49. .size = 5 * SZ_64K,
  50. .mask_flags = MTD_WRITEABLE, /* force read-only */
  51. },
  52. /* bootloader params in the next 1 sectors */
  53. {
  54. .name = "params",
  55. .offset = MTDPART_OFS_APPEND,
  56. .size = SZ_64K,
  57. .mask_flags = 0,
  58. },
  59. /* kernel */
  60. {
  61. .name = "kernel",
  62. .offset = MTDPART_OFS_APPEND,
  63. .size = SZ_2M,
  64. .mask_flags = 0
  65. },
  66. /* file system */
  67. {
  68. .name = "filesystem",
  69. .offset = MTDPART_OFS_APPEND,
  70. .size = MTDPART_SIZ_FULL,
  71. .mask_flags = 0
  72. }
  73. };
  74. static struct physmap_flash_data davinci_evm_norflash_data = {
  75. .width = 2,
  76. .parts = davinci_evm_norflash_partitions,
  77. .nr_parts = ARRAY_SIZE(davinci_evm_norflash_partitions),
  78. };
  79. /* NOTE: CFI probe will correctly detect flash part as 32M, but EMIF
  80. * limits addresses to 16M, so using addresses past 16M will wrap */
  81. static struct resource davinci_evm_norflash_resource = {
  82. .start = DM644X_ASYNC_EMIF_DATA_CE0_BASE,
  83. .end = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
  84. .flags = IORESOURCE_MEM,
  85. };
  86. static struct platform_device davinci_evm_norflash_device = {
  87. .name = "physmap-flash",
  88. .id = 0,
  89. .dev = {
  90. .platform_data = &davinci_evm_norflash_data,
  91. },
  92. .num_resources = 1,
  93. .resource = &davinci_evm_norflash_resource,
  94. };
  95. /* DM644x EVM includes a 64 MByte small-page NAND flash (16K blocks).
  96. * It may used instead of the (default) NOR chip to boot, using TI's
  97. * tools to install the secondary boot loader (UBL) and U-Boot.
  98. */
  99. static struct mtd_partition davinci_evm_nandflash_partition[] = {
  100. /* Bootloader layout depends on whose u-boot is installed, but we
  101. * can hide all the details.
  102. * - block 0 for u-boot environment ... in mainline u-boot
  103. * - block 1 for UBL (plus up to four backup copies in blocks 2..5)
  104. * - blocks 6...? for u-boot
  105. * - blocks 16..23 for u-boot environment ... in TI's u-boot
  106. */
  107. {
  108. .name = "bootloader",
  109. .offset = 0,
  110. .size = SZ_256K + SZ_128K,
  111. .mask_flags = MTD_WRITEABLE, /* force read-only */
  112. },
  113. /* Kernel */
  114. {
  115. .name = "kernel",
  116. .offset = MTDPART_OFS_APPEND,
  117. .size = SZ_4M,
  118. .mask_flags = 0,
  119. },
  120. /* File system (older GIT kernels started this on the 5MB mark) */
  121. {
  122. .name = "filesystem",
  123. .offset = MTDPART_OFS_APPEND,
  124. .size = MTDPART_SIZ_FULL,
  125. .mask_flags = 0,
  126. }
  127. /* A few blocks at end hold a flash BBT ... created by TI's CCS
  128. * using flashwriter_nand.out, but ignored by TI's versions of
  129. * Linux and u-boot. We boot faster by using them.
  130. */
  131. };
  132. static struct davinci_aemif_timing davinci_evm_nandflash_timing = {
  133. .wsetup = 20,
  134. .wstrobe = 40,
  135. .whold = 20,
  136. .rsetup = 10,
  137. .rstrobe = 40,
  138. .rhold = 10,
  139. .ta = 40,
  140. };
  141. static struct davinci_nand_pdata davinci_evm_nandflash_data = {
  142. .parts = davinci_evm_nandflash_partition,
  143. .nr_parts = ARRAY_SIZE(davinci_evm_nandflash_partition),
  144. .ecc_mode = NAND_ECC_HW,
  145. .ecc_bits = 1,
  146. .bbt_options = NAND_BBT_USE_FLASH,
  147. .timing = &davinci_evm_nandflash_timing,
  148. };
  149. static struct resource davinci_evm_nandflash_resource[] = {
  150. {
  151. .start = DM644X_ASYNC_EMIF_DATA_CE0_BASE,
  152. .end = DM644X_ASYNC_EMIF_DATA_CE0_BASE + SZ_16M - 1,
  153. .flags = IORESOURCE_MEM,
  154. }, {
  155. .start = DM644X_ASYNC_EMIF_CONTROL_BASE,
  156. .end = DM644X_ASYNC_EMIF_CONTROL_BASE + SZ_4K - 1,
  157. .flags = IORESOURCE_MEM,
  158. },
  159. };
  160. static struct platform_device davinci_evm_nandflash_device = {
  161. .name = "davinci_nand",
  162. .id = 0,
  163. .dev = {
  164. .platform_data = &davinci_evm_nandflash_data,
  165. },
  166. .num_resources = ARRAY_SIZE(davinci_evm_nandflash_resource),
  167. .resource = davinci_evm_nandflash_resource,
  168. };
  169. static u64 davinci_fb_dma_mask = DMA_BIT_MASK(32);
  170. static struct platform_device davinci_fb_device = {
  171. .name = "davincifb",
  172. .id = -1,
  173. .dev = {
  174. .dma_mask = &davinci_fb_dma_mask,
  175. .coherent_dma_mask = DMA_BIT_MASK(32),
  176. },
  177. .num_resources = 0,
  178. };
  179. static struct tvp514x_platform_data dm644xevm_tvp5146_pdata = {
  180. .clk_polarity = 0,
  181. .hs_polarity = 1,
  182. .vs_polarity = 1
  183. };
  184. #define TVP514X_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
  185. /* Inputs available at the TVP5146 */
  186. static struct v4l2_input dm644xevm_tvp5146_inputs[] = {
  187. {
  188. .index = 0,
  189. .name = "Composite",
  190. .type = V4L2_INPUT_TYPE_CAMERA,
  191. .std = TVP514X_STD_ALL,
  192. },
  193. {
  194. .index = 1,
  195. .name = "S-Video",
  196. .type = V4L2_INPUT_TYPE_CAMERA,
  197. .std = TVP514X_STD_ALL,
  198. },
  199. };
  200. /*
  201. * this is the route info for connecting each input to decoder
  202. * ouput that goes to vpfe. There is a one to one correspondence
  203. * with tvp5146_inputs
  204. */
  205. static struct vpfe_route dm644xevm_tvp5146_routes[] = {
  206. {
  207. .input = INPUT_CVBS_VI2B,
  208. .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
  209. },
  210. {
  211. .input = INPUT_SVIDEO_VI2C_VI1C,
  212. .output = OUTPUT_10BIT_422_EMBEDDED_SYNC,
  213. },
  214. };
  215. static struct vpfe_subdev_info dm644xevm_vpfe_sub_devs[] = {
  216. {
  217. .name = "tvp5146",
  218. .grp_id = 0,
  219. .num_inputs = ARRAY_SIZE(dm644xevm_tvp5146_inputs),
  220. .inputs = dm644xevm_tvp5146_inputs,
  221. .routes = dm644xevm_tvp5146_routes,
  222. .can_route = 1,
  223. .ccdc_if_params = {
  224. .if_type = VPFE_BT656,
  225. .hdpol = VPFE_PINPOL_POSITIVE,
  226. .vdpol = VPFE_PINPOL_POSITIVE,
  227. },
  228. .board_info = {
  229. I2C_BOARD_INFO("tvp5146", 0x5d),
  230. .platform_data = &dm644xevm_tvp5146_pdata,
  231. },
  232. },
  233. };
  234. static struct vpfe_config dm644xevm_capture_cfg = {
  235. .num_subdevs = ARRAY_SIZE(dm644xevm_vpfe_sub_devs),
  236. .i2c_adapter_id = 1,
  237. .sub_devs = dm644xevm_vpfe_sub_devs,
  238. .card_name = "DM6446 EVM",
  239. .ccdc = "DM6446 CCDC",
  240. };
  241. static struct platform_device rtc_dev = {
  242. .name = "rtc_davinci_evm",
  243. .id = -1,
  244. };
  245. /*----------------------------------------------------------------------*/
  246. #ifdef CONFIG_I2C
  247. /*
  248. * I2C GPIO expanders
  249. */
  250. #define PCF_Uxx_BASE(x) (DAVINCI_N_GPIO + ((x) * 8))
  251. /* U2 -- LEDs */
  252. static struct gpio_led evm_leds[] = {
  253. { .name = "DS8", .active_low = 1,
  254. .default_trigger = "heartbeat", },
  255. { .name = "DS7", .active_low = 1, },
  256. { .name = "DS6", .active_low = 1, },
  257. { .name = "DS5", .active_low = 1, },
  258. { .name = "DS4", .active_low = 1, },
  259. { .name = "DS3", .active_low = 1, },
  260. { .name = "DS2", .active_low = 1,
  261. .default_trigger = "mmc0", },
  262. { .name = "DS1", .active_low = 1,
  263. .default_trigger = "disk-activity", },
  264. };
  265. static const struct gpio_led_platform_data evm_led_data = {
  266. .num_leds = ARRAY_SIZE(evm_leds),
  267. .leds = evm_leds,
  268. };
  269. static struct platform_device *evm_led_dev;
  270. static int
  271. evm_led_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
  272. {
  273. struct gpio_led *leds = evm_leds;
  274. int status;
  275. while (ngpio--) {
  276. leds->gpio = gpio++;
  277. leds++;
  278. }
  279. /* what an extremely annoying way to be forced to handle
  280. * device unregistration ...
  281. */
  282. evm_led_dev = platform_device_alloc("leds-gpio", 0);
  283. platform_device_add_data(evm_led_dev,
  284. &evm_led_data, sizeof evm_led_data);
  285. evm_led_dev->dev.parent = &client->dev;
  286. status = platform_device_add(evm_led_dev);
  287. if (status < 0) {
  288. platform_device_put(evm_led_dev);
  289. evm_led_dev = NULL;
  290. }
  291. return status;
  292. }
  293. static int
  294. evm_led_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
  295. {
  296. if (evm_led_dev) {
  297. platform_device_unregister(evm_led_dev);
  298. evm_led_dev = NULL;
  299. }
  300. return 0;
  301. }
  302. static struct pcf857x_platform_data pcf_data_u2 = {
  303. .gpio_base = PCF_Uxx_BASE(0),
  304. .setup = evm_led_setup,
  305. .teardown = evm_led_teardown,
  306. };
  307. /* U18 - A/V clock generator and user switch */
  308. static int sw_gpio;
  309. static ssize_t
  310. sw_show(struct device *d, struct device_attribute *a, char *buf)
  311. {
  312. char *s = gpio_get_value_cansleep(sw_gpio) ? "on\n" : "off\n";
  313. strcpy(buf, s);
  314. return strlen(s);
  315. }
  316. static DEVICE_ATTR(user_sw, S_IRUGO, sw_show, NULL);
  317. static int
  318. evm_u18_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
  319. {
  320. int status;
  321. /* export dip switch option */
  322. sw_gpio = gpio + 7;
  323. status = gpio_request(sw_gpio, "user_sw");
  324. if (status == 0)
  325. status = gpio_direction_input(sw_gpio);
  326. if (status == 0)
  327. status = device_create_file(&client->dev, &dev_attr_user_sw);
  328. else
  329. gpio_free(sw_gpio);
  330. if (status != 0)
  331. sw_gpio = -EINVAL;
  332. /* audio PLL: 48 kHz (vs 44.1 or 32), single rate (vs double) */
  333. gpio_request(gpio + 3, "pll_fs2");
  334. gpio_direction_output(gpio + 3, 0);
  335. gpio_request(gpio + 2, "pll_fs1");
  336. gpio_direction_output(gpio + 2, 0);
  337. gpio_request(gpio + 1, "pll_sr");
  338. gpio_direction_output(gpio + 1, 0);
  339. return 0;
  340. }
  341. static int
  342. evm_u18_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
  343. {
  344. gpio_free(gpio + 1);
  345. gpio_free(gpio + 2);
  346. gpio_free(gpio + 3);
  347. if (sw_gpio > 0) {
  348. device_remove_file(&client->dev, &dev_attr_user_sw);
  349. gpio_free(sw_gpio);
  350. }
  351. return 0;
  352. }
  353. static struct pcf857x_platform_data pcf_data_u18 = {
  354. .gpio_base = PCF_Uxx_BASE(1),
  355. .n_latch = (1 << 3) | (1 << 2) | (1 << 1),
  356. .setup = evm_u18_setup,
  357. .teardown = evm_u18_teardown,
  358. };
  359. /* U35 - various I/O signals used to manage USB, CF, ATA, etc */
  360. static int
  361. evm_u35_setup(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
  362. {
  363. /* p0 = nDRV_VBUS (initial: don't supply it) */
  364. gpio_request(gpio + 0, "nDRV_VBUS");
  365. gpio_direction_output(gpio + 0, 1);
  366. /* p1 = VDDIMX_EN */
  367. gpio_request(gpio + 1, "VDDIMX_EN");
  368. gpio_direction_output(gpio + 1, 1);
  369. /* p2 = VLYNQ_EN */
  370. gpio_request(gpio + 2, "VLYNQ_EN");
  371. gpio_direction_output(gpio + 2, 1);
  372. /* p3 = n3V3_CF_RESET (initial: stay in reset) */
  373. gpio_request(gpio + 3, "nCF_RESET");
  374. gpio_direction_output(gpio + 3, 0);
  375. /* (p4 unused) */
  376. /* p5 = 1V8_WLAN_RESET (initial: stay in reset) */
  377. gpio_request(gpio + 5, "WLAN_RESET");
  378. gpio_direction_output(gpio + 5, 1);
  379. /* p6 = nATA_SEL (initial: select) */
  380. gpio_request(gpio + 6, "nATA_SEL");
  381. gpio_direction_output(gpio + 6, 0);
  382. /* p7 = nCF_SEL (initial: deselect) */
  383. gpio_request(gpio + 7, "nCF_SEL");
  384. gpio_direction_output(gpio + 7, 1);
  385. return 0;
  386. }
  387. static int
  388. evm_u35_teardown(struct i2c_client *client, int gpio, unsigned ngpio, void *c)
  389. {
  390. gpio_free(gpio + 7);
  391. gpio_free(gpio + 6);
  392. gpio_free(gpio + 5);
  393. gpio_free(gpio + 3);
  394. gpio_free(gpio + 2);
  395. gpio_free(gpio + 1);
  396. gpio_free(gpio + 0);
  397. return 0;
  398. }
  399. static struct pcf857x_platform_data pcf_data_u35 = {
  400. .gpio_base = PCF_Uxx_BASE(2),
  401. .setup = evm_u35_setup,
  402. .teardown = evm_u35_teardown,
  403. };
  404. /*----------------------------------------------------------------------*/
  405. /* Most of this EEPROM is unused, but U-Boot uses some data:
  406. * - 0x7f00, 6 bytes Ethernet Address
  407. * - 0x0039, 1 byte NTSC vs PAL (bit 0x80 == PAL)
  408. * - ... newer boards may have more
  409. */
  410. static struct at24_platform_data eeprom_info = {
  411. .byte_len = (256*1024) / 8,
  412. .page_size = 64,
  413. .flags = AT24_FLAG_ADDR16,
  414. .setup = davinci_get_mac_addr,
  415. .context = (void *)0x7f00,
  416. };
  417. /*
  418. * MSP430 supports RTC, card detection, input from IR remote, and
  419. * a bit more. It triggers interrupts on GPIO(7) from pressing
  420. * buttons on the IR remote, and for card detect switches.
  421. */
  422. static struct i2c_client *dm6446evm_msp;
  423. static int dm6446evm_msp_probe(struct i2c_client *client,
  424. const struct i2c_device_id *id)
  425. {
  426. dm6446evm_msp = client;
  427. return 0;
  428. }
  429. static int dm6446evm_msp_remove(struct i2c_client *client)
  430. {
  431. dm6446evm_msp = NULL;
  432. return 0;
  433. }
  434. static const struct i2c_device_id dm6446evm_msp_ids[] = {
  435. { "dm6446evm_msp", 0, },
  436. { /* end of list */ },
  437. };
  438. static struct i2c_driver dm6446evm_msp_driver = {
  439. .driver.name = "dm6446evm_msp",
  440. .id_table = dm6446evm_msp_ids,
  441. .probe = dm6446evm_msp_probe,
  442. .remove = dm6446evm_msp_remove,
  443. };
  444. static int dm6444evm_msp430_get_pins(void)
  445. {
  446. static const char txbuf[2] = { 2, 4, };
  447. char buf[4];
  448. struct i2c_msg msg[2] = {
  449. {
  450. .flags = 0,
  451. .len = 2,
  452. .buf = (void __force *)txbuf,
  453. },
  454. {
  455. .flags = I2C_M_RD,
  456. .len = 4,
  457. .buf = buf,
  458. },
  459. };
  460. int status;
  461. if (!dm6446evm_msp)
  462. return -ENXIO;
  463. msg[0].addr = dm6446evm_msp->addr;
  464. msg[1].addr = dm6446evm_msp->addr;
  465. /* Command 4 == get input state, returns port 2 and port3 data
  466. * S Addr W [A] len=2 [A] cmd=4 [A]
  467. * RS Addr R [A] [len=4] A [cmd=4] A [port2] A [port3] N P
  468. */
  469. status = i2c_transfer(dm6446evm_msp->adapter, msg, 2);
  470. if (status < 0)
  471. return status;
  472. dev_dbg(&dm6446evm_msp->dev, "PINS: %4ph\n", buf);
  473. return (buf[3] << 8) | buf[2];
  474. }
  475. static int dm6444evm_mmc_get_cd(int module)
  476. {
  477. int status = dm6444evm_msp430_get_pins();
  478. return (status < 0) ? status : !(status & BIT(1));
  479. }
  480. static int dm6444evm_mmc_get_ro(int module)
  481. {
  482. int status = dm6444evm_msp430_get_pins();
  483. return (status < 0) ? status : status & BIT(6 + 8);
  484. }
  485. static struct davinci_mmc_config dm6446evm_mmc_config = {
  486. .get_cd = dm6444evm_mmc_get_cd,
  487. .get_ro = dm6444evm_mmc_get_ro,
  488. .wires = 4,
  489. };
  490. static struct i2c_board_info __initdata i2c_info[] = {
  491. {
  492. I2C_BOARD_INFO("dm6446evm_msp", 0x23),
  493. },
  494. {
  495. I2C_BOARD_INFO("pcf8574", 0x38),
  496. .platform_data = &pcf_data_u2,
  497. },
  498. {
  499. I2C_BOARD_INFO("pcf8574", 0x39),
  500. .platform_data = &pcf_data_u18,
  501. },
  502. {
  503. I2C_BOARD_INFO("pcf8574", 0x3a),
  504. .platform_data = &pcf_data_u35,
  505. },
  506. {
  507. I2C_BOARD_INFO("24c256", 0x50),
  508. .platform_data = &eeprom_info,
  509. },
  510. {
  511. I2C_BOARD_INFO("tlv320aic33", 0x1b),
  512. },
  513. };
  514. /* The msp430 uses a slow bitbanged I2C implementation (ergo 20 KHz),
  515. * which requires 100 usec of idle bus after i2c writes sent to it.
  516. */
  517. static struct davinci_i2c_platform_data i2c_pdata = {
  518. .bus_freq = 20 /* kHz */,
  519. .bus_delay = 100 /* usec */,
  520. .sda_pin = 44,
  521. .scl_pin = 43,
  522. };
  523. static void __init evm_init_i2c(void)
  524. {
  525. davinci_init_i2c(&i2c_pdata);
  526. i2c_add_driver(&dm6446evm_msp_driver);
  527. i2c_register_board_info(1, i2c_info, ARRAY_SIZE(i2c_info));
  528. }
  529. #endif
  530. #define VENC_STD_ALL (V4L2_STD_NTSC | V4L2_STD_PAL)
  531. /* venc standard timings */
  532. static struct vpbe_enc_mode_info dm644xevm_enc_std_timing[] = {
  533. {
  534. .name = "ntsc",
  535. .timings_type = VPBE_ENC_STD,
  536. .std_id = V4L2_STD_NTSC,
  537. .interlaced = 1,
  538. .xres = 720,
  539. .yres = 480,
  540. .aspect = {11, 10},
  541. .fps = {30000, 1001},
  542. .left_margin = 0x79,
  543. .upper_margin = 0x10,
  544. },
  545. {
  546. .name = "pal",
  547. .timings_type = VPBE_ENC_STD,
  548. .std_id = V4L2_STD_PAL,
  549. .interlaced = 1,
  550. .xres = 720,
  551. .yres = 576,
  552. .aspect = {54, 59},
  553. .fps = {25, 1},
  554. .left_margin = 0x7e,
  555. .upper_margin = 0x16,
  556. },
  557. };
  558. /* venc dv preset timings */
  559. static struct vpbe_enc_mode_info dm644xevm_enc_preset_timing[] = {
  560. {
  561. .name = "480p59_94",
  562. .timings_type = VPBE_ENC_DV_TIMINGS,
  563. .dv_timings = V4L2_DV_BT_CEA_720X480P59_94,
  564. .interlaced = 0,
  565. .xres = 720,
  566. .yres = 480,
  567. .aspect = {1, 1},
  568. .fps = {5994, 100},
  569. .left_margin = 0x80,
  570. .upper_margin = 0x20,
  571. },
  572. {
  573. .name = "576p50",
  574. .timings_type = VPBE_ENC_DV_TIMINGS,
  575. .dv_timings = V4L2_DV_BT_CEA_720X576P50,
  576. .interlaced = 0,
  577. .xres = 720,
  578. .yres = 576,
  579. .aspect = {1, 1},
  580. .fps = {50, 1},
  581. .left_margin = 0x7e,
  582. .upper_margin = 0x30,
  583. },
  584. };
  585. /*
  586. * The outputs available from VPBE + encoders. Keep the order same
  587. * as that of encoders. First those from venc followed by that from
  588. * encoders. Index in the output refers to index on a particular encoder.
  589. * Driver uses this index to pass it to encoder when it supports more
  590. * than one output. Userspace applications use index of the array to
  591. * set an output.
  592. */
  593. static struct vpbe_output dm644xevm_vpbe_outputs[] = {
  594. {
  595. .output = {
  596. .index = 0,
  597. .name = "Composite",
  598. .type = V4L2_OUTPUT_TYPE_ANALOG,
  599. .std = VENC_STD_ALL,
  600. .capabilities = V4L2_OUT_CAP_STD,
  601. },
  602. .subdev_name = DM644X_VPBE_VENC_SUBDEV_NAME,
  603. .default_mode = "ntsc",
  604. .num_modes = ARRAY_SIZE(dm644xevm_enc_std_timing),
  605. .modes = dm644xevm_enc_std_timing,
  606. },
  607. {
  608. .output = {
  609. .index = 1,
  610. .name = "Component",
  611. .type = V4L2_OUTPUT_TYPE_ANALOG,
  612. .capabilities = V4L2_OUT_CAP_DV_TIMINGS,
  613. },
  614. .subdev_name = DM644X_VPBE_VENC_SUBDEV_NAME,
  615. .default_mode = "480p59_94",
  616. .num_modes = ARRAY_SIZE(dm644xevm_enc_preset_timing),
  617. .modes = dm644xevm_enc_preset_timing,
  618. },
  619. };
  620. static struct vpbe_config dm644xevm_display_cfg = {
  621. .module_name = "dm644x-vpbe-display",
  622. .i2c_adapter_id = 1,
  623. .osd = {
  624. .module_name = DM644X_VPBE_OSD_SUBDEV_NAME,
  625. },
  626. .venc = {
  627. .module_name = DM644X_VPBE_VENC_SUBDEV_NAME,
  628. },
  629. .num_outputs = ARRAY_SIZE(dm644xevm_vpbe_outputs),
  630. .outputs = dm644xevm_vpbe_outputs,
  631. };
  632. static struct platform_device *davinci_evm_devices[] __initdata = {
  633. &davinci_fb_device,
  634. &rtc_dev,
  635. };
  636. static void __init
  637. davinci_evm_map_io(void)
  638. {
  639. dm644x_init();
  640. }
  641. static int davinci_phy_fixup(struct phy_device *phydev)
  642. {
  643. unsigned int control;
  644. /* CRITICAL: Fix for increasing PHY signal drive strength for
  645. * TX lockup issue. On DaVinci EVM, the Intel LXT971 PHY
  646. * signal strength was low causing TX to fail randomly. The
  647. * fix is to Set bit 11 (Increased MII drive strength) of PHY
  648. * register 26 (Digital Config register) on this phy. */
  649. control = phy_read(phydev, 26);
  650. phy_write(phydev, 26, (control | 0x800));
  651. return 0;
  652. }
  653. #define HAS_ATA (IS_ENABLED(CONFIG_BLK_DEV_PALMCHIP_BK3710) || \
  654. IS_ENABLED(CONFIG_PATA_BK3710))
  655. #define HAS_NOR IS_ENABLED(CONFIG_MTD_PHYSMAP)
  656. #define HAS_NAND IS_ENABLED(CONFIG_MTD_NAND_DAVINCI)
  657. static __init void davinci_evm_init(void)
  658. {
  659. int ret;
  660. struct clk *aemif_clk;
  661. struct davinci_soc_info *soc_info = &davinci_soc_info;
  662. ret = dm644x_gpio_register();
  663. if (ret)
  664. pr_warn("%s: GPIO init failed: %d\n", __func__, ret);
  665. aemif_clk = clk_get(NULL, "aemif");
  666. clk_prepare_enable(aemif_clk);
  667. if (HAS_ATA) {
  668. if (HAS_NAND || HAS_NOR)
  669. pr_warn("WARNING: both IDE and Flash are enabled, but they share AEMIF pins\n"
  670. "\tDisable IDE for NAND/NOR support\n");
  671. davinci_init_ide();
  672. } else if (HAS_NAND || HAS_NOR) {
  673. davinci_cfg_reg(DM644X_HPIEN_DISABLE);
  674. davinci_cfg_reg(DM644X_ATAEN_DISABLE);
  675. /* only one device will be jumpered and detected */
  676. if (HAS_NAND) {
  677. platform_device_register(&davinci_evm_nandflash_device);
  678. if (davinci_aemif_setup(&davinci_evm_nandflash_device))
  679. pr_warn("%s: Cannot configure AEMIF\n",
  680. __func__);
  681. #ifdef CONFIG_I2C
  682. evm_leds[7].default_trigger = "nand-disk";
  683. #endif
  684. if (HAS_NOR)
  685. pr_warn("WARNING: both NAND and NOR flash are enabled; disable one of them.\n");
  686. } else if (HAS_NOR)
  687. platform_device_register(&davinci_evm_norflash_device);
  688. }
  689. platform_add_devices(davinci_evm_devices,
  690. ARRAY_SIZE(davinci_evm_devices));
  691. #ifdef CONFIG_I2C
  692. evm_init_i2c();
  693. davinci_setup_mmc(0, &dm6446evm_mmc_config);
  694. #endif
  695. dm644x_init_video(&dm644xevm_capture_cfg, &dm644xevm_display_cfg);
  696. davinci_serial_init(dm644x_serial_device);
  697. dm644x_init_asp();
  698. /* irlml6401 switches over 1A, in under 8 msec */
  699. davinci_setup_usb(1000, 8);
  700. if (IS_BUILTIN(CONFIG_PHYLIB)) {
  701. soc_info->emac_pdata->phy_id = DM644X_EVM_PHY_ID;
  702. /* Register the fixup for PHY on DaVinci */
  703. phy_register_fixup_for_uid(LXT971_PHY_ID, LXT971_PHY_MASK,
  704. davinci_phy_fixup);
  705. }
  706. }
  707. MACHINE_START(DAVINCI_EVM, "DaVinci DM644x EVM")
  708. /* Maintainer: MontaVista Software <source@mvista.com> */
  709. .atag_offset = 0x100,
  710. .map_io = davinci_evm_map_io,
  711. .init_irq = davinci_irq_init,
  712. .init_time = davinci_timer_init,
  713. .init_machine = davinci_evm_init,
  714. .init_late = davinci_init_late,
  715. .dma_zone_size = SZ_128M,
  716. .restart = davinci_restart,
  717. MACHINE_END