gpio-mcp23s08.c 24 KB

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  1. /*
  2. * MCP23S08 SPI/I2C GPIO gpio expander driver
  3. *
  4. * The inputs and outputs of the mcp23s08, mcp23s17, mcp23008 and mcp23017 are
  5. * supported.
  6. * For the I2C versions of the chips (mcp23008 and mcp23017) generation of
  7. * interrupts is also supported.
  8. * The hardware of the SPI versions of the chips (mcp23s08 and mcp23s17) is
  9. * also capable of generating interrupts, but the linux driver does not
  10. * support that yet.
  11. */
  12. #include <linux/kernel.h>
  13. #include <linux/device.h>
  14. #include <linux/mutex.h>
  15. #include <linux/module.h>
  16. #include <linux/gpio.h>
  17. #include <linux/i2c.h>
  18. #include <linux/spi/spi.h>
  19. #include <linux/spi/mcp23s08.h>
  20. #include <linux/slab.h>
  21. #include <asm/byteorder.h>
  22. #include <linux/interrupt.h>
  23. #include <linux/of_irq.h>
  24. #include <linux/of_device.h>
  25. /**
  26. * MCP types supported by driver
  27. */
  28. #define MCP_TYPE_S08 0
  29. #define MCP_TYPE_S17 1
  30. #define MCP_TYPE_008 2
  31. #define MCP_TYPE_017 3
  32. #define MCP_TYPE_S18 4
  33. /* Registers are all 8 bits wide.
  34. *
  35. * The mcp23s17 has twice as many bits, and can be configured to work
  36. * with either 16 bit registers or with two adjacent 8 bit banks.
  37. */
  38. #define MCP_IODIR 0x00 /* init/reset: all ones */
  39. #define MCP_IPOL 0x01
  40. #define MCP_GPINTEN 0x02
  41. #define MCP_DEFVAL 0x03
  42. #define MCP_INTCON 0x04
  43. #define MCP_IOCON 0x05
  44. # define IOCON_MIRROR (1 << 6)
  45. # define IOCON_SEQOP (1 << 5)
  46. # define IOCON_HAEN (1 << 3)
  47. # define IOCON_ODR (1 << 2)
  48. # define IOCON_INTPOL (1 << 1)
  49. # define IOCON_INTCC (1)
  50. #define MCP_GPPU 0x06
  51. #define MCP_INTF 0x07
  52. #define MCP_INTCAP 0x08
  53. #define MCP_GPIO 0x09
  54. #define MCP_OLAT 0x0a
  55. struct mcp23s08;
  56. struct mcp23s08_ops {
  57. int (*read)(struct mcp23s08 *mcp, unsigned reg);
  58. int (*write)(struct mcp23s08 *mcp, unsigned reg, unsigned val);
  59. int (*read_regs)(struct mcp23s08 *mcp, unsigned reg,
  60. u16 *vals, unsigned n);
  61. };
  62. struct mcp23s08 {
  63. u8 addr;
  64. bool irq_active_high;
  65. u16 cache[11];
  66. u16 irq_rise;
  67. u16 irq_fall;
  68. int irq;
  69. bool irq_controller;
  70. /* lock protects the cached values */
  71. struct mutex lock;
  72. struct mutex irq_lock;
  73. struct gpio_chip chip;
  74. const struct mcp23s08_ops *ops;
  75. void *data; /* ops specific data */
  76. };
  77. /* A given spi_device can represent up to eight mcp23sxx chips
  78. * sharing the same chipselect but using different addresses
  79. * (e.g. chips #0 and #3 might be populated, but not #1 or $2).
  80. * Driver data holds all the per-chip data.
  81. */
  82. struct mcp23s08_driver_data {
  83. unsigned ngpio;
  84. struct mcp23s08 *mcp[8];
  85. struct mcp23s08 chip[];
  86. };
  87. /*----------------------------------------------------------------------*/
  88. #if IS_ENABLED(CONFIG_I2C)
  89. static int mcp23008_read(struct mcp23s08 *mcp, unsigned reg)
  90. {
  91. return i2c_smbus_read_byte_data(mcp->data, reg);
  92. }
  93. static int mcp23008_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
  94. {
  95. return i2c_smbus_write_byte_data(mcp->data, reg, val);
  96. }
  97. static int
  98. mcp23008_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
  99. {
  100. while (n--) {
  101. int ret = mcp23008_read(mcp, reg++);
  102. if (ret < 0)
  103. return ret;
  104. *vals++ = ret;
  105. }
  106. return 0;
  107. }
  108. static int mcp23017_read(struct mcp23s08 *mcp, unsigned reg)
  109. {
  110. return i2c_smbus_read_word_data(mcp->data, reg << 1);
  111. }
  112. static int mcp23017_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
  113. {
  114. return i2c_smbus_write_word_data(mcp->data, reg << 1, val);
  115. }
  116. static int
  117. mcp23017_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
  118. {
  119. while (n--) {
  120. int ret = mcp23017_read(mcp, reg++);
  121. if (ret < 0)
  122. return ret;
  123. *vals++ = ret;
  124. }
  125. return 0;
  126. }
  127. static const struct mcp23s08_ops mcp23008_ops = {
  128. .read = mcp23008_read,
  129. .write = mcp23008_write,
  130. .read_regs = mcp23008_read_regs,
  131. };
  132. static const struct mcp23s08_ops mcp23017_ops = {
  133. .read = mcp23017_read,
  134. .write = mcp23017_write,
  135. .read_regs = mcp23017_read_regs,
  136. };
  137. #endif /* CONFIG_I2C */
  138. /*----------------------------------------------------------------------*/
  139. #ifdef CONFIG_SPI_MASTER
  140. static int mcp23s08_read(struct mcp23s08 *mcp, unsigned reg)
  141. {
  142. u8 tx[2], rx[1];
  143. int status;
  144. tx[0] = mcp->addr | 0x01;
  145. tx[1] = reg;
  146. status = spi_write_then_read(mcp->data, tx, sizeof(tx), rx, sizeof(rx));
  147. return (status < 0) ? status : rx[0];
  148. }
  149. static int mcp23s08_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
  150. {
  151. u8 tx[3];
  152. tx[0] = mcp->addr;
  153. tx[1] = reg;
  154. tx[2] = val;
  155. return spi_write_then_read(mcp->data, tx, sizeof(tx), NULL, 0);
  156. }
  157. static int
  158. mcp23s08_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
  159. {
  160. u8 tx[2], *tmp;
  161. int status;
  162. if ((n + reg) > sizeof(mcp->cache))
  163. return -EINVAL;
  164. tx[0] = mcp->addr | 0x01;
  165. tx[1] = reg;
  166. tmp = (u8 *)vals;
  167. status = spi_write_then_read(mcp->data, tx, sizeof(tx), tmp, n);
  168. if (status >= 0) {
  169. while (n--)
  170. vals[n] = tmp[n]; /* expand to 16bit */
  171. }
  172. return status;
  173. }
  174. static int mcp23s17_read(struct mcp23s08 *mcp, unsigned reg)
  175. {
  176. u8 tx[2], rx[2];
  177. int status;
  178. tx[0] = mcp->addr | 0x01;
  179. tx[1] = reg << 1;
  180. status = spi_write_then_read(mcp->data, tx, sizeof(tx), rx, sizeof(rx));
  181. return (status < 0) ? status : (rx[0] | (rx[1] << 8));
  182. }
  183. static int mcp23s17_write(struct mcp23s08 *mcp, unsigned reg, unsigned val)
  184. {
  185. u8 tx[4];
  186. tx[0] = mcp->addr;
  187. tx[1] = reg << 1;
  188. tx[2] = val;
  189. tx[3] = val >> 8;
  190. return spi_write_then_read(mcp->data, tx, sizeof(tx), NULL, 0);
  191. }
  192. static int
  193. mcp23s17_read_regs(struct mcp23s08 *mcp, unsigned reg, u16 *vals, unsigned n)
  194. {
  195. u8 tx[2];
  196. int status;
  197. if ((n + reg) > sizeof(mcp->cache))
  198. return -EINVAL;
  199. tx[0] = mcp->addr | 0x01;
  200. tx[1] = reg << 1;
  201. status = spi_write_then_read(mcp->data, tx, sizeof(tx),
  202. (u8 *)vals, n * 2);
  203. if (status >= 0) {
  204. while (n--)
  205. vals[n] = __le16_to_cpu((__le16)vals[n]);
  206. }
  207. return status;
  208. }
  209. static const struct mcp23s08_ops mcp23s08_ops = {
  210. .read = mcp23s08_read,
  211. .write = mcp23s08_write,
  212. .read_regs = mcp23s08_read_regs,
  213. };
  214. static const struct mcp23s08_ops mcp23s17_ops = {
  215. .read = mcp23s17_read,
  216. .write = mcp23s17_write,
  217. .read_regs = mcp23s17_read_regs,
  218. };
  219. #endif /* CONFIG_SPI_MASTER */
  220. /*----------------------------------------------------------------------*/
  221. static int mcp23s08_direction_input(struct gpio_chip *chip, unsigned offset)
  222. {
  223. struct mcp23s08 *mcp = gpiochip_get_data(chip);
  224. int status;
  225. mutex_lock(&mcp->lock);
  226. mcp->cache[MCP_IODIR] |= (1 << offset);
  227. status = mcp->ops->write(mcp, MCP_IODIR, mcp->cache[MCP_IODIR]);
  228. mutex_unlock(&mcp->lock);
  229. return status;
  230. }
  231. static int mcp23s08_get(struct gpio_chip *chip, unsigned offset)
  232. {
  233. struct mcp23s08 *mcp = gpiochip_get_data(chip);
  234. int status;
  235. mutex_lock(&mcp->lock);
  236. /* REVISIT reading this clears any IRQ ... */
  237. status = mcp->ops->read(mcp, MCP_GPIO);
  238. if (status < 0)
  239. status = 0;
  240. else {
  241. mcp->cache[MCP_GPIO] = status;
  242. status = !!(status & (1 << offset));
  243. }
  244. mutex_unlock(&mcp->lock);
  245. return status;
  246. }
  247. static int __mcp23s08_set(struct mcp23s08 *mcp, unsigned mask, int value)
  248. {
  249. unsigned olat = mcp->cache[MCP_OLAT];
  250. if (value)
  251. olat |= mask;
  252. else
  253. olat &= ~mask;
  254. mcp->cache[MCP_OLAT] = olat;
  255. return mcp->ops->write(mcp, MCP_OLAT, olat);
  256. }
  257. static void mcp23s08_set(struct gpio_chip *chip, unsigned offset, int value)
  258. {
  259. struct mcp23s08 *mcp = gpiochip_get_data(chip);
  260. unsigned mask = 1 << offset;
  261. mutex_lock(&mcp->lock);
  262. __mcp23s08_set(mcp, mask, value);
  263. mutex_unlock(&mcp->lock);
  264. }
  265. static int
  266. mcp23s08_direction_output(struct gpio_chip *chip, unsigned offset, int value)
  267. {
  268. struct mcp23s08 *mcp = gpiochip_get_data(chip);
  269. unsigned mask = 1 << offset;
  270. int status;
  271. mutex_lock(&mcp->lock);
  272. status = __mcp23s08_set(mcp, mask, value);
  273. if (status == 0) {
  274. mcp->cache[MCP_IODIR] &= ~mask;
  275. status = mcp->ops->write(mcp, MCP_IODIR, mcp->cache[MCP_IODIR]);
  276. }
  277. mutex_unlock(&mcp->lock);
  278. return status;
  279. }
  280. /*----------------------------------------------------------------------*/
  281. static irqreturn_t mcp23s08_irq(int irq, void *data)
  282. {
  283. struct mcp23s08 *mcp = data;
  284. int intcap, intf, i;
  285. unsigned int child_irq;
  286. mutex_lock(&mcp->lock);
  287. intf = mcp->ops->read(mcp, MCP_INTF);
  288. if (intf < 0) {
  289. mutex_unlock(&mcp->lock);
  290. return IRQ_HANDLED;
  291. }
  292. mcp->cache[MCP_INTF] = intf;
  293. intcap = mcp->ops->read(mcp, MCP_INTCAP);
  294. if (intcap < 0) {
  295. mutex_unlock(&mcp->lock);
  296. return IRQ_HANDLED;
  297. }
  298. mcp->cache[MCP_INTCAP] = intcap;
  299. mutex_unlock(&mcp->lock);
  300. for (i = 0; i < mcp->chip.ngpio; i++) {
  301. if ((BIT(i) & mcp->cache[MCP_INTF]) &&
  302. ((BIT(i) & intcap & mcp->irq_rise) ||
  303. (mcp->irq_fall & ~intcap & BIT(i)) ||
  304. (BIT(i) & mcp->cache[MCP_INTCON]))) {
  305. child_irq = irq_find_mapping(mcp->chip.irqdomain, i);
  306. handle_nested_irq(child_irq);
  307. }
  308. }
  309. return IRQ_HANDLED;
  310. }
  311. static void mcp23s08_irq_mask(struct irq_data *data)
  312. {
  313. struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
  314. struct mcp23s08 *mcp = gpiochip_get_data(gc);
  315. unsigned int pos = data->hwirq;
  316. mcp->cache[MCP_GPINTEN] &= ~BIT(pos);
  317. }
  318. static void mcp23s08_irq_unmask(struct irq_data *data)
  319. {
  320. struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
  321. struct mcp23s08 *mcp = gpiochip_get_data(gc);
  322. unsigned int pos = data->hwirq;
  323. mcp->cache[MCP_GPINTEN] |= BIT(pos);
  324. }
  325. static int mcp23s08_irq_set_type(struct irq_data *data, unsigned int type)
  326. {
  327. struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
  328. struct mcp23s08 *mcp = gpiochip_get_data(gc);
  329. unsigned int pos = data->hwirq;
  330. int status = 0;
  331. if ((type & IRQ_TYPE_EDGE_BOTH) == IRQ_TYPE_EDGE_BOTH) {
  332. mcp->cache[MCP_INTCON] &= ~BIT(pos);
  333. mcp->irq_rise |= BIT(pos);
  334. mcp->irq_fall |= BIT(pos);
  335. } else if (type & IRQ_TYPE_EDGE_RISING) {
  336. mcp->cache[MCP_INTCON] &= ~BIT(pos);
  337. mcp->irq_rise |= BIT(pos);
  338. mcp->irq_fall &= ~BIT(pos);
  339. } else if (type & IRQ_TYPE_EDGE_FALLING) {
  340. mcp->cache[MCP_INTCON] &= ~BIT(pos);
  341. mcp->irq_rise &= ~BIT(pos);
  342. mcp->irq_fall |= BIT(pos);
  343. } else if (type & IRQ_TYPE_LEVEL_HIGH) {
  344. mcp->cache[MCP_INTCON] |= BIT(pos);
  345. mcp->cache[MCP_DEFVAL] &= ~BIT(pos);
  346. } else if (type & IRQ_TYPE_LEVEL_LOW) {
  347. mcp->cache[MCP_INTCON] |= BIT(pos);
  348. mcp->cache[MCP_DEFVAL] |= BIT(pos);
  349. } else
  350. return -EINVAL;
  351. return status;
  352. }
  353. static void mcp23s08_irq_bus_lock(struct irq_data *data)
  354. {
  355. struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
  356. struct mcp23s08 *mcp = gpiochip_get_data(gc);
  357. mutex_lock(&mcp->irq_lock);
  358. }
  359. static void mcp23s08_irq_bus_unlock(struct irq_data *data)
  360. {
  361. struct gpio_chip *gc = irq_data_get_irq_chip_data(data);
  362. struct mcp23s08 *mcp = gpiochip_get_data(gc);
  363. mutex_lock(&mcp->lock);
  364. mcp->ops->write(mcp, MCP_GPINTEN, mcp->cache[MCP_GPINTEN]);
  365. mcp->ops->write(mcp, MCP_DEFVAL, mcp->cache[MCP_DEFVAL]);
  366. mcp->ops->write(mcp, MCP_INTCON, mcp->cache[MCP_INTCON]);
  367. mutex_unlock(&mcp->lock);
  368. mutex_unlock(&mcp->irq_lock);
  369. }
  370. static struct irq_chip mcp23s08_irq_chip = {
  371. .name = "gpio-mcp23xxx",
  372. .irq_mask = mcp23s08_irq_mask,
  373. .irq_unmask = mcp23s08_irq_unmask,
  374. .irq_set_type = mcp23s08_irq_set_type,
  375. .irq_bus_lock = mcp23s08_irq_bus_lock,
  376. .irq_bus_sync_unlock = mcp23s08_irq_bus_unlock,
  377. };
  378. static int mcp23s08_irq_setup(struct mcp23s08 *mcp)
  379. {
  380. struct gpio_chip *chip = &mcp->chip;
  381. int err;
  382. unsigned long irqflags = IRQF_ONESHOT | IRQF_SHARED;
  383. mutex_init(&mcp->irq_lock);
  384. if (mcp->irq_active_high)
  385. irqflags |= IRQF_TRIGGER_HIGH;
  386. else
  387. irqflags |= IRQF_TRIGGER_LOW;
  388. err = devm_request_threaded_irq(chip->parent, mcp->irq, NULL,
  389. mcp23s08_irq,
  390. irqflags, dev_name(chip->parent), mcp);
  391. if (err != 0) {
  392. dev_err(chip->parent, "unable to request IRQ#%d: %d\n",
  393. mcp->irq, err);
  394. return err;
  395. }
  396. err = gpiochip_irqchip_add_nested(chip,
  397. &mcp23s08_irq_chip,
  398. 0,
  399. handle_simple_irq,
  400. IRQ_TYPE_NONE);
  401. if (err) {
  402. dev_err(chip->parent,
  403. "could not connect irqchip to gpiochip: %d\n", err);
  404. return err;
  405. }
  406. gpiochip_set_nested_irqchip(chip,
  407. &mcp23s08_irq_chip,
  408. mcp->irq);
  409. return 0;
  410. }
  411. /*----------------------------------------------------------------------*/
  412. #ifdef CONFIG_DEBUG_FS
  413. #include <linux/seq_file.h>
  414. /*
  415. * This shows more info than the generic gpio dump code:
  416. * pullups, deglitching, open drain drive.
  417. */
  418. static void mcp23s08_dbg_show(struct seq_file *s, struct gpio_chip *chip)
  419. {
  420. struct mcp23s08 *mcp;
  421. char bank;
  422. int t;
  423. unsigned mask;
  424. mcp = gpiochip_get_data(chip);
  425. /* NOTE: we only handle one bank for now ... */
  426. bank = '0' + ((mcp->addr >> 1) & 0x7);
  427. mutex_lock(&mcp->lock);
  428. t = mcp->ops->read_regs(mcp, 0, mcp->cache, ARRAY_SIZE(mcp->cache));
  429. if (t < 0) {
  430. seq_printf(s, " I/O ERROR %d\n", t);
  431. goto done;
  432. }
  433. for (t = 0, mask = 1; t < chip->ngpio; t++, mask <<= 1) {
  434. const char *label;
  435. label = gpiochip_is_requested(chip, t);
  436. if (!label)
  437. continue;
  438. seq_printf(s, " gpio-%-3d P%c.%d (%-12s) %s %s %s",
  439. chip->base + t, bank, t, label,
  440. (mcp->cache[MCP_IODIR] & mask) ? "in " : "out",
  441. (mcp->cache[MCP_GPIO] & mask) ? "hi" : "lo",
  442. (mcp->cache[MCP_GPPU] & mask) ? "up" : " ");
  443. /* NOTE: ignoring the irq-related registers */
  444. seq_puts(s, "\n");
  445. }
  446. done:
  447. mutex_unlock(&mcp->lock);
  448. }
  449. #else
  450. #define mcp23s08_dbg_show NULL
  451. #endif
  452. /*----------------------------------------------------------------------*/
  453. static int mcp23s08_probe_one(struct mcp23s08 *mcp, struct device *dev,
  454. void *data, unsigned addr, unsigned type,
  455. struct mcp23s08_platform_data *pdata, int cs)
  456. {
  457. int status;
  458. bool mirror = false;
  459. mutex_init(&mcp->lock);
  460. mcp->data = data;
  461. mcp->addr = addr;
  462. mcp->irq_active_high = false;
  463. mcp->chip.direction_input = mcp23s08_direction_input;
  464. mcp->chip.get = mcp23s08_get;
  465. mcp->chip.direction_output = mcp23s08_direction_output;
  466. mcp->chip.set = mcp23s08_set;
  467. mcp->chip.dbg_show = mcp23s08_dbg_show;
  468. #ifdef CONFIG_OF_GPIO
  469. mcp->chip.of_gpio_n_cells = 2;
  470. mcp->chip.of_node = dev->of_node;
  471. #endif
  472. switch (type) {
  473. #ifdef CONFIG_SPI_MASTER
  474. case MCP_TYPE_S08:
  475. mcp->ops = &mcp23s08_ops;
  476. mcp->chip.ngpio = 8;
  477. mcp->chip.label = "mcp23s08";
  478. break;
  479. case MCP_TYPE_S17:
  480. mcp->ops = &mcp23s17_ops;
  481. mcp->chip.ngpio = 16;
  482. mcp->chip.label = "mcp23s17";
  483. break;
  484. case MCP_TYPE_S18:
  485. mcp->ops = &mcp23s17_ops;
  486. mcp->chip.ngpio = 16;
  487. mcp->chip.label = "mcp23s18";
  488. break;
  489. #endif /* CONFIG_SPI_MASTER */
  490. #if IS_ENABLED(CONFIG_I2C)
  491. case MCP_TYPE_008:
  492. mcp->ops = &mcp23008_ops;
  493. mcp->chip.ngpio = 8;
  494. mcp->chip.label = "mcp23008";
  495. break;
  496. case MCP_TYPE_017:
  497. mcp->ops = &mcp23017_ops;
  498. mcp->chip.ngpio = 16;
  499. mcp->chip.label = "mcp23017";
  500. break;
  501. #endif /* CONFIG_I2C */
  502. default:
  503. dev_err(dev, "invalid device type (%d)\n", type);
  504. return -EINVAL;
  505. }
  506. mcp->chip.base = pdata->base;
  507. mcp->chip.can_sleep = true;
  508. mcp->chip.parent = dev;
  509. mcp->chip.owner = THIS_MODULE;
  510. /* verify MCP_IOCON.SEQOP = 0, so sequential reads work,
  511. * and MCP_IOCON.HAEN = 1, so we work with all chips.
  512. */
  513. status = mcp->ops->read(mcp, MCP_IOCON);
  514. if (status < 0)
  515. goto fail;
  516. mcp->irq_controller = pdata->irq_controller;
  517. if (mcp->irq && mcp->irq_controller) {
  518. mcp->irq_active_high =
  519. of_property_read_bool(mcp->chip.parent->of_node,
  520. "microchip,irq-active-high");
  521. mirror = pdata->mirror;
  522. }
  523. if ((status & IOCON_SEQOP) || !(status & IOCON_HAEN) || mirror ||
  524. mcp->irq_active_high) {
  525. /* mcp23s17 has IOCON twice, make sure they are in sync */
  526. status &= ~(IOCON_SEQOP | (IOCON_SEQOP << 8));
  527. status |= IOCON_HAEN | (IOCON_HAEN << 8);
  528. if (mcp->irq_active_high)
  529. status |= IOCON_INTPOL | (IOCON_INTPOL << 8);
  530. else
  531. status &= ~(IOCON_INTPOL | (IOCON_INTPOL << 8));
  532. if (mirror)
  533. status |= IOCON_MIRROR | (IOCON_MIRROR << 8);
  534. if (type == MCP_TYPE_S18)
  535. status |= IOCON_INTCC | (IOCON_INTCC << 8);
  536. status = mcp->ops->write(mcp, MCP_IOCON, status);
  537. if (status < 0)
  538. goto fail;
  539. }
  540. /* configure ~100K pullups */
  541. status = mcp->ops->write(mcp, MCP_GPPU, pdata->chip[cs].pullups);
  542. if (status < 0)
  543. goto fail;
  544. status = mcp->ops->read_regs(mcp, 0, mcp->cache, ARRAY_SIZE(mcp->cache));
  545. if (status < 0)
  546. goto fail;
  547. /* disable inverter on input */
  548. if (mcp->cache[MCP_IPOL] != 0) {
  549. mcp->cache[MCP_IPOL] = 0;
  550. status = mcp->ops->write(mcp, MCP_IPOL, 0);
  551. if (status < 0)
  552. goto fail;
  553. }
  554. /* disable irqs */
  555. if (mcp->cache[MCP_GPINTEN] != 0) {
  556. mcp->cache[MCP_GPINTEN] = 0;
  557. status = mcp->ops->write(mcp, MCP_GPINTEN, 0);
  558. if (status < 0)
  559. goto fail;
  560. }
  561. status = gpiochip_add_data(&mcp->chip, mcp);
  562. if (status < 0)
  563. goto fail;
  564. if (mcp->irq && mcp->irq_controller) {
  565. status = mcp23s08_irq_setup(mcp);
  566. if (status) {
  567. goto fail;
  568. }
  569. }
  570. fail:
  571. if (status < 0)
  572. dev_dbg(dev, "can't setup chip %d, --> %d\n",
  573. addr, status);
  574. return status;
  575. }
  576. /*----------------------------------------------------------------------*/
  577. #ifdef CONFIG_OF
  578. #ifdef CONFIG_SPI_MASTER
  579. static const struct of_device_id mcp23s08_spi_of_match[] = {
  580. {
  581. .compatible = "microchip,mcp23s08",
  582. .data = (void *) MCP_TYPE_S08,
  583. },
  584. {
  585. .compatible = "microchip,mcp23s17",
  586. .data = (void *) MCP_TYPE_S17,
  587. },
  588. {
  589. .compatible = "microchip,mcp23s18",
  590. .data = (void *) MCP_TYPE_S18,
  591. },
  592. /* NOTE: The use of the mcp prefix is deprecated and will be removed. */
  593. {
  594. .compatible = "mcp,mcp23s08",
  595. .data = (void *) MCP_TYPE_S08,
  596. },
  597. {
  598. .compatible = "mcp,mcp23s17",
  599. .data = (void *) MCP_TYPE_S17,
  600. },
  601. { },
  602. };
  603. MODULE_DEVICE_TABLE(of, mcp23s08_spi_of_match);
  604. #endif
  605. #if IS_ENABLED(CONFIG_I2C)
  606. static const struct of_device_id mcp23s08_i2c_of_match[] = {
  607. {
  608. .compatible = "microchip,mcp23008",
  609. .data = (void *) MCP_TYPE_008,
  610. },
  611. {
  612. .compatible = "microchip,mcp23017",
  613. .data = (void *) MCP_TYPE_017,
  614. },
  615. /* NOTE: The use of the mcp prefix is deprecated and will be removed. */
  616. {
  617. .compatible = "mcp,mcp23008",
  618. .data = (void *) MCP_TYPE_008,
  619. },
  620. {
  621. .compatible = "mcp,mcp23017",
  622. .data = (void *) MCP_TYPE_017,
  623. },
  624. { },
  625. };
  626. MODULE_DEVICE_TABLE(of, mcp23s08_i2c_of_match);
  627. #endif
  628. #endif /* CONFIG_OF */
  629. #if IS_ENABLED(CONFIG_I2C)
  630. static int mcp230xx_probe(struct i2c_client *client,
  631. const struct i2c_device_id *id)
  632. {
  633. struct mcp23s08_platform_data *pdata, local_pdata;
  634. struct mcp23s08 *mcp;
  635. int status;
  636. const struct of_device_id *match;
  637. match = of_match_device(of_match_ptr(mcp23s08_i2c_of_match),
  638. &client->dev);
  639. if (match) {
  640. pdata = &local_pdata;
  641. pdata->base = -1;
  642. pdata->chip[0].pullups = 0;
  643. pdata->irq_controller = of_property_read_bool(
  644. client->dev.of_node,
  645. "interrupt-controller");
  646. pdata->mirror = of_property_read_bool(client->dev.of_node,
  647. "microchip,irq-mirror");
  648. client->irq = irq_of_parse_and_map(client->dev.of_node, 0);
  649. } else {
  650. pdata = dev_get_platdata(&client->dev);
  651. if (!pdata) {
  652. pdata = devm_kzalloc(&client->dev,
  653. sizeof(struct mcp23s08_platform_data),
  654. GFP_KERNEL);
  655. if (!pdata)
  656. return -ENOMEM;
  657. pdata->base = -1;
  658. }
  659. }
  660. mcp = kzalloc(sizeof(*mcp), GFP_KERNEL);
  661. if (!mcp)
  662. return -ENOMEM;
  663. mcp->irq = client->irq;
  664. status = mcp23s08_probe_one(mcp, &client->dev, client, client->addr,
  665. id->driver_data, pdata, 0);
  666. if (status)
  667. goto fail;
  668. i2c_set_clientdata(client, mcp);
  669. return 0;
  670. fail:
  671. kfree(mcp);
  672. return status;
  673. }
  674. static int mcp230xx_remove(struct i2c_client *client)
  675. {
  676. struct mcp23s08 *mcp = i2c_get_clientdata(client);
  677. gpiochip_remove(&mcp->chip);
  678. kfree(mcp);
  679. return 0;
  680. }
  681. static const struct i2c_device_id mcp230xx_id[] = {
  682. { "mcp23008", MCP_TYPE_008 },
  683. { "mcp23017", MCP_TYPE_017 },
  684. { },
  685. };
  686. MODULE_DEVICE_TABLE(i2c, mcp230xx_id);
  687. static struct i2c_driver mcp230xx_driver = {
  688. .driver = {
  689. .name = "mcp230xx",
  690. .of_match_table = of_match_ptr(mcp23s08_i2c_of_match),
  691. },
  692. .probe = mcp230xx_probe,
  693. .remove = mcp230xx_remove,
  694. .id_table = mcp230xx_id,
  695. };
  696. static int __init mcp23s08_i2c_init(void)
  697. {
  698. return i2c_add_driver(&mcp230xx_driver);
  699. }
  700. static void mcp23s08_i2c_exit(void)
  701. {
  702. i2c_del_driver(&mcp230xx_driver);
  703. }
  704. #else
  705. static int __init mcp23s08_i2c_init(void) { return 0; }
  706. static void mcp23s08_i2c_exit(void) { }
  707. #endif /* CONFIG_I2C */
  708. /*----------------------------------------------------------------------*/
  709. #ifdef CONFIG_SPI_MASTER
  710. static int mcp23s08_probe(struct spi_device *spi)
  711. {
  712. struct mcp23s08_platform_data *pdata, local_pdata;
  713. unsigned addr;
  714. int chips = 0;
  715. struct mcp23s08_driver_data *data;
  716. int status, type;
  717. unsigned ngpio = 0;
  718. const struct of_device_id *match;
  719. u32 spi_present_mask = 0;
  720. match = of_match_device(of_match_ptr(mcp23s08_spi_of_match), &spi->dev);
  721. if (match) {
  722. type = (int)(uintptr_t)match->data;
  723. status = of_property_read_u32(spi->dev.of_node,
  724. "microchip,spi-present-mask", &spi_present_mask);
  725. if (status) {
  726. status = of_property_read_u32(spi->dev.of_node,
  727. "mcp,spi-present-mask", &spi_present_mask);
  728. if (status) {
  729. dev_err(&spi->dev,
  730. "DT has no spi-present-mask\n");
  731. return -ENODEV;
  732. }
  733. }
  734. if ((spi_present_mask <= 0) || (spi_present_mask >= 256)) {
  735. dev_err(&spi->dev, "invalid spi-present-mask\n");
  736. return -ENODEV;
  737. }
  738. pdata = &local_pdata;
  739. pdata->base = -1;
  740. for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) {
  741. pdata->chip[addr].pullups = 0;
  742. if (spi_present_mask & (1 << addr))
  743. chips++;
  744. }
  745. pdata->irq_controller = of_property_read_bool(
  746. spi->dev.of_node,
  747. "interrupt-controller");
  748. pdata->mirror = of_property_read_bool(spi->dev.of_node,
  749. "microchip,irq-mirror");
  750. } else {
  751. type = spi_get_device_id(spi)->driver_data;
  752. pdata = dev_get_platdata(&spi->dev);
  753. if (!pdata) {
  754. pdata = devm_kzalloc(&spi->dev,
  755. sizeof(struct mcp23s08_platform_data),
  756. GFP_KERNEL);
  757. pdata->base = -1;
  758. }
  759. for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) {
  760. if (!pdata->chip[addr].is_present)
  761. continue;
  762. chips++;
  763. if ((type == MCP_TYPE_S08) && (addr > 3)) {
  764. dev_err(&spi->dev,
  765. "mcp23s08 only supports address 0..3\n");
  766. return -EINVAL;
  767. }
  768. spi_present_mask |= 1 << addr;
  769. }
  770. }
  771. if (!chips)
  772. return -ENODEV;
  773. data = devm_kzalloc(&spi->dev,
  774. sizeof(*data) + chips * sizeof(struct mcp23s08),
  775. GFP_KERNEL);
  776. if (!data)
  777. return -ENOMEM;
  778. spi_set_drvdata(spi, data);
  779. spi->irq = irq_of_parse_and_map(spi->dev.of_node, 0);
  780. for (addr = 0; addr < ARRAY_SIZE(pdata->chip); addr++) {
  781. if (!(spi_present_mask & (1 << addr)))
  782. continue;
  783. chips--;
  784. data->mcp[addr] = &data->chip[chips];
  785. data->mcp[addr]->irq = spi->irq;
  786. status = mcp23s08_probe_one(data->mcp[addr], &spi->dev, spi,
  787. 0x40 | (addr << 1), type, pdata,
  788. addr);
  789. if (status < 0)
  790. goto fail;
  791. if (pdata->base != -1)
  792. pdata->base += data->mcp[addr]->chip.ngpio;
  793. ngpio += data->mcp[addr]->chip.ngpio;
  794. }
  795. data->ngpio = ngpio;
  796. /* NOTE: these chips have a relatively sane IRQ framework, with
  797. * per-signal masking and level/edge triggering. It's not yet
  798. * handled here...
  799. */
  800. return 0;
  801. fail:
  802. for (addr = 0; addr < ARRAY_SIZE(data->mcp); addr++) {
  803. if (!data->mcp[addr])
  804. continue;
  805. gpiochip_remove(&data->mcp[addr]->chip);
  806. }
  807. return status;
  808. }
  809. static int mcp23s08_remove(struct spi_device *spi)
  810. {
  811. struct mcp23s08_driver_data *data = spi_get_drvdata(spi);
  812. unsigned addr;
  813. for (addr = 0; addr < ARRAY_SIZE(data->mcp); addr++) {
  814. if (!data->mcp[addr])
  815. continue;
  816. gpiochip_remove(&data->mcp[addr]->chip);
  817. }
  818. return 0;
  819. }
  820. static const struct spi_device_id mcp23s08_ids[] = {
  821. { "mcp23s08", MCP_TYPE_S08 },
  822. { "mcp23s17", MCP_TYPE_S17 },
  823. { "mcp23s18", MCP_TYPE_S18 },
  824. { },
  825. };
  826. MODULE_DEVICE_TABLE(spi, mcp23s08_ids);
  827. static struct spi_driver mcp23s08_driver = {
  828. .probe = mcp23s08_probe,
  829. .remove = mcp23s08_remove,
  830. .id_table = mcp23s08_ids,
  831. .driver = {
  832. .name = "mcp23s08",
  833. .of_match_table = of_match_ptr(mcp23s08_spi_of_match),
  834. },
  835. };
  836. static int __init mcp23s08_spi_init(void)
  837. {
  838. return spi_register_driver(&mcp23s08_driver);
  839. }
  840. static void mcp23s08_spi_exit(void)
  841. {
  842. spi_unregister_driver(&mcp23s08_driver);
  843. }
  844. #else
  845. static int __init mcp23s08_spi_init(void) { return 0; }
  846. static void mcp23s08_spi_exit(void) { }
  847. #endif /* CONFIG_SPI_MASTER */
  848. /*----------------------------------------------------------------------*/
  849. static int __init mcp23s08_init(void)
  850. {
  851. int ret;
  852. ret = mcp23s08_spi_init();
  853. if (ret)
  854. goto spi_fail;
  855. ret = mcp23s08_i2c_init();
  856. if (ret)
  857. goto i2c_fail;
  858. return 0;
  859. i2c_fail:
  860. mcp23s08_spi_exit();
  861. spi_fail:
  862. return ret;
  863. }
  864. /* register after spi/i2c postcore initcall and before
  865. * subsys initcalls that may rely on these GPIOs
  866. */
  867. subsys_initcall(mcp23s08_init);
  868. static void __exit mcp23s08_exit(void)
  869. {
  870. mcp23s08_spi_exit();
  871. mcp23s08_i2c_exit();
  872. }
  873. module_exit(mcp23s08_exit);
  874. MODULE_LICENSE("GPL");