msi.c 8.5 KB

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  1. /*
  2. * linux/kernel/irq/msi.c
  3. *
  4. * Copyright (C) 2014 Intel Corp.
  5. * Author: Jiang Liu <jiang.liu@linux.intel.com>
  6. *
  7. * This file is licensed under GPLv2.
  8. *
  9. * This file contains common code to support Message Signalled Interrupt for
  10. * PCI compatible and non PCI compatible devices.
  11. */
  12. #include <linux/types.h>
  13. #include <linux/device.h>
  14. #include <linux/irq.h>
  15. #include <linux/irqdomain.h>
  16. #include <linux/msi.h>
  17. /* Temparory solution for building, will be removed later */
  18. #include <linux/pci.h>
  19. void __get_cached_msi_msg(struct msi_desc *entry, struct msi_msg *msg)
  20. {
  21. *msg = entry->msg;
  22. }
  23. void get_cached_msi_msg(unsigned int irq, struct msi_msg *msg)
  24. {
  25. struct msi_desc *entry = irq_get_msi_desc(irq);
  26. __get_cached_msi_msg(entry, msg);
  27. }
  28. EXPORT_SYMBOL_GPL(get_cached_msi_msg);
  29. #ifdef CONFIG_GENERIC_MSI_IRQ_DOMAIN
  30. static inline void irq_chip_write_msi_msg(struct irq_data *data,
  31. struct msi_msg *msg)
  32. {
  33. data->chip->irq_write_msi_msg(data, msg);
  34. }
  35. /**
  36. * msi_domain_set_affinity - Generic affinity setter function for MSI domains
  37. * @irq_data: The irq data associated to the interrupt
  38. * @mask: The affinity mask to set
  39. * @force: Flag to enforce setting (disable online checks)
  40. *
  41. * Intended to be used by MSI interrupt controllers which are
  42. * implemented with hierarchical domains.
  43. */
  44. int msi_domain_set_affinity(struct irq_data *irq_data,
  45. const struct cpumask *mask, bool force)
  46. {
  47. struct irq_data *parent = irq_data->parent_data;
  48. struct msi_msg msg;
  49. int ret;
  50. ret = parent->chip->irq_set_affinity(parent, mask, force);
  51. if (ret >= 0 && ret != IRQ_SET_MASK_OK_DONE) {
  52. BUG_ON(irq_chip_compose_msi_msg(irq_data, &msg));
  53. irq_chip_write_msi_msg(irq_data, &msg);
  54. }
  55. return ret;
  56. }
  57. static void msi_domain_activate(struct irq_domain *domain,
  58. struct irq_data *irq_data)
  59. {
  60. struct msi_msg msg;
  61. BUG_ON(irq_chip_compose_msi_msg(irq_data, &msg));
  62. irq_chip_write_msi_msg(irq_data, &msg);
  63. }
  64. static void msi_domain_deactivate(struct irq_domain *domain,
  65. struct irq_data *irq_data)
  66. {
  67. struct msi_msg msg;
  68. memset(&msg, 0, sizeof(msg));
  69. irq_chip_write_msi_msg(irq_data, &msg);
  70. }
  71. static int msi_domain_alloc(struct irq_domain *domain, unsigned int virq,
  72. unsigned int nr_irqs, void *arg)
  73. {
  74. struct msi_domain_info *info = domain->host_data;
  75. struct msi_domain_ops *ops = info->ops;
  76. irq_hw_number_t hwirq = ops->get_hwirq(info, arg);
  77. int i, ret;
  78. if (irq_find_mapping(domain, hwirq) > 0)
  79. return -EEXIST;
  80. ret = irq_domain_alloc_irqs_parent(domain, virq, nr_irqs, arg);
  81. if (ret < 0)
  82. return ret;
  83. for (i = 0; i < nr_irqs; i++) {
  84. ret = ops->msi_init(domain, info, virq + i, hwirq + i, arg);
  85. if (ret < 0) {
  86. if (ops->msi_free) {
  87. for (i--; i > 0; i--)
  88. ops->msi_free(domain, info, virq + i);
  89. }
  90. irq_domain_free_irqs_top(domain, virq, nr_irqs);
  91. return ret;
  92. }
  93. }
  94. return 0;
  95. }
  96. static void msi_domain_free(struct irq_domain *domain, unsigned int virq,
  97. unsigned int nr_irqs)
  98. {
  99. struct msi_domain_info *info = domain->host_data;
  100. int i;
  101. if (info->ops->msi_free) {
  102. for (i = 0; i < nr_irqs; i++)
  103. info->ops->msi_free(domain, info, virq + i);
  104. }
  105. irq_domain_free_irqs_top(domain, virq, nr_irqs);
  106. }
  107. static struct irq_domain_ops msi_domain_ops = {
  108. .alloc = msi_domain_alloc,
  109. .free = msi_domain_free,
  110. .activate = msi_domain_activate,
  111. .deactivate = msi_domain_deactivate,
  112. };
  113. #ifdef GENERIC_MSI_DOMAIN_OPS
  114. static irq_hw_number_t msi_domain_ops_get_hwirq(struct msi_domain_info *info,
  115. msi_alloc_info_t *arg)
  116. {
  117. return arg->hwirq;
  118. }
  119. static int msi_domain_ops_prepare(struct irq_domain *domain, struct device *dev,
  120. int nvec, msi_alloc_info_t *arg)
  121. {
  122. memset(arg, 0, sizeof(*arg));
  123. return 0;
  124. }
  125. static void msi_domain_ops_set_desc(msi_alloc_info_t *arg,
  126. struct msi_desc *desc)
  127. {
  128. arg->desc = desc;
  129. }
  130. #else
  131. #define msi_domain_ops_get_hwirq NULL
  132. #define msi_domain_ops_prepare NULL
  133. #define msi_domain_ops_set_desc NULL
  134. #endif /* !GENERIC_MSI_DOMAIN_OPS */
  135. static int msi_domain_ops_init(struct irq_domain *domain,
  136. struct msi_domain_info *info,
  137. unsigned int virq, irq_hw_number_t hwirq,
  138. msi_alloc_info_t *arg)
  139. {
  140. irq_domain_set_hwirq_and_chip(domain, virq, hwirq, info->chip,
  141. info->chip_data);
  142. if (info->handler && info->handler_name) {
  143. __irq_set_handler(virq, info->handler, 0, info->handler_name);
  144. if (info->handler_data)
  145. irq_set_handler_data(virq, info->handler_data);
  146. }
  147. return 0;
  148. }
  149. static int msi_domain_ops_check(struct irq_domain *domain,
  150. struct msi_domain_info *info,
  151. struct device *dev)
  152. {
  153. return 0;
  154. }
  155. static struct msi_domain_ops msi_domain_ops_default = {
  156. .get_hwirq = msi_domain_ops_get_hwirq,
  157. .msi_init = msi_domain_ops_init,
  158. .msi_check = msi_domain_ops_check,
  159. .msi_prepare = msi_domain_ops_prepare,
  160. .set_desc = msi_domain_ops_set_desc,
  161. };
  162. static void msi_domain_update_dom_ops(struct msi_domain_info *info)
  163. {
  164. struct msi_domain_ops *ops = info->ops;
  165. if (ops == NULL) {
  166. info->ops = &msi_domain_ops_default;
  167. return;
  168. }
  169. if (ops->get_hwirq == NULL)
  170. ops->get_hwirq = msi_domain_ops_default.get_hwirq;
  171. if (ops->msi_init == NULL)
  172. ops->msi_init = msi_domain_ops_default.msi_init;
  173. if (ops->msi_check == NULL)
  174. ops->msi_check = msi_domain_ops_default.msi_check;
  175. if (ops->msi_prepare == NULL)
  176. ops->msi_prepare = msi_domain_ops_default.msi_prepare;
  177. if (ops->set_desc == NULL)
  178. ops->set_desc = msi_domain_ops_default.set_desc;
  179. }
  180. static void msi_domain_update_chip_ops(struct msi_domain_info *info)
  181. {
  182. struct irq_chip *chip = info->chip;
  183. BUG_ON(!chip);
  184. if (!chip->irq_mask)
  185. chip->irq_mask = pci_msi_mask_irq;
  186. if (!chip->irq_unmask)
  187. chip->irq_unmask = pci_msi_unmask_irq;
  188. if (!chip->irq_set_affinity)
  189. chip->irq_set_affinity = msi_domain_set_affinity;
  190. }
  191. /**
  192. * msi_create_irq_domain - Create a MSI interrupt domain
  193. * @of_node: Optional device-tree node of the interrupt controller
  194. * @info: MSI domain info
  195. * @parent: Parent irq domain
  196. */
  197. struct irq_domain *msi_create_irq_domain(struct device_node *node,
  198. struct msi_domain_info *info,
  199. struct irq_domain *parent)
  200. {
  201. if (info->flags & MSI_FLAG_USE_DEF_DOM_OPS)
  202. msi_domain_update_dom_ops(info);
  203. if (info->flags & MSI_FLAG_USE_DEF_CHIP_OPS)
  204. msi_domain_update_chip_ops(info);
  205. return irq_domain_add_hierarchy(parent, 0, 0, node, &msi_domain_ops,
  206. info);
  207. }
  208. /**
  209. * msi_domain_alloc_irqs - Allocate interrupts from a MSI interrupt domain
  210. * @domain: The domain to allocate from
  211. * @dev: Pointer to device struct of the device for which the interrupts
  212. * are allocated
  213. * @nvec: The number of interrupts to allocate
  214. *
  215. * Returns 0 on success or an error code.
  216. */
  217. int msi_domain_alloc_irqs(struct irq_domain *domain, struct device *dev,
  218. int nvec)
  219. {
  220. struct msi_domain_info *info = domain->host_data;
  221. struct msi_domain_ops *ops = info->ops;
  222. msi_alloc_info_t arg;
  223. struct msi_desc *desc;
  224. int i, ret, virq = -1;
  225. ret = ops->msi_check(domain, info, dev);
  226. if (ret == 0)
  227. ret = ops->msi_prepare(domain, dev, nvec, &arg);
  228. if (ret)
  229. return ret;
  230. for_each_msi_entry(desc, dev) {
  231. ops->set_desc(&arg, desc);
  232. if (info->flags & MSI_FLAG_IDENTITY_MAP)
  233. virq = (int)ops->get_hwirq(info, &arg);
  234. else
  235. virq = -1;
  236. virq = __irq_domain_alloc_irqs(domain, virq, desc->nvec_used,
  237. dev_to_node(dev), &arg, false);
  238. if (virq < 0) {
  239. ret = -ENOSPC;
  240. if (ops->handle_error)
  241. ret = ops->handle_error(domain, desc, ret);
  242. if (ops->msi_finish)
  243. ops->msi_finish(&arg, ret);
  244. return ret;
  245. }
  246. for (i = 0; i < desc->nvec_used; i++)
  247. irq_set_msi_desc_off(virq, i, desc);
  248. }
  249. if (ops->msi_finish)
  250. ops->msi_finish(&arg, 0);
  251. for_each_msi_entry(desc, dev) {
  252. if (desc->nvec_used == 1)
  253. dev_dbg(dev, "irq %d for MSI\n", virq);
  254. else
  255. dev_dbg(dev, "irq [%d-%d] for MSI\n",
  256. virq, virq + desc->nvec_used - 1);
  257. }
  258. return 0;
  259. }
  260. /**
  261. * msi_domain_free_irqs - Free interrupts from a MSI interrupt @domain associated tp @dev
  262. * @domain: The domain to managing the interrupts
  263. * @dev: Pointer to device struct of the device for which the interrupts
  264. * are free
  265. */
  266. void msi_domain_free_irqs(struct irq_domain *domain, struct device *dev)
  267. {
  268. struct msi_desc *desc;
  269. for_each_msi_entry(desc, dev) {
  270. irq_domain_free_irqs(desc->irq, desc->nvec_used);
  271. desc->irq = 0;
  272. }
  273. }
  274. /**
  275. * msi_get_domain_info - Get the MSI interrupt domain info for @domain
  276. * @domain: The interrupt domain to retrieve data from
  277. *
  278. * Returns the pointer to the msi_domain_info stored in
  279. * @domain->host_data.
  280. */
  281. struct msi_domain_info *msi_get_domain_info(struct irq_domain *domain)
  282. {
  283. return (struct msi_domain_info *)domain->host_data;
  284. }
  285. #endif /* CONFIG_GENERIC_MSI_IRQ_DOMAIN */