musb_virthub.c 12 KB

123456789101112131415161718192021222324252627282930313233343536373839404142434445464748495051525354555657585960616263646566676869707172737475767778798081828384858687888990919293949596979899100101102103104105106107108109110111112113114115116117118119120121122123124125126127128129130131132133134135136137138139140141142143144145146147148149150151152153154155156157158159160161162163164165166167168169170171172173174175176177178179180181182183184185186187188189190191192193194195196197198199200201202203204205206207208209210211212213214215216217218219220221222223224225226227228229230231232233234235236237238239240241242243244245246247248249250251252253254255256257258259260261262263264265266267268269270271272273274275276277278279280281282283284285286287288289290291292293294295296297298299300301302303304305306307308309310311312313314315316317318319320321322323324325326327328329330331332333334335336337338339340341342343344345346347348349350351352353354355356357358359360361362363364365366367368369370371372373374375376377378379380381382383384385386387388389390391392393394395396397398399400401402403404405406407408409410411412413414415416417418419420421422423424425426427428429430431432433434435436437438439440441442443444445446447448449450451452453454455456457
  1. /*
  2. * MUSB OTG driver virtual root hub support
  3. *
  4. * Copyright 2005 Mentor Graphics Corporation
  5. * Copyright (C) 2005-2006 by Texas Instruments
  6. * Copyright (C) 2006-2007 Nokia Corporation
  7. *
  8. * This program is free software; you can redistribute it and/or
  9. * modify it under the terms of the GNU General Public License
  10. * version 2 as published by the Free Software Foundation.
  11. *
  12. * This program is distributed in the hope that it will be useful, but
  13. * WITHOUT ANY WARRANTY; without even the implied warranty of
  14. * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
  15. * General Public License for more details.
  16. *
  17. * You should have received a copy of the GNU General Public License
  18. * along with this program; if not, write to the Free Software
  19. * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
  20. * 02110-1301 USA
  21. *
  22. * THIS SOFTWARE IS PROVIDED "AS IS" AND ANY EXPRESS OR IMPLIED
  23. * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
  24. * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
  25. * NO EVENT SHALL THE AUTHORS BE LIABLE FOR ANY DIRECT, INDIRECT,
  26. * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
  27. * NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF
  28. * USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON
  29. * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
  30. * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
  31. * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  32. *
  33. */
  34. #include <linux/module.h>
  35. #include <linux/kernel.h>
  36. #include <linux/sched.h>
  37. #include <linux/errno.h>
  38. #include <linux/time.h>
  39. #include <linux/timer.h>
  40. #include <asm/unaligned.h>
  41. #include "musb_core.h"
  42. void musb_host_finish_resume(struct work_struct *work)
  43. {
  44. struct musb *musb;
  45. unsigned long flags;
  46. u8 power;
  47. musb = container_of(work, struct musb, finish_resume_work.work);
  48. spin_lock_irqsave(&musb->lock, flags);
  49. power = musb_readb(musb->mregs, MUSB_POWER);
  50. power &= ~MUSB_POWER_RESUME;
  51. dev_dbg(musb->controller, "root port resume stopped, power %02x\n",
  52. power);
  53. musb_writeb(musb->mregs, MUSB_POWER, power);
  54. /*
  55. * ISSUE: DaVinci (RTL 1.300) disconnects after
  56. * resume of high speed peripherals (but not full
  57. * speed ones).
  58. */
  59. musb->is_active = 1;
  60. musb->port1_status &= ~(USB_PORT_STAT_SUSPEND | MUSB_PORT_STAT_RESUME);
  61. musb->port1_status |= USB_PORT_STAT_C_SUSPEND << 16;
  62. usb_hcd_poll_rh_status(musb->hcd);
  63. /* NOTE: it might really be A_WAIT_BCON ... */
  64. musb->xceiv->otg->state = OTG_STATE_A_HOST;
  65. spin_unlock_irqrestore(&musb->lock, flags);
  66. }
  67. void musb_port_suspend(struct musb *musb, bool do_suspend)
  68. {
  69. struct usb_otg *otg = musb->xceiv->otg;
  70. u8 power;
  71. void __iomem *mbase = musb->mregs;
  72. if (!is_host_active(musb))
  73. return;
  74. /* NOTE: this doesn't necessarily put PHY into low power mode,
  75. * turning off its clock; that's a function of PHY integration and
  76. * MUSB_POWER_ENSUSPEND. PHY may need a clock (sigh) to detect
  77. * SE0 changing to connect (J) or wakeup (K) states.
  78. */
  79. power = musb_readb(mbase, MUSB_POWER);
  80. if (do_suspend) {
  81. int retries = 10000;
  82. power &= ~MUSB_POWER_RESUME;
  83. power |= MUSB_POWER_SUSPENDM;
  84. musb_writeb(mbase, MUSB_POWER, power);
  85. /* Needed for OPT A tests */
  86. power = musb_readb(mbase, MUSB_POWER);
  87. while (power & MUSB_POWER_SUSPENDM) {
  88. power = musb_readb(mbase, MUSB_POWER);
  89. if (retries-- < 1)
  90. break;
  91. }
  92. dev_dbg(musb->controller, "Root port suspended, power %02x\n", power);
  93. musb->port1_status |= USB_PORT_STAT_SUSPEND;
  94. switch (musb->xceiv->otg->state) {
  95. case OTG_STATE_A_HOST:
  96. musb->xceiv->otg->state = OTG_STATE_A_SUSPEND;
  97. musb->is_active = otg->host->b_hnp_enable;
  98. if (musb->is_active)
  99. mod_timer(&musb->otg_timer, jiffies
  100. + msecs_to_jiffies(
  101. OTG_TIME_A_AIDL_BDIS));
  102. musb_platform_try_idle(musb, 0);
  103. break;
  104. case OTG_STATE_B_HOST:
  105. musb->xceiv->otg->state = OTG_STATE_B_WAIT_ACON;
  106. musb->is_active = otg->host->b_hnp_enable;
  107. musb_platform_try_idle(musb, 0);
  108. break;
  109. default:
  110. dev_dbg(musb->controller, "bogus rh suspend? %s\n",
  111. usb_otg_state_string(musb->xceiv->otg->state));
  112. }
  113. } else if (power & MUSB_POWER_SUSPENDM) {
  114. power &= ~MUSB_POWER_SUSPENDM;
  115. power |= MUSB_POWER_RESUME;
  116. musb_writeb(mbase, MUSB_POWER, power);
  117. dev_dbg(musb->controller, "Root port resuming, power %02x\n", power);
  118. /* later, GetPortStatus will stop RESUME signaling */
  119. musb->port1_status |= MUSB_PORT_STAT_RESUME;
  120. schedule_delayed_work(&musb->finish_resume_work,
  121. msecs_to_jiffies(20));
  122. }
  123. }
  124. void musb_port_reset(struct musb *musb, bool do_reset)
  125. {
  126. u8 power;
  127. void __iomem *mbase = musb->mregs;
  128. if (musb->xceiv->otg->state == OTG_STATE_B_IDLE) {
  129. dev_dbg(musb->controller, "HNP: Returning from HNP; no hub reset from b_idle\n");
  130. musb->port1_status &= ~USB_PORT_STAT_RESET;
  131. return;
  132. }
  133. if (!is_host_active(musb))
  134. return;
  135. /* NOTE: caller guarantees it will turn off the reset when
  136. * the appropriate amount of time has passed
  137. */
  138. power = musb_readb(mbase, MUSB_POWER);
  139. if (do_reset) {
  140. /*
  141. * If RESUME is set, we must make sure it stays minimum 20 ms.
  142. * Then we must clear RESUME and wait a bit to let musb start
  143. * generating SOFs. If we don't do this, OPT HS A 6.8 tests
  144. * fail with "Error! Did not receive an SOF before suspend
  145. * detected".
  146. */
  147. if (power & MUSB_POWER_RESUME) {
  148. long remain = (unsigned long) musb->rh_timer - jiffies;
  149. if (musb->rh_timer > 0 && remain > 0) {
  150. /* take into account the minimum delay after resume */
  151. schedule_delayed_work(
  152. &musb->deassert_reset_work, remain);
  153. return;
  154. }
  155. musb_writeb(mbase, MUSB_POWER,
  156. power & ~MUSB_POWER_RESUME);
  157. /* Give the core 1 ms to clear MUSB_POWER_RESUME */
  158. schedule_delayed_work(&musb->deassert_reset_work,
  159. msecs_to_jiffies(1));
  160. return;
  161. }
  162. power &= 0xf0;
  163. musb_writeb(mbase, MUSB_POWER,
  164. power | MUSB_POWER_RESET);
  165. musb->port1_status |= USB_PORT_STAT_RESET;
  166. musb->port1_status &= ~USB_PORT_STAT_ENABLE;
  167. schedule_delayed_work(&musb->deassert_reset_work,
  168. msecs_to_jiffies(50));
  169. } else {
  170. dev_dbg(musb->controller, "root port reset stopped\n");
  171. musb_writeb(mbase, MUSB_POWER,
  172. power & ~MUSB_POWER_RESET);
  173. power = musb_readb(mbase, MUSB_POWER);
  174. if (power & MUSB_POWER_HSMODE) {
  175. dev_dbg(musb->controller, "high-speed device connected\n");
  176. musb->port1_status |= USB_PORT_STAT_HIGH_SPEED;
  177. }
  178. musb->port1_status &= ~USB_PORT_STAT_RESET;
  179. musb->port1_status |= USB_PORT_STAT_ENABLE
  180. | (USB_PORT_STAT_C_RESET << 16)
  181. | (USB_PORT_STAT_C_ENABLE << 16);
  182. usb_hcd_poll_rh_status(musb->hcd);
  183. musb->vbuserr_retry = VBUSERR_RETRY_COUNT;
  184. }
  185. }
  186. void musb_root_disconnect(struct musb *musb)
  187. {
  188. struct usb_otg *otg = musb->xceiv->otg;
  189. musb->port1_status = USB_PORT_STAT_POWER
  190. | (USB_PORT_STAT_C_CONNECTION << 16);
  191. usb_hcd_poll_rh_status(musb->hcd);
  192. musb->is_active = 0;
  193. switch (musb->xceiv->otg->state) {
  194. case OTG_STATE_A_SUSPEND:
  195. if (otg->host->b_hnp_enable) {
  196. musb->xceiv->otg->state = OTG_STATE_A_PERIPHERAL;
  197. musb->g.is_a_peripheral = 1;
  198. break;
  199. }
  200. /* FALLTHROUGH */
  201. case OTG_STATE_A_HOST:
  202. musb->xceiv->otg->state = OTG_STATE_A_WAIT_BCON;
  203. musb->is_active = 0;
  204. break;
  205. case OTG_STATE_A_WAIT_VFALL:
  206. musb->xceiv->otg->state = OTG_STATE_B_IDLE;
  207. break;
  208. default:
  209. dev_dbg(musb->controller, "host disconnect (%s)\n",
  210. usb_otg_state_string(musb->xceiv->otg->state));
  211. }
  212. }
  213. /*---------------------------------------------------------------------*/
  214. /* Caller may or may not hold musb->lock */
  215. int musb_hub_status_data(struct usb_hcd *hcd, char *buf)
  216. {
  217. struct musb *musb = hcd_to_musb(hcd);
  218. int retval = 0;
  219. /* called in_irq() via usb_hcd_poll_rh_status() */
  220. if (musb->port1_status & 0xffff0000) {
  221. *buf = 0x02;
  222. retval = 1;
  223. }
  224. return retval;
  225. }
  226. static int musb_has_gadget(struct musb *musb)
  227. {
  228. /*
  229. * In host-only mode we start a connection right away. In OTG mode
  230. * we have to wait until we loaded a gadget. We don't really need a
  231. * gadget if we operate as a host but we should not start a session
  232. * as a device without a gadget or else we explode.
  233. */
  234. #ifdef CONFIG_USB_MUSB_HOST
  235. return 1;
  236. #else
  237. if (musb->port_mode == MUSB_PORT_MODE_HOST)
  238. return 1;
  239. return musb->g.dev.driver != NULL;
  240. #endif
  241. }
  242. int musb_hub_control(
  243. struct usb_hcd *hcd,
  244. u16 typeReq,
  245. u16 wValue,
  246. u16 wIndex,
  247. char *buf,
  248. u16 wLength)
  249. {
  250. struct musb *musb = hcd_to_musb(hcd);
  251. u32 temp;
  252. int retval = 0;
  253. unsigned long flags;
  254. spin_lock_irqsave(&musb->lock, flags);
  255. if (unlikely(!HCD_HW_ACCESSIBLE(hcd))) {
  256. spin_unlock_irqrestore(&musb->lock, flags);
  257. return -ESHUTDOWN;
  258. }
  259. /* hub features: always zero, setting is a NOP
  260. * port features: reported, sometimes updated when host is active
  261. * no indicators
  262. */
  263. switch (typeReq) {
  264. case ClearHubFeature:
  265. case SetHubFeature:
  266. switch (wValue) {
  267. case C_HUB_OVER_CURRENT:
  268. case C_HUB_LOCAL_POWER:
  269. break;
  270. default:
  271. goto error;
  272. }
  273. break;
  274. case ClearPortFeature:
  275. if ((wIndex & 0xff) != 1)
  276. goto error;
  277. switch (wValue) {
  278. case USB_PORT_FEAT_ENABLE:
  279. break;
  280. case USB_PORT_FEAT_SUSPEND:
  281. musb_port_suspend(musb, false);
  282. break;
  283. case USB_PORT_FEAT_POWER:
  284. if (!hcd->self.is_b_host)
  285. musb_platform_set_vbus(musb, 0);
  286. break;
  287. case USB_PORT_FEAT_C_CONNECTION:
  288. case USB_PORT_FEAT_C_ENABLE:
  289. case USB_PORT_FEAT_C_OVER_CURRENT:
  290. case USB_PORT_FEAT_C_RESET:
  291. case USB_PORT_FEAT_C_SUSPEND:
  292. break;
  293. default:
  294. goto error;
  295. }
  296. dev_dbg(musb->controller, "clear feature %d\n", wValue);
  297. musb->port1_status &= ~(1 << wValue);
  298. break;
  299. case GetHubDescriptor:
  300. {
  301. struct usb_hub_descriptor *desc = (void *)buf;
  302. desc->bDescLength = 9;
  303. desc->bDescriptorType = 0x29;
  304. desc->bNbrPorts = 1;
  305. desc->wHubCharacteristics = cpu_to_le16(
  306. HUB_CHAR_INDV_PORT_LPSM /* per-port power switching */
  307. | HUB_CHAR_NO_OCPM /* no overcurrent reporting */
  308. );
  309. desc->bPwrOn2PwrGood = 5; /* msec/2 */
  310. desc->bHubContrCurrent = 0;
  311. /* workaround bogus struct definition */
  312. desc->u.hs.DeviceRemovable[0] = 0x02; /* port 1 */
  313. desc->u.hs.DeviceRemovable[1] = 0xff;
  314. }
  315. break;
  316. case GetHubStatus:
  317. temp = 0;
  318. *(__le32 *) buf = cpu_to_le32(temp);
  319. break;
  320. case GetPortStatus:
  321. if (wIndex != 1)
  322. goto error;
  323. put_unaligned(cpu_to_le32(musb->port1_status
  324. & ~MUSB_PORT_STAT_RESUME),
  325. (__le32 *) buf);
  326. /* port change status is more interesting */
  327. dev_dbg(musb->controller, "port status %08x\n",
  328. musb->port1_status);
  329. break;
  330. case SetPortFeature:
  331. if ((wIndex & 0xff) != 1)
  332. goto error;
  333. switch (wValue) {
  334. case USB_PORT_FEAT_POWER:
  335. /* NOTE: this controller has a strange state machine
  336. * that involves "requesting sessions" according to
  337. * magic side effects from incompletely-described
  338. * rules about startup...
  339. *
  340. * This call is what really starts the host mode; be
  341. * very careful about side effects if you reorder any
  342. * initialization logic, e.g. for OTG, or change any
  343. * logic relating to VBUS power-up.
  344. */
  345. if (!hcd->self.is_b_host && musb_has_gadget(musb))
  346. musb_start(musb);
  347. break;
  348. case USB_PORT_FEAT_RESET:
  349. musb_port_reset(musb, true);
  350. break;
  351. case USB_PORT_FEAT_SUSPEND:
  352. musb_port_suspend(musb, true);
  353. break;
  354. case USB_PORT_FEAT_TEST:
  355. if (unlikely(is_host_active(musb)))
  356. goto error;
  357. wIndex >>= 8;
  358. switch (wIndex) {
  359. case 1:
  360. pr_debug("TEST_J\n");
  361. temp = MUSB_TEST_J;
  362. break;
  363. case 2:
  364. pr_debug("TEST_K\n");
  365. temp = MUSB_TEST_K;
  366. break;
  367. case 3:
  368. pr_debug("TEST_SE0_NAK\n");
  369. temp = MUSB_TEST_SE0_NAK;
  370. break;
  371. case 4:
  372. pr_debug("TEST_PACKET\n");
  373. temp = MUSB_TEST_PACKET;
  374. musb_load_testpacket(musb);
  375. break;
  376. case 5:
  377. pr_debug("TEST_FORCE_ENABLE\n");
  378. temp = MUSB_TEST_FORCE_HOST
  379. | MUSB_TEST_FORCE_HS;
  380. musb_writeb(musb->mregs, MUSB_DEVCTL,
  381. MUSB_DEVCTL_SESSION);
  382. break;
  383. case 6:
  384. pr_debug("TEST_FIFO_ACCESS\n");
  385. temp = MUSB_TEST_FIFO_ACCESS;
  386. break;
  387. default:
  388. goto error;
  389. }
  390. musb_writeb(musb->mregs, MUSB_TESTMODE, temp);
  391. break;
  392. default:
  393. goto error;
  394. }
  395. dev_dbg(musb->controller, "set feature %d\n", wValue);
  396. musb->port1_status |= 1 << wValue;
  397. break;
  398. default:
  399. error:
  400. /* "protocol stall" on error */
  401. retval = -EPIPE;
  402. }
  403. spin_unlock_irqrestore(&musb->lock, flags);
  404. return retval;
  405. }