jz4740.c 5.1 KB

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  1. /*
  2. * Ingenic JZ4740 "glue layer"
  3. *
  4. * Copyright (C) 2013, Apelete Seketeli <apelete@seketeli.net>
  5. *
  6. * This program is free software; you can redistribute it and/or modify
  7. * it under the terms of the GNU General Public License as published by
  8. * the Free Software Foundation; either version 2 of the License, or
  9. * (at your option) any later version.
  10. *
  11. * You should have received a copy of the GNU General Public License along
  12. * with this program; if not, write to the Free Software Foundation, Inc.,
  13. * 675 Mass Ave, Cambridge, MA 02139, USA.
  14. */
  15. #include <linux/clk.h>
  16. #include <linux/dma-mapping.h>
  17. #include <linux/errno.h>
  18. #include <linux/kernel.h>
  19. #include <linux/module.h>
  20. #include <linux/platform_device.h>
  21. #include <linux/usb/usb_phy_generic.h>
  22. #include "musb_core.h"
  23. struct jz4740_glue {
  24. struct device *dev;
  25. struct platform_device *musb;
  26. struct clk *clk;
  27. };
  28. static irqreturn_t jz4740_musb_interrupt(int irq, void *__hci)
  29. {
  30. unsigned long flags;
  31. irqreturn_t retval = IRQ_NONE;
  32. struct musb *musb = __hci;
  33. spin_lock_irqsave(&musb->lock, flags);
  34. musb->int_usb = musb_readb(musb->mregs, MUSB_INTRUSB);
  35. musb->int_tx = musb_readw(musb->mregs, MUSB_INTRTX);
  36. musb->int_rx = musb_readw(musb->mregs, MUSB_INTRRX);
  37. /*
  38. * The controller is gadget only, the state of the host mode IRQ bits is
  39. * undefined. Mask them to make sure that the musb driver core will
  40. * never see them set
  41. */
  42. musb->int_usb &= MUSB_INTR_SUSPEND | MUSB_INTR_RESUME |
  43. MUSB_INTR_RESET | MUSB_INTR_SOF;
  44. if (musb->int_usb || musb->int_tx || musb->int_rx)
  45. retval = musb_interrupt(musb);
  46. spin_unlock_irqrestore(&musb->lock, flags);
  47. return retval;
  48. }
  49. static struct musb_fifo_cfg jz4740_musb_fifo_cfg[] = {
  50. { .hw_ep_num = 1, .style = FIFO_TX, .maxpacket = 512, },
  51. { .hw_ep_num = 1, .style = FIFO_RX, .maxpacket = 512, },
  52. { .hw_ep_num = 2, .style = FIFO_TX, .maxpacket = 64, },
  53. };
  54. static struct musb_hdrc_config jz4740_musb_config = {
  55. /* Silicon does not implement USB OTG. */
  56. .multipoint = 0,
  57. /* Max EPs scanned, driver will decide which EP can be used. */
  58. .num_eps = 4,
  59. /* RAMbits needed to configure EPs from table */
  60. .ram_bits = 9,
  61. .fifo_cfg = jz4740_musb_fifo_cfg,
  62. .fifo_cfg_size = ARRAY_SIZE(jz4740_musb_fifo_cfg),
  63. };
  64. static struct musb_hdrc_platform_data jz4740_musb_platform_data = {
  65. .mode = MUSB_PERIPHERAL,
  66. .config = &jz4740_musb_config,
  67. };
  68. static int jz4740_musb_init(struct musb *musb)
  69. {
  70. usb_phy_generic_register();
  71. musb->xceiv = usb_get_phy(USB_PHY_TYPE_USB2);
  72. if (!musb->xceiv) {
  73. pr_err("HS UDC: no transceiver configured\n");
  74. return -ENODEV;
  75. }
  76. /* Silicon does not implement ConfigData register.
  77. * Set dyn_fifo to avoid reading EP config from hardware.
  78. */
  79. musb->dyn_fifo = true;
  80. musb->isr = jz4740_musb_interrupt;
  81. return 0;
  82. }
  83. static int jz4740_musb_exit(struct musb *musb)
  84. {
  85. usb_put_phy(musb->xceiv);
  86. return 0;
  87. }
  88. static const struct musb_platform_ops jz4740_musb_ops = {
  89. .quirks = MUSB_INDEXED_EP,
  90. .fifo_mode = 2,
  91. .init = jz4740_musb_init,
  92. .exit = jz4740_musb_exit,
  93. };
  94. static int jz4740_probe(struct platform_device *pdev)
  95. {
  96. struct musb_hdrc_platform_data *pdata = &jz4740_musb_platform_data;
  97. struct platform_device *musb;
  98. struct jz4740_glue *glue;
  99. struct clk *clk;
  100. int ret;
  101. glue = devm_kzalloc(&pdev->dev, sizeof(*glue), GFP_KERNEL);
  102. if (!glue)
  103. return -ENOMEM;
  104. musb = platform_device_alloc("musb-hdrc", PLATFORM_DEVID_AUTO);
  105. if (!musb) {
  106. dev_err(&pdev->dev, "failed to allocate musb device\n");
  107. return -ENOMEM;
  108. }
  109. clk = devm_clk_get(&pdev->dev, "udc");
  110. if (IS_ERR(clk)) {
  111. dev_err(&pdev->dev, "failed to get clock\n");
  112. ret = PTR_ERR(clk);
  113. goto err_platform_device_put;
  114. }
  115. ret = clk_prepare_enable(clk);
  116. if (ret) {
  117. dev_err(&pdev->dev, "failed to enable clock\n");
  118. goto err_platform_device_put;
  119. }
  120. musb->dev.parent = &pdev->dev;
  121. glue->dev = &pdev->dev;
  122. glue->musb = musb;
  123. glue->clk = clk;
  124. pdata->platform_ops = &jz4740_musb_ops;
  125. platform_set_drvdata(pdev, glue);
  126. ret = platform_device_add_resources(musb, pdev->resource,
  127. pdev->num_resources);
  128. if (ret) {
  129. dev_err(&pdev->dev, "failed to add resources\n");
  130. goto err_clk_disable;
  131. }
  132. ret = platform_device_add_data(musb, pdata, sizeof(*pdata));
  133. if (ret) {
  134. dev_err(&pdev->dev, "failed to add platform_data\n");
  135. goto err_clk_disable;
  136. }
  137. ret = platform_device_add(musb);
  138. if (ret) {
  139. dev_err(&pdev->dev, "failed to register musb device\n");
  140. goto err_clk_disable;
  141. }
  142. return 0;
  143. err_clk_disable:
  144. clk_disable_unprepare(clk);
  145. err_platform_device_put:
  146. platform_device_put(musb);
  147. return ret;
  148. }
  149. static int jz4740_remove(struct platform_device *pdev)
  150. {
  151. struct jz4740_glue *glue = platform_get_drvdata(pdev);
  152. platform_device_unregister(glue->musb);
  153. usb_phy_generic_unregister(pdev);
  154. clk_disable_unprepare(glue->clk);
  155. return 0;
  156. }
  157. static struct platform_driver jz4740_driver = {
  158. .probe = jz4740_probe,
  159. .remove = jz4740_remove,
  160. .driver = {
  161. .name = "musb-jz4740",
  162. },
  163. };
  164. MODULE_DESCRIPTION("JZ4740 MUSB Glue Layer");
  165. MODULE_AUTHOR("Apelete Seketeli <apelete@seketeli.net>");
  166. MODULE_LICENSE("GPL v2");
  167. module_platform_driver(jz4740_driver);