platform.c 8.5 KB

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  1. /*
  2. * platform.c - DesignWare HS OTG Controller platform driver
  3. *
  4. * Copyright (C) Matthijs Kooijman <matthijs@stdin.nl>
  5. *
  6. * Redistribution and use in source and binary forms, with or without
  7. * modification, are permitted provided that the following conditions
  8. * are met:
  9. * 1. Redistributions of source code must retain the above copyright
  10. * notice, this list of conditions, and the following disclaimer,
  11. * without modification.
  12. * 2. Redistributions in binary form must reproduce the above copyright
  13. * notice, this list of conditions and the following disclaimer in the
  14. * documentation and/or other materials provided with the distribution.
  15. * 3. The names of the above-listed copyright holders may not be used
  16. * to endorse or promote products derived from this software without
  17. * specific prior written permission.
  18. *
  19. * ALTERNATIVELY, this software may be distributed under the terms of the
  20. * GNU General Public License ("GPL") as published by the Free Software
  21. * Foundation; either version 2 of the License, or (at your option) any
  22. * later version.
  23. *
  24. * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS "AS
  25. * IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO,
  26. * THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR
  27. * PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT OWNER OR
  28. * CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, SPECIAL,
  29. * EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT LIMITED TO,
  30. * PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, DATA, OR
  31. * PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY THEORY OF
  32. * LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT (INCLUDING
  33. * NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
  34. * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
  35. */
  36. #include <linux/kernel.h>
  37. #include <linux/module.h>
  38. #include <linux/slab.h>
  39. #include <linux/device.h>
  40. #include <linux/dma-mapping.h>
  41. #include <linux/of_device.h>
  42. #include <linux/mutex.h>
  43. #include <linux/platform_device.h>
  44. #include <linux/usb/of.h>
  45. #include "core.h"
  46. #include "hcd.h"
  47. static const char dwc2_driver_name[] = "dwc2";
  48. static const struct dwc2_core_params params_bcm2835 = {
  49. .otg_cap = 0, /* HNP/SRP capable */
  50. .otg_ver = 0, /* 1.3 */
  51. .dma_enable = 1,
  52. .dma_desc_enable = 0,
  53. .speed = 0, /* High Speed */
  54. .enable_dynamic_fifo = 1,
  55. .en_multiple_tx_fifo = 1,
  56. .host_rx_fifo_size = 774, /* 774 DWORDs */
  57. .host_nperio_tx_fifo_size = 256, /* 256 DWORDs */
  58. .host_perio_tx_fifo_size = 512, /* 512 DWORDs */
  59. .max_transfer_size = 65535,
  60. .max_packet_count = 511,
  61. .host_channels = 8,
  62. .phy_type = 1, /* UTMI */
  63. .phy_utmi_width = 8, /* 8 bits */
  64. .phy_ulpi_ddr = 0, /* Single */
  65. .phy_ulpi_ext_vbus = 0,
  66. .i2c_enable = 0,
  67. .ulpi_fs_ls = 0,
  68. .host_support_fs_ls_low_power = 0,
  69. .host_ls_low_power_phy_clk = 0, /* 48 MHz */
  70. .ts_dline = 0,
  71. .reload_ctl = 0,
  72. .ahbcfg = 0x10,
  73. .uframe_sched = 0,
  74. };
  75. static const struct dwc2_core_params params_rk3066 = {
  76. .otg_cap = 2, /* non-HNP/non-SRP */
  77. .otg_ver = -1,
  78. .dma_enable = -1,
  79. .dma_desc_enable = 0,
  80. .speed = -1,
  81. .enable_dynamic_fifo = 1,
  82. .en_multiple_tx_fifo = -1,
  83. .host_rx_fifo_size = 520, /* 520 DWORDs */
  84. .host_nperio_tx_fifo_size = 128, /* 128 DWORDs */
  85. .host_perio_tx_fifo_size = 256, /* 256 DWORDs */
  86. .max_transfer_size = 65535,
  87. .max_packet_count = -1,
  88. .host_channels = -1,
  89. .phy_type = -1,
  90. .phy_utmi_width = -1,
  91. .phy_ulpi_ddr = -1,
  92. .phy_ulpi_ext_vbus = -1,
  93. .i2c_enable = -1,
  94. .ulpi_fs_ls = -1,
  95. .host_support_fs_ls_low_power = -1,
  96. .host_ls_low_power_phy_clk = -1,
  97. .ts_dline = -1,
  98. .reload_ctl = -1,
  99. .ahbcfg = 0x7, /* INCR16 */
  100. .uframe_sched = -1,
  101. };
  102. /**
  103. * dwc2_driver_remove() - Called when the DWC_otg core is unregistered with the
  104. * DWC_otg driver
  105. *
  106. * @dev: Platform device
  107. *
  108. * This routine is called, for example, when the rmmod command is executed. The
  109. * device may or may not be electrically present. If it is present, the driver
  110. * stops device processing. Any resources used on behalf of this device are
  111. * freed.
  112. */
  113. static int dwc2_driver_remove(struct platform_device *dev)
  114. {
  115. struct dwc2_hsotg *hsotg = platform_get_drvdata(dev);
  116. dwc2_hcd_remove(hsotg);
  117. s3c_hsotg_remove(hsotg);
  118. return 0;
  119. }
  120. static const struct of_device_id dwc2_of_match_table[] = {
  121. { .compatible = "brcm,bcm2835-usb", .data = &params_bcm2835 },
  122. { .compatible = "rockchip,rk3066-usb", .data = &params_rk3066 },
  123. { .compatible = "snps,dwc2", .data = NULL },
  124. { .compatible = "samsung,s3c6400-hsotg", .data = NULL},
  125. {},
  126. };
  127. MODULE_DEVICE_TABLE(of, dwc2_of_match_table);
  128. /**
  129. * dwc2_driver_probe() - Called when the DWC_otg core is bound to the DWC_otg
  130. * driver
  131. *
  132. * @dev: Platform device
  133. *
  134. * This routine creates the driver components required to control the device
  135. * (core, HCD, and PCD) and initializes the device. The driver components are
  136. * stored in a dwc2_hsotg structure. A reference to the dwc2_hsotg is saved
  137. * in the device private data. This allows the driver to access the dwc2_hsotg
  138. * structure on subsequent calls to driver methods for this device.
  139. */
  140. static int dwc2_driver_probe(struct platform_device *dev)
  141. {
  142. const struct of_device_id *match;
  143. const struct dwc2_core_params *params;
  144. struct dwc2_core_params defparams;
  145. struct dwc2_hsotg *hsotg;
  146. struct resource *res;
  147. struct phy *phy;
  148. struct usb_phy *uphy;
  149. int retval;
  150. int irq;
  151. match = of_match_device(dwc2_of_match_table, &dev->dev);
  152. if (match && match->data) {
  153. params = match->data;
  154. } else {
  155. /* Default all params to autodetect */
  156. dwc2_set_all_params(&defparams, -1);
  157. params = &defparams;
  158. /*
  159. * Disable descriptor dma mode by default as the HW can support
  160. * it, but does not support it for SPLIT transactions.
  161. */
  162. defparams.dma_desc_enable = 0;
  163. }
  164. hsotg = devm_kzalloc(&dev->dev, sizeof(*hsotg), GFP_KERNEL);
  165. if (!hsotg)
  166. return -ENOMEM;
  167. hsotg->dev = &dev->dev;
  168. /*
  169. * Use reasonable defaults so platforms don't have to provide these.
  170. */
  171. if (!dev->dev.dma_mask)
  172. dev->dev.dma_mask = &dev->dev.coherent_dma_mask;
  173. retval = dma_set_coherent_mask(&dev->dev, DMA_BIT_MASK(32));
  174. if (retval)
  175. return retval;
  176. irq = platform_get_irq(dev, 0);
  177. if (irq < 0) {
  178. dev_err(&dev->dev, "missing IRQ resource\n");
  179. return irq;
  180. }
  181. dev_dbg(hsotg->dev, "registering common handler for irq%d\n",
  182. irq);
  183. retval = devm_request_irq(hsotg->dev, irq,
  184. dwc2_handle_common_intr, IRQF_SHARED,
  185. dev_name(hsotg->dev), hsotg);
  186. if (retval)
  187. return retval;
  188. res = platform_get_resource(dev, IORESOURCE_MEM, 0);
  189. hsotg->regs = devm_ioremap_resource(&dev->dev, res);
  190. if (IS_ERR(hsotg->regs))
  191. return PTR_ERR(hsotg->regs);
  192. dev_dbg(&dev->dev, "mapped PA %08lx to VA %p\n",
  193. (unsigned long)res->start, hsotg->regs);
  194. hsotg->dr_mode = of_usb_get_dr_mode(dev->dev.of_node);
  195. /*
  196. * Attempt to find a generic PHY, then look for an old style
  197. * USB PHY
  198. */
  199. phy = devm_phy_get(&dev->dev, "usb2-phy");
  200. if (IS_ERR(phy)) {
  201. hsotg->phy = NULL;
  202. uphy = devm_usb_get_phy(&dev->dev, USB_PHY_TYPE_USB2);
  203. if (IS_ERR(uphy))
  204. hsotg->uphy = NULL;
  205. else
  206. hsotg->uphy = uphy;
  207. } else {
  208. hsotg->phy = phy;
  209. phy_power_on(hsotg->phy);
  210. phy_init(hsotg->phy);
  211. }
  212. spin_lock_init(&hsotg->lock);
  213. mutex_init(&hsotg->init_mutex);
  214. retval = dwc2_gadget_init(hsotg, irq);
  215. if (retval)
  216. return retval;
  217. retval = dwc2_hcd_init(hsotg, irq, params);
  218. if (retval)
  219. return retval;
  220. platform_set_drvdata(dev, hsotg);
  221. return retval;
  222. }
  223. static int __maybe_unused dwc2_suspend(struct device *dev)
  224. {
  225. struct dwc2_hsotg *dwc2 = dev_get_drvdata(dev);
  226. int ret = 0;
  227. if (dwc2_is_device_mode(dwc2)) {
  228. ret = s3c_hsotg_suspend(dwc2);
  229. } else {
  230. if (dwc2->lx_state == DWC2_L0)
  231. return 0;
  232. phy_exit(dwc2->phy);
  233. phy_power_off(dwc2->phy);
  234. }
  235. return ret;
  236. }
  237. static int __maybe_unused dwc2_resume(struct device *dev)
  238. {
  239. struct dwc2_hsotg *dwc2 = dev_get_drvdata(dev);
  240. int ret = 0;
  241. if (dwc2_is_device_mode(dwc2)) {
  242. ret = s3c_hsotg_resume(dwc2);
  243. } else {
  244. phy_power_on(dwc2->phy);
  245. phy_init(dwc2->phy);
  246. }
  247. return ret;
  248. }
  249. static const struct dev_pm_ops dwc2_dev_pm_ops = {
  250. SET_SYSTEM_SLEEP_PM_OPS(dwc2_suspend, dwc2_resume)
  251. };
  252. static struct platform_driver dwc2_platform_driver = {
  253. .driver = {
  254. .name = dwc2_driver_name,
  255. .of_match_table = dwc2_of_match_table,
  256. .pm = &dwc2_dev_pm_ops,
  257. },
  258. .probe = dwc2_driver_probe,
  259. .remove = dwc2_driver_remove,
  260. };
  261. module_platform_driver(dwc2_platform_driver);
  262. MODULE_DESCRIPTION("DESIGNWARE HS OTG Platform Glue");
  263. MODULE_AUTHOR("Matthijs Kooijman <matthijs@stdin.nl>");
  264. MODULE_LICENSE("Dual BSD/GPL");