otg_fsm.c 20 KB

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  1. /*
  2. * otg_fsm.c - ChipIdea USB IP core OTG FSM driver
  3. *
  4. * Copyright (C) 2014 Freescale Semiconductor, Inc.
  5. *
  6. * Author: Jun Li
  7. *
  8. * This program is free software; you can redistribute it and/or modify
  9. * it under the terms of the GNU General Public License version 2 as
  10. * published by the Free Software Foundation.
  11. */
  12. /*
  13. * This file mainly handles OTG fsm, it includes OTG fsm operations
  14. * for HNP and SRP.
  15. *
  16. * TODO List
  17. * - ADP
  18. * - OTG test device
  19. */
  20. #include <linux/usb/otg.h>
  21. #include <linux/usb/gadget.h>
  22. #include <linux/usb/hcd.h>
  23. #include <linux/usb/chipidea.h>
  24. #include <linux/regulator/consumer.h>
  25. #include "ci.h"
  26. #include "bits.h"
  27. #include "otg.h"
  28. #include "otg_fsm.h"
  29. static struct ci_otg_fsm_timer *otg_timer_initializer
  30. (struct ci_hdrc *ci, void (*function)(void *, unsigned long),
  31. unsigned long expires, unsigned long data)
  32. {
  33. struct ci_otg_fsm_timer *timer;
  34. timer = devm_kzalloc(ci->dev, sizeof(struct ci_otg_fsm_timer),
  35. GFP_KERNEL);
  36. if (!timer)
  37. return NULL;
  38. timer->function = function;
  39. timer->expires = expires;
  40. timer->data = data;
  41. return timer;
  42. }
  43. /* Add for otg: interact with user space app */
  44. static ssize_t
  45. get_a_bus_req(struct device *dev, struct device_attribute *attr, char *buf)
  46. {
  47. char *next;
  48. unsigned size, t;
  49. struct ci_hdrc *ci = dev_get_drvdata(dev);
  50. next = buf;
  51. size = PAGE_SIZE;
  52. t = scnprintf(next, size, "%d\n", ci->fsm.a_bus_req);
  53. size -= t;
  54. next += t;
  55. return PAGE_SIZE - size;
  56. }
  57. static ssize_t
  58. set_a_bus_req(struct device *dev, struct device_attribute *attr,
  59. const char *buf, size_t count)
  60. {
  61. struct ci_hdrc *ci = dev_get_drvdata(dev);
  62. if (count > 2)
  63. return -1;
  64. mutex_lock(&ci->fsm.lock);
  65. if (buf[0] == '0') {
  66. ci->fsm.a_bus_req = 0;
  67. } else if (buf[0] == '1') {
  68. /* If a_bus_drop is TRUE, a_bus_req can't be set */
  69. if (ci->fsm.a_bus_drop) {
  70. mutex_unlock(&ci->fsm.lock);
  71. return count;
  72. }
  73. ci->fsm.a_bus_req = 1;
  74. }
  75. ci_otg_queue_work(ci);
  76. mutex_unlock(&ci->fsm.lock);
  77. return count;
  78. }
  79. static DEVICE_ATTR(a_bus_req, S_IRUGO | S_IWUSR, get_a_bus_req, set_a_bus_req);
  80. static ssize_t
  81. get_a_bus_drop(struct device *dev, struct device_attribute *attr, char *buf)
  82. {
  83. char *next;
  84. unsigned size, t;
  85. struct ci_hdrc *ci = dev_get_drvdata(dev);
  86. next = buf;
  87. size = PAGE_SIZE;
  88. t = scnprintf(next, size, "%d\n", ci->fsm.a_bus_drop);
  89. size -= t;
  90. next += t;
  91. return PAGE_SIZE - size;
  92. }
  93. static ssize_t
  94. set_a_bus_drop(struct device *dev, struct device_attribute *attr,
  95. const char *buf, size_t count)
  96. {
  97. struct ci_hdrc *ci = dev_get_drvdata(dev);
  98. if (count > 2)
  99. return -1;
  100. mutex_lock(&ci->fsm.lock);
  101. if (buf[0] == '0') {
  102. ci->fsm.a_bus_drop = 0;
  103. } else if (buf[0] == '1') {
  104. ci->fsm.a_bus_drop = 1;
  105. ci->fsm.a_bus_req = 0;
  106. }
  107. ci_otg_queue_work(ci);
  108. mutex_unlock(&ci->fsm.lock);
  109. return count;
  110. }
  111. static DEVICE_ATTR(a_bus_drop, S_IRUGO | S_IWUSR, get_a_bus_drop,
  112. set_a_bus_drop);
  113. static ssize_t
  114. get_b_bus_req(struct device *dev, struct device_attribute *attr, char *buf)
  115. {
  116. char *next;
  117. unsigned size, t;
  118. struct ci_hdrc *ci = dev_get_drvdata(dev);
  119. next = buf;
  120. size = PAGE_SIZE;
  121. t = scnprintf(next, size, "%d\n", ci->fsm.b_bus_req);
  122. size -= t;
  123. next += t;
  124. return PAGE_SIZE - size;
  125. }
  126. static ssize_t
  127. set_b_bus_req(struct device *dev, struct device_attribute *attr,
  128. const char *buf, size_t count)
  129. {
  130. struct ci_hdrc *ci = dev_get_drvdata(dev);
  131. if (count > 2)
  132. return -1;
  133. mutex_lock(&ci->fsm.lock);
  134. if (buf[0] == '0')
  135. ci->fsm.b_bus_req = 0;
  136. else if (buf[0] == '1')
  137. ci->fsm.b_bus_req = 1;
  138. ci_otg_queue_work(ci);
  139. mutex_unlock(&ci->fsm.lock);
  140. return count;
  141. }
  142. static DEVICE_ATTR(b_bus_req, S_IRUGO | S_IWUSR, get_b_bus_req, set_b_bus_req);
  143. static ssize_t
  144. set_a_clr_err(struct device *dev, struct device_attribute *attr,
  145. const char *buf, size_t count)
  146. {
  147. struct ci_hdrc *ci = dev_get_drvdata(dev);
  148. if (count > 2)
  149. return -1;
  150. mutex_lock(&ci->fsm.lock);
  151. if (buf[0] == '1')
  152. ci->fsm.a_clr_err = 1;
  153. ci_otg_queue_work(ci);
  154. mutex_unlock(&ci->fsm.lock);
  155. return count;
  156. }
  157. static DEVICE_ATTR(a_clr_err, S_IWUSR, NULL, set_a_clr_err);
  158. static struct attribute *inputs_attrs[] = {
  159. &dev_attr_a_bus_req.attr,
  160. &dev_attr_a_bus_drop.attr,
  161. &dev_attr_b_bus_req.attr,
  162. &dev_attr_a_clr_err.attr,
  163. NULL,
  164. };
  165. static struct attribute_group inputs_attr_group = {
  166. .name = "inputs",
  167. .attrs = inputs_attrs,
  168. };
  169. /*
  170. * Add timer to active timer list
  171. */
  172. static void ci_otg_add_timer(struct ci_hdrc *ci, enum ci_otg_fsm_timer_index t)
  173. {
  174. struct ci_otg_fsm_timer *tmp_timer;
  175. struct ci_otg_fsm_timer *timer = ci->fsm_timer->timer_list[t];
  176. struct list_head *active_timers = &ci->fsm_timer->active_timers;
  177. if (t >= NUM_CI_OTG_FSM_TIMERS)
  178. return;
  179. /*
  180. * Check if the timer is already in the active list,
  181. * if so update timer count
  182. */
  183. list_for_each_entry(tmp_timer, active_timers, list)
  184. if (tmp_timer == timer) {
  185. timer->count = timer->expires;
  186. return;
  187. }
  188. timer->count = timer->expires;
  189. list_add_tail(&timer->list, active_timers);
  190. /* Enable 1ms irq */
  191. if (!(hw_read_otgsc(ci, OTGSC_1MSIE)))
  192. hw_write_otgsc(ci, OTGSC_1MSIE, OTGSC_1MSIE);
  193. }
  194. /*
  195. * Remove timer from active timer list
  196. */
  197. static void ci_otg_del_timer(struct ci_hdrc *ci, enum ci_otg_fsm_timer_index t)
  198. {
  199. struct ci_otg_fsm_timer *tmp_timer, *del_tmp;
  200. struct ci_otg_fsm_timer *timer = ci->fsm_timer->timer_list[t];
  201. struct list_head *active_timers = &ci->fsm_timer->active_timers;
  202. if (t >= NUM_CI_OTG_FSM_TIMERS)
  203. return;
  204. list_for_each_entry_safe(tmp_timer, del_tmp, active_timers, list)
  205. if (tmp_timer == timer)
  206. list_del(&timer->list);
  207. /* Disable 1ms irq if there is no any active timer */
  208. if (list_empty(active_timers))
  209. hw_write_otgsc(ci, OTGSC_1MSIE, 0);
  210. }
  211. /*
  212. * Reduce timer count by 1, and find timeout conditions.
  213. * Called by otg 1ms timer interrupt
  214. */
  215. static inline int ci_otg_tick_timer(struct ci_hdrc *ci)
  216. {
  217. struct ci_otg_fsm_timer *tmp_timer, *del_tmp;
  218. struct list_head *active_timers = &ci->fsm_timer->active_timers;
  219. int expired = 0;
  220. list_for_each_entry_safe(tmp_timer, del_tmp, active_timers, list) {
  221. tmp_timer->count--;
  222. /* check if timer expires */
  223. if (!tmp_timer->count) {
  224. list_del(&tmp_timer->list);
  225. tmp_timer->function(ci, tmp_timer->data);
  226. expired = 1;
  227. }
  228. }
  229. /* disable 1ms irq if there is no any timer active */
  230. if ((expired == 1) && list_empty(active_timers))
  231. hw_write_otgsc(ci, OTGSC_1MSIE, 0);
  232. return expired;
  233. }
  234. /* The timeout callback function to set time out bit */
  235. static void set_tmout(void *ptr, unsigned long indicator)
  236. {
  237. *(int *)indicator = 1;
  238. }
  239. static void set_tmout_and_fsm(void *ptr, unsigned long indicator)
  240. {
  241. struct ci_hdrc *ci = (struct ci_hdrc *)ptr;
  242. set_tmout(ci, indicator);
  243. ci_otg_queue_work(ci);
  244. }
  245. static void a_wait_vfall_tmout_func(void *ptr, unsigned long indicator)
  246. {
  247. struct ci_hdrc *ci = (struct ci_hdrc *)ptr;
  248. set_tmout(ci, indicator);
  249. /* Disable port power */
  250. hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS | PORTSC_PP, 0);
  251. /* Clear existing DP irq */
  252. hw_write_otgsc(ci, OTGSC_DPIS, OTGSC_DPIS);
  253. /* Enable data pulse irq */
  254. hw_write_otgsc(ci, OTGSC_DPIE, OTGSC_DPIE);
  255. ci_otg_queue_work(ci);
  256. }
  257. static void b_ase0_brst_tmout_func(void *ptr, unsigned long indicator)
  258. {
  259. struct ci_hdrc *ci = (struct ci_hdrc *)ptr;
  260. set_tmout(ci, indicator);
  261. if (!hw_read_otgsc(ci, OTGSC_BSV))
  262. ci->fsm.b_sess_vld = 0;
  263. ci_otg_queue_work(ci);
  264. }
  265. static void b_ssend_srp_tmout_func(void *ptr, unsigned long indicator)
  266. {
  267. struct ci_hdrc *ci = (struct ci_hdrc *)ptr;
  268. set_tmout(ci, indicator);
  269. /* only vbus fall below B_sess_vld in b_idle state */
  270. if (ci->fsm.otg->state == OTG_STATE_B_IDLE)
  271. ci_otg_queue_work(ci);
  272. }
  273. static void b_sess_vld_tmout_func(void *ptr, unsigned long indicator)
  274. {
  275. struct ci_hdrc *ci = (struct ci_hdrc *)ptr;
  276. /* Check if A detached */
  277. if (!(hw_read_otgsc(ci, OTGSC_BSV))) {
  278. ci->fsm.b_sess_vld = 0;
  279. ci_otg_add_timer(ci, B_SSEND_SRP);
  280. ci_otg_queue_work(ci);
  281. }
  282. }
  283. static void b_data_pulse_end(void *ptr, unsigned long indicator)
  284. {
  285. struct ci_hdrc *ci = (struct ci_hdrc *)ptr;
  286. ci->fsm.b_srp_done = 1;
  287. ci->fsm.b_bus_req = 0;
  288. if (ci->fsm.power_up)
  289. ci->fsm.power_up = 0;
  290. hw_write_otgsc(ci, OTGSC_HABA, 0);
  291. ci_otg_queue_work(ci);
  292. }
  293. /* Initialize timers */
  294. static int ci_otg_init_timers(struct ci_hdrc *ci)
  295. {
  296. struct otg_fsm *fsm = &ci->fsm;
  297. /* FSM used timers */
  298. ci->fsm_timer->timer_list[A_WAIT_VRISE] =
  299. otg_timer_initializer(ci, &set_tmout_and_fsm, TA_WAIT_VRISE,
  300. (unsigned long)&fsm->a_wait_vrise_tmout);
  301. if (ci->fsm_timer->timer_list[A_WAIT_VRISE] == NULL)
  302. return -ENOMEM;
  303. ci->fsm_timer->timer_list[A_WAIT_VFALL] =
  304. otg_timer_initializer(ci, &a_wait_vfall_tmout_func,
  305. TA_WAIT_VFALL, (unsigned long)&fsm->a_wait_vfall_tmout);
  306. if (ci->fsm_timer->timer_list[A_WAIT_VFALL] == NULL)
  307. return -ENOMEM;
  308. ci->fsm_timer->timer_list[A_WAIT_BCON] =
  309. otg_timer_initializer(ci, &set_tmout_and_fsm, TA_WAIT_BCON,
  310. (unsigned long)&fsm->a_wait_bcon_tmout);
  311. if (ci->fsm_timer->timer_list[A_WAIT_BCON] == NULL)
  312. return -ENOMEM;
  313. ci->fsm_timer->timer_list[A_AIDL_BDIS] =
  314. otg_timer_initializer(ci, &set_tmout_and_fsm, TA_AIDL_BDIS,
  315. (unsigned long)&fsm->a_aidl_bdis_tmout);
  316. if (ci->fsm_timer->timer_list[A_AIDL_BDIS] == NULL)
  317. return -ENOMEM;
  318. ci->fsm_timer->timer_list[A_BIDL_ADIS] =
  319. otg_timer_initializer(ci, &set_tmout_and_fsm, TA_BIDL_ADIS,
  320. (unsigned long)&fsm->a_bidl_adis_tmout);
  321. if (ci->fsm_timer->timer_list[A_BIDL_ADIS] == NULL)
  322. return -ENOMEM;
  323. ci->fsm_timer->timer_list[B_ASE0_BRST] =
  324. otg_timer_initializer(ci, &b_ase0_brst_tmout_func, TB_ASE0_BRST,
  325. (unsigned long)&fsm->b_ase0_brst_tmout);
  326. if (ci->fsm_timer->timer_list[B_ASE0_BRST] == NULL)
  327. return -ENOMEM;
  328. ci->fsm_timer->timer_list[B_SE0_SRP] =
  329. otg_timer_initializer(ci, &set_tmout_and_fsm, TB_SE0_SRP,
  330. (unsigned long)&fsm->b_se0_srp);
  331. if (ci->fsm_timer->timer_list[B_SE0_SRP] == NULL)
  332. return -ENOMEM;
  333. ci->fsm_timer->timer_list[B_SSEND_SRP] =
  334. otg_timer_initializer(ci, &b_ssend_srp_tmout_func, TB_SSEND_SRP,
  335. (unsigned long)&fsm->b_ssend_srp);
  336. if (ci->fsm_timer->timer_list[B_SSEND_SRP] == NULL)
  337. return -ENOMEM;
  338. ci->fsm_timer->timer_list[B_SRP_FAIL] =
  339. otg_timer_initializer(ci, &set_tmout, TB_SRP_FAIL,
  340. (unsigned long)&fsm->b_srp_done);
  341. if (ci->fsm_timer->timer_list[B_SRP_FAIL] == NULL)
  342. return -ENOMEM;
  343. ci->fsm_timer->timer_list[B_DATA_PLS] =
  344. otg_timer_initializer(ci, &b_data_pulse_end, TB_DATA_PLS, 0);
  345. if (ci->fsm_timer->timer_list[B_DATA_PLS] == NULL)
  346. return -ENOMEM;
  347. ci->fsm_timer->timer_list[B_SESS_VLD] = otg_timer_initializer(ci,
  348. &b_sess_vld_tmout_func, TB_SESS_VLD, 0);
  349. if (ci->fsm_timer->timer_list[B_SESS_VLD] == NULL)
  350. return -ENOMEM;
  351. return 0;
  352. }
  353. /* -------------------------------------------------------------*/
  354. /* Operations that will be called from OTG Finite State Machine */
  355. /* -------------------------------------------------------------*/
  356. static void ci_otg_fsm_add_timer(struct otg_fsm *fsm, enum otg_fsm_timer t)
  357. {
  358. struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm);
  359. if (t < NUM_OTG_FSM_TIMERS)
  360. ci_otg_add_timer(ci, t);
  361. return;
  362. }
  363. static void ci_otg_fsm_del_timer(struct otg_fsm *fsm, enum otg_fsm_timer t)
  364. {
  365. struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm);
  366. if (t < NUM_OTG_FSM_TIMERS)
  367. ci_otg_del_timer(ci, t);
  368. return;
  369. }
  370. /*
  371. * A-device drive vbus: turn on vbus regulator and enable port power
  372. * Data pulse irq should be disabled while vbus is on.
  373. */
  374. static void ci_otg_drv_vbus(struct otg_fsm *fsm, int on)
  375. {
  376. int ret;
  377. struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm);
  378. if (on) {
  379. /* Enable power power */
  380. hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS | PORTSC_PP,
  381. PORTSC_PP);
  382. if (ci->platdata->reg_vbus) {
  383. ret = regulator_enable(ci->platdata->reg_vbus);
  384. if (ret) {
  385. dev_err(ci->dev,
  386. "Failed to enable vbus regulator, ret=%d\n",
  387. ret);
  388. return;
  389. }
  390. }
  391. /* Disable data pulse irq */
  392. hw_write_otgsc(ci, OTGSC_DPIE, 0);
  393. fsm->a_srp_det = 0;
  394. fsm->power_up = 0;
  395. } else {
  396. if (ci->platdata->reg_vbus)
  397. regulator_disable(ci->platdata->reg_vbus);
  398. fsm->a_bus_drop = 1;
  399. fsm->a_bus_req = 0;
  400. }
  401. }
  402. /*
  403. * Control data line by Run Stop bit.
  404. */
  405. static void ci_otg_loc_conn(struct otg_fsm *fsm, int on)
  406. {
  407. struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm);
  408. if (on)
  409. hw_write(ci, OP_USBCMD, USBCMD_RS, USBCMD_RS);
  410. else
  411. hw_write(ci, OP_USBCMD, USBCMD_RS, 0);
  412. }
  413. /*
  414. * Generate SOF by host.
  415. * This is controlled through suspend/resume the port.
  416. * In host mode, controller will automatically send SOF.
  417. * Suspend will block the data on the port.
  418. */
  419. static void ci_otg_loc_sof(struct otg_fsm *fsm, int on)
  420. {
  421. struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm);
  422. if (on)
  423. hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS | PORTSC_FPR,
  424. PORTSC_FPR);
  425. else
  426. hw_write(ci, OP_PORTSC, PORTSC_W1C_BITS | PORTSC_SUSP,
  427. PORTSC_SUSP);
  428. }
  429. /*
  430. * Start SRP pulsing by data-line pulsing,
  431. * no v-bus pulsing followed
  432. */
  433. static void ci_otg_start_pulse(struct otg_fsm *fsm)
  434. {
  435. struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm);
  436. /* Hardware Assistant Data pulse */
  437. hw_write_otgsc(ci, OTGSC_HADP, OTGSC_HADP);
  438. ci_otg_add_timer(ci, B_DATA_PLS);
  439. }
  440. static int ci_otg_start_host(struct otg_fsm *fsm, int on)
  441. {
  442. struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm);
  443. mutex_unlock(&fsm->lock);
  444. if (on) {
  445. ci_role_stop(ci);
  446. ci_role_start(ci, CI_ROLE_HOST);
  447. } else {
  448. ci_role_stop(ci);
  449. hw_device_reset(ci);
  450. ci_role_start(ci, CI_ROLE_GADGET);
  451. }
  452. mutex_lock(&fsm->lock);
  453. return 0;
  454. }
  455. static int ci_otg_start_gadget(struct otg_fsm *fsm, int on)
  456. {
  457. struct ci_hdrc *ci = container_of(fsm, struct ci_hdrc, fsm);
  458. mutex_unlock(&fsm->lock);
  459. if (on)
  460. usb_gadget_vbus_connect(&ci->gadget);
  461. else
  462. usb_gadget_vbus_disconnect(&ci->gadget);
  463. mutex_lock(&fsm->lock);
  464. return 0;
  465. }
  466. static struct otg_fsm_ops ci_otg_ops = {
  467. .drv_vbus = ci_otg_drv_vbus,
  468. .loc_conn = ci_otg_loc_conn,
  469. .loc_sof = ci_otg_loc_sof,
  470. .start_pulse = ci_otg_start_pulse,
  471. .add_timer = ci_otg_fsm_add_timer,
  472. .del_timer = ci_otg_fsm_del_timer,
  473. .start_host = ci_otg_start_host,
  474. .start_gadget = ci_otg_start_gadget,
  475. };
  476. int ci_otg_fsm_work(struct ci_hdrc *ci)
  477. {
  478. /*
  479. * Don't do fsm transition for B device
  480. * when there is no gadget class driver
  481. */
  482. if (ci->fsm.id && !(ci->driver) &&
  483. ci->fsm.otg->state < OTG_STATE_A_IDLE)
  484. return 0;
  485. if (otg_statemachine(&ci->fsm)) {
  486. if (ci->fsm.otg->state == OTG_STATE_A_IDLE) {
  487. /*
  488. * Further state change for cases:
  489. * a_idle to b_idle; or
  490. * a_idle to a_wait_vrise due to ID change(1->0), so
  491. * B-dev becomes A-dev can try to start new session
  492. * consequently; or
  493. * a_idle to a_wait_vrise when power up
  494. */
  495. if ((ci->fsm.id) || (ci->id_event) ||
  496. (ci->fsm.power_up))
  497. ci_otg_queue_work(ci);
  498. if (ci->id_event)
  499. ci->id_event = false;
  500. } else if (ci->fsm.otg->state == OTG_STATE_B_IDLE) {
  501. if (ci->fsm.b_sess_vld) {
  502. ci->fsm.power_up = 0;
  503. /*
  504. * Further transite to b_periphearl state
  505. * when register gadget driver with vbus on
  506. */
  507. ci_otg_queue_work(ci);
  508. }
  509. }
  510. }
  511. return 0;
  512. }
  513. /*
  514. * Update fsm variables in each state if catching expected interrupts,
  515. * called by otg fsm isr.
  516. */
  517. static void ci_otg_fsm_event(struct ci_hdrc *ci)
  518. {
  519. u32 intr_sts, otg_bsess_vld, port_conn;
  520. struct otg_fsm *fsm = &ci->fsm;
  521. intr_sts = hw_read_intr_status(ci);
  522. otg_bsess_vld = hw_read_otgsc(ci, OTGSC_BSV);
  523. port_conn = hw_read(ci, OP_PORTSC, PORTSC_CCS);
  524. switch (ci->fsm.otg->state) {
  525. case OTG_STATE_A_WAIT_BCON:
  526. if (port_conn) {
  527. fsm->b_conn = 1;
  528. fsm->a_bus_req = 1;
  529. ci_otg_queue_work(ci);
  530. }
  531. break;
  532. case OTG_STATE_B_IDLE:
  533. if (otg_bsess_vld && (intr_sts & USBi_PCI) && port_conn) {
  534. fsm->b_sess_vld = 1;
  535. ci_otg_queue_work(ci);
  536. }
  537. break;
  538. case OTG_STATE_B_PERIPHERAL:
  539. if ((intr_sts & USBi_SLI) && port_conn && otg_bsess_vld) {
  540. fsm->a_bus_suspend = 1;
  541. ci_otg_queue_work(ci);
  542. } else if (intr_sts & USBi_PCI) {
  543. if (fsm->a_bus_suspend == 1)
  544. fsm->a_bus_suspend = 0;
  545. }
  546. break;
  547. case OTG_STATE_B_HOST:
  548. if ((intr_sts & USBi_PCI) && !port_conn) {
  549. fsm->a_conn = 0;
  550. fsm->b_bus_req = 0;
  551. ci_otg_queue_work(ci);
  552. ci_otg_add_timer(ci, B_SESS_VLD);
  553. }
  554. break;
  555. case OTG_STATE_A_PERIPHERAL:
  556. if (intr_sts & USBi_SLI) {
  557. fsm->b_bus_suspend = 1;
  558. /*
  559. * Init a timer to know how long this suspend
  560. * will continue, if time out, indicates B no longer
  561. * wants to be host role
  562. */
  563. ci_otg_add_timer(ci, A_BIDL_ADIS);
  564. }
  565. if (intr_sts & USBi_URI)
  566. ci_otg_del_timer(ci, A_BIDL_ADIS);
  567. if (intr_sts & USBi_PCI) {
  568. if (fsm->b_bus_suspend == 1) {
  569. ci_otg_del_timer(ci, A_BIDL_ADIS);
  570. fsm->b_bus_suspend = 0;
  571. }
  572. }
  573. break;
  574. case OTG_STATE_A_SUSPEND:
  575. if ((intr_sts & USBi_PCI) && !port_conn) {
  576. fsm->b_conn = 0;
  577. /* if gadget driver is binded */
  578. if (ci->driver) {
  579. /* A device to be peripheral mode */
  580. ci->gadget.is_a_peripheral = 1;
  581. }
  582. ci_otg_queue_work(ci);
  583. }
  584. break;
  585. case OTG_STATE_A_HOST:
  586. if ((intr_sts & USBi_PCI) && !port_conn) {
  587. fsm->b_conn = 0;
  588. ci_otg_queue_work(ci);
  589. }
  590. break;
  591. case OTG_STATE_B_WAIT_ACON:
  592. if ((intr_sts & USBi_PCI) && port_conn) {
  593. fsm->a_conn = 1;
  594. ci_otg_queue_work(ci);
  595. }
  596. break;
  597. default:
  598. break;
  599. }
  600. }
  601. /*
  602. * ci_otg_irq - otg fsm related irq handling
  603. * and also update otg fsm variable by monitoring usb host and udc
  604. * state change interrupts.
  605. * @ci: ci_hdrc
  606. */
  607. irqreturn_t ci_otg_fsm_irq(struct ci_hdrc *ci)
  608. {
  609. irqreturn_t retval = IRQ_NONE;
  610. u32 otgsc, otg_int_src = 0;
  611. struct otg_fsm *fsm = &ci->fsm;
  612. otgsc = hw_read_otgsc(ci, ~0);
  613. otg_int_src = otgsc & OTGSC_INT_STATUS_BITS & (otgsc >> 8);
  614. fsm->id = (otgsc & OTGSC_ID) ? 1 : 0;
  615. if (otg_int_src) {
  616. if (otg_int_src & OTGSC_1MSIS) {
  617. hw_write_otgsc(ci, OTGSC_1MSIS, OTGSC_1MSIS);
  618. retval = ci_otg_tick_timer(ci);
  619. return IRQ_HANDLED;
  620. } else if (otg_int_src & OTGSC_DPIS) {
  621. hw_write_otgsc(ci, OTGSC_DPIS, OTGSC_DPIS);
  622. fsm->a_srp_det = 1;
  623. fsm->a_bus_drop = 0;
  624. } else if (otg_int_src & OTGSC_IDIS) {
  625. hw_write_otgsc(ci, OTGSC_IDIS, OTGSC_IDIS);
  626. if (fsm->id == 0) {
  627. fsm->a_bus_drop = 0;
  628. fsm->a_bus_req = 1;
  629. ci->id_event = true;
  630. }
  631. } else if (otg_int_src & OTGSC_BSVIS) {
  632. hw_write_otgsc(ci, OTGSC_BSVIS, OTGSC_BSVIS);
  633. if (otgsc & OTGSC_BSV) {
  634. fsm->b_sess_vld = 1;
  635. ci_otg_del_timer(ci, B_SSEND_SRP);
  636. ci_otg_del_timer(ci, B_SRP_FAIL);
  637. fsm->b_ssend_srp = 0;
  638. } else {
  639. fsm->b_sess_vld = 0;
  640. if (fsm->id)
  641. ci_otg_add_timer(ci, B_SSEND_SRP);
  642. }
  643. } else if (otg_int_src & OTGSC_AVVIS) {
  644. hw_write_otgsc(ci, OTGSC_AVVIS, OTGSC_AVVIS);
  645. if (otgsc & OTGSC_AVV) {
  646. fsm->a_vbus_vld = 1;
  647. } else {
  648. fsm->a_vbus_vld = 0;
  649. fsm->b_conn = 0;
  650. }
  651. }
  652. ci_otg_queue_work(ci);
  653. return IRQ_HANDLED;
  654. }
  655. ci_otg_fsm_event(ci);
  656. return retval;
  657. }
  658. void ci_hdrc_otg_fsm_start(struct ci_hdrc *ci)
  659. {
  660. ci_otg_queue_work(ci);
  661. }
  662. int ci_hdrc_otg_fsm_init(struct ci_hdrc *ci)
  663. {
  664. int retval = 0;
  665. if (ci->phy)
  666. ci->otg.phy = ci->phy;
  667. else
  668. ci->otg.usb_phy = ci->usb_phy;
  669. ci->otg.gadget = &ci->gadget;
  670. ci->fsm.otg = &ci->otg;
  671. ci->fsm.power_up = 1;
  672. ci->fsm.id = hw_read_otgsc(ci, OTGSC_ID) ? 1 : 0;
  673. ci->fsm.otg->state = OTG_STATE_UNDEFINED;
  674. ci->fsm.ops = &ci_otg_ops;
  675. mutex_init(&ci->fsm.lock);
  676. ci->fsm_timer = devm_kzalloc(ci->dev,
  677. sizeof(struct ci_otg_fsm_timer_list), GFP_KERNEL);
  678. if (!ci->fsm_timer)
  679. return -ENOMEM;
  680. INIT_LIST_HEAD(&ci->fsm_timer->active_timers);
  681. retval = ci_otg_init_timers(ci);
  682. if (retval) {
  683. dev_err(ci->dev, "Couldn't init OTG timers\n");
  684. return retval;
  685. }
  686. retval = sysfs_create_group(&ci->dev->kobj, &inputs_attr_group);
  687. if (retval < 0) {
  688. dev_dbg(ci->dev,
  689. "Can't register sysfs attr group: %d\n", retval);
  690. return retval;
  691. }
  692. /* Enable A vbus valid irq */
  693. hw_write_otgsc(ci, OTGSC_AVVIE, OTGSC_AVVIE);
  694. if (ci->fsm.id) {
  695. ci->fsm.b_ssend_srp =
  696. hw_read_otgsc(ci, OTGSC_BSV) ? 0 : 1;
  697. ci->fsm.b_sess_vld =
  698. hw_read_otgsc(ci, OTGSC_BSV) ? 1 : 0;
  699. /* Enable BSV irq */
  700. hw_write_otgsc(ci, OTGSC_BSVIE, OTGSC_BSVIE);
  701. }
  702. return 0;
  703. }
  704. void ci_hdrc_otg_fsm_remove(struct ci_hdrc *ci)
  705. {
  706. sysfs_remove_group(&ci->dev->kobj, &inputs_attr_group);
  707. }